1 # Copyright (C) 1999-2016 Free Software Foundation, Inc.
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC; see the file COPYING3. If not see
15 # <http://www.gnu.org/licenses/>.
17 # Please email any bugs, comments, and/or additions to this file to:
18 # gcc-patches@gcc.gnu.org
20 # This file defines procs for determining features supported by the target.
22 # Try to compile the code given by CONTENTS into an output file of
23 # type TYPE, where TYPE is as for target_compile. Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the name of the output file.
27 # BASENAME is a prefix to use for source and output files.
28 # If ARGS is not empty, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise, code should contain:
34 # "! Fortran" for Fortran code,
36 # "// ObjC++" for ObjC++
38 # If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
39 # allow for ObjC/ObjC++ specific flags.
40 proc check_compile {basename type contents args} {
42 verbose "check_compile tool: $tool for $basename"
44 # Save additional_sources to avoid compiling testsuite's sources
45 # against check_compile's source.
46 global additional_sources
47 if [info exists additional_sources] {
48 set tmp_additional_sources "$additional_sources"
49 set additional_sources ""
52 if { [llength $args] > 0 } {
53 set options [list "additional_flags=[lindex $args 0]"]
57 switch -glob -- $contents {
58 "*! Fortran*" { set src ${basename}[pid].f90 }
59 "*// C++*" { set src ${basename}[pid].cc }
60 "*// ObjC++*" { set src ${basename}[pid].mm }
61 "*/* ObjC*" { set src ${basename}[pid].m }
62 "*// Go*" { set src ${basename}[pid].go }
65 "objc" { set src ${basename}[pid].m }
66 "obj-c++" { set src ${basename}[pid].mm }
67 default { set src ${basename}[pid].c }
72 set compile_type $type
74 assembly { set output ${basename}[pid].s }
75 object { set output ${basename}[pid].o }
76 executable { set output ${basename}[pid].exe }
78 set output ${basename}[pid].s
79 lappend options "additional_flags=-fdump-$type"
80 set compile_type assembly
86 set lines [${tool}_target_compile $src $output $compile_type "$options"]
89 set scan_output $output
90 # Don't try folding this into the switch above; calling "glob" before the
91 # file is created won't work.
92 if [regexp "rtl-(.*)" $type dummy rtl_type] {
93 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
97 # Restore additional_sources.
98 if [info exists additional_sources] {
99 set additional_sources "$tmp_additional_sources"
102 return [list $lines $scan_output]
105 proc current_target_name { } {
107 if [info exists target_info(target,name)] {
108 set answer $target_info(target,name)
115 # Implement an effective-target check for property PROP by invoking
116 # the Tcl command ARGS and seeing if it returns true.
118 proc check_cached_effective_target { prop args } {
122 set target [current_target_name]
123 if {![info exists et_cache($prop,target)]
124 || $et_cache($prop,target) != $target} {
125 verbose "check_cached_effective_target $prop: checking $target" 2
126 set et_cache($prop,target) $target
127 set et_cache($prop,value) [uplevel eval $args]
128 if {![info exists et_prop_list]
129 || [lsearch $et_prop_list $prop] < 0} {
130 lappend et_prop_list $prop
132 verbose "check_cached_effective_target cached list is now: $et_prop_list" 2
134 set value $et_cache($prop,value)
135 verbose "check_cached_effective_target $prop: returning $value for $target" 2
139 # Clear effective-target cache. This is useful after testing
140 # effective-target features and overriding TEST_ALWAYS_FLAGS and/or
142 # If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS then they should
143 # do a clear_effective_target_cache at the end as the target cache can
144 # make decisions based upon the flags, and those decisions need to be
145 # redone when the flags change. An example of this is the
146 # asan_init/asan_finish pair.
148 proc clear_effective_target_cache { } {
152 if {[info exists et_prop_list]} {
153 verbose "clear_effective_target_cache: $et_prop_list" 2
154 foreach prop $et_prop_list {
155 unset et_cache($prop,value)
156 unset et_cache($prop,target)
162 # Like check_compile, but delete the output file and return true if the
163 # compiler printed no messages.
164 proc check_no_compiler_messages_nocache {args} {
165 set result [eval check_compile $args]
166 set lines [lindex $result 0]
167 set output [lindex $result 1]
168 remote_file build delete $output
169 return [string match "" $lines]
172 # Like check_no_compiler_messages_nocache, but cache the result.
173 # PROP is the property we're checking, and doubles as a prefix for
174 # temporary filenames.
175 proc check_no_compiler_messages {prop args} {
176 return [check_cached_effective_target $prop {
177 eval [list check_no_compiler_messages_nocache $prop] $args
181 # Like check_compile, but return true if the compiler printed no
182 # messages and if the contents of the output file satisfy PATTERN.
183 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
184 # don't match regular expression REGEXP, otherwise they satisfy it
185 # if they do match regular expression PATTERN. (PATTERN can start
186 # with something like "[!]" if the regular expression needs to match
187 # "!" as the first character.)
189 # Delete the output file before returning. The other arguments are
190 # as for check_compile.
191 proc check_no_messages_and_pattern_nocache {basename pattern args} {
194 set result [eval [list check_compile $basename] $args]
195 set lines [lindex $result 0]
196 set output [lindex $result 1]
199 if { [string match "" $lines] } {
200 set chan [open "$output"]
201 set invert [regexp {^!(.*)} $pattern dummy pattern]
202 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
206 remote_file build delete $output
210 # Like check_no_messages_and_pattern_nocache, but cache the result.
211 # PROP is the property we're checking, and doubles as a prefix for
212 # temporary filenames.
213 proc check_no_messages_and_pattern {prop pattern args} {
214 return [check_cached_effective_target $prop {
215 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
219 # Try to compile and run an executable from code CONTENTS. Return true
220 # if the compiler reports no messages and if execution "passes" in the
221 # usual DejaGNU sense. The arguments are as for check_compile, with
222 # TYPE implicitly being "executable".
223 proc check_runtime_nocache {basename contents args} {
226 set result [eval [list check_compile $basename executable $contents] $args]
227 set lines [lindex $result 0]
228 set output [lindex $result 1]
231 if { [string match "" $lines] } {
232 # No error messages, everything is OK.
233 set result [remote_load target "./$output" "" ""]
234 set status [lindex $result 0]
235 verbose "check_runtime_nocache $basename: status is <$status>" 2
236 if { $status == "pass" } {
240 remote_file build delete $output
244 # Like check_runtime_nocache, but cache the result. PROP is the
245 # property we're checking, and doubles as a prefix for temporary
247 proc check_runtime {prop args} {
250 return [check_cached_effective_target $prop {
251 eval [list check_runtime_nocache $prop] $args
255 ###############################
256 # proc check_weak_available { }
257 ###############################
259 # weak symbols are only supported in some configs/object formats
260 # this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
262 proc check_weak_available { } {
265 # All mips targets should support it
267 if { [ string first "mips" $target_cpu ] >= 0 } {
271 # All AIX targets should support it
273 if { [istarget *-*-aix*] } {
277 # All solaris2 targets should support it
279 if { [istarget *-*-solaris2*] } {
283 # Windows targets Cygwin and MingW32 support it
285 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
289 # HP-UX 10.X doesn't support it
291 if { [istarget hppa*-*-hpux10*] } {
295 # nvptx (nearly) supports it
297 if { [istarget nvptx-*-*] } {
301 # ELF and ECOFF support it. a.out does with gas/gld but may also with
302 # other linkers, so we should try it
304 set objformat [gcc_target_object_format]
312 unknown { return -1 }
317 ###############################
318 # proc check_weak_override_available { }
319 ###############################
321 # Like check_weak_available, but return 0 if weak symbol definitions
322 # cannot be overridden.
324 proc check_weak_override_available { } {
325 if { [istarget *-*-mingw*] } {
328 return [check_weak_available]
331 ###############################
332 # proc check_visibility_available { what_kind }
333 ###############################
335 # The visibility attribute is only support in some object formats
336 # This proc returns 1 if it is supported, 0 if not.
337 # The argument is the kind of visibility, default/protected/hidden/internal.
339 proc check_visibility_available { what_kind } {
340 if [string match "" $what_kind] { set what_kind "hidden" }
342 return [check_no_compiler_messages visibility_available_$what_kind object "
343 void f() __attribute__((visibility(\"$what_kind\")));
348 ###############################
349 # proc check_alias_available { }
350 ###############################
352 # Determine if the target toolchain supports the alias attribute.
354 # Returns 2 if the target supports aliases. Returns 1 if the target
355 # only supports weak aliased. Returns 0 if the target does not
356 # support aliases at all. Returns -1 if support for aliases could not
359 proc check_alias_available { } {
360 global alias_available_saved
363 if [info exists alias_available_saved] {
364 verbose "check_alias_available returning saved $alias_available_saved" 2
368 verbose "check_alias_available compiling testfile $src" 2
369 set f [open $src "w"]
370 # Compile a small test program. The definition of "g" is
371 # necessary to keep the Solaris assembler from complaining
373 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
374 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
376 set lines [${tool}_target_compile $src $obj object ""]
378 remote_file build delete $obj
380 if [string match "" $lines] then {
381 # No error messages, everything is OK.
382 set alias_available_saved 2
384 if [regexp "alias definitions not supported" $lines] {
385 verbose "check_alias_available target does not support aliases" 2
387 set objformat [gcc_target_object_format]
389 if { $objformat == "elf" } {
390 verbose "check_alias_available but target uses ELF format, so it ought to" 2
391 set alias_available_saved -1
393 set alias_available_saved 0
396 if [regexp "only weak aliases are supported" $lines] {
397 verbose "check_alias_available target supports only weak aliases" 2
398 set alias_available_saved 1
400 set alias_available_saved -1
405 verbose "check_alias_available returning $alias_available_saved" 2
408 return $alias_available_saved
411 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
413 proc check_effective_target_alias { } {
414 if { [check_alias_available] < 2 } {
421 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
423 proc check_ifunc_available { } {
424 return [check_no_compiler_messages ifunc_available object {
429 void f() __attribute__((ifunc("g")));
433 # Returns true if --gc-sections is supported on the target.
435 proc check_gc_sections_available { } {
436 global gc_sections_available_saved
439 if {![info exists gc_sections_available_saved]} {
440 # Some targets don't support gc-sections despite whatever's
441 # advertised by ld's options.
442 if { [istarget alpha*-*-*]
443 || [istarget ia64-*-*] } {
444 set gc_sections_available_saved 0
448 # elf2flt uses -q (--emit-relocs), which is incompatible with
450 if { [board_info target exists ldflags]
451 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
452 set gc_sections_available_saved 0
456 # VxWorks kernel modules are relocatable objects linked with -r,
457 # while RTP executables are linked with -q (--emit-relocs).
458 # Both of these options are incompatible with --gc-sections.
459 if { [istarget *-*-vxworks*] } {
460 set gc_sections_available_saved 0
464 # Check if the ld used by gcc supports --gc-sections.
465 set gcc_spec [${tool}_target_compile "-dumpspecs" "" "none" ""]
466 regsub ".*\n\\*linker:\[ \t\]*\n(\[^ \t\n\]*).*" "$gcc_spec" {\1} linker
467 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=$linker" "" "none" ""] 0]
468 set ld_output [remote_exec host "$gcc_ld" "--help"]
469 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
470 set gc_sections_available_saved 1
472 set gc_sections_available_saved 0
475 return $gc_sections_available_saved
478 # Return 1 if according to target_info struct and explicit target list
479 # target is supposed to support trampolines.
481 proc check_effective_target_trampolines { } {
482 if [target_info exists no_trampolines] {
485 if { [istarget avr-*-*]
486 || [istarget msp430-*-*]
487 || [istarget nvptx-*-*]
488 || [istarget hppa2.0w-hp-hpux11.23]
489 || [istarget hppa64-hp-hpux11.23] } {
495 # Return 1 if according to target_info struct and explicit target list
496 # target disables -fdelete-null-pointer-checks. Targets should return 0
497 # if they simply default to -fno-delete-null-pointer-checks but obey
498 # -fdelete-null-pointer-checks when passed explicitly (and tests that
499 # depend on this option should do that).
501 proc check_effective_target_keeps_null_pointer_checks { } {
502 if [target_info exists keeps_null_pointer_checks] {
505 if { [istarget avr-*-*] } {
511 # Return true if profiling is supported on the target.
513 proc check_profiling_available { test_what } {
514 global profiling_available_saved
516 verbose "Profiling argument is <$test_what>" 1
518 # These conditions depend on the argument so examine them before
519 # looking at the cache variable.
521 # Tree profiling requires TLS runtime support.
522 if { $test_what == "-fprofile-generate" } {
523 if { ![check_effective_target_tls_runtime] } {
528 # Support for -p on solaris2 relies on mcrt1.o which comes with the
529 # vendor compiler. We cannot reliably predict the directory where the
530 # vendor compiler (and thus mcrt1.o) is installed so we can't
531 # necessarily find mcrt1.o even if we have it.
532 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
536 # We don't yet support profiling for MIPS16.
537 if { [istarget mips*-*-*]
538 && ![check_effective_target_nomips16]
539 && ($test_what == "-p" || $test_what == "-pg") } {
543 # MinGW does not support -p.
544 if { [istarget *-*-mingw*] && $test_what == "-p" } {
548 # cygwin does not support -p.
549 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
553 # uClibc does not have gcrt1.o.
554 if { [check_effective_target_uclibc]
555 && ($test_what == "-p" || $test_what == "-pg") } {
559 # Now examine the cache variable.
560 if {![info exists profiling_available_saved]} {
561 # Some targets don't have any implementation of __bb_init_func or are
562 # missing other needed machinery.
563 if {[istarget aarch64*-*-elf]
564 || [istarget am3*-*-linux*]
565 || [istarget arm*-*-eabi*]
566 || [istarget arm*-*-elf]
567 || [istarget arm*-*-symbianelf*]
568 || [istarget avr-*-*]
569 || [istarget bfin-*-*]
570 || [istarget cris-*-*]
571 || [istarget crisv32-*-*]
572 || [istarget fido-*-elf]
573 || [istarget h8300-*-*]
574 || [istarget lm32-*-*]
575 || [istarget m32c-*-elf]
576 || [istarget m68k-*-elf]
577 || [istarget m68k-*-uclinux*]
578 || [istarget mep-*-elf]
579 || [istarget mips*-*-elf*]
580 || [istarget mmix-*-*]
581 || [istarget mn10300-*-elf*]
582 || [istarget moxie-*-elf*]
583 || [istarget msp430-*-*]
584 || [istarget nds32*-*-elf]
585 || [istarget nios2-*-elf]
586 || [istarget nvptx-*-*]
587 || [istarget powerpc-*-eabi*]
588 || [istarget powerpc-*-elf]
590 || [istarget tic6x-*-elf]
591 || [istarget visium-*-*]
592 || [istarget xstormy16-*]
593 || [istarget xtensa*-*-elf]
594 || [istarget *-*-rtems*]
595 || [istarget *-*-vxworks*] } {
596 set profiling_available_saved 0
598 set profiling_available_saved 1
602 # -pg link test result can't be cached since it may change between
604 set profiling_working $profiling_available_saved
605 if { $profiling_available_saved == 1
606 && ![check_no_compiler_messages_nocache profiling executable {
607 int main() { return 0; } } "-pg"] } {
608 set profiling_working 0
611 return $profiling_working
614 # Check to see if a target is "freestanding". This is as per the definition
615 # in Section 4 of C99 standard. Effectively, it is a target which supports no
616 # extra headers or libraries other than what is considered essential.
617 proc check_effective_target_freestanding { } {
618 if { [istarget nvptx-*-*] } {
624 # Return 1 if target has packed layout of structure members by
625 # default, 0 otherwise. Note that this is slightly different than
626 # whether the target has "natural alignment": both attributes may be
629 proc check_effective_target_default_packed { } {
630 return [check_no_compiler_messages default_packed assembly {
631 struct x { char a; long b; } c;
632 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
636 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
637 # documentation, where the test also comes from.
639 proc check_effective_target_pcc_bitfield_type_matters { } {
640 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
641 # bitfields, but let's stick to the example code from the docs.
642 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
643 struct foo1 { char x; char :0; char y; };
644 struct foo2 { char x; int :0; char y; };
645 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
649 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
651 proc add_options_for_tls { flags } {
652 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
653 # libthread, so always pass -pthread for native TLS. Same for AIX.
654 # Need to duplicate native TLS check from
655 # check_effective_target_tls_native to avoid recursion.
656 if { ([istarget powerpc-ibm-aix*]) &&
657 [check_no_messages_and_pattern tls_native "!emutls" assembly {
659 int f (void) { return i; }
660 void g (int j) { i = j; }
662 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
667 # Return 1 if indirect jumps are supported, 0 otherwise.
669 proc check_effective_target_indirect_jumps {} {
670 if { [istarget nvptx-*-*] } {
676 # Return 1 if nonlocal goto is supported, 0 otherwise.
678 proc check_effective_target_nonlocal_goto {} {
679 if { [istarget nvptx-*-*] } {
685 # Return 1 if global constructors are supported, 0 otherwise.
687 proc check_effective_target_global_constructor {} {
688 if { [istarget nvptx-*-*] } {
694 # Return 1 if taking label values is supported, 0 otherwise.
696 proc check_effective_target_label_values {} {
697 if { [istarget nvptx-*-*] } {
700 return [check_no_compiler_messages label_values assembly {
701 #ifdef NO_LABEL_VALUES
707 # Return 1 if builtin_return_address and builtin_frame_address are
708 # supported, 0 otherwise.
710 proc check_effective_target_return_address {} {
711 if { [istarget nvptx-*-*] } {
717 # Return 1 if the assembler does not verify function types against
718 # calls, 0 otherwise. Such verification will typically show up problems
719 # with K&R C function declarations.
721 proc check_effective_target_untyped_assembly {} {
722 if { [istarget nvptx-*-*] } {
728 # Return 1 if alloca is supported, 0 otherwise.
730 proc check_effective_target_alloca {} {
731 if { [istarget nvptx-*-*] } {
737 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
739 proc check_effective_target_tls {} {
740 return [check_no_compiler_messages tls assembly {
742 int f (void) { return i; }
743 void g (int j) { i = j; }
747 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
749 proc check_effective_target_tls_native {} {
750 # VxWorks uses emulated TLS machinery, but with non-standard helper
751 # functions, so we fail to automatically detect it.
752 if { [istarget *-*-vxworks*] } {
756 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
758 int f (void) { return i; }
759 void g (int j) { i = j; }
763 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
765 proc check_effective_target_tls_emulated {} {
766 # VxWorks uses emulated TLS machinery, but with non-standard helper
767 # functions, so we fail to automatically detect it.
768 if { [istarget *-*-vxworks*] } {
772 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
774 int f (void) { return i; }
775 void g (int j) { i = j; }
779 # Return 1 if TLS executables can run correctly, 0 otherwise.
781 proc check_effective_target_tls_runtime {} {
782 # The runtime does not have TLS support, but just
783 # running the test below is insufficient to show this.
784 if { [istarget msp430-*-*] || [istarget visium-*-*] } {
787 return [check_runtime tls_runtime {
788 __thread int thr = 0;
789 int main (void) { return thr; }
790 } [add_options_for_tls ""]]
793 # Return 1 if atomic compare-and-swap is supported on 'int'
795 proc check_effective_target_cas_char {} {
796 return [check_no_compiler_messages cas_char assembly {
797 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
803 proc check_effective_target_cas_int {} {
804 return [check_no_compiler_messages cas_int assembly {
805 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
807 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
815 # Return 1 if -ffunction-sections is supported, 0 otherwise.
817 proc check_effective_target_function_sections {} {
818 # Darwin has its own scheme and silently accepts -ffunction-sections.
819 if { [istarget *-*-darwin*] } {
823 return [check_no_compiler_messages functionsections assembly {
825 } "-ffunction-sections"]
828 # Return 1 if instruction scheduling is available, 0 otherwise.
830 proc check_effective_target_scheduling {} {
831 return [check_no_compiler_messages scheduling object {
833 } "-fschedule-insns"]
836 # Return 1 if trapping arithmetic is available, 0 otherwise.
838 proc check_effective_target_trapping {} {
839 return [check_no_compiler_messages trapping object {
840 int add (int a, int b) { return a + b; }
844 # Return 1 if compilation with -fgraphite is error-free for trivial
847 proc check_effective_target_fgraphite {} {
848 return [check_no_compiler_messages fgraphite object {
853 # Return 1 if compilation with -fopenacc is error-free for trivial
856 proc check_effective_target_fopenacc {} {
857 # nvptx can be built with the device-side bits of openacc, but it
858 # does not make sense to test it as an openacc host.
859 if [istarget nvptx-*-*] { return 0 }
861 return [check_no_compiler_messages fopenacc object {
866 # Return 1 if compilation with -fopenmp is error-free for trivial
869 proc check_effective_target_fopenmp {} {
870 # nvptx can be built with the device-side bits of libgomp, but it
871 # does not make sense to test it as an openmp host.
872 if [istarget nvptx-*-*] { return 0 }
874 return [check_no_compiler_messages fopenmp object {
879 # Return 1 if compilation with -fgnu-tm is error-free for trivial
882 proc check_effective_target_fgnu_tm {} {
883 return [check_no_compiler_messages fgnu_tm object {
888 # Return 1 if the target supports mmap, 0 otherwise.
890 proc check_effective_target_mmap {} {
891 return [check_function_available "mmap"]
894 # Return 1 if the target supports dlopen, 0 otherwise.
895 proc check_effective_target_dlopen {} {
896 return [check_no_compiler_messages dlopen executable {
898 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
899 } [add_options_for_dlopen ""]]
902 proc add_options_for_dlopen { flags } {
906 # Return 1 if the target supports clone, 0 otherwise.
907 proc check_effective_target_clone {} {
908 return [check_function_available "clone"]
911 # Return 1 if the target supports setrlimit, 0 otherwise.
912 proc check_effective_target_setrlimit {} {
913 # Darwin has non-posix compliant RLIMIT_AS
914 if { [istarget *-*-darwin*] } {
917 return [check_function_available "setrlimit"]
920 # Return 1 if the target supports swapcontext, 0 otherwise.
921 proc check_effective_target_swapcontext {} {
922 return [check_no_compiler_messages swapcontext executable {
923 #include <ucontext.h>
926 ucontext_t orig_context,child_context;
927 if (swapcontext(&child_context, &orig_context) < 0) { }
932 # Return 1 if compilation with -pthread is error-free for trivial
935 proc check_effective_target_pthread {} {
936 return [check_no_compiler_messages pthread object {
941 # Return 1 if compilation with -gstabs is error-free for trivial
944 proc check_effective_target_stabs {} {
945 return [check_no_compiler_messages stabs object {
950 # Return 1 if compilation with -mpe-aligned-commons is error-free
951 # for trivial code, 0 otherwise.
953 proc check_effective_target_pe_aligned_commons {} {
954 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
955 return [check_no_compiler_messages pe_aligned_commons object {
957 } "-mpe-aligned-commons"]
962 # Return 1 if the target supports -static
963 proc check_effective_target_static {} {
964 return [check_no_compiler_messages static executable {
965 int main (void) { return 0; }
969 # Return 1 if the target supports -fstack-protector
970 proc check_effective_target_fstack_protector {} {
971 return [check_runtime fstack_protector {
972 int main (void) { return 0; }
973 } "-fstack-protector"]
976 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
977 # for trivial code, 0 otherwise.
979 proc check_effective_target_freorder {} {
980 return [check_no_compiler_messages freorder object {
982 } "-freorder-blocks-and-partition"]
985 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
986 # emitted, 0 otherwise. Whether a shared library can actually be built is
987 # out of scope for this test.
989 proc check_effective_target_fpic { } {
990 # Note that M68K has a multilib that supports -fpic but not
991 # -fPIC, so we need to check both. We test with a program that
992 # requires GOT references.
993 foreach arg {fpic fPIC} {
994 if [check_no_compiler_messages $arg object {
995 extern int foo (void); extern int bar;
996 int baz (void) { return foo () + bar; }
1004 # On AArch64, if -fpic is not supported, then we will fall back to -fPIC
1005 # silently. So, we can't rely on above "check_effective_target_fpic" as it
1006 # assumes compiler will give warning if -fpic not supported. Here we check
1007 # whether binutils supports those new -fpic relocation modifiers, and assume
1008 # -fpic is supported if there is binutils support. GCC configuration will
1009 # enable -fpic for AArch64 in this case.
1011 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1012 # memory model -fpic relocation types.
1014 proc check_effective_target_aarch64_small_fpic { } {
1015 if { [istarget aarch64*-*-*] } {
1016 return [check_no_compiler_messages aarch64_small_fpic object {
1017 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1024 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1025 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1026 # in binutils since 2015-03-04 as PR gas/17843.
1028 # This test directive make sure binutils support all features needed by TLS LE
1029 # under -mtls-size=32 on AArch64.
1031 proc check_effective_target_aarch64_tlsle32 { } {
1032 if { [istarget aarch64*-*-*] } {
1033 return [check_no_compiler_messages aarch64_tlsle32 object {
1034 void foo (void) { asm ("movk x1,#:tprel_g0_nc:t1"); }
1041 # Return 1 if -shared is supported, as in no warnings or errors
1042 # emitted, 0 otherwise.
1044 proc check_effective_target_shared { } {
1045 # Note that M68K has a multilib that supports -fpic but not
1046 # -fPIC, so we need to check both. We test with a program that
1047 # requires GOT references.
1048 return [check_no_compiler_messages shared executable {
1049 extern int foo (void); extern int bar;
1050 int baz (void) { return foo () + bar; }
1054 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
1056 proc check_effective_target_pie { } {
1057 if { [istarget *-*-darwin\[912\]*]
1058 || [istarget *-*-dragonfly*]
1059 || [istarget *-*-freebsd*]
1060 || [istarget *-*-linux*]
1061 || [istarget *-*-gnu*] } {
1064 if { [istarget *-*-solaris2.1\[1-9\]*] } {
1065 # Full PIE support was added in Solaris 11.x and Solaris 12, but gcc
1066 # errors out if missing, so check for that.
1067 return [check_no_compiler_messages pie executable {
1068 int main (void) { return 0; }
1074 # Return true if the target supports -mpaired-single (as used on MIPS).
1076 proc check_effective_target_mpaired_single { } {
1077 return [check_no_compiler_messages mpaired_single object {
1079 } "-mpaired-single"]
1082 # Return true if the target has access to FPU instructions.
1084 proc check_effective_target_hard_float { } {
1085 if { [istarget mips*-*-*] } {
1086 return [check_no_compiler_messages hard_float assembly {
1087 #if (defined __mips_soft_float || defined __mips16)
1088 #error __mips_soft_float || __mips16
1093 # This proc is actually checking the availabilty of FPU
1094 # support for doubles, so on the RX we must fail if the
1095 # 64-bit double multilib has been selected.
1096 if { [istarget rx-*-*] } {
1098 # return [check_no_compiler_messages hard_float assembly {
1099 #if defined __RX_64_BIT_DOUBLES__
1100 #error __RX_64_BIT_DOUBLES__
1105 # The generic test equates hard_float with "no call for adding doubles".
1106 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
1107 double a (double b, double c) { return b + c; }
1111 # Return true if the target is a 64-bit MIPS target.
1113 proc check_effective_target_mips64 { } {
1114 return [check_no_compiler_messages mips64 assembly {
1121 # Return true if the target is a MIPS target that does not produce
1124 proc check_effective_target_nomips16 { } {
1125 return [check_no_compiler_messages nomips16 object {
1129 /* A cheap way of testing for -mflip-mips16. */
1130 void foo (void) { asm ("addiu $20,$20,1"); }
1131 void bar (void) { asm ("addiu $20,$20,1"); }
1136 # Add the options needed for MIPS16 function attributes. At the moment,
1137 # we don't support MIPS16 PIC.
1139 proc add_options_for_mips16_attribute { flags } {
1140 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1143 # Return true if we can force a mode that allows MIPS16 code generation.
1144 # We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
1147 proc check_effective_target_mips16_attribute { } {
1148 return [check_no_compiler_messages mips16_attribute assembly {
1152 #if defined __mips_hard_float \
1153 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
1154 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
1155 #error __mips_hard_float && (!_ABIO32 || !_ABIO64)
1157 } [add_options_for_mips16_attribute ""]]
1160 # Return 1 if the target supports long double larger than double when
1161 # using the new ABI, 0 otherwise.
1163 proc check_effective_target_mips_newabi_large_long_double { } {
1164 return [check_no_compiler_messages mips_newabi_large_long_double object {
1165 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1169 # Return true if the target is a MIPS target that has access
1170 # to the LL and SC instructions.
1172 proc check_effective_target_mips_llsc { } {
1173 if { ![istarget mips*-*-*] } {
1176 # Assume that these instructions are always implemented for
1177 # non-elf* targets, via emulation if necessary.
1178 if { ![istarget *-*-elf*] } {
1181 # Otherwise assume LL/SC support for everything but MIPS I.
1182 return [check_no_compiler_messages mips_llsc assembly {
1189 # Return true if the target is a MIPS target that uses in-place relocations.
1191 proc check_effective_target_mips_rel { } {
1192 if { ![istarget mips*-*-*] } {
1195 return [check_no_compiler_messages mips_rel object {
1196 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
1197 || (defined _ABI64 && _MIPS_SIM == _ABI64)
1198 #error _ABIN32 && (_ABIN32 || _ABI64)
1203 # Return true if the target is a MIPS target that uses the EABI.
1205 proc check_effective_target_mips_eabi { } {
1206 if { ![istarget mips*-*-*] } {
1209 return [check_no_compiler_messages mips_eabi object {
1216 # Return 1 if the current multilib does not generate PIC by default.
1218 proc check_effective_target_nonpic { } {
1219 return [check_no_compiler_messages nonpic assembly {
1226 # Return 1 if the current multilib generates PIE by default.
1228 proc check_effective_target_pie_enabled { } {
1229 return [check_no_compiler_messages pie_enabled assembly {
1236 # Return 1 if the target generates -fstack-protector by default.
1238 proc check_effective_target_fstack_protector_enabled {} {
1239 return [ check_no_compiler_messages fstack_protector_enabled assembly {
1240 #if !defined(__SSP__) && !defined(__SSP_ALL__) && \
1241 !defined(__SSP_STRONG__) && !defined(__SSP_EXPICIT__)
1247 # Return 1 if the target does not use a status wrapper.
1249 proc check_effective_target_unwrapped { } {
1250 if { [target_info needs_status_wrapper] != "" \
1251 && [target_info needs_status_wrapper] != "0" } {
1257 # Return true if iconv is supported on the target. In particular IBM1047.
1259 proc check_iconv_available { test_what } {
1262 # If the tool configuration file has not set libiconv, try "-liconv"
1263 if { ![info exists libiconv] } {
1264 set libiconv "-liconv"
1266 set test_what [lindex $test_what 1]
1267 return [check_runtime_nocache $test_what [subst {
1273 cd = iconv_open ("$test_what", "UTF-8");
1274 if (cd == (iconv_t) -1)
1281 # Return true if Cilk Library is supported on the target.
1282 proc check_effective_target_cilkplus_runtime { } {
1283 return [ check_no_compiler_messages_nocache cilkplus_runtime executable {
1287 int __cilkrts_set_param (const char *, const char *);
1289 int x = __cilkrts_set_param ("nworkers", "0");
1292 } "-fcilkplus -lcilkrts" ]
1295 # Return true if the atomic library is supported on the target.
1296 proc check_effective_target_libatomic_available { } {
1297 return [check_no_compiler_messages libatomic_available executable {
1298 int main (void) { return 0; }
1302 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1304 proc check_ascii_locale_available { } {
1308 # Return true if named sections are supported on this target.
1310 proc check_named_sections_available { } {
1311 return [check_no_compiler_messages named_sections assembly {
1312 int __attribute__ ((section("whatever"))) foo;
1316 # Return true if the "naked" function attribute is supported on this target.
1318 proc check_effective_target_naked_functions { } {
1319 return [check_no_compiler_messages naked_functions assembly {
1320 void f() __attribute__((naked));
1324 # Return 1 if the target supports Fortran real kinds larger than real(8),
1327 # When the target name changes, replace the cached result.
1329 proc check_effective_target_fortran_large_real { } {
1330 return [check_no_compiler_messages fortran_large_real executable {
1332 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1339 # Return 1 if the target supports Fortran real kind real(16),
1340 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1341 # this checks for Real(16) only; the other returned real(10) if
1342 # both real(10) and real(16) are available.
1344 # When the target name changes, replace the cached result.
1346 proc check_effective_target_fortran_real_16 { } {
1347 return [check_no_compiler_messages fortran_real_16 executable {
1356 # Return 1 if the target supports Fortran's IEEE modules,
1359 # When the target name changes, replace the cached result.
1361 proc check_effective_target_fortran_ieee { flags } {
1362 return [check_no_compiler_messages fortran_ieee executable {
1364 use, intrinsic :: ieee_features
1370 # Return 1 if the target supports SQRT for the largest floating-point
1371 # type. (Some targets lack the libm support for this FP type.)
1372 # On most targets, this check effectively checks either whether sqrtl is
1373 # available or on __float128 systems whether libquadmath is installed,
1374 # which provides sqrtq.
1376 # When the target name changes, replace the cached result.
1378 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1379 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1381 use iso_fortran_env, only: real_kinds
1382 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1383 real(kind=maxFP), volatile :: x
1391 # Return 1 if the target supports Fortran integer kinds larger than
1392 # integer(8), 0 otherwise.
1394 # When the target name changes, replace the cached result.
1396 proc check_effective_target_fortran_large_int { } {
1397 return [check_no_compiler_messages fortran_large_int executable {
1399 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1400 integer(kind=k) :: i
1405 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1407 # When the target name changes, replace the cached result.
1409 proc check_effective_target_fortran_integer_16 { } {
1410 return [check_no_compiler_messages fortran_integer_16 executable {
1417 # Return 1 if we can statically link libgfortran, 0 otherwise.
1419 # When the target name changes, replace the cached result.
1421 proc check_effective_target_static_libgfortran { } {
1422 return [check_no_compiler_messages static_libgfortran executable {
1429 # Return 1 if cilk-plus is supported by the target, 0 otherwise.
1431 proc check_effective_target_cilkplus { } {
1432 # Skip cilk-plus tests on int16 and size16 targets for now.
1433 # The cilk-plus tests are not generic enough to cover these
1434 # cases and would throw hundreds of FAILs.
1435 if { [check_effective_target_int16]
1436 || ![check_effective_target_size32plus] } {
1440 # Skip AVR, its RAM is too small and too many tests would fail.
1441 if { [istarget avr-*-*] } {
1445 if { ! [check_effective_target_pthread] } {
1452 proc check_linker_plugin_available { } {
1453 return [check_no_compiler_messages_nocache linker_plugin executable {
1454 int main() { return 0; }
1455 } "-flto -fuse-linker-plugin"]
1458 # Return 1 if the target supports executing 750CL paired-single instructions, 0
1459 # otherwise. Cache the result.
1461 proc check_750cl_hw_available { } {
1462 return [check_cached_effective_target 750cl_hw_available {
1463 # If this is not the right target then we can skip the test.
1464 if { ![istarget powerpc-*paired*] } {
1467 check_runtime_nocache 750cl_hw_available {
1471 asm volatile ("ps_mul v0,v0,v0");
1473 asm volatile ("ps_mul 0,0,0");
1482 # Return 1 if the target OS supports running SSE executables, 0
1483 # otherwise. Cache the result.
1485 proc check_sse_os_support_available { } {
1486 return [check_cached_effective_target sse_os_support_available {
1487 # If this is not the right target then we can skip the test.
1488 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1490 } elseif { [istarget i?86-*-solaris2*] } {
1491 # The Solaris 2 kernel doesn't save and restore SSE registers
1492 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1493 check_runtime_nocache sse_os_support_available {
1496 asm volatile ("movaps %xmm0,%xmm0");
1506 # Return 1 if the target OS supports running AVX executables, 0
1507 # otherwise. Cache the result.
1509 proc check_avx_os_support_available { } {
1510 return [check_cached_effective_target avx_os_support_available {
1511 # If this is not the right target then we can skip the test.
1512 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1515 # Check that OS has AVX and SSE saving enabled.
1516 check_runtime_nocache avx_os_support_available {
1519 unsigned int eax, edx;
1521 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1522 return (eax & 6) != 6;
1529 # Return 1 if the target supports executing SSE instructions, 0
1530 # otherwise. Cache the result.
1532 proc check_sse_hw_available { } {
1533 return [check_cached_effective_target sse_hw_available {
1534 # If this is not the right target then we can skip the test.
1535 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1538 check_runtime_nocache sse_hw_available {
1542 unsigned int eax, ebx, ecx, edx;
1543 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1544 return !(edx & bit_SSE);
1552 # Return 1 if the target supports executing SSE2 instructions, 0
1553 # otherwise. Cache the result.
1555 proc check_sse2_hw_available { } {
1556 return [check_cached_effective_target sse2_hw_available {
1557 # If this is not the right target then we can skip the test.
1558 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1561 check_runtime_nocache sse2_hw_available {
1565 unsigned int eax, ebx, ecx, edx;
1566 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1567 return !(edx & bit_SSE2);
1575 # Return 1 if the target supports executing AVX instructions, 0
1576 # otherwise. Cache the result.
1578 proc check_avx_hw_available { } {
1579 return [check_cached_effective_target avx_hw_available {
1580 # If this is not the right target then we can skip the test.
1581 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1584 check_runtime_nocache avx_hw_available {
1588 unsigned int eax, ebx, ecx, edx;
1589 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1590 return ((ecx & (bit_AVX | bit_OSXSAVE))
1591 != (bit_AVX | bit_OSXSAVE));
1599 # Return 1 if the target supports running SSE executables, 0 otherwise.
1601 proc check_effective_target_sse_runtime { } {
1602 if { [check_effective_target_sse]
1603 && [check_sse_hw_available]
1604 && [check_sse_os_support_available] } {
1610 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1612 proc check_effective_target_sse2_runtime { } {
1613 if { [check_effective_target_sse2]
1614 && [check_sse2_hw_available]
1615 && [check_sse_os_support_available] } {
1621 # Return 1 if the target supports running AVX executables, 0 otherwise.
1623 proc check_effective_target_avx_runtime { } {
1624 if { [check_effective_target_avx]
1625 && [check_avx_hw_available]
1626 && [check_avx_os_support_available] } {
1632 # Return 1 if we are compiling for 64-bit PowerPC but we do not use direct
1633 # move instructions for moves from GPR to FPR.
1635 proc check_effective_target_powerpc64_no_dm { } {
1636 # The "mulld" checks if we are generating PowerPC64 code. The "lfd"
1637 # checks if we do not use direct moves, but use the old-fashioned
1638 # slower move-via-the-stack.
1639 return [check_no_messages_and_pattern powerpc64_no_dm \
1640 {\mmulld\M.*\mlfd} assembly {
1641 double f(long long x) { return x*x; }
1645 # Return 1 if the target supports executing power8 vector instructions, 0
1646 # otherwise. Cache the result.
1648 proc check_p8vector_hw_available { } {
1649 return [check_cached_effective_target p8vector_hw_available {
1650 # Some simulators are known to not support VSX/power8 instructions.
1651 # For now, disable on Darwin
1652 if { [istarget powerpc-*-eabi]
1653 || [istarget powerpc*-*-eabispe]
1654 || [istarget *-*-darwin*]} {
1657 set options "-mpower8-vector"
1658 check_runtime_nocache p8vector_hw_available {
1662 asm volatile ("xxlorc vs0,vs0,vs0");
1664 asm volatile ("xxlorc 0,0,0");
1673 # Return 1 if the target supports executing power9 vector instructions, 0
1674 # otherwise. Cache the result.
1676 proc check_p9vector_hw_available { } {
1677 return [check_cached_effective_target p9vector_hw_available {
1678 # Some simulators are known to not support VSX/power8/power9
1679 # instructions. For now, disable on Darwin.
1680 if { [istarget powerpc-*-eabi]
1681 || [istarget powerpc*-*-eabispe]
1682 || [istarget *-*-darwin*]} {
1685 set options "-mpower9-vector"
1686 check_runtime_nocache p9vector_hw_available {
1690 vector double v = (vector double) { 0.0, 0.0 };
1691 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
1699 # Return 1 if the target supports executing power9 modulo instructions, 0
1700 # otherwise. Cache the result.
1702 proc check_p9modulo_hw_available { } {
1703 return [check_cached_effective_target p9modulo_hw_available {
1704 # Some simulators are known to not support VSX/power8/power9
1705 # instructions. For now, disable on Darwin.
1706 if { [istarget powerpc-*-eabi]
1707 || [istarget powerpc*-*-eabispe]
1708 || [istarget *-*-darwin*]} {
1711 set options "-mmodulo"
1712 check_runtime_nocache p9modulo_hw_available {
1715 int i = 5, j = 3, r = -1;
1716 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
1724 # Return 1 if the target supports executing __float128 on PowerPC via software
1725 # emulation, 0 otherwise. Cache the result.
1727 proc check_ppc_float128_sw_available { } {
1728 return [check_cached_effective_target ppc_float128_sw_available {
1729 # Some simulators are known to not support VSX/power8/power9
1730 # instructions. For now, disable on Darwin.
1731 if { [istarget powerpc-*-eabi]
1732 || [istarget powerpc*-*-eabispe]
1733 || [istarget *-*-darwin*]} {
1736 set options "-mfloat128 -mvsx"
1737 check_runtime_nocache ppc_float128_sw_available {
1738 volatile __float128 x = 1.0q;
1739 volatile __float128 y = 2.0q;
1742 __float128 z = x + y;
1750 # Return 1 if the target supports executing __float128 on PowerPC via power9
1751 # hardware instructions, 0 otherwise. Cache the result.
1753 proc check_ppc_float128_hw_available { } {
1754 return [check_cached_effective_target ppc_float128_hw_available {
1755 # Some simulators are known to not support VSX/power8/power9
1756 # instructions. For now, disable on Darwin.
1757 if { [istarget powerpc-*-eabi]
1758 || [istarget powerpc*-*-eabispe]
1759 || [istarget *-*-darwin*]} {
1762 set options "-mfloat128 -mvsx -mfloat128-hardware -mpower9-vector"
1763 check_runtime_nocache ppc_float128_hw_available {
1764 volatile __float128 x = 1.0q;
1765 volatile __float128 y = 2.0q;
1768 __float128 z = x + y;
1769 __float128 w = -1.0q;
1771 __asm__ ("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
1772 return ((z != 3.0q) || (z != w);
1779 # Return 1 if the target supports executing VSX instructions, 0
1780 # otherwise. Cache the result.
1782 proc check_vsx_hw_available { } {
1783 return [check_cached_effective_target vsx_hw_available {
1784 # Some simulators are known to not support VSX instructions.
1785 # For now, disable on Darwin
1786 if { [istarget powerpc-*-eabi]
1787 || [istarget powerpc*-*-eabispe]
1788 || [istarget *-*-darwin*]} {
1792 check_runtime_nocache vsx_hw_available {
1796 asm volatile ("xxlor vs0,vs0,vs0");
1798 asm volatile ("xxlor 0,0,0");
1807 # Return 1 if the target supports executing AltiVec instructions, 0
1808 # otherwise. Cache the result.
1810 proc check_vmx_hw_available { } {
1811 return [check_cached_effective_target vmx_hw_available {
1812 # Some simulators are known to not support VMX instructions.
1813 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
1816 # Most targets don't require special flags for this test case, but
1817 # Darwin does. Just to be sure, make sure VSX is not enabled for
1818 # the altivec tests.
1819 if { [istarget *-*-darwin*]
1820 || [istarget *-*-aix*] } {
1821 set options "-maltivec -mno-vsx"
1823 set options "-mno-vsx"
1825 check_runtime_nocache vmx_hw_available {
1829 asm volatile ("vor v0,v0,v0");
1831 asm volatile ("vor 0,0,0");
1840 proc check_ppc_recip_hw_available { } {
1841 return [check_cached_effective_target ppc_recip_hw_available {
1842 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
1843 # For now, disable on Darwin
1844 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1847 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
1848 check_runtime_nocache ppc_recip_hw_available {
1849 volatile double d_recip, d_rsqrt, d_four = 4.0;
1850 volatile float f_recip, f_rsqrt, f_four = 4.0f;
1853 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
1854 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
1855 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
1856 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
1864 # Return 1 if the target supports executing AltiVec and Cell PPU
1865 # instructions, 0 otherwise. Cache the result.
1867 proc check_effective_target_cell_hw { } {
1868 return [check_cached_effective_target cell_hw_available {
1869 # Some simulators are known to not support VMX and PPU instructions.
1870 if { [istarget powerpc-*-eabi*] } {
1873 # Most targets don't require special flags for this test
1874 # case, but Darwin and AIX do.
1875 if { [istarget *-*-darwin*]
1876 || [istarget *-*-aix*] } {
1877 set options "-maltivec -mcpu=cell"
1879 set options "-mcpu=cell"
1881 check_runtime_nocache cell_hw_available {
1885 asm volatile ("vor v0,v0,v0");
1886 asm volatile ("lvlx v0,r0,r0");
1888 asm volatile ("vor 0,0,0");
1889 asm volatile ("lvlx 0,0,0");
1898 # Return 1 if the target supports executing 64-bit instructions, 0
1899 # otherwise. Cache the result.
1901 proc check_effective_target_powerpc64 { } {
1902 global powerpc64_available_saved
1905 if [info exists powerpc64_available_saved] {
1906 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
1908 set powerpc64_available_saved 0
1910 # Some simulators are known to not support powerpc64 instructions.
1911 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
1912 verbose "check_effective_target_powerpc64 returning 0" 2
1913 return $powerpc64_available_saved
1916 # Set up, compile, and execute a test program containing a 64-bit
1917 # instruction. Include the current process ID in the file
1918 # names to prevent conflicts with invocations for multiple
1923 set f [open $src "w"]
1924 puts $f "int main() {"
1925 puts $f "#ifdef __MACH__"
1926 puts $f " asm volatile (\"extsw r0,r0\");"
1928 puts $f " asm volatile (\"extsw 0,0\");"
1930 puts $f " return 0; }"
1933 set opts "additional_flags=-mcpu=G5"
1935 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
1936 set lines [${tool}_target_compile $src $exe executable "$opts"]
1939 if [string match "" $lines] then {
1940 # No error message, compilation succeeded.
1941 set result [${tool}_load "./$exe" "" ""]
1942 set status [lindex $result 0]
1943 remote_file build delete $exe
1944 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
1946 if { $status == "pass" } then {
1947 set powerpc64_available_saved 1
1950 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
1954 return $powerpc64_available_saved
1957 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
1958 # complex float arguments. This affects gfortran tests that call cabsf
1959 # in libm built by an earlier compiler. Return 1 if libm uses the same
1960 # argument passing as the compiler under test, 0 otherwise.
1962 # When the target name changes, replace the cached result.
1964 proc check_effective_target_broken_cplxf_arg { } {
1965 return [check_cached_effective_target broken_cplxf_arg {
1966 # Skip the work for targets known not to be affected.
1967 if { ![istarget powerpc64-*-linux*] } {
1969 } elseif { ![is-effective-target lp64] } {
1972 check_runtime_nocache broken_cplxf_arg {
1973 #include <complex.h>
1974 extern void abort (void);
1975 float fabsf (float);
1976 float cabsf (_Complex float);
1983 if (fabsf (f - 5.0) > 0.0001)
1992 # Return 1 is this is a TI C6X target supporting C67X instructions
1993 proc check_effective_target_ti_c67x { } {
1994 return [check_no_compiler_messages ti_c67x assembly {
1995 #if !defined(_TMS320C6700)
1996 #error !_TMS320C6700
2001 # Return 1 is this is a TI C6X target supporting C64X+ instructions
2002 proc check_effective_target_ti_c64xp { } {
2003 return [check_no_compiler_messages ti_c64xp assembly {
2004 #if !defined(_TMS320C6400_PLUS)
2005 #error !_TMS320C6400_PLUS
2011 proc check_alpha_max_hw_available { } {
2012 return [check_runtime alpha_max_hw_available {
2013 int main() { return __builtin_alpha_amask(1<<8) != 0; }
2017 # Returns true iff the FUNCTION is available on the target system.
2018 # (This is essentially a Tcl implementation of Autoconf's
2021 proc check_function_available { function } {
2022 return [check_no_compiler_messages ${function}_available \
2028 int main () { $function (); }
2032 # Returns true iff "fork" is available on the target system.
2034 proc check_fork_available {} {
2035 return [check_function_available "fork"]
2038 # Returns true iff "mkfifo" is available on the target system.
2040 proc check_mkfifo_available {} {
2041 if { [istarget *-*-cygwin*] } {
2042 # Cygwin has mkfifo, but support is incomplete.
2046 return [check_function_available "mkfifo"]
2049 # Returns true iff "__cxa_atexit" is used on the target system.
2051 proc check_cxa_atexit_available { } {
2052 return [check_cached_effective_target cxa_atexit_available {
2053 if { [istarget hppa*-*-hpux10*] } {
2054 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
2056 } elseif { [istarget *-*-vxworks] } {
2057 # vxworks doesn't have __cxa_atexit but subsequent test passes.
2060 check_runtime_nocache cxa_atexit_available {
2063 static unsigned int count;
2080 Y() { f(); count = 2; }
2089 int main() { return 0; }
2095 proc check_effective_target_objc2 { } {
2096 return [check_no_compiler_messages objc2 object {
2105 proc check_effective_target_next_runtime { } {
2106 return [check_no_compiler_messages objc2 object {
2107 #ifdef __NEXT_RUNTIME__
2110 #error !__NEXT_RUNTIME__
2115 # Return 1 if we're generating 32-bit code using default options, 0
2118 proc check_effective_target_ilp32 { } {
2119 return [check_no_compiler_messages ilp32 object {
2120 int dummy[sizeof (int) == 4
2121 && sizeof (void *) == 4
2122 && sizeof (long) == 4 ? 1 : -1];
2126 # Return 1 if we're generating ia32 code using default options, 0
2129 proc check_effective_target_ia32 { } {
2130 return [check_no_compiler_messages ia32 object {
2131 int dummy[sizeof (int) == 4
2132 && sizeof (void *) == 4
2133 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
2137 # Return 1 if we're generating x32 code using default options, 0
2140 proc check_effective_target_x32 { } {
2141 return [check_no_compiler_messages x32 object {
2142 int dummy[sizeof (int) == 4
2143 && sizeof (void *) == 4
2144 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
2148 # Return 1 if we're generating 32-bit integers using default
2149 # options, 0 otherwise.
2151 proc check_effective_target_int32 { } {
2152 return [check_no_compiler_messages int32 object {
2153 int dummy[sizeof (int) == 4 ? 1 : -1];
2157 # Return 1 if we're generating 32-bit or larger integers using default
2158 # options, 0 otherwise.
2160 proc check_effective_target_int32plus { } {
2161 return [check_no_compiler_messages int32plus object {
2162 int dummy[sizeof (int) >= 4 ? 1 : -1];
2166 # Return 1 if we're generating 32-bit or larger pointers using default
2167 # options, 0 otherwise.
2169 proc check_effective_target_ptr32plus { } {
2170 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
2171 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
2172 # cannot really hold a 32-bit address, so we always return false here.
2173 if { [istarget msp430-*-*] } {
2177 return [check_no_compiler_messages ptr32plus object {
2178 int dummy[sizeof (void *) >= 4 ? 1 : -1];
2182 # Return 1 if we support 32-bit or larger array and structure sizes
2183 # using default options, 0 otherwise. Avoid false positive on
2184 # targets with 20 or 24 bit address spaces.
2186 proc check_effective_target_size32plus { } {
2187 return [check_no_compiler_messages size32plus object {
2188 char dummy[16777217L];
2192 # Returns 1 if we're generating 16-bit or smaller integers with the
2193 # default options, 0 otherwise.
2195 proc check_effective_target_int16 { } {
2196 return [check_no_compiler_messages int16 object {
2197 int dummy[sizeof (int) < 4 ? 1 : -1];
2201 # Return 1 if we're generating 64-bit code using default options, 0
2204 proc check_effective_target_lp64 { } {
2205 return [check_no_compiler_messages lp64 object {
2206 int dummy[sizeof (int) == 4
2207 && sizeof (void *) == 8
2208 && sizeof (long) == 8 ? 1 : -1];
2212 # Return 1 if we're generating 64-bit code using default llp64 options,
2215 proc check_effective_target_llp64 { } {
2216 return [check_no_compiler_messages llp64 object {
2217 int dummy[sizeof (int) == 4
2218 && sizeof (void *) == 8
2219 && sizeof (long long) == 8
2220 && sizeof (long) == 4 ? 1 : -1];
2224 # Return 1 if long and int have different sizes,
2227 proc check_effective_target_long_neq_int { } {
2228 return [check_no_compiler_messages long_ne_int object {
2229 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2233 # Return 1 if the target supports long double larger than double,
2236 proc check_effective_target_large_long_double { } {
2237 return [check_no_compiler_messages large_long_double object {
2238 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2242 # Return 1 if the target supports double larger than float,
2245 proc check_effective_target_large_double { } {
2246 return [check_no_compiler_messages large_double object {
2247 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2251 # Return 1 if the target supports long double of 128 bits,
2254 proc check_effective_target_longdouble128 { } {
2255 return [check_no_compiler_messages longdouble128 object {
2256 int dummy[sizeof(long double) == 16 ? 1 : -1];
2260 # Return 1 if the target supports double of 64 bits,
2263 proc check_effective_target_double64 { } {
2264 return [check_no_compiler_messages double64 object {
2265 int dummy[sizeof(double) == 8 ? 1 : -1];
2269 # Return 1 if the target supports double of at least 64 bits,
2272 proc check_effective_target_double64plus { } {
2273 return [check_no_compiler_messages double64plus object {
2274 int dummy[sizeof(double) >= 8 ? 1 : -1];
2278 # Return 1 if the target supports 'w' suffix on floating constant
2281 proc check_effective_target_has_w_floating_suffix { } {
2283 if [check_effective_target_c++] {
2284 append opts "-std=gnu++03"
2286 return [check_no_compiler_messages w_fp_suffix object {
2291 # Return 1 if the target supports 'q' suffix on floating constant
2294 proc check_effective_target_has_q_floating_suffix { } {
2296 if [check_effective_target_c++] {
2297 append opts "-std=gnu++03"
2299 return [check_no_compiler_messages q_fp_suffix object {
2303 # Return 1 if the target supports compiling fixed-point,
2306 proc check_effective_target_fixed_point { } {
2307 return [check_no_compiler_messages fixed_point object {
2308 _Sat _Fract x; _Sat _Accum y;
2312 # Return 1 if the target supports compiling decimal floating point,
2315 proc check_effective_target_dfp_nocache { } {
2316 verbose "check_effective_target_dfp_nocache: compiling source" 2
2317 set ret [check_no_compiler_messages_nocache dfp object {
2318 float x __attribute__((mode(DD)));
2320 verbose "check_effective_target_dfp_nocache: returning $ret" 2
2324 proc check_effective_target_dfprt_nocache { } {
2325 return [check_runtime_nocache dfprt {
2326 typedef float d64 __attribute__((mode(DD)));
2327 d64 x = 1.2df, y = 2.3dd, z;
2328 int main () { z = x + y; return 0; }
2332 # Return 1 if the target supports compiling Decimal Floating Point,
2335 # This won't change for different subtargets so cache the result.
2337 proc check_effective_target_dfp { } {
2338 return [check_cached_effective_target dfp {
2339 check_effective_target_dfp_nocache
2343 # Return 1 if the target supports linking and executing Decimal Floating
2344 # Point, 0 otherwise.
2346 # This won't change for different subtargets so cache the result.
2348 proc check_effective_target_dfprt { } {
2349 return [check_cached_effective_target dfprt {
2350 check_effective_target_dfprt_nocache
2354 # Return 1 if the target supports executing DFP hardware instructions,
2355 # 0 otherwise. Cache the result.
2357 proc check_dfp_hw_available { } {
2358 return [check_cached_effective_target dfp_hw_available {
2359 # For now, disable on Darwin
2360 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2363 check_runtime_nocache dfp_hw_available {
2364 volatile _Decimal64 r;
2365 volatile _Decimal64 a = 4.0DD;
2366 volatile _Decimal64 b = 2.0DD;
2369 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2370 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2371 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2372 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2375 } "-mcpu=power6 -mhard-float"
2380 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2382 proc check_effective_target_ucn_nocache { } {
2383 # -std=c99 is only valid for C
2384 if [check_effective_target_c] {
2385 set ucnopts "-std=c99"
2389 verbose "check_effective_target_ucn_nocache: compiling source" 2
2390 set ret [check_no_compiler_messages_nocache ucn object {
2393 verbose "check_effective_target_ucn_nocache: returning $ret" 2
2397 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2399 # This won't change for different subtargets, so cache the result.
2401 proc check_effective_target_ucn { } {
2402 return [check_cached_effective_target ucn {
2403 check_effective_target_ucn_nocache
2407 # Return 1 if the target needs a command line argument to enable a SIMD
2410 proc check_effective_target_vect_cmdline_needed { } {
2411 global et_vect_cmdline_needed_saved
2412 global et_vect_cmdline_needed_target_name
2414 if { ![info exists et_vect_cmdline_needed_target_name] } {
2415 set et_vect_cmdline_needed_target_name ""
2418 # If the target has changed since we set the cached value, clear it.
2419 set current_target [current_target_name]
2420 if { $current_target != $et_vect_cmdline_needed_target_name } {
2421 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
2422 set et_vect_cmdline_needed_target_name $current_target
2423 if { [info exists et_vect_cmdline_needed_saved] } {
2424 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
2425 unset et_vect_cmdline_needed_saved
2429 if [info exists et_vect_cmdline_needed_saved] {
2430 verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
2432 set et_vect_cmdline_needed_saved 1
2433 if { [istarget alpha*-*-*]
2434 || [istarget ia64-*-*]
2435 || (([istarget x86_64-*-*] || [istarget i?86-*-*])
2436 && ([check_effective_target_x32]
2437 || [check_effective_target_lp64]))
2438 || ([istarget powerpc*-*-*]
2439 && ([check_effective_target_powerpc_spe]
2440 || [check_effective_target_powerpc_altivec]))
2441 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
2442 || [istarget spu-*-*]
2443 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
2444 || [istarget aarch64*-*-*] } {
2445 set et_vect_cmdline_needed_saved 0
2449 verbose "check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
2450 return $et_vect_cmdline_needed_saved
2453 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
2455 # This won't change for different subtargets so cache the result.
2457 proc check_effective_target_vect_int { } {
2458 global et_vect_int_saved
2460 if [info exists et_vect_int_saved] {
2461 verbose "check_effective_target_vect_int: using cached result" 2
2463 set et_vect_int_saved 0
2464 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2465 || ([istarget powerpc*-*-*]
2466 && ![istarget powerpc-*-linux*paired*])
2467 || [istarget spu-*-*]
2468 || [istarget sparc*-*-*]
2469 || [istarget alpha*-*-*]
2470 || [istarget ia64-*-*]
2471 || [istarget aarch64*-*-*]
2472 || [check_effective_target_arm32]
2473 || ([istarget mips*-*-*]
2474 && [check_effective_target_mips_loongson]) } {
2475 set et_vect_int_saved 1
2479 verbose "check_effective_target_vect_int: returning $et_vect_int_saved" 2
2480 return $et_vect_int_saved
2483 # Return 1 if the target supports signed int->float conversion
2486 proc check_effective_target_vect_intfloat_cvt { } {
2487 global et_vect_intfloat_cvt_saved
2489 if [info exists et_vect_intfloat_cvt_saved] {
2490 verbose "check_effective_target_vect_intfloat_cvt: using cached result" 2
2492 set et_vect_intfloat_cvt_saved 0
2493 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2494 || ([istarget powerpc*-*-*]
2495 && ![istarget powerpc-*-linux*paired*])
2496 || ([istarget arm*-*-*]
2497 && [check_effective_target_arm_neon_ok])} {
2498 set et_vect_intfloat_cvt_saved 1
2502 verbose "check_effective_target_vect_intfloat_cvt: returning $et_vect_intfloat_cvt_saved" 2
2503 return $et_vect_intfloat_cvt_saved
2506 #Return 1 if we're supporting __int128 for target, 0 otherwise.
2508 proc check_effective_target_int128 { } {
2509 return [check_no_compiler_messages int128 object {
2511 #ifndef __SIZEOF_INT128__
2520 # Return 1 if the target supports unsigned int->float conversion
2523 proc check_effective_target_vect_uintfloat_cvt { } {
2524 global et_vect_uintfloat_cvt_saved
2526 if [info exists et_vect_uintfloat_cvt_saved] {
2527 verbose "check_effective_target_vect_uintfloat_cvt: using cached result" 2
2529 set et_vect_uintfloat_cvt_saved 0
2530 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2531 || ([istarget powerpc*-*-*]
2532 && ![istarget powerpc-*-linux*paired*])
2533 || [istarget aarch64*-*-*]
2534 || ([istarget arm*-*-*]
2535 && [check_effective_target_arm_neon_ok])} {
2536 set et_vect_uintfloat_cvt_saved 1
2540 verbose "check_effective_target_vect_uintfloat_cvt: returning $et_vect_uintfloat_cvt_saved" 2
2541 return $et_vect_uintfloat_cvt_saved
2545 # Return 1 if the target supports signed float->int conversion
2548 proc check_effective_target_vect_floatint_cvt { } {
2549 global et_vect_floatint_cvt_saved
2551 if [info exists et_vect_floatint_cvt_saved] {
2552 verbose "check_effective_target_vect_floatint_cvt: using cached result" 2
2554 set et_vect_floatint_cvt_saved 0
2555 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2556 || ([istarget powerpc*-*-*]
2557 && ![istarget powerpc-*-linux*paired*])
2558 || ([istarget arm*-*-*]
2559 && [check_effective_target_arm_neon_ok])} {
2560 set et_vect_floatint_cvt_saved 1
2564 verbose "check_effective_target_vect_floatint_cvt: returning $et_vect_floatint_cvt_saved" 2
2565 return $et_vect_floatint_cvt_saved
2568 # Return 1 if the target supports unsigned float->int conversion
2571 proc check_effective_target_vect_floatuint_cvt { } {
2572 global et_vect_floatuint_cvt_saved
2574 if [info exists et_vect_floatuint_cvt_saved] {
2575 verbose "check_effective_target_vect_floatuint_cvt: using cached result" 2
2577 set et_vect_floatuint_cvt_saved 0
2578 if { ([istarget powerpc*-*-*]
2579 && ![istarget powerpc-*-linux*paired*])
2580 || ([istarget arm*-*-*]
2581 && [check_effective_target_arm_neon_ok])} {
2582 set et_vect_floatuint_cvt_saved 1
2586 verbose "check_effective_target_vect_floatuint_cvt: returning $et_vect_floatuint_cvt_saved" 2
2587 return $et_vect_floatuint_cvt_saved
2590 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
2592 # This won't change for different subtargets so cache the result.
2594 proc check_effective_target_vect_simd_clones { } {
2595 global et_vect_simd_clones_saved
2597 if [info exists et_vect_simd_clones_saved] {
2598 verbose "check_effective_target_vect_simd_clones: using cached result" 2
2600 set et_vect_simd_clones_saved 0
2601 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2602 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx and
2603 # avx2 clone. Only the right clone for the specified arch will be
2604 # chosen, but still we need to at least be able to assemble
2606 if { [check_effective_target_avx512f] } {
2607 set et_vect_simd_clones_saved 1
2612 verbose "check_effective_target_vect_simd_clones: returning $et_vect_simd_clones_saved" 2
2613 return $et_vect_simd_clones_saved
2616 # Return 1 if this is a AArch64 target supporting big endian
2617 proc check_effective_target_aarch64_big_endian { } {
2618 return [check_no_compiler_messages aarch64_big_endian assembly {
2619 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
2620 #error !__aarch64__ || !__AARCH64EB__
2625 # Return 1 if this is a AArch64 target supporting little endian
2626 proc check_effective_target_aarch64_little_endian { } {
2627 if { ![istarget aarch64*-*-*] } {
2631 return [check_no_compiler_messages aarch64_little_endian assembly {
2632 #if !defined(__aarch64__) || defined(__AARCH64EB__)
2638 # Return 1 if this is a compiler supporting ARC atomic operations
2639 proc check_effective_target_arc_atomic { } {
2640 return [check_no_compiler_messages arc_atomic assembly {
2641 #if !defined(__ARC_ATOMIC__)
2647 # Return 1 if this is an arm target using 32-bit instructions
2648 proc check_effective_target_arm32 { } {
2649 if { ![istarget arm*-*-*] } {
2653 return [check_no_compiler_messages arm32 assembly {
2654 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
2655 #error !__arm || __thumb__ && !__thumb2__
2660 # Return 1 if this is an arm target not using Thumb
2661 proc check_effective_target_arm_nothumb { } {
2662 if { ![istarget arm*-*-*] } {
2666 return [check_no_compiler_messages arm_nothumb assembly {
2667 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
2668 #error !__arm__ || __thumb || __thumb2__
2673 # Return 1 if this is a little-endian ARM target
2674 proc check_effective_target_arm_little_endian { } {
2675 if { ![istarget arm*-*-*] } {
2679 return [check_no_compiler_messages arm_little_endian assembly {
2680 #if !defined(__arm__) || !defined(__ARMEL__)
2681 #error !__arm__ || !__ARMEL__
2686 # Return 1 if this is an ARM target that only supports aligned vector accesses
2687 proc check_effective_target_arm_vect_no_misalign { } {
2688 if { ![istarget arm*-*-*] } {
2692 return [check_no_compiler_messages arm_vect_no_misalign assembly {
2693 #if !defined(__arm__) \
2694 || (defined(__ARM_FEATURE_UNALIGNED) \
2695 && defined(__ARMEL__))
2696 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
2702 # Return 1 if this is an ARM target supporting -mfpu=vfp
2703 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
2706 proc check_effective_target_arm_vfp_ok { } {
2707 if { [check_effective_target_arm32] } {
2708 return [check_no_compiler_messages arm_vfp_ok object {
2710 } "-mfpu=vfp -mfloat-abi=softfp"]
2716 # Return 1 if this is an ARM target supporting -mfpu=vfp3
2717 # -mfloat-abi=softfp.
2719 proc check_effective_target_arm_vfp3_ok { } {
2720 if { [check_effective_target_arm32] } {
2721 return [check_no_compiler_messages arm_vfp3_ok object {
2723 } "-mfpu=vfp3 -mfloat-abi=softfp"]
2729 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
2730 # -mfloat-abi=softfp.
2731 proc check_effective_target_arm_v8_vfp_ok {} {
2732 if { [check_effective_target_arm32] } {
2733 return [check_no_compiler_messages arm_v8_vfp_ok object {
2736 __asm__ volatile ("vrinta.f32.f32 s0, s0");
2739 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
2745 # Return 1 if this is an ARM target supporting -mfpu=vfp
2746 # -mfloat-abi=hard. Some multilibs may be incompatible with these
2749 proc check_effective_target_arm_hard_vfp_ok { } {
2750 if { [check_effective_target_arm32]
2751 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
2752 return [check_no_compiler_messages arm_hard_vfp_ok executable {
2753 int main() { return 0;}
2754 } "-mfpu=vfp -mfloat-abi=hard"]
2760 # Return 1 if this is an ARM target defining __ARM_FP. We may need
2761 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2762 # incompatible with these options. Also set et_arm_fp_flags to the
2763 # best options to add.
2765 proc check_effective_target_arm_fp_ok_nocache { } {
2766 global et_arm_fp_flags
2767 set et_arm_fp_flags ""
2768 if { [check_effective_target_arm32] } {
2769 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
2770 if { [check_no_compiler_messages_nocache arm_fp_ok object {
2772 #error __ARM_FP not defined
2775 set et_arm_fp_flags $flags
2784 proc check_effective_target_arm_fp_ok { } {
2785 return [check_cached_effective_target arm_fp_ok \
2786 check_effective_target_arm_fp_ok_nocache]
2789 # Add the options needed to define __ARM_FP. We need either
2790 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
2791 # specified by the multilib, use it.
2793 proc add_options_for_arm_fp { flags } {
2794 if { ! [check_effective_target_arm_fp_ok] } {
2797 global et_arm_fp_flags
2798 return "$flags $et_arm_fp_flags"
2801 # Return 1 if this is an ARM target that supports DSP multiply with
2802 # current multilib flags.
2804 proc check_effective_target_arm_dsp { } {
2805 return [check_no_compiler_messages arm_dsp assembly {
2806 #ifndef __ARM_FEATURE_DSP
2813 # Return 1 if this is an ARM target that supports unaligned word/halfword
2814 # load/store instructions.
2816 proc check_effective_target_arm_unaligned { } {
2817 return [check_no_compiler_messages arm_unaligned assembly {
2818 #ifndef __ARM_FEATURE_UNALIGNED
2819 #error no unaligned support
2825 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2826 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2827 # incompatible with these options. Also set et_arm_crypto_flags to the
2828 # best options to add.
2830 proc check_effective_target_arm_crypto_ok_nocache { } {
2831 global et_arm_crypto_flags
2832 set et_arm_crypto_flags ""
2833 if { [check_effective_target_arm_v8_neon_ok] } {
2834 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
2835 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
2836 #include "arm_neon.h"
2838 foo (uint8x16_t a, uint8x16_t b)
2840 return vaeseq_u8 (a, b);
2843 set et_arm_crypto_flags $flags
2852 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2854 proc check_effective_target_arm_crypto_ok { } {
2855 return [check_cached_effective_target arm_crypto_ok \
2856 check_effective_target_arm_crypto_ok_nocache]
2859 # Add options for crypto extensions.
2860 proc add_options_for_arm_crypto { flags } {
2861 if { ! [check_effective_target_arm_crypto_ok] } {
2864 global et_arm_crypto_flags
2865 return "$flags $et_arm_crypto_flags"
2868 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2869 # or -mfloat-abi=hard, but if one is already specified by the
2870 # multilib, use it. Similarly, if a -mfpu option already enables
2871 # NEON, do not add -mfpu=neon.
2873 proc add_options_for_arm_neon { flags } {
2874 if { ! [check_effective_target_arm_neon_ok] } {
2877 global et_arm_neon_flags
2878 return "$flags $et_arm_neon_flags"
2881 proc add_options_for_arm_v8_vfp { flags } {
2882 if { ! [check_effective_target_arm_v8_vfp_ok] } {
2885 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
2888 proc add_options_for_arm_v8_neon { flags } {
2889 if { ! [check_effective_target_arm_v8_neon_ok] } {
2892 global et_arm_v8_neon_flags
2893 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
2896 # Add the options needed for ARMv8.1 Adv.SIMD. Also adds the ARMv8 NEON
2897 # options for AArch64 and for ARM.
2899 proc add_options_for_arm_v8_1a_neon { flags } {
2900 if { ! [check_effective_target_arm_v8_1a_neon_ok] } {
2903 global et_arm_v8_1a_neon_flags
2904 return "$flags $et_arm_v8_1a_neon_flags -march=armv8.1-a"
2907 proc add_options_for_arm_crc { flags } {
2908 if { ! [check_effective_target_arm_crc_ok] } {
2911 global et_arm_crc_flags
2912 return "$flags $et_arm_crc_flags"
2915 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2916 # or -mfloat-abi=hard, but if one is already specified by the
2917 # multilib, use it. Similarly, if a -mfpu option already enables
2918 # NEON, do not add -mfpu=neon.
2920 proc add_options_for_arm_neonv2 { flags } {
2921 if { ! [check_effective_target_arm_neonv2_ok] } {
2924 global et_arm_neonv2_flags
2925 return "$flags $et_arm_neonv2_flags"
2928 # Add the options needed for vfp3.
2929 proc add_options_for_arm_vfp3 { flags } {
2930 if { ! [check_effective_target_arm_vfp3_ok] } {
2933 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
2936 # Return 1 if this is an ARM target supporting -mfpu=neon
2937 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2938 # incompatible with these options. Also set et_arm_neon_flags to the
2939 # best options to add.
2941 proc check_effective_target_arm_neon_ok_nocache { } {
2942 global et_arm_neon_flags
2943 set et_arm_neon_flags ""
2944 if { [check_effective_target_arm32] } {
2945 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a"} {
2946 if { [check_no_compiler_messages_nocache arm_neon_ok object {
2948 #ifndef __ARM_NEON__
2951 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
2952 configured for -mcpu=arm926ej-s, for example. */
2953 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
2954 #error Architecture does not support NEON.
2957 set et_arm_neon_flags $flags
2966 proc check_effective_target_arm_neon_ok { } {
2967 return [check_cached_effective_target arm_neon_ok \
2968 check_effective_target_arm_neon_ok_nocache]
2971 proc check_effective_target_arm_crc_ok_nocache { } {
2972 global et_arm_crc_flags
2973 set et_arm_crc_flags "-march=armv8-a+crc"
2974 return [check_no_compiler_messages_nocache arm_crc_ok object {
2975 #if !defined (__ARM_FEATURE_CRC32)
2978 } "$et_arm_crc_flags"]
2981 proc check_effective_target_arm_crc_ok { } {
2982 return [check_cached_effective_target arm_crc_ok \
2983 check_effective_target_arm_crc_ok_nocache]
2986 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
2987 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2988 # incompatible with these options. Also set et_arm_neon_fp16_flags to
2989 # the best options to add.
2991 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
2992 global et_arm_neon_fp16_flags
2993 set et_arm_neon_fp16_flags ""
2994 if { [check_effective_target_arm32] } {
2995 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
2996 "-mfpu=neon-fp16 -mfloat-abi=softfp"
2997 "-mfp16-format=ieee"
2998 "-mfloat-abi=softfp -mfp16-format=ieee"
2999 "-mfpu=neon-fp16 -mfp16-format=ieee"
3000 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
3001 if { [check_no_compiler_messages_nocache arm_neon_fp_16_ok object {
3002 #include "arm_neon.h"
3004 foo (float32x4_t arg)
3006 return vcvt_f16_f32 (arg);
3009 set et_arm_neon_fp16_flags $flags
3018 proc check_effective_target_arm_neon_fp16_ok { } {
3019 return [check_cached_effective_target arm_neon_fp16_ok \
3020 check_effective_target_arm_neon_fp16_ok_nocache]
3023 proc check_effective_target_arm_neon_fp16_hw { } {
3024 if {! [check_effective_target_arm_neon_fp16_ok] } {
3027 global et_arm_neon_fp16_flags
3028 check_runtime_nocache arm_neon_fp16_hw {
3030 main (int argc, char **argv)
3032 asm ("vcvt.f32.f16 q1, d0");
3035 } $et_arm_neon_fp16_flags
3038 proc add_options_for_arm_neon_fp16 { flags } {
3039 if { ! [check_effective_target_arm_neon_fp16_ok] } {
3042 global et_arm_neon_fp16_flags
3043 return "$flags $et_arm_neon_fp16_flags"
3046 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
3047 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3048 # incompatible with these options. Also set et_arm_v8_neon_flags to the
3049 # best options to add.
3051 proc check_effective_target_arm_v8_neon_ok_nocache { } {
3052 global et_arm_v8_neon_flags
3053 set et_arm_v8_neon_flags ""
3054 if { [check_effective_target_arm32] } {
3055 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3056 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
3058 #error not armv8 or later
3060 #include "arm_neon.h"
3064 __asm__ volatile ("vrintn.f32 q0, q0");
3066 } "$flags -march=armv8-a"] } {
3067 set et_arm_v8_neon_flags $flags
3076 proc check_effective_target_arm_v8_neon_ok { } {
3077 return [check_cached_effective_target arm_v8_neon_ok \
3078 check_effective_target_arm_v8_neon_ok_nocache]
3081 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
3082 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3083 # incompatible with these options. Also set et_arm_neonv2_flags to the
3084 # best options to add.
3086 proc check_effective_target_arm_neonv2_ok_nocache { } {
3087 global et_arm_neonv2_flags
3088 set et_arm_neonv2_flags ""
3089 if { [check_effective_target_arm32] } {
3090 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
3091 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
3092 #include "arm_neon.h"
3094 foo (float32x2_t a, float32x2_t b, float32x2_t c)
3096 return vfma_f32 (a, b, c);
3099 set et_arm_neonv2_flags $flags
3108 proc check_effective_target_arm_neonv2_ok { } {
3109 return [check_cached_effective_target arm_neonv2_ok \
3110 check_effective_target_arm_neonv2_ok_nocache]
3113 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3114 # or -mfloat-abi=hard, but if one is already specified by the
3117 proc add_options_for_arm_fp16 { flags } {
3118 if { ! [check_effective_target_arm_fp16_ok] } {
3121 global et_arm_fp16_flags
3122 return "$flags $et_arm_fp16_flags"
3125 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
3126 # Skip multilibs that are incompatible with these options and set
3127 # et_arm_fp16_flags to the best options to add.
3129 proc check_effective_target_arm_fp16_ok_nocache { } {
3130 global et_arm_fp16_flags
3131 set et_arm_fp16_flags ""
3132 if { ! [check_effective_target_arm32] } {
3135 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" "-mfpu=*fpv[1-9][0-9]*" } ]] {
3136 # Multilib flags would override -mfpu.
3139 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
3140 # Must generate floating-point instructions.
3143 if [check_effective_target_arm_hf_eabi] {
3144 # Use existing float-abi and force an fpu which supports fp16
3145 set et_arm_fp16_flags "-mfpu=vfpv4"
3148 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
3149 # The existing -mfpu value is OK; use it, but add softfp.
3150 set et_arm_fp16_flags "-mfloat-abi=softfp"
3153 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
3154 # macro to check for this support.
3155 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
3156 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
3159 set et_arm_fp16_flags "$flags"
3166 proc check_effective_target_arm_fp16_ok { } {
3167 return [check_cached_effective_target arm_fp16_ok \
3168 check_effective_target_arm_fp16_ok_nocache]
3171 # Creates a series of routines that return 1 if the given architecture
3172 # can be selected and a routine to give the flags to select that architecture
3173 # Note: Extra flags may be added to disable options from newer compilers
3174 # (Thumb in particular - but others may be added in the future).
3175 # -march=armv7ve is special and is handled explicitly after this loop because
3176 # it needs more than one predefine check to identify.
3177 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
3178 # /* { dg-add-options arm_arch_v5 } */
3179 # /* { dg-require-effective-target arm_arch_v5_multilib } */
3180 foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__
3181 v4t "-march=armv4t" __ARM_ARCH_4T__
3182 v5 "-march=armv5 -marm" __ARM_ARCH_5__
3183 v5t "-march=armv5t" __ARM_ARCH_5T__
3184 v5te "-march=armv5te" __ARM_ARCH_5TE__
3185 v6 "-march=armv6" __ARM_ARCH_6__
3186 v6k "-march=armv6k" __ARM_ARCH_6K__
3187 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
3188 v6z "-march=armv6z" __ARM_ARCH_6Z__
3189 v6m "-march=armv6-m -mthumb" __ARM_ARCH_6M__
3190 v7a "-march=armv7-a" __ARM_ARCH_7A__
3191 v7r "-march=armv7-r" __ARM_ARCH_7R__
3192 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
3193 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
3194 v8a "-march=armv8-a" __ARM_ARCH_8A__
3195 v8_1a "-march=armv8.1a" __ARM_ARCH_8A__ } {
3196 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
3197 proc check_effective_target_arm_arch_FUNC_ok { } {
3198 if { [ string match "*-marm*" "FLAG" ] &&
3199 ![check_effective_target_arm_arm_ok] } {
3202 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
3209 proc add_options_for_arm_arch_FUNC { flags } {
3210 return "$flags FLAG"
3213 proc check_effective_target_arm_arch_FUNC_multilib { } {
3214 return [check_runtime arm_arch_FUNC_multilib {
3220 } [add_options_for_arm_arch_FUNC ""]]
3225 # Same functions as above but for -march=armv7ve. To uniquely identify
3226 # -march=armv7ve we need to check for __ARM_ARCH_7A__ as well as
3227 # __ARM_FEATURE_IDIV otherwise it aliases with armv7-a.
3229 proc check_effective_target_arm_arch_v7ve_ok { } {
3230 if { [ string match "*-marm*" "-march=armv7ve" ] &&
3231 ![check_effective_target_arm_arm_ok] } {
3234 return [check_no_compiler_messages arm_arch_v7ve_ok assembly {
3235 #if !defined (__ARM_ARCH_7A__) || !defined (__ARM_FEATURE_IDIV)
3238 } "-march=armv7ve" ]
3241 proc add_options_for_arm_arch_v7ve { flags } {
3242 return "$flags -march=armv7ve"
3245 # Return 1 if this is an ARM target where -marm causes ARM to be
3248 proc check_effective_target_arm_arm_ok { } {
3249 return [check_no_compiler_messages arm_arm_ok assembly {
3250 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
3251 #error !__arm__ || __thumb__ || __thumb2__
3257 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
3260 proc check_effective_target_arm_thumb1_ok { } {
3261 return [check_no_compiler_messages arm_thumb1_ok assembly {
3262 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3263 #error !__arm__ || !__thumb__ || __thumb2__
3265 int foo (int i) { return i; }
3269 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
3272 proc check_effective_target_arm_thumb2_ok { } {
3273 return [check_no_compiler_messages arm_thumb2_ok assembly {
3274 #if !defined(__thumb2__)
3277 int foo (int i) { return i; }
3281 # Return 1 if this is an ARM target where Thumb-1 is used without options
3282 # added by the test.
3284 proc check_effective_target_arm_thumb1 { } {
3285 return [check_no_compiler_messages arm_thumb1 assembly {
3286 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3287 #error !__arm__ || !__thumb__ || __thumb2__
3293 # Return 1 if this is an ARM target where Thumb-2 is used without options
3294 # added by the test.
3296 proc check_effective_target_arm_thumb2 { } {
3297 return [check_no_compiler_messages arm_thumb2 assembly {
3298 #if !defined(__thumb2__)
3305 # Return 1 if this is an ARM target where conditional execution is available.
3307 proc check_effective_target_arm_cond_exec { } {
3308 return [check_no_compiler_messages arm_cond_exec assembly {
3309 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
3316 # Return 1 if this is an ARM cortex-M profile cpu
3318 proc check_effective_target_arm_cortex_m { } {
3319 if { ![istarget arm*-*-*] } {
3322 return [check_no_compiler_messages arm_cortex_m assembly {
3323 #if !defined(__ARM_ARCH_7M__) \
3324 && !defined (__ARM_ARCH_7EM__) \
3325 && !defined (__ARM_ARCH_6M__)
3326 #error !__ARM_ARCH_7M__ && !__ARM_ARCH_7EM__ && !__ARM_ARCH_6M__
3332 # Return 1 if this compilation turns on string_ops_prefer_neon on.
3334 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
3335 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
3336 int foo (void) { return 0; }
3337 } "-O2 -mprint-tune-info" ]
3340 # Return 1 if the target supports executing NEON instructions, 0
3341 # otherwise. Cache the result.
3343 proc check_effective_target_arm_neon_hw { } {
3344 return [check_runtime arm_neon_hw_available {
3348 long long a = 0, b = 1;
3349 asm ("vorr %P0, %P1, %P2"
3351 : "0" (a), "w" (b));
3354 } [add_options_for_arm_neon ""]]
3357 proc check_effective_target_arm_neonv2_hw { } {
3358 return [check_runtime arm_neon_hwv2_available {
3359 #include "arm_neon.h"
3363 float32x2_t a, b, c;
3364 asm ("vfma.f32 %P0, %P1, %P2"
3366 : "w" (b), "w" (c));
3369 } [add_options_for_arm_neonv2 ""]]
3372 # Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
3373 # otherwise. The test is valid for AArch64 and ARM. Record the command
3374 # line options needed.
3376 proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
3377 global et_arm_v8_1a_neon_flags
3378 set et_arm_v8_1a_neon_flags ""
3380 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
3384 # Iterate through sets of options to find the compiler flags that
3385 # need to be added to the -march option. Start with the empty set
3386 # since AArch64 only needs the -march setting.
3387 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
3388 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3389 if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object {
3390 #if !defined (__ARM_FEATURE_QRDMX)
3391 #error "__ARM_FEATURE_QRDMX not defined"
3393 } "$flags -march=armv8.1-a"] } {
3394 set et_arm_v8_1a_neon_flags "$flags -march=armv8.1-a"
3402 proc check_effective_target_arm_v8_1a_neon_ok { } {
3403 return [check_cached_effective_target arm_v8_1a_neon_ok \
3404 check_effective_target_arm_v8_1a_neon_ok_nocache]
3407 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
3410 proc check_effective_target_arm_v8_neon_hw { } {
3411 return [check_runtime arm_v8_neon_hw_available {
3412 #include "arm_neon.h"
3417 asm ("vrinta.f32 %P0, %P1"
3422 } [add_options_for_arm_v8_neon ""]]
3425 # Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
3426 # otherwise. The test is valid for AArch64 and ARM.
3428 proc check_effective_target_arm_v8_1a_neon_hw { } {
3429 if { ![check_effective_target_arm_v8_1a_neon_ok] } {
3432 return [check_runtime arm_v8_1a_neon_hw_available {
3436 #ifdef __ARM_ARCH_ISA_A64
3437 __Int32x2_t a = {0, 1};
3438 __Int32x2_t b = {0, 2};
3441 asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
3444 : /* No clobbers. */);
3448 __simd64_int32_t a = {0, 1};
3449 __simd64_int32_t b = {0, 2};
3450 __simd64_int32_t result;
3452 asm ("vqrdmlah.s32 %P0, %P1, %P2"
3455 : /* No clobbers. */);
3460 } [add_options_for_arm_v8_1a_neon ""]]
3463 # Return 1 if this is a ARM target with NEON enabled.
3465 proc check_effective_target_arm_neon { } {
3466 if { [check_effective_target_arm32] } {
3467 return [check_no_compiler_messages arm_neon object {
3468 #ifndef __ARM_NEON__
3479 proc check_effective_target_arm_neonv2 { } {
3480 if { [check_effective_target_arm32] } {
3481 return [check_no_compiler_messages arm_neon object {
3482 #ifndef __ARM_NEON__
3485 #ifndef __ARM_FEATURE_FMA
3497 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
3498 # the Loongson vector modes.
3500 proc check_effective_target_mips_loongson { } {
3501 return [check_no_compiler_messages loongson assembly {
3502 #if !defined(__mips_loongson_vector_rev)
3503 #error !__mips_loongson_vector_rev
3508 # Return 1 if this is a MIPS target that supports the legacy NAN.
3510 proc check_effective_target_mips_nanlegacy { } {
3511 return [check_no_compiler_messages nanlegacy assembly {
3513 int main () { return 0; }
3517 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
3520 proc check_effective_target_arm_eabi { } {
3521 return [check_no_compiler_messages arm_eabi object {
3522 #ifndef __ARM_EABI__
3530 # Return 1 if this is an ARM target that adheres to the hard-float variant of
3531 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
3533 proc check_effective_target_arm_hf_eabi { } {
3534 return [check_no_compiler_messages arm_hf_eabi object {
3535 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
3536 #error not hard-float EABI
3543 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
3544 # Some multilibs may be incompatible with this option.
3546 proc check_effective_target_arm_iwmmxt_ok { } {
3547 if { [check_effective_target_arm32] } {
3548 return [check_no_compiler_messages arm_iwmmxt_ok object {
3556 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
3557 # for an ARM target.
3558 proc check_effective_target_arm_prefer_ldrd_strd { } {
3559 if { ![check_effective_target_arm32] } {
3563 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
3564 void foo (int *p) { p[0] = 1; p[1] = 0;}
3568 # Return 1 if this is a PowerPC target supporting -meabi.
3570 proc check_effective_target_powerpc_eabi_ok { } {
3571 if { [istarget powerpc*-*-*] } {
3572 return [check_no_compiler_messages powerpc_eabi_ok object {
3580 # Return 1 if this is a PowerPC target with floating-point registers.
3582 proc check_effective_target_powerpc_fprs { } {
3583 if { [istarget powerpc*-*-*]
3584 || [istarget rs6000-*-*] } {
3585 return [check_no_compiler_messages powerpc_fprs object {
3597 # Return 1 if this is a PowerPC target with hardware double-precision
3600 proc check_effective_target_powerpc_hard_double { } {
3601 if { [istarget powerpc*-*-*]
3602 || [istarget rs6000-*-*] } {
3603 return [check_no_compiler_messages powerpc_hard_double object {
3615 # Return 1 if this is a PowerPC target supporting -maltivec.
3617 proc check_effective_target_powerpc_altivec_ok { } {
3618 if { ([istarget powerpc*-*-*]
3619 && ![istarget powerpc-*-linux*paired*])
3620 || [istarget rs6000-*-*] } {
3621 # AltiVec is not supported on AIX before 5.3.
3622 if { [istarget powerpc*-*-aix4*]
3623 || [istarget powerpc*-*-aix5.1*]
3624 || [istarget powerpc*-*-aix5.2*] } {
3627 return [check_no_compiler_messages powerpc_altivec_ok object {
3635 # Return 1 if this is a PowerPC target supporting -mpower8-vector
3637 proc check_effective_target_powerpc_p8vector_ok { } {
3638 if { ([istarget powerpc*-*-*]
3639 && ![istarget powerpc-*-linux*paired*])
3640 || [istarget rs6000-*-*] } {
3641 # AltiVec is not supported on AIX before 5.3.
3642 if { [istarget powerpc*-*-aix4*]
3643 || [istarget powerpc*-*-aix5.1*]
3644 || [istarget powerpc*-*-aix5.2*] } {
3647 return [check_no_compiler_messages powerpc_p8vector_ok object {
3650 asm volatile ("xxlorc vs0,vs0,vs0");
3652 asm volatile ("xxlorc 0,0,0");
3656 } "-mpower8-vector"]
3662 # Return 1 if this is a PowerPC target supporting -mpower9-vector
3664 proc check_effective_target_powerpc_p9vector_ok { } {
3665 if { ([istarget powerpc*-*-*]
3666 && ![istarget powerpc-*-linux*paired*])
3667 || [istarget rs6000-*-*] } {
3668 # AltiVec is not supported on AIX before 5.3.
3669 if { [istarget powerpc*-*-aix4*]
3670 || [istarget powerpc*-*-aix5.1*]
3671 || [istarget powerpc*-*-aix5.2*] } {
3674 return [check_no_compiler_messages powerpc_p9vector_ok object {
3677 vector double v = (vector double) { 0.0, 0.0 };
3678 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
3681 } "-mpower9-vector"]
3687 # Return 1 if this is a PowerPC target supporting -mmodulo
3689 proc check_effective_target_powerpc_p9modulo_ok { } {
3690 if { ([istarget powerpc*-*-*]
3691 && ![istarget powerpc-*-linux*paired*])
3692 || [istarget rs6000-*-*] } {
3693 # AltiVec is not supported on AIX before 5.3.
3694 if { [istarget powerpc*-*-aix4*]
3695 || [istarget powerpc*-*-aix5.1*]
3696 || [istarget powerpc*-*-aix5.2*] } {
3699 return [check_no_compiler_messages powerpc_p9modulo_ok object {
3701 int i = 5, j = 3, r = -1;
3702 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
3711 # Return 1 if this is a PowerPC target supporting -mfloat128 via either
3712 # software emulation on power7/power8 systems or hardware support on power9.
3714 proc check_effective_target_powerpc_float128_sw_ok { } {
3715 if { ([istarget powerpc*-*-*]
3716 && ![istarget powerpc-*-linux*paired*])
3717 || [istarget rs6000-*-*] } {
3718 # AltiVec is not supported on AIX before 5.3.
3719 if { [istarget powerpc*-*-aix4*]
3720 || [istarget powerpc*-*-aix5.1*]
3721 || [istarget powerpc*-*-aix5.2*] } {
3724 return [check_no_compiler_messages powerpc_float128_sw_ok object {
3725 volatile __float128 x = 1.0q;
3726 volatile __float128 y = 2.0q;
3728 __float128 z = x + y;
3731 } "-mfloat128 -mvsx"]
3737 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
3738 # support on power9.
3740 proc check_effective_target_powerpc_float128_hw_ok { } {
3741 if { ([istarget powerpc*-*-*]
3742 && ![istarget powerpc-*-linux*paired*])
3743 || [istarget rs6000-*-*] } {
3744 # AltiVec is not supported on AIX before 5.3.
3745 if { [istarget powerpc*-*-aix4*]
3746 || [istarget powerpc*-*-aix5.1*]
3747 || [istarget powerpc*-*-aix5.2*] } {
3750 return [check_no_compiler_messages powerpc_float128_hw_ok object {
3751 volatile __float128 x = 1.0q;
3752 volatile __float128 y = 2.0q;
3755 __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
3758 } "-mfloat128-hardware"]
3764 # Return 1 if this is a PowerPC target supporting -mvsx
3766 proc check_effective_target_powerpc_vsx_ok { } {
3767 if { ([istarget powerpc*-*-*]
3768 && ![istarget powerpc-*-linux*paired*])
3769 || [istarget rs6000-*-*] } {
3770 # VSX is not supported on AIX before 7.1.
3771 if { [istarget powerpc*-*-aix4*]
3772 || [istarget powerpc*-*-aix5*]
3773 || [istarget powerpc*-*-aix6*] } {
3776 return [check_no_compiler_messages powerpc_vsx_ok object {
3779 asm volatile ("xxlor vs0,vs0,vs0");
3781 asm volatile ("xxlor 0,0,0");
3791 # Return 1 if this is a PowerPC target supporting -mhtm
3793 proc check_effective_target_powerpc_htm_ok { } {
3794 if { ([istarget powerpc*-*-*]
3795 && ![istarget powerpc-*-linux*paired*])
3796 || [istarget rs6000-*-*] } {
3797 # HTM is not supported on AIX yet.
3798 if { [istarget powerpc*-*-aix*] } {
3801 return [check_no_compiler_messages powerpc_htm_ok object {
3803 asm volatile ("tbegin. 0");
3812 # Return 1 if the target supports executing HTM hardware instructions,
3813 # 0 otherwise. Cache the result.
3815 proc check_htm_hw_available { } {
3816 return [check_cached_effective_target htm_hw_available {
3817 # For now, disable on Darwin
3818 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
3821 check_runtime_nocache htm_hw_available {
3831 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
3833 proc check_effective_target_powerpc_ppu_ok { } {
3834 if [check_effective_target_powerpc_altivec_ok] {
3835 return [check_no_compiler_messages cell_asm_available object {
3838 asm volatile ("lvlx v0,v0,v0");
3840 asm volatile ("lvlx 0,0,0");
3850 # Return 1 if this is a PowerPC target that supports SPU.
3852 proc check_effective_target_powerpc_spu { } {
3853 if { [istarget powerpc*-*-linux*] } {
3854 return [check_effective_target_powerpc_altivec_ok]
3860 # Return 1 if this is a PowerPC SPE target. The check includes options
3861 # specified by dg-options for this test, so don't cache the result.
3863 proc check_effective_target_powerpc_spe_nocache { } {
3864 if { [istarget powerpc*-*-*] } {
3865 return [check_no_compiler_messages_nocache powerpc_spe object {
3871 } [current_compiler_flags]]
3877 # Return 1 if this is a PowerPC target with SPE enabled.
3879 proc check_effective_target_powerpc_spe { } {
3880 if { [istarget powerpc*-*-*] } {
3881 return [check_no_compiler_messages powerpc_spe object {
3893 # Return 1 if this is a PowerPC target with Altivec enabled.
3895 proc check_effective_target_powerpc_altivec { } {
3896 if { [istarget powerpc*-*-*] } {
3897 return [check_no_compiler_messages powerpc_altivec object {
3909 # Return 1 if this is a PowerPC 405 target. The check includes options
3910 # specified by dg-options for this test, so don't cache the result.
3912 proc check_effective_target_powerpc_405_nocache { } {
3913 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
3914 return [check_no_compiler_messages_nocache powerpc_405 object {
3920 } [current_compiler_flags]]
3926 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
3928 proc check_effective_target_powerpc_elfv2 { } {
3929 if { [istarget powerpc*-*-*] } {
3930 return [check_no_compiler_messages powerpc_elfv2 object {
3932 #error not ELF v2 ABI
3942 # Return 1 if this is a SPU target with a toolchain that
3943 # supports automatic overlay generation.
3945 proc check_effective_target_spu_auto_overlay { } {
3946 if { [istarget spu*-*-elf*] } {
3947 return [check_no_compiler_messages spu_auto_overlay executable {
3949 } "-Wl,--auto-overlay" ]
3955 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
3956 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
3957 # test environment appears to run executables on such a simulator.
3959 proc check_effective_target_ultrasparc_hw { } {
3960 return [check_runtime ultrasparc_hw {
3961 int main() { return 0; }
3962 } "-mcpu=ultrasparc"]
3965 # Return 1 if the test environment supports executing UltraSPARC VIS2
3966 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
3968 proc check_effective_target_ultrasparc_vis2_hw { } {
3969 return [check_runtime ultrasparc_vis2_hw {
3970 int main() { __asm__(".word 0x81b00320"); return 0; }
3971 } "-mcpu=ultrasparc3"]
3974 # Return 1 if the test environment supports executing UltraSPARC VIS3
3975 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
3977 proc check_effective_target_ultrasparc_vis3_hw { } {
3978 return [check_runtime ultrasparc_vis3_hw {
3979 int main() { __asm__(".word 0x81b00220"); return 0; }
3983 # Return 1 if this is a SPARC-V9 target.
3985 proc check_effective_target_sparc_v9 { } {
3986 if { [istarget sparc*-*-*] } {
3987 return [check_no_compiler_messages sparc_v9 object {
3989 asm volatile ("return %i7+8");
3998 # Return 1 if this is a SPARC target with VIS enabled.
4000 proc check_effective_target_sparc_vis { } {
4001 if { [istarget sparc*-*-*] } {
4002 return [check_no_compiler_messages sparc_vis object {
4014 # Return 1 if the target supports hardware vector shift operation.
4016 proc check_effective_target_vect_shift { } {
4017 global et_vect_shift_saved
4019 if [info exists et_vect_shift_saved] {
4020 verbose "check_effective_target_vect_shift: using cached result" 2
4022 set et_vect_shift_saved 0
4023 if { ([istarget powerpc*-*-*]
4024 && ![istarget powerpc-*-linux*paired*])
4025 || [istarget ia64-*-*]
4026 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4027 || [istarget aarch64*-*-*]
4028 || [check_effective_target_arm32]
4029 || ([istarget mips*-*-*]
4030 && [check_effective_target_mips_loongson]) } {
4031 set et_vect_shift_saved 1
4035 verbose "check_effective_target_vect_shift: returning $et_vect_shift_saved" 2
4036 return $et_vect_shift_saved
4039 proc check_effective_target_whole_vector_shift { } {
4040 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4041 || [istarget ia64-*-*]
4042 || [istarget aarch64*-*-*]
4043 || [istarget powerpc64*-*-*]
4044 || ([check_effective_target_arm32]
4045 && [check_effective_target_arm_little_endian])
4046 || ([istarget mips*-*-*]
4047 && [check_effective_target_mips_loongson]) } {
4053 verbose "check_effective_target_vect_long: returning $answer" 2
4057 # Return 1 if the target supports vector bswap operations.
4059 proc check_effective_target_vect_bswap { } {
4060 global et_vect_bswap_saved
4062 if [info exists et_vect_bswap_saved] {
4063 verbose "check_effective_target_vect_bswap: using cached result" 2
4065 set et_vect_bswap_saved 0
4066 if { [istarget aarch64*-*-*]
4067 || ([istarget arm*-*-*]
4068 && [check_effective_target_arm_neon])
4070 set et_vect_bswap_saved 1
4074 verbose "check_effective_target_vect_bswap: returning $et_vect_bswap_saved" 2
4075 return $et_vect_bswap_saved
4078 # Return 1 if the target supports hardware vector shift operation for char.
4080 proc check_effective_target_vect_shift_char { } {
4081 global et_vect_shift_char_saved
4083 if [info exists et_vect_shift_char_saved] {
4084 verbose "check_effective_target_vect_shift_char: using cached result" 2
4086 set et_vect_shift_char_saved 0
4087 if { ([istarget powerpc*-*-*]
4088 && ![istarget powerpc-*-linux*paired*])
4089 || [check_effective_target_arm32] } {
4090 set et_vect_shift_char_saved 1
4094 verbose "check_effective_target_vect_shift_char: returning $et_vect_shift_char_saved" 2
4095 return $et_vect_shift_char_saved
4098 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
4100 # This can change for different subtargets so do not cache the result.
4102 proc check_effective_target_vect_long { } {
4103 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4104 || (([istarget powerpc*-*-*]
4105 && ![istarget powerpc-*-linux*paired*])
4106 && [check_effective_target_ilp32])
4107 || [check_effective_target_arm32]
4108 || ([istarget sparc*-*-*] && [check_effective_target_ilp32]) } {
4114 verbose "check_effective_target_vect_long: returning $answer" 2
4118 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
4120 # This won't change for different subtargets so cache the result.
4122 proc check_effective_target_vect_float { } {
4123 global et_vect_float_saved
4125 if [info exists et_vect_float_saved] {
4126 verbose "check_effective_target_vect_float: using cached result" 2
4128 set et_vect_float_saved 0
4129 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4130 || [istarget powerpc*-*-*]
4131 || [istarget spu-*-*]
4132 || [istarget mips-sde-elf]
4133 || [istarget mipsisa64*-*-*]
4134 || [istarget ia64-*-*]
4135 || [istarget aarch64*-*-*]
4136 || [check_effective_target_arm32] } {
4137 set et_vect_float_saved 1
4141 verbose "check_effective_target_vect_float: returning $et_vect_float_saved" 2
4142 return $et_vect_float_saved
4145 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
4147 # This won't change for different subtargets so cache the result.
4149 proc check_effective_target_vect_double { } {
4150 global et_vect_double_saved
4152 if [info exists et_vect_double_saved] {
4153 verbose "check_effective_target_vect_double: using cached result" 2
4155 set et_vect_double_saved 0
4156 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4157 || [istarget aarch64*-*-*] } {
4158 if { [check_no_compiler_messages vect_double assembly {
4159 #ifdef __tune_atom__
4160 # error No double vectorizer support.
4163 set et_vect_double_saved 1
4165 set et_vect_double_saved 0
4167 } elseif { [istarget spu-*-*] } {
4168 set et_vect_double_saved 1
4169 } elseif { [istarget powerpc*-*-*] && [check_vsx_hw_available] } {
4170 set et_vect_double_saved 1
4174 verbose "check_effective_target_vect_double: returning $et_vect_double_saved" 2
4175 return $et_vect_double_saved
4178 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
4180 # This won't change for different subtargets so cache the result.
4182 proc check_effective_target_vect_long_long { } {
4183 global et_vect_long_long_saved
4185 if [info exists et_vect_long_long_saved] {
4186 verbose "check_effective_target_vect_long_long: using cached result" 2
4188 set et_vect_long_long_saved 0
4189 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4190 set et_vect_long_long_saved 1
4194 verbose "check_effective_target_vect_long_long: returning $et_vect_long_long_saved" 2
4195 return $et_vect_long_long_saved
4199 # Return 1 if the target plus current options does not support a vector
4200 # max instruction on "int", 0 otherwise.
4202 # This won't change for different subtargets so cache the result.
4204 proc check_effective_target_vect_no_int_min_max { } {
4205 global et_vect_no_int_min_max_saved
4207 if [info exists et_vect_no_int_min_max_saved] {
4208 verbose "check_effective_target_vect_no_int_min_max: using cached result" 2
4210 set et_vect_no_int_min_max_saved 0
4211 if { [istarget sparc*-*-*]
4212 || [istarget spu-*-*]
4213 || [istarget alpha*-*-*]
4214 || ([istarget mips*-*-*]
4215 && [check_effective_target_mips_loongson]) } {
4216 set et_vect_no_int_min_max_saved 1
4219 verbose "check_effective_target_vect_no_int_min_max: returning $et_vect_no_int_min_max_saved" 2
4220 return $et_vect_no_int_min_max_saved
4223 # Return 1 if the target plus current options does not support a vector
4224 # add instruction on "int", 0 otherwise.
4226 # This won't change for different subtargets so cache the result.
4228 proc check_effective_target_vect_no_int_add { } {
4229 global et_vect_no_int_add_saved
4231 if [info exists et_vect_no_int_add_saved] {
4232 verbose "check_effective_target_vect_no_int_add: using cached result" 2
4234 set et_vect_no_int_add_saved 0
4235 # Alpha only supports vector add on V8QI and V4HI.
4236 if { [istarget alpha*-*-*] } {
4237 set et_vect_no_int_add_saved 1
4240 verbose "check_effective_target_vect_no_int_add: returning $et_vect_no_int_add_saved" 2
4241 return $et_vect_no_int_add_saved
4244 # Return 1 if the target plus current options does not support vector
4245 # bitwise instructions, 0 otherwise.
4247 # This won't change for different subtargets so cache the result.
4249 proc check_effective_target_vect_no_bitwise { } {
4250 global et_vect_no_bitwise_saved
4252 if [info exists et_vect_no_bitwise_saved] {
4253 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
4255 set et_vect_no_bitwise_saved 0
4257 verbose "check_effective_target_vect_no_bitwise: returning $et_vect_no_bitwise_saved" 2
4258 return $et_vect_no_bitwise_saved
4261 # Return 1 if the target plus current options supports vector permutation,
4264 # This won't change for different subtargets so cache the result.
4266 proc check_effective_target_vect_perm { } {
4269 if [info exists et_vect_perm_saved] {
4270 verbose "check_effective_target_vect_perm: using cached result" 2
4272 set et_vect_perm_saved 0
4273 if { [is-effective-target arm_neon_ok]
4274 || [istarget aarch64*-*-*]
4275 || [istarget powerpc*-*-*]
4276 || [istarget spu-*-*]
4277 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4278 || ([istarget mips*-*-*]
4279 && [check_effective_target_mpaired_single]) } {
4280 set et_vect_perm_saved 1
4283 verbose "check_effective_target_vect_perm: returning $et_vect_perm_saved" 2
4284 return $et_vect_perm_saved
4287 # Return 1 if the target plus current options supports vector permutation
4288 # on byte-sized elements, 0 otherwise.
4290 # This won't change for different subtargets so cache the result.
4292 proc check_effective_target_vect_perm_byte { } {
4293 global et_vect_perm_byte
4295 if [info exists et_vect_perm_byte_saved] {
4296 verbose "check_effective_target_vect_perm_byte: using cached result" 2
4298 set et_vect_perm_byte_saved 0
4299 if { ([is-effective-target arm_neon_ok]
4300 && [is-effective-target arm_little_endian])
4301 || ([istarget aarch64*-*-*]
4302 && [is-effective-target aarch64_little_endian])
4303 || [istarget powerpc*-*-*]
4304 || [istarget spu-*-*] } {
4305 set et_vect_perm_byte_saved 1
4308 verbose "check_effective_target_vect_perm_byte: returning $et_vect_perm_byte_saved" 2
4309 return $et_vect_perm_byte_saved
4312 # Return 1 if the target plus current options supports vector permutation
4313 # on short-sized elements, 0 otherwise.
4315 # This won't change for different subtargets so cache the result.
4317 proc check_effective_target_vect_perm_short { } {
4318 global et_vect_perm_short
4320 if [info exists et_vect_perm_short_saved] {
4321 verbose "check_effective_target_vect_perm_short: using cached result" 2
4323 set et_vect_perm_short_saved 0
4324 if { ([is-effective-target arm_neon_ok]
4325 && [is-effective-target arm_little_endian])
4326 || ([istarget aarch64*-*-*]
4327 && [is-effective-target aarch64_little_endian])
4328 || [istarget powerpc*-*-*]
4329 || [istarget spu-*-*] } {
4330 set et_vect_perm_short_saved 1
4333 verbose "check_effective_target_vect_perm_short: returning $et_vect_perm_short_saved" 2
4334 return $et_vect_perm_short_saved
4337 # Return 1 if the target plus current options supports a vector
4338 # widening summation of *short* args into *int* result, 0 otherwise.
4340 # This won't change for different subtargets so cache the result.
4342 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
4343 global et_vect_widen_sum_hi_to_si_pattern
4345 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved] {
4346 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: using cached result" 2
4348 set et_vect_widen_sum_hi_to_si_pattern_saved 0
4349 if { [istarget powerpc*-*-*]
4350 || [istarget aarch64*-*-*]
4351 || ([istarget arm*-*-*] &&
4352 [check_effective_target_arm_neon_ok])
4353 || [istarget ia64-*-*] } {
4354 set et_vect_widen_sum_hi_to_si_pattern_saved 1
4357 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: returning $et_vect_widen_sum_hi_to_si_pattern_saved" 2
4358 return $et_vect_widen_sum_hi_to_si_pattern_saved
4361 # Return 1 if the target plus current options supports a vector
4362 # widening summation of *short* args into *int* result, 0 otherwise.
4363 # A target can also support this widening summation if it can support
4364 # promotion (unpacking) from shorts to ints.
4366 # This won't change for different subtargets so cache the result.
4368 proc check_effective_target_vect_widen_sum_hi_to_si { } {
4369 global et_vect_widen_sum_hi_to_si
4371 if [info exists et_vect_widen_sum_hi_to_si_saved] {
4372 verbose "check_effective_target_vect_widen_sum_hi_to_si: using cached result" 2
4374 set et_vect_widen_sum_hi_to_si_saved [check_effective_target_vect_unpack]
4375 if { [istarget powerpc*-*-*]
4376 || [istarget ia64-*-*] } {
4377 set et_vect_widen_sum_hi_to_si_saved 1
4380 verbose "check_effective_target_vect_widen_sum_hi_to_si: returning $et_vect_widen_sum_hi_to_si_saved" 2
4381 return $et_vect_widen_sum_hi_to_si_saved
4384 # Return 1 if the target plus current options supports a vector
4385 # widening summation of *char* args into *short* result, 0 otherwise.
4386 # A target can also support this widening summation if it can support
4387 # promotion (unpacking) from chars to shorts.
4389 # This won't change for different subtargets so cache the result.
4391 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
4392 global et_vect_widen_sum_qi_to_hi
4394 if [info exists et_vect_widen_sum_qi_to_hi_saved] {
4395 verbose "check_effective_target_vect_widen_sum_qi_to_hi: using cached result" 2
4397 set et_vect_widen_sum_qi_to_hi_saved 0
4398 if { [check_effective_target_vect_unpack]
4399 || [check_effective_target_arm_neon_ok]
4400 || [istarget ia64-*-*] } {
4401 set et_vect_widen_sum_qi_to_hi_saved 1
4404 verbose "check_effective_target_vect_widen_sum_qi_to_hi: returning $et_vect_widen_sum_qi_to_hi_saved" 2
4405 return $et_vect_widen_sum_qi_to_hi_saved
4408 # Return 1 if the target plus current options supports a vector
4409 # widening summation of *char* args into *int* result, 0 otherwise.
4411 # This won't change for different subtargets so cache the result.
4413 proc check_effective_target_vect_widen_sum_qi_to_si { } {
4414 global et_vect_widen_sum_qi_to_si
4416 if [info exists et_vect_widen_sum_qi_to_si_saved] {
4417 verbose "check_effective_target_vect_widen_sum_qi_to_si: using cached result" 2
4419 set et_vect_widen_sum_qi_to_si_saved 0
4420 if { [istarget powerpc*-*-*] } {
4421 set et_vect_widen_sum_qi_to_si_saved 1
4424 verbose "check_effective_target_vect_widen_sum_qi_to_si: returning $et_vect_widen_sum_qi_to_si_saved" 2
4425 return $et_vect_widen_sum_qi_to_si_saved
4428 # Return 1 if the target plus current options supports a vector
4429 # widening multiplication of *char* args into *short* result, 0 otherwise.
4430 # A target can also support this widening multplication if it can support
4431 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
4432 # multiplication of shorts).
4434 # This won't change for different subtargets so cache the result.
4437 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
4438 global et_vect_widen_mult_qi_to_hi
4440 if [info exists et_vect_widen_mult_qi_to_hi_saved] {
4441 verbose "check_effective_target_vect_widen_mult_qi_to_hi: using cached result" 2
4443 if { [check_effective_target_vect_unpack]
4444 && [check_effective_target_vect_short_mult] } {
4445 set et_vect_widen_mult_qi_to_hi_saved 1
4447 set et_vect_widen_mult_qi_to_hi_saved 0
4449 if { [istarget powerpc*-*-*]
4450 || [istarget aarch64*-*-*]
4451 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4452 set et_vect_widen_mult_qi_to_hi_saved 1
4455 verbose "check_effective_target_vect_widen_mult_qi_to_hi: returning $et_vect_widen_mult_qi_to_hi_saved" 2
4456 return $et_vect_widen_mult_qi_to_hi_saved
4459 # Return 1 if the target plus current options supports a vector
4460 # widening multiplication of *short* args into *int* result, 0 otherwise.
4461 # A target can also support this widening multplication if it can support
4462 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
4463 # multiplication of ints).
4465 # This won't change for different subtargets so cache the result.
4468 proc check_effective_target_vect_widen_mult_hi_to_si { } {
4469 global et_vect_widen_mult_hi_to_si
4471 if [info exists et_vect_widen_mult_hi_to_si_saved] {
4472 verbose "check_effective_target_vect_widen_mult_hi_to_si: using cached result" 2
4474 if { [check_effective_target_vect_unpack]
4475 && [check_effective_target_vect_int_mult] } {
4476 set et_vect_widen_mult_hi_to_si_saved 1
4478 set et_vect_widen_mult_hi_to_si_saved 0
4480 if { [istarget powerpc*-*-*]
4481 || [istarget spu-*-*]
4482 || [istarget ia64-*-*]
4483 || [istarget aarch64*-*-*]
4484 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4485 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4486 set et_vect_widen_mult_hi_to_si_saved 1
4489 verbose "check_effective_target_vect_widen_mult_hi_to_si: returning $et_vect_widen_mult_hi_to_si_saved" 2
4490 return $et_vect_widen_mult_hi_to_si_saved
4493 # Return 1 if the target plus current options supports a vector
4494 # widening multiplication of *char* args into *short* result, 0 otherwise.
4496 # This won't change for different subtargets so cache the result.
4498 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
4499 global et_vect_widen_mult_qi_to_hi_pattern
4501 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved] {
4502 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: using cached result" 2
4504 set et_vect_widen_mult_qi_to_hi_pattern_saved 0
4505 if { [istarget powerpc*-*-*]
4506 || ([istarget arm*-*-*]
4507 && [check_effective_target_arm_neon_ok]
4508 && [check_effective_target_arm_little_endian]) } {
4509 set et_vect_widen_mult_qi_to_hi_pattern_saved 1
4512 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: returning $et_vect_widen_mult_qi_to_hi_pattern_saved" 2
4513 return $et_vect_widen_mult_qi_to_hi_pattern_saved
4516 # Return 1 if the target plus current options supports a vector
4517 # widening multiplication of *short* args into *int* result, 0 otherwise.
4519 # This won't change for different subtargets so cache the result.
4521 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
4522 global et_vect_widen_mult_hi_to_si_pattern
4524 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved] {
4525 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: using cached result" 2
4527 set et_vect_widen_mult_hi_to_si_pattern_saved 0
4528 if { [istarget powerpc*-*-*]
4529 || [istarget spu-*-*]
4530 || [istarget ia64-*-*]
4531 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4532 || ([istarget arm*-*-*]
4533 && [check_effective_target_arm_neon_ok]
4534 && [check_effective_target_arm_little_endian]) } {
4535 set et_vect_widen_mult_hi_to_si_pattern_saved 1
4538 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: returning $et_vect_widen_mult_hi_to_si_pattern_saved" 2
4539 return $et_vect_widen_mult_hi_to_si_pattern_saved
4542 # Return 1 if the target plus current options supports a vector
4543 # widening multiplication of *int* args into *long* result, 0 otherwise.
4545 # This won't change for different subtargets so cache the result.
4547 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
4548 global et_vect_widen_mult_si_to_di_pattern
4550 if [info exists et_vect_widen_mult_si_to_di_pattern_saved] {
4551 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: using cached result" 2
4553 set et_vect_widen_mult_si_to_di_pattern_saved 0
4554 if {[istarget ia64-*-*]
4555 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4556 set et_vect_widen_mult_si_to_di_pattern_saved 1
4559 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: returning $et_vect_widen_mult_si_to_di_pattern_saved" 2
4560 return $et_vect_widen_mult_si_to_di_pattern_saved
4563 # Return 1 if the target plus current options supports a vector
4564 # widening shift, 0 otherwise.
4566 # This won't change for different subtargets so cache the result.
4568 proc check_effective_target_vect_widen_shift { } {
4569 global et_vect_widen_shift_saved
4571 if [info exists et_vect_shift_saved] {
4572 verbose "check_effective_target_vect_widen_shift: using cached result" 2
4574 set et_vect_widen_shift_saved 0
4575 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4576 set et_vect_widen_shift_saved 1
4579 verbose "check_effective_target_vect_widen_shift: returning $et_vect_widen_shift_saved" 2
4580 return $et_vect_widen_shift_saved
4583 # Return 1 if the target plus current options supports a vector
4584 # dot-product of signed chars, 0 otherwise.
4586 # This won't change for different subtargets so cache the result.
4588 proc check_effective_target_vect_sdot_qi { } {
4589 global et_vect_sdot_qi
4591 if [info exists et_vect_sdot_qi_saved] {
4592 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
4594 set et_vect_sdot_qi_saved 0
4595 if { [istarget ia64-*-*] } {
4596 set et_vect_udot_qi_saved 1
4599 verbose "check_effective_target_vect_sdot_qi: returning $et_vect_sdot_qi_saved" 2
4600 return $et_vect_sdot_qi_saved
4603 # Return 1 if the target plus current options supports a vector
4604 # dot-product of unsigned chars, 0 otherwise.
4606 # This won't change for different subtargets so cache the result.
4608 proc check_effective_target_vect_udot_qi { } {
4609 global et_vect_udot_qi
4611 if [info exists et_vect_udot_qi_saved] {
4612 verbose "check_effective_target_vect_udot_qi: using cached result" 2
4614 set et_vect_udot_qi_saved 0
4615 if { [istarget powerpc*-*-*]
4616 || [istarget ia64-*-*] } {
4617 set et_vect_udot_qi_saved 1
4620 verbose "check_effective_target_vect_udot_qi: returning $et_vect_udot_qi_saved" 2
4621 return $et_vect_udot_qi_saved
4624 # Return 1 if the target plus current options supports a vector
4625 # dot-product of signed shorts, 0 otherwise.
4627 # This won't change for different subtargets so cache the result.
4629 proc check_effective_target_vect_sdot_hi { } {
4630 global et_vect_sdot_hi
4632 if [info exists et_vect_sdot_hi_saved] {
4633 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
4635 set et_vect_sdot_hi_saved 0
4636 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4637 || [istarget ia64-*-*]
4638 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4639 set et_vect_sdot_hi_saved 1
4642 verbose "check_effective_target_vect_sdot_hi: returning $et_vect_sdot_hi_saved" 2
4643 return $et_vect_sdot_hi_saved
4646 # Return 1 if the target plus current options supports a vector
4647 # dot-product of unsigned shorts, 0 otherwise.
4649 # This won't change for different subtargets so cache the result.
4651 proc check_effective_target_vect_udot_hi { } {
4652 global et_vect_udot_hi
4654 if [info exists et_vect_udot_hi_saved] {
4655 verbose "check_effective_target_vect_udot_hi: using cached result" 2
4657 set et_vect_udot_hi_saved 0
4658 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) } {
4659 set et_vect_udot_hi_saved 1
4662 verbose "check_effective_target_vect_udot_hi: returning $et_vect_udot_hi_saved" 2
4663 return $et_vect_udot_hi_saved
4666 # Return 1 if the target plus current options supports a vector
4667 # sad operation of unsigned chars, 0 otherwise.
4669 # This won't change for different subtargets so cache the result.
4671 proc check_effective_target_vect_usad_char { } {
4672 global et_vect_usad_char
4674 if [info exists et_vect_usad_char_saved] {
4675 verbose "check_effective_target_vect_usad_char: using cached result" 2
4677 set et_vect_usad_char_saved 0
4678 if { ([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
4679 set et_vect_usad_char_saved 1
4682 verbose "check_effective_target_vect_usad_char: returning $et_vect_usad_char_saved" 2
4683 return $et_vect_usad_char_saved
4686 # Return 1 if the target plus current options supports a vector
4687 # demotion (packing) of shorts (to chars) and ints (to shorts)
4688 # using modulo arithmetic, 0 otherwise.
4690 # This won't change for different subtargets so cache the result.
4692 proc check_effective_target_vect_pack_trunc { } {
4693 global et_vect_pack_trunc
4695 if [info exists et_vect_pack_trunc_saved] {
4696 verbose "check_effective_target_vect_pack_trunc: using cached result" 2
4698 set et_vect_pack_trunc_saved 0
4699 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4700 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4701 || [istarget aarch64*-*-*]
4702 || [istarget spu-*-*]
4703 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4704 && [check_effective_target_arm_little_endian]) } {
4705 set et_vect_pack_trunc_saved 1
4708 verbose "check_effective_target_vect_pack_trunc: returning $et_vect_pack_trunc_saved" 2
4709 return $et_vect_pack_trunc_saved
4712 # Return 1 if the target plus current options supports a vector
4713 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
4715 # This won't change for different subtargets so cache the result.
4717 proc check_effective_target_vect_unpack { } {
4718 global et_vect_unpack
4720 if [info exists et_vect_unpack_saved] {
4721 verbose "check_effective_target_vect_unpack: using cached result" 2
4723 set et_vect_unpack_saved 0
4724 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
4725 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4726 || [istarget spu-*-*]
4727 || [istarget ia64-*-*]
4728 || [istarget aarch64*-*-*]
4729 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4730 && [check_effective_target_arm_little_endian]) } {
4731 set et_vect_unpack_saved 1
4734 verbose "check_effective_target_vect_unpack: returning $et_vect_unpack_saved" 2
4735 return $et_vect_unpack_saved
4738 # Return 1 if the target plus current options does not guarantee
4739 # that its STACK_BOUNDARY is >= the reguired vector alignment.
4741 # This won't change for different subtargets so cache the result.
4743 proc check_effective_target_unaligned_stack { } {
4744 global et_unaligned_stack_saved
4746 if [info exists et_unaligned_stack_saved] {
4747 verbose "check_effective_target_unaligned_stack: using cached result" 2
4749 set et_unaligned_stack_saved 0
4751 verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
4752 return $et_unaligned_stack_saved
4755 # Return 1 if the target plus current options does not support a vector
4756 # alignment mechanism, 0 otherwise.
4758 # This won't change for different subtargets so cache the result.
4760 proc check_effective_target_vect_no_align { } {
4761 global et_vect_no_align_saved
4763 if [info exists et_vect_no_align_saved] {
4764 verbose "check_effective_target_vect_no_align: using cached result" 2
4766 set et_vect_no_align_saved 0
4767 if { [istarget mipsisa64*-*-*]
4768 || [istarget mips-sde-elf]
4769 || [istarget sparc*-*-*]
4770 || [istarget ia64-*-*]
4771 || [check_effective_target_arm_vect_no_misalign]
4772 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
4773 || ([istarget mips*-*-*]
4774 && [check_effective_target_mips_loongson]) } {
4775 set et_vect_no_align_saved 1
4778 verbose "check_effective_target_vect_no_align: returning $et_vect_no_align_saved" 2
4779 return $et_vect_no_align_saved
4782 # Return 1 if the target supports a vector misalign access, 0 otherwise.
4784 # This won't change for different subtargets so cache the result.
4786 proc check_effective_target_vect_hw_misalign { } {
4787 global et_vect_hw_misalign_saved
4789 if [info exists et_vect_hw_misalign_saved] {
4790 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
4792 set et_vect_hw_misalign_saved 0
4793 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4794 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
4795 || [istarget aarch64*-*-*] } {
4796 set et_vect_hw_misalign_saved 1
4799 verbose "check_effective_target_vect_hw_misalign: returning $et_vect_hw_misalign_saved" 2
4800 return $et_vect_hw_misalign_saved
4804 # Return 1 if arrays are aligned to the vector alignment
4805 # boundary, 0 otherwise.
4807 # This won't change for different subtargets so cache the result.
4809 proc check_effective_target_vect_aligned_arrays { } {
4810 global et_vect_aligned_arrays
4812 if [info exists et_vect_aligned_arrays_saved] {
4813 verbose "check_effective_target_vect_aligned_arrays: using cached result" 2
4815 set et_vect_aligned_arrays_saved 0
4816 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
4817 if { ([is-effective-target lp64]
4818 && ( ![check_avx_available]
4819 || [check_prefer_avx128])) } {
4820 set et_vect_aligned_arrays_saved 1
4823 if [istarget spu-*-*] {
4824 set et_vect_aligned_arrays_saved 1
4827 verbose "check_effective_target_vect_aligned_arrays: returning $et_vect_aligned_arrays_saved" 2
4828 return $et_vect_aligned_arrays_saved
4831 # Return 1 if types of size 32 bit or less are naturally aligned
4832 # (aligned to their type-size), 0 otherwise.
4834 # This won't change for different subtargets so cache the result.
4836 proc check_effective_target_natural_alignment_32 { } {
4837 global et_natural_alignment_32
4839 if [info exists et_natural_alignment_32_saved] {
4840 verbose "check_effective_target_natural_alignment_32: using cached result" 2
4842 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
4843 set et_natural_alignment_32_saved 1
4844 if { ([istarget *-*-darwin*] && [is-effective-target lp64]) } {
4845 set et_natural_alignment_32_saved 0
4848 verbose "check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
4849 return $et_natural_alignment_32_saved
4852 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
4853 # type-size), 0 otherwise.
4855 # This won't change for different subtargets so cache the result.
4857 proc check_effective_target_natural_alignment_64 { } {
4858 global et_natural_alignment_64
4860 if [info exists et_natural_alignment_64_saved] {
4861 verbose "check_effective_target_natural_alignment_64: using cached result" 2
4863 set et_natural_alignment_64_saved 0
4864 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
4865 || [istarget spu-*-*] } {
4866 set et_natural_alignment_64_saved 1
4869 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
4870 return $et_natural_alignment_64_saved
4873 # Return 1 if all vector types are naturally aligned (aligned to their
4874 # type-size), 0 otherwise.
4876 # This won't change for different subtargets so cache the result.
4878 proc check_effective_target_vect_natural_alignment { } {
4879 global et_vect_natural_alignment
4881 if [info exists et_vect_natural_alignment_saved] {
4882 verbose "check_effective_target_vect_natural_alignment: using cached result" 2
4884 set et_vect_natural_alignment_saved 1
4885 if { [check_effective_target_arm_eabi]
4886 || [istarget nvptx-*-*]
4887 || [istarget s390*-*-*] } {
4888 set et_vect_natural_alignment_saved 0
4891 verbose "check_effective_target_vect_natural_alignment: returning $et_vect_natural_alignment_saved" 2
4892 return $et_vect_natural_alignment_saved
4895 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
4897 # This won't change for different subtargets so cache the result.
4899 proc check_effective_target_vector_alignment_reachable { } {
4900 global et_vector_alignment_reachable
4902 if [info exists et_vector_alignment_reachable_saved] {
4903 verbose "check_effective_target_vector_alignment_reachable: using cached result" 2
4905 if { [check_effective_target_vect_aligned_arrays]
4906 || [check_effective_target_natural_alignment_32] } {
4907 set et_vector_alignment_reachable_saved 1
4909 set et_vector_alignment_reachable_saved 0
4912 verbose "check_effective_target_vector_alignment_reachable: returning $et_vector_alignment_reachable_saved" 2
4913 return $et_vector_alignment_reachable_saved
4916 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
4918 # This won't change for different subtargets so cache the result.
4920 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
4921 global et_vector_alignment_reachable_for_64bit
4923 if [info exists et_vector_alignment_reachable_for_64bit_saved] {
4924 verbose "check_effective_target_vector_alignment_reachable_for_64bit: using cached result" 2
4926 if { [check_effective_target_vect_aligned_arrays]
4927 || [check_effective_target_natural_alignment_64] } {
4928 set et_vector_alignment_reachable_for_64bit_saved 1
4930 set et_vector_alignment_reachable_for_64bit_saved 0
4933 verbose "check_effective_target_vector_alignment_reachable_for_64bit: returning $et_vector_alignment_reachable_for_64bit_saved" 2
4934 return $et_vector_alignment_reachable_for_64bit_saved
4937 # Return 1 if the target only requires element alignment for vector accesses
4939 proc check_effective_target_vect_element_align { } {
4940 global et_vect_element_align
4942 if [info exists et_vect_element_align] {
4943 verbose "check_effective_target_vect_element_align: using cached result" 2
4945 set et_vect_element_align 0
4946 if { ([istarget arm*-*-*]
4947 && ![check_effective_target_arm_vect_no_misalign])
4948 || [check_effective_target_vect_hw_misalign] } {
4949 set et_vect_element_align 1
4953 verbose "check_effective_target_vect_element_align: returning $et_vect_element_align" 2
4954 return $et_vect_element_align
4957 # Return 1 if the target supports vector LOAD_LANES operations, 0 otherwise.
4959 proc check_effective_target_vect_load_lanes { } {
4960 global et_vect_load_lanes
4962 if [info exists et_vect_load_lanes] {
4963 verbose "check_effective_target_vect_load_lanes: using cached result" 2
4965 set et_vect_load_lanes 0
4966 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])
4967 || [istarget aarch64*-*-*] } {
4968 set et_vect_load_lanes 1
4972 verbose "check_effective_target_vect_load_lanes: returning $et_vect_load_lanes" 2
4973 return $et_vect_load_lanes
4976 # Return 1 if the target supports vector conditional operations, 0 otherwise.
4978 proc check_effective_target_vect_condition { } {
4979 global et_vect_cond_saved
4981 if [info exists et_vect_cond_saved] {
4982 verbose "check_effective_target_vect_cond: using cached result" 2
4984 set et_vect_cond_saved 0
4985 if { [istarget aarch64*-*-*]
4986 || [istarget powerpc*-*-*]
4987 || [istarget ia64-*-*]
4988 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4989 || [istarget spu-*-*]
4990 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4991 set et_vect_cond_saved 1
4995 verbose "check_effective_target_vect_cond: returning $et_vect_cond_saved" 2
4996 return $et_vect_cond_saved
4999 # Return 1 if the target supports vector conditional operations where
5000 # the comparison has different type from the lhs, 0 otherwise.
5002 proc check_effective_target_vect_cond_mixed { } {
5003 global et_vect_cond_mixed_saved
5005 if [info exists et_vect_cond_mixed_saved] {
5006 verbose "check_effective_target_vect_cond_mixed: using cached result" 2
5008 set et_vect_cond_mixed_saved 0
5009 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5010 || [istarget powerpc*-*-*] } {
5011 set et_vect_cond_mixed_saved 1
5015 verbose "check_effective_target_vect_cond_mixed: returning $et_vect_cond_mixed_saved" 2
5016 return $et_vect_cond_mixed_saved
5019 # Return 1 if the target supports vector char multiplication, 0 otherwise.
5021 proc check_effective_target_vect_char_mult { } {
5022 global et_vect_char_mult_saved
5024 if [info exists et_vect_char_mult_saved] {
5025 verbose "check_effective_target_vect_char_mult: using cached result" 2
5027 set et_vect_char_mult_saved 0
5028 if { [istarget aarch64*-*-*]
5029 || [istarget ia64-*-*]
5030 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5031 || [check_effective_target_arm32]
5032 || [check_effective_target_powerpc_altivec] } {
5033 set et_vect_char_mult_saved 1
5037 verbose "check_effective_target_vect_char_mult: returning $et_vect_char_mult_saved" 2
5038 return $et_vect_char_mult_saved
5041 # Return 1 if the target supports vector short multiplication, 0 otherwise.
5043 proc check_effective_target_vect_short_mult { } {
5044 global et_vect_short_mult_saved
5046 if [info exists et_vect_short_mult_saved] {
5047 verbose "check_effective_target_vect_short_mult: using cached result" 2
5049 set et_vect_short_mult_saved 0
5050 if { [istarget ia64-*-*]
5051 || [istarget spu-*-*]
5052 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5053 || [istarget powerpc*-*-*]
5054 || [istarget aarch64*-*-*]
5055 || [check_effective_target_arm32]
5056 || ([istarget mips*-*-*]
5057 && [check_effective_target_mips_loongson]) } {
5058 set et_vect_short_mult_saved 1
5062 verbose "check_effective_target_vect_short_mult: returning $et_vect_short_mult_saved" 2
5063 return $et_vect_short_mult_saved
5066 # Return 1 if the target supports vector int multiplication, 0 otherwise.
5068 proc check_effective_target_vect_int_mult { } {
5069 global et_vect_int_mult_saved
5071 if [info exists et_vect_int_mult_saved] {
5072 verbose "check_effective_target_vect_int_mult: using cached result" 2
5074 set et_vect_int_mult_saved 0
5075 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5076 || [istarget spu-*-*]
5077 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5078 || [istarget ia64-*-*]
5079 || [istarget aarch64*-*-*]
5080 || [check_effective_target_arm32] } {
5081 set et_vect_int_mult_saved 1
5085 verbose "check_effective_target_vect_int_mult: returning $et_vect_int_mult_saved" 2
5086 return $et_vect_int_mult_saved
5089 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
5091 proc check_effective_target_vect_extract_even_odd { } {
5092 global et_vect_extract_even_odd_saved
5094 if [info exists et_vect_extract_even_odd_saved] {
5095 verbose "check_effective_target_vect_extract_even_odd: using cached result" 2
5097 set et_vect_extract_even_odd_saved 0
5098 if { [istarget aarch64*-*-*]
5099 || [istarget powerpc*-*-*]
5100 || [is-effective-target arm_neon_ok]
5101 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5102 || [istarget ia64-*-*]
5103 || [istarget spu-*-*]
5104 || ([istarget mips*-*-*]
5105 && [check_effective_target_mpaired_single]) } {
5106 set et_vect_extract_even_odd_saved 1
5110 verbose "check_effective_target_vect_extract_even_odd: returning $et_vect_extract_even_odd_saved" 2
5111 return $et_vect_extract_even_odd_saved
5114 # Return 1 if the target supports vector interleaving, 0 otherwise.
5116 proc check_effective_target_vect_interleave { } {
5117 global et_vect_interleave_saved
5119 if [info exists et_vect_interleave_saved] {
5120 verbose "check_effective_target_vect_interleave: using cached result" 2
5122 set et_vect_interleave_saved 0
5123 if { [istarget aarch64*-*-*]
5124 || [istarget powerpc*-*-*]
5125 || [is-effective-target arm_neon_ok]
5126 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5127 || [istarget ia64-*-*]
5128 || [istarget spu-*-*]
5129 || ([istarget mips*-*-*]
5130 && [check_effective_target_mpaired_single]) } {
5131 set et_vect_interleave_saved 1
5135 verbose "check_effective_target_vect_interleave: returning $et_vect_interleave_saved" 2
5136 return $et_vect_interleave_saved
5139 foreach N {2 3 4 8} {
5140 eval [string map [list N $N] {
5141 # Return 1 if the target supports 2-vector interleaving
5142 proc check_effective_target_vect_stridedN { } {
5143 global et_vect_stridedN_saved
5145 if [info exists et_vect_stridedN_saved] {
5146 verbose "check_effective_target_vect_stridedN: using cached result" 2
5148 set et_vect_stridedN_saved 0
5150 && [check_effective_target_vect_interleave]
5151 && [check_effective_target_vect_extract_even_odd] } {
5152 set et_vect_stridedN_saved 1
5154 if { ([istarget arm*-*-*]
5155 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
5156 set et_vect_stridedN_saved 1
5160 verbose "check_effective_target_vect_stridedN: returning $et_vect_stridedN_saved" 2
5161 return $et_vect_stridedN_saved
5166 # Return 1 if the target supports multiple vector sizes
5168 proc check_effective_target_vect_multiple_sizes { } {
5169 global et_vect_multiple_sizes_saved
5171 set et_vect_multiple_sizes_saved 0
5172 if { ([istarget aarch64*-*-*]
5173 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])) } {
5174 set et_vect_multiple_sizes_saved 1
5176 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
5177 if { ([check_avx_available] && ![check_prefer_avx128]) } {
5178 set et_vect_multiple_sizes_saved 1
5182 verbose "check_effective_target_vect_multiple_sizes: returning $et_vect_multiple_sizes_saved" 2
5183 return $et_vect_multiple_sizes_saved
5186 # Return 1 if the target supports vectors of 64 bits.
5188 proc check_effective_target_vect64 { } {
5189 global et_vect64_saved
5191 if [info exists et_vect64_saved] {
5192 verbose "check_effective_target_vect64: using cached result" 2
5194 set et_vect64_saved 0
5195 if { ([istarget arm*-*-*]
5196 && [check_effective_target_arm_neon_ok]
5197 && [check_effective_target_arm_little_endian])
5198 || [istarget aarch64*-*-*]
5199 || [istarget sparc*-*-*] } {
5200 set et_vect64_saved 1
5204 verbose "check_effective_target_vect64: returning $et_vect64_saved" 2
5205 return $et_vect64_saved
5208 # Return 1 if the target supports vector copysignf calls.
5210 proc check_effective_target_vect_call_copysignf { } {
5211 global et_vect_call_copysignf_saved
5213 if [info exists et_vect_call_copysignf_saved] {
5214 verbose "check_effective_target_vect_call_copysignf: using cached result" 2
5216 set et_vect_call_copysignf_saved 0
5217 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5218 || [istarget powerpc*-*-*] } {
5219 set et_vect_call_copysignf_saved 1
5223 verbose "check_effective_target_vect_call_copysignf: returning $et_vect_call_copysignf_saved" 2
5224 return $et_vect_call_copysignf_saved
5227 # Return 1 if the target supports hardware square root instructions.
5229 proc check_effective_target_sqrt_insn { } {
5230 global et_sqrt_insn_saved
5232 if [info exists et_sqrt_insn_saved] {
5233 verbose "check_effective_target_hw_sqrt: using cached result" 2
5235 set et_sqrt_insn_saved 0
5236 if { [istarget x86_64-*-*]
5237 || [istarget powerpc*-*-*]
5238 || [istarget aarch64*-*-*]
5239 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok]) } {
5240 set et_sqrt_insn_saved 1
5244 verbose "check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2
5245 return $et_sqrt_insn_saved
5248 # Return 1 if the target supports vector sqrtf calls.
5250 proc check_effective_target_vect_call_sqrtf { } {
5251 global et_vect_call_sqrtf_saved
5253 if [info exists et_vect_call_sqrtf_saved] {
5254 verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
5256 set et_vect_call_sqrtf_saved 0
5257 if { [istarget aarch64*-*-*]
5258 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5259 || ([istarget powerpc*-*-*] && [check_vsx_hw_available]) } {
5260 set et_vect_call_sqrtf_saved 1
5264 verbose "check_effective_target_vect_call_sqrtf: returning $et_vect_call_sqrtf_saved" 2
5265 return $et_vect_call_sqrtf_saved
5268 # Return 1 if the target supports vector lrint calls.
5270 proc check_effective_target_vect_call_lrint { } {
5271 set et_vect_call_lrint 0
5272 if { ([istarget i?86-*-*] || [istarget x86_64-*-*])
5273 && [check_effective_target_ilp32] } {
5274 set et_vect_call_lrint 1
5277 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
5278 return $et_vect_call_lrint
5281 # Return 1 if the target supports vector btrunc calls.
5283 proc check_effective_target_vect_call_btrunc { } {
5284 global et_vect_call_btrunc_saved
5286 if [info exists et_vect_call_btrunc_saved] {
5287 verbose "check_effective_target_vect_call_btrunc: using cached result" 2
5289 set et_vect_call_btrunc_saved 0
5290 if { [istarget aarch64*-*-*] } {
5291 set et_vect_call_btrunc_saved 1
5295 verbose "check_effective_target_vect_call_btrunc: returning $et_vect_call_btrunc_saved" 2
5296 return $et_vect_call_btrunc_saved
5299 # Return 1 if the target supports vector btruncf calls.
5301 proc check_effective_target_vect_call_btruncf { } {
5302 global et_vect_call_btruncf_saved
5304 if [info exists et_vect_call_btruncf_saved] {
5305 verbose "check_effective_target_vect_call_btruncf: using cached result" 2
5307 set et_vect_call_btruncf_saved 0
5308 if { [istarget aarch64*-*-*] } {
5309 set et_vect_call_btruncf_saved 1
5313 verbose "check_effective_target_vect_call_btruncf: returning $et_vect_call_btruncf_saved" 2
5314 return $et_vect_call_btruncf_saved
5317 # Return 1 if the target supports vector ceil calls.
5319 proc check_effective_target_vect_call_ceil { } {
5320 global et_vect_call_ceil_saved
5322 if [info exists et_vect_call_ceil_saved] {
5323 verbose "check_effective_target_vect_call_ceil: using cached result" 2
5325 set et_vect_call_ceil_saved 0
5326 if { [istarget aarch64*-*-*] } {
5327 set et_vect_call_ceil_saved 1
5331 verbose "check_effective_target_vect_call_ceil: returning $et_vect_call_ceil_saved" 2
5332 return $et_vect_call_ceil_saved
5335 # Return 1 if the target supports vector ceilf calls.
5337 proc check_effective_target_vect_call_ceilf { } {
5338 global et_vect_call_ceilf_saved
5340 if [info exists et_vect_call_ceilf_saved] {
5341 verbose "check_effective_target_vect_call_ceilf: using cached result" 2
5343 set et_vect_call_ceilf_saved 0
5344 if { [istarget aarch64*-*-*] } {
5345 set et_vect_call_ceilf_saved 1
5349 verbose "check_effective_target_vect_call_ceilf: returning $et_vect_call_ceilf_saved" 2
5350 return $et_vect_call_ceilf_saved
5353 # Return 1 if the target supports vector floor calls.
5355 proc check_effective_target_vect_call_floor { } {
5356 global et_vect_call_floor_saved
5358 if [info exists et_vect_call_floor_saved] {
5359 verbose "check_effective_target_vect_call_floor: using cached result" 2
5361 set et_vect_call_floor_saved 0
5362 if { [istarget aarch64*-*-*] } {
5363 set et_vect_call_floor_saved 1
5367 verbose "check_effective_target_vect_call_floor: returning $et_vect_call_floor_saved" 2
5368 return $et_vect_call_floor_saved
5371 # Return 1 if the target supports vector floorf calls.
5373 proc check_effective_target_vect_call_floorf { } {
5374 global et_vect_call_floorf_saved
5376 if [info exists et_vect_call_floorf_saved] {
5377 verbose "check_effective_target_vect_call_floorf: using cached result" 2
5379 set et_vect_call_floorf_saved 0
5380 if { [istarget aarch64*-*-*] } {
5381 set et_vect_call_floorf_saved 1
5385 verbose "check_effective_target_vect_call_floorf: returning $et_vect_call_floorf_saved" 2
5386 return $et_vect_call_floorf_saved
5389 # Return 1 if the target supports vector lceil calls.
5391 proc check_effective_target_vect_call_lceil { } {
5392 global et_vect_call_lceil_saved
5394 if [info exists et_vect_call_lceil_saved] {
5395 verbose "check_effective_target_vect_call_lceil: using cached result" 2
5397 set et_vect_call_lceil_saved 0
5398 if { [istarget aarch64*-*-*] } {
5399 set et_vect_call_lceil_saved 1
5403 verbose "check_effective_target_vect_call_lceil: returning $et_vect_call_lceil_saved" 2
5404 return $et_vect_call_lceil_saved
5407 # Return 1 if the target supports vector lfloor calls.
5409 proc check_effective_target_vect_call_lfloor { } {
5410 global et_vect_call_lfloor_saved
5412 if [info exists et_vect_call_lfloor_saved] {
5413 verbose "check_effective_target_vect_call_lfloor: using cached result" 2
5415 set et_vect_call_lfloor_saved 0
5416 if { [istarget aarch64*-*-*] } {
5417 set et_vect_call_lfloor_saved 1
5421 verbose "check_effective_target_vect_call_lfloor: returning $et_vect_call_lfloor_saved" 2
5422 return $et_vect_call_lfloor_saved
5425 # Return 1 if the target supports vector nearbyint calls.
5427 proc check_effective_target_vect_call_nearbyint { } {
5428 global et_vect_call_nearbyint_saved
5430 if [info exists et_vect_call_nearbyint_saved] {
5431 verbose "check_effective_target_vect_call_nearbyint: using cached result" 2
5433 set et_vect_call_nearbyint_saved 0
5434 if { [istarget aarch64*-*-*] } {
5435 set et_vect_call_nearbyint_saved 1
5439 verbose "check_effective_target_vect_call_nearbyint: returning $et_vect_call_nearbyint_saved" 2
5440 return $et_vect_call_nearbyint_saved
5443 # Return 1 if the target supports vector nearbyintf calls.
5445 proc check_effective_target_vect_call_nearbyintf { } {
5446 global et_vect_call_nearbyintf_saved
5448 if [info exists et_vect_call_nearbyintf_saved] {
5449 verbose "check_effective_target_vect_call_nearbyintf: using cached result" 2
5451 set et_vect_call_nearbyintf_saved 0
5452 if { [istarget aarch64*-*-*] } {
5453 set et_vect_call_nearbyintf_saved 1
5457 verbose "check_effective_target_vect_call_nearbyintf: returning $et_vect_call_nearbyintf_saved" 2
5458 return $et_vect_call_nearbyintf_saved
5461 # Return 1 if the target supports vector round calls.
5463 proc check_effective_target_vect_call_round { } {
5464 global et_vect_call_round_saved
5466 if [info exists et_vect_call_round_saved] {
5467 verbose "check_effective_target_vect_call_round: using cached result" 2
5469 set et_vect_call_round_saved 0
5470 if { [istarget aarch64*-*-*] } {
5471 set et_vect_call_round_saved 1
5475 verbose "check_effective_target_vect_call_round: returning $et_vect_call_round_saved" 2
5476 return $et_vect_call_round_saved
5479 # Return 1 if the target supports vector roundf calls.
5481 proc check_effective_target_vect_call_roundf { } {
5482 global et_vect_call_roundf_saved
5484 if [info exists et_vect_call_roundf_saved] {
5485 verbose "check_effective_target_vect_call_roundf: using cached result" 2
5487 set et_vect_call_roundf_saved 0
5488 if { [istarget aarch64*-*-*] } {
5489 set et_vect_call_roundf_saved 1
5493 verbose "check_effective_target_vect_call_roundf: returning $et_vect_call_roundf_saved" 2
5494 return $et_vect_call_roundf_saved
5497 # Return 1 if the target supports section-anchors
5499 proc check_effective_target_section_anchors { } {
5500 global et_section_anchors_saved
5502 if [info exists et_section_anchors_saved] {
5503 verbose "check_effective_target_section_anchors: using cached result" 2
5505 set et_section_anchors_saved 0
5506 if { [istarget powerpc*-*-*]
5507 || [istarget arm*-*-*]
5508 || [istarget aarch64*-*-*] } {
5509 set et_section_anchors_saved 1
5513 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
5514 return $et_section_anchors_saved
5517 # Return 1 if the target supports atomic operations on "int_128" values.
5519 proc check_effective_target_sync_int_128 { } {
5520 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
5521 && ![is-effective-target ia32] } {
5523 } elseif { [istarget spu-*-*] } {
5530 # Return 1 if the target supports atomic operations on "int_128" values
5531 # and can execute them.
5533 proc check_effective_target_sync_int_128_runtime { } {
5534 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
5535 && ![is-effective-target ia32] } {
5536 return [check_cached_effective_target sync_int_128_available {
5537 check_runtime_nocache sync_int_128_available {
5541 unsigned int eax, ebx, ecx, edx;
5542 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
5543 return !(ecx & bit_CMPXCHG16B);
5548 } elseif { [istarget spu-*-*] } {
5555 # Return 1 if the target supports atomic operations on "long long".
5557 # Note: 32bit x86 targets require -march=pentium in dg-options.
5558 # Note: 32bit s390 targets require -mzarch in dg-options.
5560 proc check_effective_target_sync_long_long { } {
5561 if { [istarget x86_64-*-*] || [istarget i?86-*-*])
5562 || [istarget aarch64*-*-*]
5563 || [istarget arm*-*-*]
5564 || [istarget alpha*-*-*]
5565 || ([istarget sparc*-*-*] && [check_effective_target_lp64])
5566 || [istarget s390*-*-*]
5567 || [istarget spu-*-*] } {
5574 # Return 1 if the target supports atomic operations on "long long"
5575 # and can execute them.
5577 # Note: 32bit x86 targets require -march=pentium in dg-options.
5579 proc check_effective_target_sync_long_long_runtime { } {
5580 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
5581 return [check_cached_effective_target sync_long_long_available {
5582 check_runtime_nocache sync_long_long_available {
5586 unsigned int eax, ebx, ecx, edx;
5587 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
5588 return !(edx & bit_CMPXCHG8B);
5593 } elseif { [istarget aarch64*-*-*] } {
5595 } elseif { [istarget arm*-*-linux-*] } {
5596 return [check_runtime sync_longlong_runtime {
5602 if (sizeof (long long) != 8)
5605 /* Just check for native; checking for kernel fallback is tricky. */
5606 asm volatile ("ldrexd r0,r1, [%0]" : : "r" (&l1) : "r0", "r1");
5611 } elseif { [istarget alpha*-*-*] } {
5613 } elseif { ([istarget sparc*-*-*]
5614 && [check_effective_target_lp64]
5615 && [check_effective_target_ultrasparc_hw]) } {
5617 } elseif { [istarget spu-*-*] } {
5619 } elseif { [istarget powerpc*-*-*] && [check_effective_target_lp64] } {
5626 # Return 1 if the target supports byte swap instructions.
5628 proc check_effective_target_bswap { } {
5629 global et_bswap_saved
5631 if [info exists et_bswap_saved] {
5632 verbose "check_effective_target_bswap: using cached result" 2
5634 set et_bswap_saved 0
5635 if { [istarget aarch64*-*-*]
5636 || [istarget alpha*-*-*]
5637 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5638 || [istarget m68k-*-*]
5639 || [istarget powerpc*-*-*]
5640 || [istarget rs6000-*-*]
5641 || [istarget s390*-*-*] } {
5642 set et_bswap_saved 1
5644 if { [istarget arm*-*-*]
5645 && [check_no_compiler_messages_nocache arm_v6_or_later object {
5647 #error not armv6 or later
5651 set et_bswap_saved 1
5656 verbose "check_effective_target_bswap: returning $et_bswap_saved" 2
5657 return $et_bswap_saved
5660 # Return 1 if the target supports 16-bit byte swap instructions.
5662 proc check_effective_target_bswap16 { } {
5663 global et_bswap16_saved
5665 if [info exists et_bswap16_saved] {
5666 verbose "check_effective_target_bswap16: using cached result" 2
5668 set et_bswap16_saved 0
5669 if { [is-effective-target bswap]
5670 && ![istarget alpha*-*-*]
5671 && !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
5672 set et_bswap16_saved 1
5676 verbose "check_effective_target_bswap16: returning $et_bswap16_saved" 2
5677 return $et_bswap16_saved
5680 # Return 1 if the target supports 32-bit byte swap instructions.
5682 proc check_effective_target_bswap32 { } {
5683 global et_bswap32_saved
5685 if [info exists et_bswap32_saved] {
5686 verbose "check_effective_target_bswap32: using cached result" 2
5688 set et_bswap32_saved 0
5689 if { [is-effective-target bswap] } {
5690 set et_bswap32_saved 1
5694 verbose "check_effective_target_bswap32: returning $et_bswap32_saved" 2
5695 return $et_bswap32_saved
5698 # Return 1 if the target supports 64-bit byte swap instructions.
5700 # Note: 32bit s390 targets require -mzarch in dg-options.
5702 proc check_effective_target_bswap64 { } {
5703 global et_bswap64_saved
5705 # expand_unop can expand 64-bit byte swap on 32-bit targets
5706 if { [is-effective-target bswap] && [is-effective-target int32plus] } {
5712 # Return 1 if the target supports atomic operations on "int" and "long".
5714 proc check_effective_target_sync_int_long { } {
5715 global et_sync_int_long_saved
5717 if [info exists et_sync_int_long_saved] {
5718 verbose "check_effective_target_sync_int_long: using cached result" 2
5720 set et_sync_int_long_saved 0
5721 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
5722 # load-reserved/store-conditional instructions.
5723 if { [istarget ia64-*-*]
5724 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5725 || [istarget aarch64*-*-*]
5726 || [istarget alpha*-*-*]
5727 || [istarget arm*-*-linux-*]
5728 || [istarget bfin*-*linux*]
5729 || [istarget hppa*-*linux*]
5730 || [istarget s390*-*-*]
5731 || [istarget powerpc*-*-*]
5732 || [istarget crisv32-*-*] || [istarget cris-*-*]
5733 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
5734 || [istarget spu-*-*]
5735 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
5736 || [check_effective_target_mips_llsc] } {
5737 set et_sync_int_long_saved 1
5741 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
5742 return $et_sync_int_long_saved
5745 # Return 1 if the target supports atomic operations on "char" and "short".
5747 proc check_effective_target_sync_char_short { } {
5748 global et_sync_char_short_saved
5750 if [info exists et_sync_char_short_saved] {
5751 verbose "check_effective_target_sync_char_short: using cached result" 2
5753 set et_sync_char_short_saved 0
5754 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
5755 # load-reserved/store-conditional instructions.
5756 if { [istarget aarch64*-*-*]
5757 || [istarget ia64-*-*]
5758 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5759 || [istarget alpha*-*-*]
5760 || [istarget arm*-*-linux-*]
5761 || [istarget hppa*-*linux*]
5762 || [istarget s390*-*-*]
5763 || [istarget powerpc*-*-*]
5764 || [istarget crisv32-*-*] || [istarget cris-*-*]
5765 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
5766 || [istarget spu-*-*]
5767 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
5768 || [check_effective_target_mips_llsc] } {
5769 set et_sync_char_short_saved 1
5773 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
5774 return $et_sync_char_short_saved
5777 # Return 1 if the target uses a ColdFire FPU.
5779 proc check_effective_target_coldfire_fpu { } {
5780 return [check_no_compiler_messages coldfire_fpu assembly {
5787 # Return true if this is a uClibc target.
5789 proc check_effective_target_uclibc {} {
5790 return [check_no_compiler_messages uclibc object {
5791 #include <features.h>
5792 #if !defined (__UCLIBC__)
5798 # Return true if this is a uclibc target and if the uclibc feature
5799 # described by __$feature__ is not present.
5801 proc check_missing_uclibc_feature {feature} {
5802 return [check_no_compiler_messages $feature object "
5803 #include <features.h>
5804 #if !defined (__UCLIBC) || defined (__${feature}__)
5810 # Return true if this is a Newlib target.
5812 proc check_effective_target_newlib {} {
5813 return [check_no_compiler_messages newlib object {
5818 # Return true if this is NOT a Bionic target.
5820 proc check_effective_target_non_bionic {} {
5821 return [check_no_compiler_messages non_bionic object {
5823 #if defined (__BIONIC__)
5829 # Return true if this target has error.h header.
5831 proc check_effective_target_error_h {} {
5832 return [check_no_compiler_messages error_h object {
5837 # Return true if this target has tgmath.h header.
5839 proc check_effective_target_tgmath_h {} {
5840 return [check_no_compiler_messages tgmath_h object {
5845 # Return true if target's libc supports complex functions.
5847 proc check_effective_target_libc_has_complex_functions {} {
5848 return [check_no_compiler_messages libc_has_complex_functions object {
5849 #include <complex.h>
5854 # (a) an error of a few ULP is expected in string to floating-point
5855 # conversion functions; and
5856 # (b) overflow is not always detected correctly by those functions.
5858 proc check_effective_target_lax_strtofp {} {
5859 # By default, assume that all uClibc targets suffer from this.
5860 return [check_effective_target_uclibc]
5863 # Return 1 if this is a target for which wcsftime is a dummy
5864 # function that always returns 0.
5866 proc check_effective_target_dummy_wcsftime {} {
5867 # By default, assume that all uClibc targets suffer from this.
5868 return [check_effective_target_uclibc]
5871 # Return 1 if constructors with initialization priority arguments are
5872 # supposed on this target.
5874 proc check_effective_target_init_priority {} {
5875 return [check_no_compiler_messages init_priority assembly "
5876 void f() __attribute__((constructor (1000)));
5881 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
5882 # This can be used with any check_* proc that takes no argument and
5883 # returns only 1 or 0. It could be used with check_* procs that take
5884 # arguments with keywords that pass particular arguments.
5886 proc is-effective-target { arg } {
5888 if { [info procs check_effective_target_${arg}] != [list] } {
5889 set selected [check_effective_target_${arg}]
5892 "vmx_hw" { set selected [check_vmx_hw_available] }
5893 "vsx_hw" { set selected [check_vsx_hw_available] }
5894 "p8vector_hw" { set selected [check_p8vector_hw_available] }
5895 "p9vector_hw" { set selected [check_p9vector_hw_available] }
5896 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
5897 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
5898 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
5899 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
5900 "dfp_hw" { set selected [check_dfp_hw_available] }
5901 "htm_hw" { set selected [check_htm_hw_available] }
5902 "named_sections" { set selected [check_named_sections_available] }
5903 "gc_sections" { set selected [check_gc_sections_available] }
5904 "cxa_atexit" { set selected [check_cxa_atexit_available] }
5905 default { error "unknown effective target keyword `$arg'" }
5908 verbose "is-effective-target: $arg $selected" 2
5912 # Return 1 if the argument is an effective-target keyword, 0 otherwise.
5914 proc is-effective-target-keyword { arg } {
5915 if { [info procs check_effective_target_${arg}] != [list] } {
5918 # These have different names for their check_* procs.
5920 "vmx_hw" { return 1 }
5921 "vsx_hw" { return 1 }
5922 "p8vector_hw" { return 1 }
5923 "p9vector_hw" { return 1 }
5924 "p9modulo_hw" { return 1 }
5925 "ppc_float128_sw" { return 1 }
5926 "ppc_float128_hw" { return 1 }
5927 "ppc_recip_hw" { return 1 }
5928 "dfp_hw" { return 1 }
5929 "htm_hw" { return 1 }
5930 "named_sections" { return 1 }
5931 "gc_sections" { return 1 }
5932 "cxa_atexit" { return 1 }
5933 default { return 0 }
5938 # Return 1 if target default to short enums
5940 proc check_effective_target_short_enums { } {
5941 return [check_no_compiler_messages short_enums assembly {
5943 int s[sizeof (enum foo) == 1 ? 1 : -1];
5947 # Return 1 if target supports merging string constants at link time.
5949 proc check_effective_target_string_merging { } {
5950 return [check_no_messages_and_pattern string_merging \
5951 "rodata\\.str" assembly {
5952 const char *var = "String";
5956 # Return 1 if target has the basic signed and unsigned types in
5957 # <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
5958 # working <stdint.h> for all targets.
5960 proc check_effective_target_stdint_types { } {
5961 return [check_no_compiler_messages stdint_types assembly {
5963 int8_t a; int16_t b; int32_t c; int64_t d;
5964 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
5968 # Return 1 if target has the basic signed and unsigned types in
5969 # <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
5970 # these types agree with those in the header, as some systems have
5971 # only <inttypes.h>.
5973 proc check_effective_target_inttypes_types { } {
5974 return [check_no_compiler_messages inttypes_types assembly {
5975 #include <inttypes.h>
5976 int8_t a; int16_t b; int32_t c; int64_t d;
5977 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
5981 # Return 1 if programs are intended to be run on a simulator
5982 # (i.e. slowly) rather than hardware (i.e. fast).
5984 proc check_effective_target_simulator { } {
5986 # All "src/sim" simulators set this one.
5987 if [board_info target exists is_simulator] {
5988 return [board_info target is_simulator]
5991 # The "sid" simulators don't set that one, but at least they set
5993 if [board_info target exists slow_simulator] {
5994 return [board_info target slow_simulator]
6000 # Return 1 if programs are intended to be run on hardware rather than
6003 proc check_effective_target_hw { } {
6005 # All "src/sim" simulators set this one.
6006 if [board_info target exists is_simulator] {
6007 if [board_info target is_simulator] {
6014 # The "sid" simulators don't set that one, but at least they set
6016 if [board_info target exists slow_simulator] {
6017 if [board_info target slow_simulator] {
6027 # Return 1 if the target is a VxWorks kernel.
6029 proc check_effective_target_vxworks_kernel { } {
6030 return [check_no_compiler_messages vxworks_kernel assembly {
6031 #if !defined __vxworks || defined __RTP__
6037 # Return 1 if the target is a VxWorks RTP.
6039 proc check_effective_target_vxworks_rtp { } {
6040 return [check_no_compiler_messages vxworks_rtp assembly {
6041 #if !defined __vxworks || !defined __RTP__
6047 # Return 1 if the target is expected to provide wide character support.
6049 proc check_effective_target_wchar { } {
6050 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
6053 return [check_no_compiler_messages wchar assembly {
6058 # Return 1 if the target has <pthread.h>.
6060 proc check_effective_target_pthread_h { } {
6061 return [check_no_compiler_messages pthread_h assembly {
6062 #include <pthread.h>
6066 # Return 1 if the target can truncate a file from a file-descriptor,
6067 # as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
6068 # chsize. We test for a trivially functional truncation; no stubs.
6069 # As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
6070 # different function to be used.
6072 proc check_effective_target_fd_truncate { } {
6074 #define _FILE_OFFSET_BITS 64
6081 FILE *f = fopen ("tst.tmp", "wb");
6083 const char t[] = "test writing more than ten characters";
6087 write (fd, t, sizeof (t) - 1);
6089 if (ftruncate (fd, 10) != 0)
6098 f = fopen ("tst.tmp", "rb");
6099 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
6107 if { [check_runtime ftruncate $prog] } {
6111 regsub "ftruncate" $prog "chsize" prog
6112 return [check_runtime chsize $prog]
6115 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
6117 proc add_options_for_c99_runtime { flags } {
6118 if { [istarget *-*-solaris2*] } {
6119 return "$flags -std=c99"
6121 if { [istarget powerpc-*-darwin*] } {
6122 return "$flags -mmacosx-version-min=10.3"
6127 # Add to FLAGS all the target-specific flags needed to enable
6128 # full IEEE compliance mode.
6130 proc add_options_for_ieee { flags } {
6131 if { [istarget alpha*-*-*]
6132 || [istarget sh*-*-*] } {
6133 return "$flags -mieee"
6135 if { [istarget rx-*-*] } {
6136 return "$flags -mnofpu"
6141 if {![info exists flags_to_postpone]} {
6142 set flags_to_postpone ""
6145 # Add to FLAGS the flags needed to enable functions to bind locally
6146 # when using pic/PIC passes in the testsuite.
6147 proc add_options_for_bind_pic_locally { flags } {
6148 global flags_to_postpone
6150 # Instead of returning 'flags' with the -fPIE or -fpie appended, we save it
6151 # in 'flags_to_postpone' and append it later in gcc_target_compile procedure in
6152 # order to make sure that the multilib_flags doesn't override this.
6154 if {[check_no_compiler_messages using_pic2 assembly {
6159 set flags_to_postpone "-fPIE"
6162 if {[check_no_compiler_messages using_pic1 assembly {
6167 set flags_to_postpone "-fpie"
6173 # Add to FLAGS the flags needed to enable 64-bit vectors.
6175 proc add_options_for_double_vectors { flags } {
6176 if [is-effective-target arm_neon_ok] {
6177 return "$flags -mvectorize-with-neon-double"
6183 # Return 1 if the target provides a full C99 runtime.
6185 proc check_effective_target_c99_runtime { } {
6186 return [check_cached_effective_target c99_runtime {
6189 set file [open "$srcdir/gcc.dg/builtins-config.h"]
6190 set contents [read $file]
6193 #ifndef HAVE_C99_RUNTIME
6194 #error !HAVE_C99_RUNTIME
6197 check_no_compiler_messages_nocache c99_runtime assembly \
6198 $contents [add_options_for_c99_runtime ""]
6202 # Return 1 if target wchar_t is at least 4 bytes.
6204 proc check_effective_target_4byte_wchar_t { } {
6205 return [check_no_compiler_messages 4byte_wchar_t object {
6206 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
6210 # Return 1 if the target supports automatic stack alignment.
6212 proc check_effective_target_automatic_stack_alignment { } {
6213 # Ordinarily x86 supports automatic stack alignment ...
6214 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
6215 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
6216 # ... except Win64 SEH doesn't. Succeed for Win32 though.
6217 return [check_effective_target_ilp32];
6224 # Return true if we are compiling for AVX target.
6226 proc check_avx_available { } {
6227 if { [check_no_compiler_messages avx_available assembly {
6237 # Return true if 32- and 16-bytes vectors are available.
6239 proc check_effective_target_vect_sizes_32B_16B { } {
6240 if { [check_avx_available] && ![check_prefer_avx128] } {
6247 # Return true if 128-bits vectors are preferred even if 256-bits vectors
6250 proc check_prefer_avx128 { } {
6251 if ![check_avx_available] {
6254 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
6255 float a[1024],b[1024],c[1024];
6256 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
6257 } "-O2 -ftree-vectorize"]
6261 # Return 1 if avx512f instructions can be compiled.
6263 proc check_effective_target_avx512f { } {
6264 return [check_no_compiler_messages avx512f object {
6265 typedef double __m512d __attribute__ ((__vector_size__ (64)));
6267 __m512d _mm512_add (__m512d a)
6269 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
6274 # Return 1 if avx instructions can be compiled.
6276 proc check_effective_target_avx { } {
6277 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
6280 return [check_no_compiler_messages avx object {
6281 void _mm256_zeroall (void)
6283 __builtin_ia32_vzeroall ();
6288 # Return 1 if avx2 instructions can be compiled.
6289 proc check_effective_target_avx2 { } {
6290 return [check_no_compiler_messages avx2 object {
6291 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
6293 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
6295 return __builtin_ia32_andnotsi256 (__X, __Y);
6300 # Return 1 if sse instructions can be compiled.
6301 proc check_effective_target_sse { } {
6302 return [check_no_compiler_messages sse object {
6305 __builtin_ia32_stmxcsr ();
6311 # Return 1 if sse2 instructions can be compiled.
6312 proc check_effective_target_sse2 { } {
6313 return [check_no_compiler_messages sse2 object {
6314 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
6316 __m128i _mm_srli_si128 (__m128i __A, int __N)
6318 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
6323 # Return 1 if F16C instructions can be compiled.
6325 proc check_effective_target_f16c { } {
6326 return [check_no_compiler_messages f16c object {
6327 #include "immintrin.h"
6329 foo (unsigned short val)
6331 return _cvtsh_ss (val);
6336 # Return 1 if C wchar_t type is compatible with char16_t.
6338 proc check_effective_target_wchar_t_char16_t_compatible { } {
6339 return [check_no_compiler_messages wchar_t_char16_t object {
6341 __CHAR16_TYPE__ *p16 = &wc;
6342 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
6346 # Return 1 if C wchar_t type is compatible with char32_t.
6348 proc check_effective_target_wchar_t_char32_t_compatible { } {
6349 return [check_no_compiler_messages wchar_t_char32_t object {
6351 __CHAR32_TYPE__ *p32 = &wc;
6352 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
6356 # Return 1 if pow10 function exists.
6358 proc check_effective_target_pow10 { } {
6359 return [check_runtime pow10 {
6369 # Return 1 if issignaling function exists.
6370 proc check_effective_target_issignaling {} {
6371 return [check_runtime issignaling {
6376 return issignaling (0.0);
6381 # Return 1 if current options generate DFP instructions, 0 otherwise.
6382 proc check_effective_target_hard_dfp {} {
6383 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
6384 typedef float d64 __attribute__((mode(DD)));
6386 void foo (void) { z = x + y; }
6390 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
6391 # for strchr etc. functions.
6393 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
6394 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
6397 #if !defined(__cplusplus) \
6398 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
6399 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
6400 ISO C++ correct string.h and wchar.h protos not supported.
6407 # Return 1 if GNU as is used.
6409 proc check_effective_target_gas { } {
6410 global use_gas_saved
6413 if {![info exists use_gas_saved]} {
6414 # Check if the as used by gcc is GNU as.
6415 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
6416 # Provide /dev/null as input, otherwise gas times out reading from
6418 set status [remote_exec host "$gcc_as" "-v /dev/null"]
6419 set as_output [lindex $status 1]
6420 if { [ string first "GNU" $as_output ] >= 0 } {
6426 return $use_gas_saved
6429 # Return 1 if GNU ld is used.
6431 proc check_effective_target_gld { } {
6432 global use_gld_saved
6435 if {![info exists use_gld_saved]} {
6436 # Check if the ld used by gcc is GNU ld.
6437 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
6438 set status [remote_exec host "$gcc_ld" "--version"]
6439 set ld_output [lindex $status 1]
6440 if { [ string first "GNU" $ld_output ] >= 0 } {
6446 return $use_gld_saved
6449 # Return 1 if the compiler has been configure with link-time optimization
6452 proc check_effective_target_lto { } {
6453 if { [istarget nvptx-*-*] } {
6456 return [check_no_compiler_messages lto object {
6461 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
6463 proc check_effective_target_maybe_x32 { } {
6464 return [check_no_compiler_messages maybe_x32 object {
6466 } "-mx32 -maddress-mode=short"]
6469 # Return 1 if this target supports the -fsplit-stack option, 0
6472 proc check_effective_target_split_stack {} {
6473 return [check_no_compiler_messages split_stack object {
6478 # Return 1 if this target supports the -masm=intel option, 0
6481 proc check_effective_target_masm_intel {} {
6482 return [check_no_compiler_messages masm_intel object {
6483 extern void abort (void);
6487 # Return 1 if the language for the compiler under test is C.
6489 proc check_effective_target_c { } {
6491 if [string match $tool "gcc"] {
6497 # Return 1 if the language for the compiler under test is C++.
6499 proc check_effective_target_c++ { } {
6501 if [string match $tool "g++"] {
6507 set cxx_default "c++14"
6508 # Check whether the current active language standard supports the features
6509 # of C++11/C++14 by checking for the presence of one of the -std flags.
6510 # This assumes that the default for the compiler is $cxx_default, and that
6511 # there will never be multiple -std= arguments on the command line.
6512 proc check_effective_target_c++11_only { } {
6514 if ![check_effective_target_c++] {
6517 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
6520 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
6525 proc check_effective_target_c++11 { } {
6526 if [check_effective_target_c++11_only] {
6529 return [check_effective_target_c++14]
6531 proc check_effective_target_c++11_down { } {
6532 if ![check_effective_target_c++] {
6535 return [expr ![check_effective_target_c++14] ]
6538 proc check_effective_target_c++14_only { } {
6540 if ![check_effective_target_c++] {
6543 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
6546 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
6552 proc check_effective_target_c++14 { } {
6553 if [check_effective_target_c++14_only] {
6556 return [check_effective_target_c++1z]
6558 proc check_effective_target_c++14_down { } {
6559 if ![check_effective_target_c++] {
6562 return [expr ![check_effective_target_c++1z] ]
6565 proc check_effective_target_c++98_only { } {
6567 if ![check_effective_target_c++] {
6570 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
6573 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
6579 proc check_effective_target_c++1z_only { } {
6581 if ![check_effective_target_c++] {
6584 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
6587 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
6592 proc check_effective_target_c++1z { } {
6593 return [check_effective_target_c++1z_only]
6596 # Check for C++ Concepts TS support, i.e. -fconcepts flag.
6597 proc check_effective_target_concepts { } {
6598 return [check-flags { "" { } { -fconcepts } }]
6601 # Return 1 if expensive testcases should be run.
6603 proc check_effective_target_run_expensive_tests { } {
6604 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
6610 # Returns 1 if "mempcpy" is available on the target system.
6612 proc check_effective_target_mempcpy {} {
6613 return [check_function_available "mempcpy"]
6616 # Returns 1 if "stpcpy" is available on the target system.
6618 proc check_effective_target_stpcpy {} {
6619 return [check_function_available "stpcpy"]
6622 # Check whether the vectorizer tests are supported by the target and
6623 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
6624 # Set dg-do-what-default to either compile or run, depending on target
6625 # capabilities. Return 1 if vectorizer tests are supported by
6626 # target, 0 otherwise.
6628 proc check_vect_support_and_set_flags { } {
6629 global DEFAULT_VECTCFLAGS
6630 global dg-do-what-default
6632 if [istarget powerpc-*paired*] {
6633 lappend DEFAULT_VECTCFLAGS "-mpaired"
6634 if [check_750cl_hw_available] {
6635 set dg-do-what-default run
6637 set dg-do-what-default compile
6639 } elseif [istarget powerpc*-*-*] {
6640 # Skip targets not supporting -maltivec.
6641 if ![is-effective-target powerpc_altivec_ok] {
6645 lappend DEFAULT_VECTCFLAGS "-maltivec"
6646 if [check_p9vector_hw_available] {
6647 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
6648 } elseif [check_p8vector_hw_available] {
6649 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
6650 } elseif [check_vsx_hw_available] {
6651 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
6654 if [check_vmx_hw_available] {
6655 set dg-do-what-default run
6657 if [is-effective-target ilp32] {
6658 # Specify a cpu that supports VMX for compile-only tests.
6659 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
6661 set dg-do-what-default compile
6663 } elseif { [istarget spu-*-*] } {
6664 set dg-do-what-default run
6665 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
6666 lappend DEFAULT_VECTCFLAGS "-msse2"
6667 if { [check_effective_target_sse2_runtime] } {
6668 set dg-do-what-default run
6670 set dg-do-what-default compile
6672 } elseif { [istarget mips*-*-*]
6673 && ([check_effective_target_mpaired_single]
6674 || [check_effective_target_mips_loongson])
6675 && [check_effective_target_nomips16] } {
6676 if { [check_effective_target_mpaired_single] } {
6677 lappend DEFAULT_VECTCFLAGS "-mpaired-single"
6679 set dg-do-what-default run
6680 } elseif [istarget sparc*-*-*] {
6681 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
6682 if [check_effective_target_ultrasparc_hw] {
6683 set dg-do-what-default run
6685 set dg-do-what-default compile
6687 } elseif [istarget alpha*-*-*] {
6688 # Alpha's vectorization capabilities are extremely limited.
6689 # It's more effort than its worth disabling all of the tests
6690 # that it cannot pass. But if you actually want to see what
6691 # does work, command out the return.
6694 lappend DEFAULT_VECTCFLAGS "-mmax"
6695 if [check_alpha_max_hw_available] {
6696 set dg-do-what-default run
6698 set dg-do-what-default compile
6700 } elseif [istarget ia64-*-*] {
6701 set dg-do-what-default run
6702 } elseif [is-effective-target arm_neon_ok] {
6703 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
6704 # NEON does not support denormals, so is not used for vectorization by
6705 # default to avoid loss of precision. We must pass -ffast-math to test
6706 # vectorization of float operations.
6707 lappend DEFAULT_VECTCFLAGS "-ffast-math"
6708 if [is-effective-target arm_neon_hw] {
6709 set dg-do-what-default run
6711 set dg-do-what-default compile
6713 } elseif [istarget "aarch64*-*-*"] {
6714 set dg-do-what-default run
6722 # Return 1 if the target does *not* require strict alignment.
6724 proc check_effective_target_non_strict_align {} {
6726 # On ARM, the default is to use STRICT_ALIGNMENT, but there
6727 # are interfaces defined for misaligned access and thus
6728 # depending on the architecture levels unaligned access is
6730 if [istarget "arm*-*-*"] {
6731 return [check_effective_target_arm_unaligned]
6734 return [check_no_compiler_messages non_strict_align assembly {
6736 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
6738 void foo(void) { z = (c *) y; }
6742 # Return 1 if the target has <ucontext.h>.
6744 proc check_effective_target_ucontext_h { } {
6745 return [check_no_compiler_messages ucontext_h assembly {
6746 #include <ucontext.h>
6750 proc check_effective_target_aarch64_tiny { } {
6751 if { [istarget aarch64*-*-*] } {
6752 return [check_no_compiler_messages aarch64_tiny object {
6753 #ifdef __AARCH64_CMODEL_TINY__
6756 #error target not AArch64 tiny code model
6764 # Create functions to check that the AArch64 assembler supports the
6765 # various architecture extensions via the .arch_extension pseudo-op.
6767 foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse"} {
6768 eval [string map [list FUNC $aarch64_ext] {
6769 proc check_effective_target_aarch64_asm_FUNC_ok { } {
6770 if { [istarget aarch64*-*-*] } {
6771 return [check_no_compiler_messages aarch64_FUNC_assembler object {
6772 __asm__ (".arch_extension FUNC");
6773 } "-march=armv8-a+FUNC"]
6781 proc check_effective_target_aarch64_small { } {
6782 if { [istarget aarch64*-*-*] } {
6783 return [check_no_compiler_messages aarch64_small object {
6784 #ifdef __AARCH64_CMODEL_SMALL__
6787 #error target not AArch64 small code model
6795 proc check_effective_target_aarch64_large { } {
6796 if { [istarget aarch64*-*-*] } {
6797 return [check_no_compiler_messages aarch64_large object {
6798 #ifdef __AARCH64_CMODEL_LARGE__
6801 #error target not AArch64 large code model
6809 # Return 1 if <fenv.h> is available with all the standard IEEE
6810 # exceptions and floating-point exceptions are raised by arithmetic
6811 # operations. (If the target requires special options for "inexact"
6812 # exceptions, those need to be specified in the testcases.)
6814 proc check_effective_target_fenv_exceptions {} {
6815 return [check_runtime fenv_exceptions {
6818 #ifndef FE_DIVBYZERO
6819 # error Missing FE_DIVBYZERO
6822 # error Missing FE_INEXACT
6825 # error Missing FE_INVALID
6828 # error Missing FE_OVERFLOW
6830 #ifndef FE_UNDERFLOW
6831 # error Missing FE_UNDERFLOW
6833 volatile float a = 0.0f, r;
6838 if (fetestexcept (FE_INVALID))
6843 } [add_options_for_ieee "-std=gnu99"]]
6846 proc check_effective_target_tiny {} {
6847 global et_target_tiny_saved
6849 if [info exists et_target_tine_saved] {
6850 verbose "check_effective_target_tiny: using cached result" 2
6852 set et_target_tiny_saved 0
6853 if { [istarget aarch64*-*-*]
6854 && [check_effective_target_aarch64_tiny] } {
6855 set et_target_tiny_saved 1
6859 return $et_target_tiny_saved
6862 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
6864 proc check_effective_target_logical_op_short_circuit {} {
6865 if { [istarget mips*-*-*]
6866 || [istarget arc*-*-*]
6867 || [istarget avr*-*-*]
6868 || [istarget crisv32-*-*] || [istarget cris-*-*]
6869 || [istarget mmix-*-*]
6870 || [istarget s390*-*-*]
6871 || [istarget powerpc*-*-*]
6872 || [istarget nios2*-*-*]
6873 || [istarget visium-*-*]
6874 || [check_effective_target_arm_cortex_m] } {
6880 # Record that dg-final test TEST requires convential compilation.
6882 proc force_conventional_output_for { test } {
6883 if { [info proc $test] == "" } {
6884 perror "$test does not exist"
6887 proc ${test}_required_options {} {
6888 global gcc_force_conventional_output
6889 return $gcc_force_conventional_output
6893 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
6894 # otherwise. Cache the result.
6896 proc check_effective_target_pie_copyreloc { } {
6897 global pie_copyreloc_available_saved
6899 global GCC_UNDER_TEST
6901 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
6905 # Need auto-host.h to check linker support.
6906 if { ![file exists ../../auto-host.h ] } {
6910 if [info exists pie_copyreloc_available_saved] {
6911 verbose "check_effective_target_pie_copyreloc returning saved $pie_copyreloc_available_saved" 2
6913 # Set up and compile to see if linker supports PIE with copy
6914 # reloc. Include the current process ID in the file names to
6915 # prevent conflicts with invocations for multiple testsuites.
6920 set f [open $src "w"]
6921 puts $f "#include \"../../auto-host.h\""
6922 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
6923 puts $f "# error Linker does not support PIE with copy reloc."
6927 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
6928 set lines [${tool}_target_compile $src $obj object ""]
6933 if [string match "" $lines] then {
6934 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
6935 set pie_copyreloc_available_saved 1
6937 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
6938 set pie_copyreloc_available_saved 0
6942 return $pie_copyreloc_available_saved
6945 # Return 1 if the target uses comdat groups.
6947 proc check_effective_target_comdat_group {} {
6948 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat" assembly {
6950 inline int foo () { return 1; }
6955 # Return 1 if target supports __builtin_eh_return
6956 proc check_effective_target_builtin_eh_return { } {
6957 return [check_no_compiler_messages builtin_eh_return object {
6958 void test (long l, void *p)
6960 __builtin_eh_return (l, p);
6965 # Return 1 if the target supports max reduction for vectors.
6967 proc check_effective_target_vect_max_reduc { } {
6968 if { [istarget aarch64*-*-*] || [istarget arm*-*-*] } {
6974 # Return 1 if there is an nvptx offload compiler.
6976 proc check_effective_target_offload_nvptx { } {
6977 return [check_no_compiler_messages offload_nvptx object {
6978 int main () {return 0;}
6979 } "-foffload=nvptx-none" ]
6982 # Return 1 if the compiler has been configured with hsa offloading.
6984 proc check_effective_target_offload_hsa { } {
6985 return [check_no_compiler_messages offload_hsa assembly {
6986 int main () {return 0;}