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1 # Copyright (C) 1999-2015 Free Software Foundation, Inc.
2
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
7 #
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
12 #
13 # You should have received a copy of the GNU General Public License
14 # along with GCC; see the file COPYING3. If not see
15 # <http://www.gnu.org/licenses/>.
16
17 # Please email any bugs, comments, and/or additions to this file to:
18 # gcc-patches@gcc.gnu.org
19
20 # This file defines procs for determining features supported by the target.
21
22 # Try to compile the code given by CONTENTS into an output file of
23 # type TYPE, where TYPE is as for target_compile. Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the name of the output file.
26 #
27 # BASENAME is a prefix to use for source and output files.
28 # If ARGS is not empty, its first element is a string that
29 # should be added to the command line.
30 #
31 # Assume by default that CONTENTS is C code.
32 # Otherwise, code should contain:
33 # "// C++" for c++,
34 # "! Fortran" for Fortran code,
35 # "/* ObjC", for ObjC
36 # "// ObjC++" for ObjC++
37 # and "// Go" for Go
38 # If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
39 # allow for ObjC/ObjC++ specific flags.
40 proc check_compile {basename type contents args} {
41 global tool
42 verbose "check_compile tool: $tool for $basename"
43
44 # Save additional_sources to avoid compiling testsuite's sources
45 # against check_compile's source.
46 global additional_sources
47 if [info exists additional_sources] {
48 set tmp_additional_sources "$additional_sources"
49 set additional_sources ""
50 }
51
52 if { [llength $args] > 0 } {
53 set options [list "additional_flags=[lindex $args 0]"]
54 } else {
55 set options ""
56 }
57 switch -glob -- $contents {
58 "*! Fortran*" { set src ${basename}[pid].f90 }
59 "*// C++*" { set src ${basename}[pid].cc }
60 "*// ObjC++*" { set src ${basename}[pid].mm }
61 "*/* ObjC*" { set src ${basename}[pid].m }
62 "*// Go*" { set src ${basename}[pid].go }
63 default {
64 switch -- $tool {
65 "objc" { set src ${basename}[pid].m }
66 "obj-c++" { set src ${basename}[pid].mm }
67 default { set src ${basename}[pid].c }
68 }
69 }
70 }
71
72 set compile_type $type
73 switch -glob $type {
74 assembly { set output ${basename}[pid].s }
75 object { set output ${basename}[pid].o }
76 executable { set output ${basename}[pid].exe }
77 "rtl-*" {
78 set output ${basename}[pid].s
79 lappend options "additional_flags=-fdump-$type"
80 set compile_type assembly
81 }
82 }
83 set f [open $src "w"]
84 puts $f $contents
85 close $f
86 set lines [${tool}_target_compile $src $output $compile_type "$options"]
87 file delete $src
88
89 set scan_output $output
90 # Don't try folding this into the switch above; calling "glob" before the
91 # file is created won't work.
92 if [regexp "rtl-(.*)" $type dummy rtl_type] {
93 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
94 file delete $output
95 }
96
97 # Restore additional_sources.
98 if [info exists additional_sources] {
99 set additional_sources "$tmp_additional_sources"
100 }
101
102 return [list $lines $scan_output]
103 }
104
105 proc current_target_name { } {
106 global target_info
107 if [info exists target_info(target,name)] {
108 set answer $target_info(target,name)
109 } else {
110 set answer ""
111 }
112 return $answer
113 }
114
115 # Implement an effective-target check for property PROP by invoking
116 # the Tcl command ARGS and seeing if it returns true.
117
118 proc check_cached_effective_target { prop args } {
119 global et_cache
120
121 set target [current_target_name]
122 if {![info exists et_cache($prop,target)]
123 || $et_cache($prop,target) != $target} {
124 verbose "check_cached_effective_target $prop: checking $target" 2
125 set et_cache($prop,target) $target
126 set et_cache($prop,value) [uplevel eval $args]
127 }
128 set value $et_cache($prop,value)
129 verbose "check_cached_effective_target $prop: returning $value for $target" 2
130 return $value
131 }
132
133 # Like check_compile, but delete the output file and return true if the
134 # compiler printed no messages.
135 proc check_no_compiler_messages_nocache {args} {
136 set result [eval check_compile $args]
137 set lines [lindex $result 0]
138 set output [lindex $result 1]
139 remote_file build delete $output
140 return [string match "" $lines]
141 }
142
143 # Like check_no_compiler_messages_nocache, but cache the result.
144 # PROP is the property we're checking, and doubles as a prefix for
145 # temporary filenames.
146 proc check_no_compiler_messages {prop args} {
147 return [check_cached_effective_target $prop {
148 eval [list check_no_compiler_messages_nocache $prop] $args
149 }]
150 }
151
152 # Like check_compile, but return true if the compiler printed no
153 # messages and if the contents of the output file satisfy PATTERN.
154 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
155 # don't match regular expression REGEXP, otherwise they satisfy it
156 # if they do match regular expression PATTERN. (PATTERN can start
157 # with something like "[!]" if the regular expression needs to match
158 # "!" as the first character.)
159 #
160 # Delete the output file before returning. The other arguments are
161 # as for check_compile.
162 proc check_no_messages_and_pattern_nocache {basename pattern args} {
163 global tool
164
165 set result [eval [list check_compile $basename] $args]
166 set lines [lindex $result 0]
167 set output [lindex $result 1]
168
169 set ok 0
170 if { [string match "" $lines] } {
171 set chan [open "$output"]
172 set invert [regexp {^!(.*)} $pattern dummy pattern]
173 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
174 close $chan
175 }
176
177 remote_file build delete $output
178 return $ok
179 }
180
181 # Like check_no_messages_and_pattern_nocache, but cache the result.
182 # PROP is the property we're checking, and doubles as a prefix for
183 # temporary filenames.
184 proc check_no_messages_and_pattern {prop pattern args} {
185 return [check_cached_effective_target $prop {
186 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
187 }]
188 }
189
190 # Try to compile and run an executable from code CONTENTS. Return true
191 # if the compiler reports no messages and if execution "passes" in the
192 # usual DejaGNU sense. The arguments are as for check_compile, with
193 # TYPE implicitly being "executable".
194 proc check_runtime_nocache {basename contents args} {
195 global tool
196
197 set result [eval [list check_compile $basename executable $contents] $args]
198 set lines [lindex $result 0]
199 set output [lindex $result 1]
200
201 set ok 0
202 if { [string match "" $lines] } {
203 # No error messages, everything is OK.
204 set result [remote_load target "./$output" "" ""]
205 set status [lindex $result 0]
206 verbose "check_runtime_nocache $basename: status is <$status>" 2
207 if { $status == "pass" } {
208 set ok 1
209 }
210 }
211 remote_file build delete $output
212 return $ok
213 }
214
215 # Like check_runtime_nocache, but cache the result. PROP is the
216 # property we're checking, and doubles as a prefix for temporary
217 # filenames.
218 proc check_runtime {prop args} {
219 global tool
220
221 return [check_cached_effective_target $prop {
222 eval [list check_runtime_nocache $prop] $args
223 }]
224 }
225
226 ###############################
227 # proc check_weak_available { }
228 ###############################
229
230 # weak symbols are only supported in some configs/object formats
231 # this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
232
233 proc check_weak_available { } {
234 global target_cpu
235
236 # All mips targets should support it
237
238 if { [ string first "mips" $target_cpu ] >= 0 } {
239 return 1
240 }
241
242 # All AIX targets should support it
243
244 if { [istarget *-*-aix*] } {
245 return 1
246 }
247
248 # All solaris2 targets should support it
249
250 if { [istarget *-*-solaris2*] } {
251 return 1
252 }
253
254 # Windows targets Cygwin and MingW32 support it
255
256 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
257 return 1
258 }
259
260 # HP-UX 10.X doesn't support it
261
262 if { [istarget hppa*-*-hpux10*] } {
263 return 0
264 }
265
266 # ELF and ECOFF support it. a.out does with gas/gld but may also with
267 # other linkers, so we should try it
268
269 set objformat [gcc_target_object_format]
270
271 switch $objformat {
272 elf { return 1 }
273 ecoff { return 1 }
274 a.out { return 1 }
275 mach-o { return 1 }
276 som { return 1 }
277 unknown { return -1 }
278 default { return 0 }
279 }
280 }
281
282 ###############################
283 # proc check_weak_override_available { }
284 ###############################
285
286 # Like check_weak_available, but return 0 if weak symbol definitions
287 # cannot be overridden.
288
289 proc check_weak_override_available { } {
290 if { [istarget *-*-mingw*] } {
291 return 0
292 }
293 return [check_weak_available]
294 }
295
296 ###############################
297 # proc check_visibility_available { what_kind }
298 ###############################
299
300 # The visibility attribute is only support in some object formats
301 # This proc returns 1 if it is supported, 0 if not.
302 # The argument is the kind of visibility, default/protected/hidden/internal.
303
304 proc check_visibility_available { what_kind } {
305 if [string match "" $what_kind] { set what_kind "hidden" }
306
307 return [check_no_compiler_messages visibility_available_$what_kind object "
308 void f() __attribute__((visibility(\"$what_kind\")));
309 void f() {}
310 "]
311 }
312
313 ###############################
314 # proc check_alias_available { }
315 ###############################
316
317 # Determine if the target toolchain supports the alias attribute.
318
319 # Returns 2 if the target supports aliases. Returns 1 if the target
320 # only supports weak aliased. Returns 0 if the target does not
321 # support aliases at all. Returns -1 if support for aliases could not
322 # be determined.
323
324 proc check_alias_available { } {
325 global alias_available_saved
326 global tool
327
328 if [info exists alias_available_saved] {
329 verbose "check_alias_available returning saved $alias_available_saved" 2
330 } else {
331 set src alias[pid].c
332 set obj alias[pid].o
333 verbose "check_alias_available compiling testfile $src" 2
334 set f [open $src "w"]
335 # Compile a small test program. The definition of "g" is
336 # necessary to keep the Solaris assembler from complaining
337 # about the program.
338 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
339 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
340 close $f
341 set lines [${tool}_target_compile $src $obj object ""]
342 file delete $src
343 remote_file build delete $obj
344
345 if [string match "" $lines] then {
346 # No error messages, everything is OK.
347 set alias_available_saved 2
348 } else {
349 if [regexp "alias definitions not supported" $lines] {
350 verbose "check_alias_available target does not support aliases" 2
351
352 set objformat [gcc_target_object_format]
353
354 if { $objformat == "elf" } {
355 verbose "check_alias_available but target uses ELF format, so it ought to" 2
356 set alias_available_saved -1
357 } else {
358 set alias_available_saved 0
359 }
360 } else {
361 if [regexp "only weak aliases are supported" $lines] {
362 verbose "check_alias_available target supports only weak aliases" 2
363 set alias_available_saved 1
364 } else {
365 set alias_available_saved -1
366 }
367 }
368 }
369
370 verbose "check_alias_available returning $alias_available_saved" 2
371 }
372
373 return $alias_available_saved
374 }
375
376 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
377
378 proc check_effective_target_alias { } {
379 if { [check_alias_available] < 2 } {
380 return 0
381 } else {
382 return 1
383 }
384 }
385
386 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
387
388 proc check_ifunc_available { } {
389 return [check_no_compiler_messages ifunc_available object {
390 #ifdef __cplusplus
391 extern "C"
392 #endif
393 void g() {}
394 void f() __attribute__((ifunc("g")));
395 }]
396 }
397
398 # Returns true if --gc-sections is supported on the target.
399
400 proc check_gc_sections_available { } {
401 global gc_sections_available_saved
402 global tool
403
404 if {![info exists gc_sections_available_saved]} {
405 # Some targets don't support gc-sections despite whatever's
406 # advertised by ld's options.
407 if { [istarget alpha*-*-*]
408 || [istarget ia64-*-*] } {
409 set gc_sections_available_saved 0
410 return 0
411 }
412
413 # elf2flt uses -q (--emit-relocs), which is incompatible with
414 # --gc-sections.
415 if { [board_info target exists ldflags]
416 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
417 set gc_sections_available_saved 0
418 return 0
419 }
420
421 # VxWorks kernel modules are relocatable objects linked with -r,
422 # while RTP executables are linked with -q (--emit-relocs).
423 # Both of these options are incompatible with --gc-sections.
424 if { [istarget *-*-vxworks*] } {
425 set gc_sections_available_saved 0
426 return 0
427 }
428
429 # Check if the ld used by gcc supports --gc-sections.
430 set gcc_spec [${tool}_target_compile "-dumpspecs" "" "none" ""]
431 regsub ".*\n\\*linker:\[ \t\]*\n(\[^ \t\n\]*).*" "$gcc_spec" {\1} linker
432 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=$linker" "" "none" ""] 0]
433 set ld_output [remote_exec host "$gcc_ld" "--help"]
434 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
435 set gc_sections_available_saved 1
436 } else {
437 set gc_sections_available_saved 0
438 }
439 }
440 return $gc_sections_available_saved
441 }
442
443 # Return 1 if according to target_info struct and explicit target list
444 # target is supposed to support trampolines.
445
446 proc check_effective_target_trampolines { } {
447 if [target_info exists no_trampolines] {
448 return 0
449 }
450 if { [istarget avr-*-*]
451 || [istarget msp430-*-*]
452 || [istarget nvptx-*-*]
453 || [istarget hppa2.0w-hp-hpux11.23]
454 || [istarget hppa64-hp-hpux11.23] } {
455 return 0;
456 }
457 return 1
458 }
459
460 # Return 1 if according to target_info struct and explicit target list
461 # target disables -fdelete-null-pointer-checks. Targets should return 0
462 # if they simply default to -fno-delete-null-pointer-checks but obey
463 # -fdelete-null-pointer-checks when passed explicitly (and tests that
464 # depend on this option should do that).
465
466 proc check_effective_target_keeps_null_pointer_checks { } {
467 if [target_info exists keeps_null_pointer_checks] {
468 return 1
469 }
470 if { [istarget avr-*-*] } {
471 return 1;
472 }
473 return 0
474 }
475
476 # Return true if profiling is supported on the target.
477
478 proc check_profiling_available { test_what } {
479 global profiling_available_saved
480
481 verbose "Profiling argument is <$test_what>" 1
482
483 # These conditions depend on the argument so examine them before
484 # looking at the cache variable.
485
486 # Tree profiling requires TLS runtime support.
487 if { $test_what == "-fprofile-generate" } {
488 if { ![check_effective_target_tls_runtime] } {
489 return 0
490 }
491 }
492
493 # Support for -p on solaris2 relies on mcrt1.o which comes with the
494 # vendor compiler. We cannot reliably predict the directory where the
495 # vendor compiler (and thus mcrt1.o) is installed so we can't
496 # necessarily find mcrt1.o even if we have it.
497 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
498 return 0
499 }
500
501 # We don't yet support profiling for MIPS16.
502 if { [istarget mips*-*-*]
503 && ![check_effective_target_nomips16]
504 && ($test_what == "-p" || $test_what == "-pg") } {
505 return 0
506 }
507
508 # MinGW does not support -p.
509 if { [istarget *-*-mingw*] && $test_what == "-p" } {
510 return 0
511 }
512
513 # cygwin does not support -p.
514 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
515 return 0
516 }
517
518 # uClibc does not have gcrt1.o.
519 if { [check_effective_target_uclibc]
520 && ($test_what == "-p" || $test_what == "-pg") } {
521 return 0
522 }
523
524 # Now examine the cache variable.
525 if {![info exists profiling_available_saved]} {
526 # Some targets don't have any implementation of __bb_init_func or are
527 # missing other needed machinery.
528 if {[istarget aarch64*-*-elf]
529 || [istarget am3*-*-linux*]
530 || [istarget arm*-*-eabi*]
531 || [istarget arm*-*-elf]
532 || [istarget arm*-*-symbianelf*]
533 || [istarget avr-*-*]
534 || [istarget bfin-*-*]
535 || [istarget cris-*-*]
536 || [istarget crisv32-*-*]
537 || [istarget fido-*-elf]
538 || [istarget h8300-*-*]
539 || [istarget lm32-*-*]
540 || [istarget m32c-*-elf]
541 || [istarget m68k-*-elf]
542 || [istarget m68k-*-uclinux*]
543 || [istarget mep-*-elf]
544 || [istarget mips*-*-elf*]
545 || [istarget mmix-*-*]
546 || [istarget mn10300-*-elf*]
547 || [istarget moxie-*-elf*]
548 || [istarget msp430-*-*]
549 || [istarget nds32*-*-elf]
550 || [istarget nios2-*-elf]
551 || [istarget nvptx-*-*]
552 || [istarget powerpc-*-eabi*]
553 || [istarget powerpc-*-elf]
554 || [istarget rx-*-*]
555 || [istarget tic6x-*-elf]
556 || [istarget visium-*-*]
557 || [istarget xstormy16-*]
558 || [istarget xtensa*-*-elf]
559 || [istarget *-*-rtems*]
560 || [istarget *-*-vxworks*] } {
561 set profiling_available_saved 0
562 } else {
563 set profiling_available_saved 1
564 }
565 }
566
567 # -pg link test result can't be cached since it may change between
568 # runs.
569 set profiling_working $profiling_available_saved
570 if { $profiling_available_saved == 1
571 && ![check_no_compiler_messages_nocache profiling executable {
572 int main() { return 0; } } "-pg"] } {
573 set profiling_working 0
574 }
575
576 return $profiling_working
577 }
578
579 # Check to see if a target is "freestanding". This is as per the definition
580 # in Section 4 of C99 standard. Effectively, it is a target which supports no
581 # extra headers or libraries other than what is considered essential.
582 proc check_effective_target_freestanding { } {
583 if { [istarget nvptx-*-*] } {
584 return 1
585 }
586 return 0
587 }
588
589 # Return 1 if target has packed layout of structure members by
590 # default, 0 otherwise. Note that this is slightly different than
591 # whether the target has "natural alignment": both attributes may be
592 # false.
593
594 proc check_effective_target_default_packed { } {
595 return [check_no_compiler_messages default_packed assembly {
596 struct x { char a; long b; } c;
597 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
598 }]
599 }
600
601 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
602 # documentation, where the test also comes from.
603
604 proc check_effective_target_pcc_bitfield_type_matters { } {
605 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
606 # bitfields, but let's stick to the example code from the docs.
607 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
608 struct foo1 { char x; char :0; char y; };
609 struct foo2 { char x; int :0; char y; };
610 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
611 }]
612 }
613
614 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
615
616 proc add_options_for_tls { flags } {
617 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
618 # libthread, so always pass -pthread for native TLS. Same for AIX.
619 # Need to duplicate native TLS check from
620 # check_effective_target_tls_native to avoid recursion.
621 if { ([istarget powerpc-ibm-aix*]) &&
622 [check_no_messages_and_pattern tls_native "!emutls" assembly {
623 __thread int i;
624 int f (void) { return i; }
625 void g (int j) { i = j; }
626 }] } {
627 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
628 }
629 return $flags
630 }
631
632 # Return 1 if indirect jumps are supported, 0 otherwise.
633
634 proc check_effective_target_indirect_jumps {} {
635 if { [istarget nvptx-*-*] } {
636 return 0
637 }
638 return 1
639 }
640
641 # Return 1 if nonlocal goto is supported, 0 otherwise.
642
643 proc check_effective_target_nonlocal_goto {} {
644 if { [istarget nvptx-*-*] } {
645 return 0
646 }
647 return 1
648 }
649
650 # Return 1 if global constructors are supported, 0 otherwise.
651
652 proc check_effective_target_global_constructor {} {
653 if { [istarget nvptx-*-*] } {
654 return 0
655 }
656 return 1
657 }
658
659 # Return 1 if taking label values is supported, 0 otherwise.
660
661 proc check_effective_target_label_values {} {
662 if { [istarget nvptx-*-*] } {
663 return 0
664 }
665 return [check_no_compiler_messages label_values assembly {
666 #ifdef NO_LABEL_VALUES
667 #error NO
668 #endif
669 }]
670 }
671
672 # Return 1 if builtin_return_address and builtin_frame_address are
673 # supported, 0 otherwise.
674
675 proc check_effective_target_return_address {} {
676 if { [istarget nvptx-*-*] } {
677 return 0
678 }
679 return 1
680 }
681
682 # Return 1 if the assembler does not verify function types against
683 # calls, 0 otherwise. Such verification will typically show up problems
684 # with K&R C function declarations.
685
686 proc check_effective_target_untyped_assembly {} {
687 if { [istarget nvptx-*-*] } {
688 return 0
689 }
690 return 1
691 }
692
693 # Return 1 if alloca is supported, 0 otherwise.
694
695 proc check_effective_target_alloca {} {
696 if { [istarget nvptx-*-*] } {
697 return 0
698 }
699 return 1
700 }
701
702 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
703
704 proc check_effective_target_tls {} {
705 return [check_no_compiler_messages tls assembly {
706 __thread int i;
707 int f (void) { return i; }
708 void g (int j) { i = j; }
709 }]
710 }
711
712 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
713
714 proc check_effective_target_tls_native {} {
715 # VxWorks uses emulated TLS machinery, but with non-standard helper
716 # functions, so we fail to automatically detect it.
717 if { [istarget *-*-vxworks*] } {
718 return 0
719 }
720
721 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
722 __thread int i;
723 int f (void) { return i; }
724 void g (int j) { i = j; }
725 }]
726 }
727
728 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
729
730 proc check_effective_target_tls_emulated {} {
731 # VxWorks uses emulated TLS machinery, but with non-standard helper
732 # functions, so we fail to automatically detect it.
733 if { [istarget *-*-vxworks*] } {
734 return 1
735 }
736
737 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
738 __thread int i;
739 int f (void) { return i; }
740 void g (int j) { i = j; }
741 }]
742 }
743
744 # Return 1 if TLS executables can run correctly, 0 otherwise.
745
746 proc check_effective_target_tls_runtime {} {
747 # The runtime does not have TLS support, but just
748 # running the test below is insufficient to show this.
749 if { [istarget msp430-*-*] || [istarget visium-*-*] } {
750 return 0
751 }
752 return [check_runtime tls_runtime {
753 __thread int thr = 0;
754 int main (void) { return thr; }
755 } [add_options_for_tls ""]]
756 }
757
758 # Return 1 if atomic compare-and-swap is supported on 'int'
759
760 proc check_effective_target_cas_char {} {
761 return [check_no_compiler_messages cas_char assembly {
762 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
763 #error unsupported
764 #endif
765 } ""]
766 }
767
768 proc check_effective_target_cas_int {} {
769 return [check_no_compiler_messages cas_int assembly {
770 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
771 /* ok */
772 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
773 /* ok */
774 #else
775 #error unsupported
776 #endif
777 } ""]
778 }
779
780 # Return 1 if -ffunction-sections is supported, 0 otherwise.
781
782 proc check_effective_target_function_sections {} {
783 # Darwin has its own scheme and silently accepts -ffunction-sections.
784 if { [istarget *-*-darwin*] } {
785 return 0
786 }
787
788 return [check_no_compiler_messages functionsections assembly {
789 void foo (void) { }
790 } "-ffunction-sections"]
791 }
792
793 # Return 1 if instruction scheduling is available, 0 otherwise.
794
795 proc check_effective_target_scheduling {} {
796 return [check_no_compiler_messages scheduling object {
797 void foo (void) { }
798 } "-fschedule-insns"]
799 }
800
801 # Return 1 if trapping arithmetic is available, 0 otherwise.
802
803 proc check_effective_target_trapping {} {
804 return [check_no_compiler_messages trapping object {
805 int add (int a, int b) { return a + b; }
806 } "-ftrapv"]
807 }
808
809 # Return 1 if compilation with -fgraphite is error-free for trivial
810 # code, 0 otherwise.
811
812 proc check_effective_target_fgraphite {} {
813 return [check_no_compiler_messages fgraphite object {
814 void foo (void) { }
815 } "-O1 -fgraphite"]
816 }
817
818 # Return 1 if compilation with -fopenacc is error-free for trivial
819 # code, 0 otherwise.
820
821 proc check_effective_target_fopenacc {} {
822 # nvptx can be built with the device-side bits of openacc, but it
823 # does not make sense to test it as an openacc host.
824 if [istarget nvptx-*-*] { return 0 }
825
826 return [check_no_compiler_messages fopenacc object {
827 void foo (void) { }
828 } "-fopenacc"]
829 }
830
831 # Return 1 if compilation with -fopenmp is error-free for trivial
832 # code, 0 otherwise.
833
834 proc check_effective_target_fopenmp {} {
835 # nvptx can be built with the device-side bits of libgomp, but it
836 # does not make sense to test it as an openmp host.
837 if [istarget nvptx-*-*] { return 0 }
838
839 return [check_no_compiler_messages fopenmp object {
840 void foo (void) { }
841 } "-fopenmp"]
842 }
843
844 # Return 1 if compilation with -fgnu-tm is error-free for trivial
845 # code, 0 otherwise.
846
847 proc check_effective_target_fgnu_tm {} {
848 return [check_no_compiler_messages fgnu_tm object {
849 void foo (void) { }
850 } "-fgnu-tm"]
851 }
852
853 # Return 1 if the target supports mmap, 0 otherwise.
854
855 proc check_effective_target_mmap {} {
856 return [check_function_available "mmap"]
857 }
858
859 # Return 1 if the target supports dlopen, 0 otherwise.
860 proc check_effective_target_dlopen {} {
861 return [check_no_compiler_messages dlopen executable {
862 #include <dlfcn.h>
863 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
864 } [add_options_for_dlopen ""]]
865 }
866
867 proc add_options_for_dlopen { flags } {
868 return "$flags -ldl"
869 }
870
871 # Return 1 if the target supports clone, 0 otherwise.
872 proc check_effective_target_clone {} {
873 return [check_function_available "clone"]
874 }
875
876 # Return 1 if the target supports setrlimit, 0 otherwise.
877 proc check_effective_target_setrlimit {} {
878 # Darwin has non-posix compliant RLIMIT_AS
879 if { [istarget *-*-darwin*] } {
880 return 0
881 }
882 return [check_function_available "setrlimit"]
883 }
884
885 # Return 1 if the target supports swapcontext, 0 otherwise.
886 proc check_effective_target_swapcontext {} {
887 return [check_no_compiler_messages swapcontext executable {
888 #include <ucontext.h>
889 int main (void)
890 {
891 ucontext_t orig_context,child_context;
892 if (swapcontext(&child_context, &orig_context) < 0) { }
893 }
894 }]
895 }
896
897 # Return 1 if compilation with -pthread is error-free for trivial
898 # code, 0 otherwise.
899
900 proc check_effective_target_pthread {} {
901 return [check_no_compiler_messages pthread object {
902 void foo (void) { }
903 } "-pthread"]
904 }
905
906 # Return 1 if compilation with -mpe-aligned-commons is error-free
907 # for trivial code, 0 otherwise.
908
909 proc check_effective_target_pe_aligned_commons {} {
910 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
911 return [check_no_compiler_messages pe_aligned_commons object {
912 int foo;
913 } "-mpe-aligned-commons"]
914 }
915 return 0
916 }
917
918 # Return 1 if the target supports -static
919 proc check_effective_target_static {} {
920 return [check_no_compiler_messages static executable {
921 int main (void) { return 0; }
922 } "-static"]
923 }
924
925 # Return 1 if the target supports -fstack-protector
926 proc check_effective_target_fstack_protector {} {
927 return [check_runtime fstack_protector {
928 int main (void) { return 0; }
929 } "-fstack-protector"]
930 }
931
932 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
933 # for trivial code, 0 otherwise.
934
935 proc check_effective_target_freorder {} {
936 return [check_no_compiler_messages freorder object {
937 void foo (void) { }
938 } "-freorder-blocks-and-partition"]
939 }
940
941 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
942 # emitted, 0 otherwise. Whether a shared library can actually be built is
943 # out of scope for this test.
944
945 proc check_effective_target_fpic { } {
946 # Note that M68K has a multilib that supports -fpic but not
947 # -fPIC, so we need to check both. We test with a program that
948 # requires GOT references.
949 foreach arg {fpic fPIC} {
950 if [check_no_compiler_messages $arg object {
951 extern int foo (void); extern int bar;
952 int baz (void) { return foo () + bar; }
953 } "-$arg"] {
954 return 1
955 }
956 }
957 return 0
958 }
959
960 # On AArch64, if -fpic is not supported, then we will fall back to -fPIC
961 # silently. So, we can't rely on above "check_effective_target_fpic" as it
962 # assumes compiler will give warning if -fpic not supported. Here we check
963 # whether binutils supports those new -fpic relocation modifiers, and assume
964 # -fpic is supported if there is binutils support. GCC configuration will
965 # enable -fpic for AArch64 in this case.
966 #
967 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
968 # memory model -fpic relocation types.
969
970 proc check_effective_target_aarch64_small_fpic { } {
971 if { [istarget aarch64*-*-*] } {
972 return [check_no_compiler_messages aarch64_small_fpic object {
973 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
974 }]
975 } else {
976 return 0
977 }
978 }
979
980 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
981 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
982 # in binutils since 2015-03-04 as PR gas/17843.
983 #
984 # This test directive make sure binutils support all features needed by TLS LE
985 # under -mtls-size=32 on AArch64.
986
987 proc check_effective_target_aarch64_tlsle32 { } {
988 if { [istarget aarch64*-*-*] } {
989 return [check_no_compiler_messages aarch64_tlsle32 object {
990 void foo (void) { asm ("movk x1,#:tprel_g0_nc:t1"); }
991 }]
992 } else {
993 return 0
994 }
995 }
996
997 # Return 1 if -shared is supported, as in no warnings or errors
998 # emitted, 0 otherwise.
999
1000 proc check_effective_target_shared { } {
1001 # Note that M68K has a multilib that supports -fpic but not
1002 # -fPIC, so we need to check both. We test with a program that
1003 # requires GOT references.
1004 return [check_no_compiler_messages shared executable {
1005 extern int foo (void); extern int bar;
1006 int baz (void) { return foo () + bar; }
1007 } "-shared -fpic"]
1008 }
1009
1010 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
1011
1012 proc check_effective_target_pie { } {
1013 if { [istarget *-*-darwin\[912\]*]
1014 || [istarget *-*-dragonfly*]
1015 || [istarget *-*-freebsd*]
1016 || [istarget *-*-linux*]
1017 || [istarget *-*-gnu*] } {
1018 return 1;
1019 }
1020 return 0
1021 }
1022
1023 # Return true if the target supports -mpaired-single (as used on MIPS).
1024
1025 proc check_effective_target_mpaired_single { } {
1026 return [check_no_compiler_messages mpaired_single object {
1027 void foo (void) { }
1028 } "-mpaired-single"]
1029 }
1030
1031 # Return true if the target has access to FPU instructions.
1032
1033 proc check_effective_target_hard_float { } {
1034 if { [istarget mips*-*-*] } {
1035 return [check_no_compiler_messages hard_float assembly {
1036 #if (defined __mips_soft_float || defined __mips16)
1037 #error __mips_soft_float || __mips16
1038 #endif
1039 }]
1040 }
1041
1042 # This proc is actually checking the availabilty of FPU
1043 # support for doubles, so on the RX we must fail if the
1044 # 64-bit double multilib has been selected.
1045 if { [istarget rx-*-*] } {
1046 return 0
1047 # return [check_no_compiler_messages hard_float assembly {
1048 #if defined __RX_64_BIT_DOUBLES__
1049 #error __RX_64_BIT_DOUBLES__
1050 #endif
1051 # }]
1052 }
1053
1054 # The generic test equates hard_float with "no call for adding doubles".
1055 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
1056 double a (double b, double c) { return b + c; }
1057 }]
1058 }
1059
1060 # Return true if the target is a 64-bit MIPS target.
1061
1062 proc check_effective_target_mips64 { } {
1063 return [check_no_compiler_messages mips64 assembly {
1064 #ifndef __mips64
1065 #error !__mips64
1066 #endif
1067 }]
1068 }
1069
1070 # Return true if the target is a MIPS target that does not produce
1071 # MIPS16 code.
1072
1073 proc check_effective_target_nomips16 { } {
1074 return [check_no_compiler_messages nomips16 object {
1075 #ifndef __mips
1076 #error !__mips
1077 #else
1078 /* A cheap way of testing for -mflip-mips16. */
1079 void foo (void) { asm ("addiu $20,$20,1"); }
1080 void bar (void) { asm ("addiu $20,$20,1"); }
1081 #endif
1082 }]
1083 }
1084
1085 # Add the options needed for MIPS16 function attributes. At the moment,
1086 # we don't support MIPS16 PIC.
1087
1088 proc add_options_for_mips16_attribute { flags } {
1089 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1090 }
1091
1092 # Return true if we can force a mode that allows MIPS16 code generation.
1093 # We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
1094 # for o32 and o64.
1095
1096 proc check_effective_target_mips16_attribute { } {
1097 return [check_no_compiler_messages mips16_attribute assembly {
1098 #ifdef PIC
1099 #error PIC
1100 #endif
1101 #if defined __mips_hard_float \
1102 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
1103 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
1104 #error __mips_hard_float && (!_ABIO32 || !_ABIO64)
1105 #endif
1106 } [add_options_for_mips16_attribute ""]]
1107 }
1108
1109 # Return 1 if the target supports long double larger than double when
1110 # using the new ABI, 0 otherwise.
1111
1112 proc check_effective_target_mips_newabi_large_long_double { } {
1113 return [check_no_compiler_messages mips_newabi_large_long_double object {
1114 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1115 } "-mabi=64"]
1116 }
1117
1118 # Return true if the target is a MIPS target that has access
1119 # to the LL and SC instructions.
1120
1121 proc check_effective_target_mips_llsc { } {
1122 if { ![istarget mips*-*-*] } {
1123 return 0
1124 }
1125 # Assume that these instructions are always implemented for
1126 # non-elf* targets, via emulation if necessary.
1127 if { ![istarget *-*-elf*] } {
1128 return 1
1129 }
1130 # Otherwise assume LL/SC support for everything but MIPS I.
1131 return [check_no_compiler_messages mips_llsc assembly {
1132 #if __mips == 1
1133 #error __mips == 1
1134 #endif
1135 }]
1136 }
1137
1138 # Return true if the target is a MIPS target that uses in-place relocations.
1139
1140 proc check_effective_target_mips_rel { } {
1141 if { ![istarget mips*-*-*] } {
1142 return 0
1143 }
1144 return [check_no_compiler_messages mips_rel object {
1145 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
1146 || (defined _ABI64 && _MIPS_SIM == _ABI64)
1147 #error _ABIN32 && (_ABIN32 || _ABI64)
1148 #endif
1149 }]
1150 }
1151
1152 # Return true if the target is a MIPS target that uses the EABI.
1153
1154 proc check_effective_target_mips_eabi { } {
1155 if { ![istarget mips*-*-*] } {
1156 return 0
1157 }
1158 return [check_no_compiler_messages mips_eabi object {
1159 #ifndef __mips_eabi
1160 #error !__mips_eabi
1161 #endif
1162 }]
1163 }
1164
1165 # Return 1 if the current multilib does not generate PIC by default.
1166
1167 proc check_effective_target_nonpic { } {
1168 return [check_no_compiler_messages nonpic assembly {
1169 #if __PIC__
1170 #error __PIC__
1171 #endif
1172 }]
1173 }
1174
1175 # Return 1 if the current multilib generates PIE by default.
1176
1177 proc check_effective_target_pie_enabled { } {
1178 return [check_no_compiler_messages pie_enabled assembly {
1179 #ifndef __PIE__
1180 #error unsupported
1181 #endif
1182 }]
1183 }
1184
1185 # Return 1 if the target generates -fstack-protector by default.
1186
1187 proc check_effective_target_fstack_protector_enabled {} {
1188 return [ check_no_compiler_messages fstack_protector_enabled assembly {
1189 #if !defined(__SSP__) && !defined(__SSP_ALL__) && \
1190 !defined(__SSP_STRONG__) && !defined(__SSP_EXPICIT__)
1191 #error unsupported
1192 #endif
1193 }]
1194 }
1195
1196 # Return 1 if the target does not use a status wrapper.
1197
1198 proc check_effective_target_unwrapped { } {
1199 if { [target_info needs_status_wrapper] != "" \
1200 && [target_info needs_status_wrapper] != "0" } {
1201 return 0
1202 }
1203 return 1
1204 }
1205
1206 # Return true if iconv is supported on the target. In particular IBM1047.
1207
1208 proc check_iconv_available { test_what } {
1209 global libiconv
1210
1211 # If the tool configuration file has not set libiconv, try "-liconv"
1212 if { ![info exists libiconv] } {
1213 set libiconv "-liconv"
1214 }
1215 set test_what [lindex $test_what 1]
1216 return [check_runtime_nocache $test_what [subst {
1217 #include <iconv.h>
1218 int main (void)
1219 {
1220 iconv_t cd;
1221
1222 cd = iconv_open ("$test_what", "UTF-8");
1223 if (cd == (iconv_t) -1)
1224 return 1;
1225 return 0;
1226 }
1227 }] $libiconv]
1228 }
1229
1230 # Return true if Cilk Library is supported on the target.
1231 proc check_libcilkrts_available { } {
1232 return [ check_no_compiler_messages_nocache libcilkrts_available executable {
1233 #ifdef __cplusplus
1234 extern "C"
1235 #endif
1236 int __cilkrts_set_param (const char *, const char *);
1237 int main (void) {
1238 int x = __cilkrts_set_param ("nworkers", "0");
1239 return x;
1240 }
1241 } "-fcilkplus -lcilkrts" ]
1242 }
1243
1244 # Return true if the atomic library is supported on the target.
1245 proc check_effective_target_libatomic_available { } {
1246 return [check_no_compiler_messages libatomic_available executable {
1247 int main (void) { return 0; }
1248 } "-latomic"]
1249 }
1250
1251 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1252
1253 proc check_ascii_locale_available { } {
1254 return 1
1255 }
1256
1257 # Return true if named sections are supported on this target.
1258
1259 proc check_named_sections_available { } {
1260 return [check_no_compiler_messages named_sections assembly {
1261 int __attribute__ ((section("whatever"))) foo;
1262 }]
1263 }
1264
1265 # Return true if the "naked" function attribute is supported on this target.
1266
1267 proc check_effective_target_naked_functions { } {
1268 return [check_no_compiler_messages naked_functions assembly {
1269 void f() __attribute__((naked));
1270 }]
1271 }
1272
1273 # Return 1 if the target supports Fortran real kinds larger than real(8),
1274 # 0 otherwise.
1275 #
1276 # When the target name changes, replace the cached result.
1277
1278 proc check_effective_target_fortran_large_real { } {
1279 return [check_no_compiler_messages fortran_large_real executable {
1280 ! Fortran
1281 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1282 real(kind=k) :: x
1283 x = cos (x)
1284 end
1285 }]
1286 }
1287
1288 # Return 1 if the target supports Fortran real kind real(16),
1289 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1290 # this checks for Real(16) only; the other returned real(10) if
1291 # both real(10) and real(16) are available.
1292 #
1293 # When the target name changes, replace the cached result.
1294
1295 proc check_effective_target_fortran_real_16 { } {
1296 return [check_no_compiler_messages fortran_real_16 executable {
1297 ! Fortran
1298 real(kind=16) :: x
1299 x = cos (x)
1300 end
1301 }]
1302 }
1303
1304
1305 # Return 1 if the target supports Fortran's IEEE modules,
1306 # 0 otherwise.
1307 #
1308 # When the target name changes, replace the cached result.
1309
1310 proc check_effective_target_fortran_ieee { flags } {
1311 return [check_no_compiler_messages fortran_ieee executable {
1312 ! Fortran
1313 use, intrinsic :: ieee_features
1314 end
1315 } $flags ]
1316 }
1317
1318
1319 # Return 1 if the target supports SQRT for the largest floating-point
1320 # type. (Some targets lack the libm support for this FP type.)
1321 # On most targets, this check effectively checks either whether sqrtl is
1322 # available or on __float128 systems whether libquadmath is installed,
1323 # which provides sqrtq.
1324 #
1325 # When the target name changes, replace the cached result.
1326
1327 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1328 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1329 ! Fortran
1330 use iso_fortran_env, only: real_kinds
1331 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1332 real(kind=maxFP), volatile :: x
1333 x = 2.0_maxFP
1334 x = sqrt (x)
1335 end
1336 }]
1337 }
1338
1339
1340 # Return 1 if the target supports Fortran integer kinds larger than
1341 # integer(8), 0 otherwise.
1342 #
1343 # When the target name changes, replace the cached result.
1344
1345 proc check_effective_target_fortran_large_int { } {
1346 return [check_no_compiler_messages fortran_large_int executable {
1347 ! Fortran
1348 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1349 integer(kind=k) :: i
1350 end
1351 }]
1352 }
1353
1354 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1355 #
1356 # When the target name changes, replace the cached result.
1357
1358 proc check_effective_target_fortran_integer_16 { } {
1359 return [check_no_compiler_messages fortran_integer_16 executable {
1360 ! Fortran
1361 integer(16) :: i
1362 end
1363 }]
1364 }
1365
1366 # Return 1 if we can statically link libgfortran, 0 otherwise.
1367 #
1368 # When the target name changes, replace the cached result.
1369
1370 proc check_effective_target_static_libgfortran { } {
1371 return [check_no_compiler_messages static_libgfortran executable {
1372 ! Fortran
1373 print *, 'test'
1374 end
1375 } "-static"]
1376 }
1377
1378 # Return 1 if cilk-plus is supported by the target, 0 otherwise.
1379
1380 proc check_effective_target_cilkplus { } {
1381 # Skip cilk-plus tests on int16 and size16 targets for now.
1382 # The cilk-plus tests are not generic enough to cover these
1383 # cases and would throw hundreds of FAILs.
1384 if { [check_effective_target_int16]
1385 || ![check_effective_target_size32plus] } {
1386 return 0;
1387 }
1388
1389 # Skip AVR, its RAM is too small and too many tests would fail.
1390 if { [istarget avr-*-*] } {
1391 return 0;
1392 }
1393 return 1
1394 }
1395
1396 proc check_linker_plugin_available { } {
1397 return [check_no_compiler_messages_nocache linker_plugin executable {
1398 int main() { return 0; }
1399 } "-flto -fuse-linker-plugin"]
1400 }
1401
1402 # Return 1 if the target supports executing 750CL paired-single instructions, 0
1403 # otherwise. Cache the result.
1404
1405 proc check_750cl_hw_available { } {
1406 return [check_cached_effective_target 750cl_hw_available {
1407 # If this is not the right target then we can skip the test.
1408 if { ![istarget powerpc-*paired*] } {
1409 expr 0
1410 } else {
1411 check_runtime_nocache 750cl_hw_available {
1412 int main()
1413 {
1414 #ifdef __MACH__
1415 asm volatile ("ps_mul v0,v0,v0");
1416 #else
1417 asm volatile ("ps_mul 0,0,0");
1418 #endif
1419 return 0;
1420 }
1421 } "-mpaired"
1422 }
1423 }]
1424 }
1425
1426 # Return 1 if the target OS supports running SSE executables, 0
1427 # otherwise. Cache the result.
1428
1429 proc check_sse_os_support_available { } {
1430 return [check_cached_effective_target sse_os_support_available {
1431 # If this is not the right target then we can skip the test.
1432 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1433 expr 0
1434 } elseif { [istarget i?86-*-solaris2*] } {
1435 # The Solaris 2 kernel doesn't save and restore SSE registers
1436 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1437 check_runtime_nocache sse_os_support_available {
1438 int main ()
1439 {
1440 asm volatile ("movaps %xmm0,%xmm0");
1441 return 0;
1442 }
1443 } "-msse"
1444 } else {
1445 expr 1
1446 }
1447 }]
1448 }
1449
1450 # Return 1 if the target OS supports running AVX executables, 0
1451 # otherwise. Cache the result.
1452
1453 proc check_avx_os_support_available { } {
1454 return [check_cached_effective_target avx_os_support_available {
1455 # If this is not the right target then we can skip the test.
1456 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1457 expr 0
1458 } else {
1459 # Check that OS has AVX and SSE saving enabled.
1460 check_runtime_nocache avx_os_support_available {
1461 int main ()
1462 {
1463 unsigned int eax, edx;
1464
1465 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1466 return (eax & 6) != 6;
1467 }
1468 } ""
1469 }
1470 }]
1471 }
1472
1473 # Return 1 if the target supports executing SSE instructions, 0
1474 # otherwise. Cache the result.
1475
1476 proc check_sse_hw_available { } {
1477 return [check_cached_effective_target sse_hw_available {
1478 # If this is not the right target then we can skip the test.
1479 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1480 expr 0
1481 } else {
1482 check_runtime_nocache sse_hw_available {
1483 #include "cpuid.h"
1484 int main ()
1485 {
1486 unsigned int eax, ebx, ecx, edx;
1487 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1488 return !(edx & bit_SSE);
1489 return 1;
1490 }
1491 } ""
1492 }
1493 }]
1494 }
1495
1496 # Return 1 if the target supports executing SSE2 instructions, 0
1497 # otherwise. Cache the result.
1498
1499 proc check_sse2_hw_available { } {
1500 return [check_cached_effective_target sse2_hw_available {
1501 # If this is not the right target then we can skip the test.
1502 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1503 expr 0
1504 } else {
1505 check_runtime_nocache sse2_hw_available {
1506 #include "cpuid.h"
1507 int main ()
1508 {
1509 unsigned int eax, ebx, ecx, edx;
1510 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1511 return !(edx & bit_SSE2);
1512 return 1;
1513 }
1514 } ""
1515 }
1516 }]
1517 }
1518
1519 # Return 1 if the target supports executing AVX instructions, 0
1520 # otherwise. Cache the result.
1521
1522 proc check_avx_hw_available { } {
1523 return [check_cached_effective_target avx_hw_available {
1524 # If this is not the right target then we can skip the test.
1525 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1526 expr 0
1527 } else {
1528 check_runtime_nocache avx_hw_available {
1529 #include "cpuid.h"
1530 int main ()
1531 {
1532 unsigned int eax, ebx, ecx, edx;
1533 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1534 return ((ecx & (bit_AVX | bit_OSXSAVE))
1535 != (bit_AVX | bit_OSXSAVE));
1536 return 1;
1537 }
1538 } ""
1539 }
1540 }]
1541 }
1542
1543 # Return 1 if the target supports running SSE executables, 0 otherwise.
1544
1545 proc check_effective_target_sse_runtime { } {
1546 if { [check_effective_target_sse]
1547 && [check_sse_hw_available]
1548 && [check_sse_os_support_available] } {
1549 return 1
1550 }
1551 return 0
1552 }
1553
1554 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1555
1556 proc check_effective_target_sse2_runtime { } {
1557 if { [check_effective_target_sse2]
1558 && [check_sse2_hw_available]
1559 && [check_sse_os_support_available] } {
1560 return 1
1561 }
1562 return 0
1563 }
1564
1565 # Return 1 if the target supports running AVX executables, 0 otherwise.
1566
1567 proc check_effective_target_avx_runtime { } {
1568 if { [check_effective_target_avx]
1569 && [check_avx_hw_available]
1570 && [check_avx_os_support_available] } {
1571 return 1
1572 }
1573 return 0
1574 }
1575
1576 # Return 1 if the target supports executing power8 vector instructions, 0
1577 # otherwise. Cache the result.
1578
1579 proc check_p8vector_hw_available { } {
1580 return [check_cached_effective_target p8vector_hw_available {
1581 # Some simulators are known to not support VSX/power8 instructions.
1582 # For now, disable on Darwin
1583 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1584 expr 0
1585 } else {
1586 set options "-mpower8-vector"
1587 check_runtime_nocache p8vector_hw_available {
1588 int main()
1589 {
1590 #ifdef __MACH__
1591 asm volatile ("xxlorc vs0,vs0,vs0");
1592 #else
1593 asm volatile ("xxlorc 0,0,0");
1594 #endif
1595 return 0;
1596 }
1597 } $options
1598 }
1599 }]
1600 }
1601
1602 # Return 1 if the target supports executing VSX instructions, 0
1603 # otherwise. Cache the result.
1604
1605 proc check_vsx_hw_available { } {
1606 return [check_cached_effective_target vsx_hw_available {
1607 # Some simulators are known to not support VSX instructions.
1608 # For now, disable on Darwin
1609 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1610 expr 0
1611 } else {
1612 set options "-mvsx"
1613 check_runtime_nocache vsx_hw_available {
1614 int main()
1615 {
1616 #ifdef __MACH__
1617 asm volatile ("xxlor vs0,vs0,vs0");
1618 #else
1619 asm volatile ("xxlor 0,0,0");
1620 #endif
1621 return 0;
1622 }
1623 } $options
1624 }
1625 }]
1626 }
1627
1628 # Return 1 if the target supports executing AltiVec instructions, 0
1629 # otherwise. Cache the result.
1630
1631 proc check_vmx_hw_available { } {
1632 return [check_cached_effective_target vmx_hw_available {
1633 # Some simulators are known to not support VMX instructions.
1634 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
1635 expr 0
1636 } else {
1637 # Most targets don't require special flags for this test case, but
1638 # Darwin does. Just to be sure, make sure VSX is not enabled for
1639 # the altivec tests.
1640 if { [istarget *-*-darwin*]
1641 || [istarget *-*-aix*] } {
1642 set options "-maltivec -mno-vsx"
1643 } else {
1644 set options "-mno-vsx"
1645 }
1646 check_runtime_nocache vmx_hw_available {
1647 int main()
1648 {
1649 #ifdef __MACH__
1650 asm volatile ("vor v0,v0,v0");
1651 #else
1652 asm volatile ("vor 0,0,0");
1653 #endif
1654 return 0;
1655 }
1656 } $options
1657 }
1658 }]
1659 }
1660
1661 proc check_ppc_recip_hw_available { } {
1662 return [check_cached_effective_target ppc_recip_hw_available {
1663 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
1664 # For now, disable on Darwin
1665 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1666 expr 0
1667 } else {
1668 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
1669 check_runtime_nocache ppc_recip_hw_available {
1670 volatile double d_recip, d_rsqrt, d_four = 4.0;
1671 volatile float f_recip, f_rsqrt, f_four = 4.0f;
1672 int main()
1673 {
1674 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
1675 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
1676 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
1677 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
1678 return 0;
1679 }
1680 } $options
1681 }
1682 }]
1683 }
1684
1685 # Return 1 if the target supports executing AltiVec and Cell PPU
1686 # instructions, 0 otherwise. Cache the result.
1687
1688 proc check_effective_target_cell_hw { } {
1689 return [check_cached_effective_target cell_hw_available {
1690 # Some simulators are known to not support VMX and PPU instructions.
1691 if { [istarget powerpc-*-eabi*] } {
1692 expr 0
1693 } else {
1694 # Most targets don't require special flags for this test
1695 # case, but Darwin and AIX do.
1696 if { [istarget *-*-darwin*]
1697 || [istarget *-*-aix*] } {
1698 set options "-maltivec -mcpu=cell"
1699 } else {
1700 set options "-mcpu=cell"
1701 }
1702 check_runtime_nocache cell_hw_available {
1703 int main()
1704 {
1705 #ifdef __MACH__
1706 asm volatile ("vor v0,v0,v0");
1707 asm volatile ("lvlx v0,r0,r0");
1708 #else
1709 asm volatile ("vor 0,0,0");
1710 asm volatile ("lvlx 0,0,0");
1711 #endif
1712 return 0;
1713 }
1714 } $options
1715 }
1716 }]
1717 }
1718
1719 # Return 1 if the target supports executing 64-bit instructions, 0
1720 # otherwise. Cache the result.
1721
1722 proc check_effective_target_powerpc64 { } {
1723 global powerpc64_available_saved
1724 global tool
1725
1726 if [info exists powerpc64_available_saved] {
1727 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
1728 } else {
1729 set powerpc64_available_saved 0
1730
1731 # Some simulators are known to not support powerpc64 instructions.
1732 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
1733 verbose "check_effective_target_powerpc64 returning 0" 2
1734 return $powerpc64_available_saved
1735 }
1736
1737 # Set up, compile, and execute a test program containing a 64-bit
1738 # instruction. Include the current process ID in the file
1739 # names to prevent conflicts with invocations for multiple
1740 # testsuites.
1741 set src ppc[pid].c
1742 set exe ppc[pid].x
1743
1744 set f [open $src "w"]
1745 puts $f "int main() {"
1746 puts $f "#ifdef __MACH__"
1747 puts $f " asm volatile (\"extsw r0,r0\");"
1748 puts $f "#else"
1749 puts $f " asm volatile (\"extsw 0,0\");"
1750 puts $f "#endif"
1751 puts $f " return 0; }"
1752 close $f
1753
1754 set opts "additional_flags=-mcpu=G5"
1755
1756 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
1757 set lines [${tool}_target_compile $src $exe executable "$opts"]
1758 file delete $src
1759
1760 if [string match "" $lines] then {
1761 # No error message, compilation succeeded.
1762 set result [${tool}_load "./$exe" "" ""]
1763 set status [lindex $result 0]
1764 remote_file build delete $exe
1765 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
1766
1767 if { $status == "pass" } then {
1768 set powerpc64_available_saved 1
1769 }
1770 } else {
1771 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
1772 }
1773 }
1774
1775 return $powerpc64_available_saved
1776 }
1777
1778 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
1779 # complex float arguments. This affects gfortran tests that call cabsf
1780 # in libm built by an earlier compiler. Return 1 if libm uses the same
1781 # argument passing as the compiler under test, 0 otherwise.
1782 #
1783 # When the target name changes, replace the cached result.
1784
1785 proc check_effective_target_broken_cplxf_arg { } {
1786 return [check_cached_effective_target broken_cplxf_arg {
1787 # Skip the work for targets known not to be affected.
1788 if { ![istarget powerpc64-*-linux*] } {
1789 expr 0
1790 } elseif { ![is-effective-target lp64] } {
1791 expr 0
1792 } else {
1793 check_runtime_nocache broken_cplxf_arg {
1794 #include <complex.h>
1795 extern void abort (void);
1796 float fabsf (float);
1797 float cabsf (_Complex float);
1798 int main ()
1799 {
1800 _Complex float cf;
1801 float f;
1802 cf = 3 + 4.0fi;
1803 f = cabsf (cf);
1804 if (fabsf (f - 5.0) > 0.0001)
1805 abort ();
1806 return 0;
1807 }
1808 } "-lm"
1809 }
1810 }]
1811 }
1812
1813 # Return 1 is this is a TI C6X target supporting C67X instructions
1814 proc check_effective_target_ti_c67x { } {
1815 return [check_no_compiler_messages ti_c67x assembly {
1816 #if !defined(_TMS320C6700)
1817 #error !_TMS320C6700
1818 #endif
1819 }]
1820 }
1821
1822 # Return 1 is this is a TI C6X target supporting C64X+ instructions
1823 proc check_effective_target_ti_c64xp { } {
1824 return [check_no_compiler_messages ti_c64xp assembly {
1825 #if !defined(_TMS320C6400_PLUS)
1826 #error !_TMS320C6400_PLUS
1827 #endif
1828 }]
1829 }
1830
1831
1832 proc check_alpha_max_hw_available { } {
1833 return [check_runtime alpha_max_hw_available {
1834 int main() { return __builtin_alpha_amask(1<<8) != 0; }
1835 }]
1836 }
1837
1838 # Returns true iff the FUNCTION is available on the target system.
1839 # (This is essentially a Tcl implementation of Autoconf's
1840 # AC_CHECK_FUNC.)
1841
1842 proc check_function_available { function } {
1843 return [check_no_compiler_messages ${function}_available \
1844 executable [subst {
1845 #ifdef __cplusplus
1846 extern "C"
1847 #endif
1848 char $function ();
1849 int main () { $function (); }
1850 }] "-fno-builtin" ]
1851 }
1852
1853 # Returns true iff "fork" is available on the target system.
1854
1855 proc check_fork_available {} {
1856 return [check_function_available "fork"]
1857 }
1858
1859 # Returns true iff "mkfifo" is available on the target system.
1860
1861 proc check_mkfifo_available {} {
1862 if { [istarget *-*-cygwin*] } {
1863 # Cygwin has mkfifo, but support is incomplete.
1864 return 0
1865 }
1866
1867 return [check_function_available "mkfifo"]
1868 }
1869
1870 # Returns true iff "__cxa_atexit" is used on the target system.
1871
1872 proc check_cxa_atexit_available { } {
1873 return [check_cached_effective_target cxa_atexit_available {
1874 if { [istarget hppa*-*-hpux10*] } {
1875 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
1876 expr 0
1877 } elseif { [istarget *-*-vxworks] } {
1878 # vxworks doesn't have __cxa_atexit but subsequent test passes.
1879 expr 0
1880 } else {
1881 check_runtime_nocache cxa_atexit_available {
1882 // C++
1883 #include <stdlib.h>
1884 static unsigned int count;
1885 struct X
1886 {
1887 X() { count = 1; }
1888 ~X()
1889 {
1890 if (count != 3)
1891 exit(1);
1892 count = 4;
1893 }
1894 };
1895 void f()
1896 {
1897 static X x;
1898 }
1899 struct Y
1900 {
1901 Y() { f(); count = 2; }
1902 ~Y()
1903 {
1904 if (count != 2)
1905 exit(1);
1906 count = 3;
1907 }
1908 };
1909 Y y;
1910 int main() { return 0; }
1911 }
1912 }
1913 }]
1914 }
1915
1916 proc check_effective_target_objc2 { } {
1917 return [check_no_compiler_messages objc2 object {
1918 #ifdef __OBJC2__
1919 int dummy[1];
1920 #else
1921 #error !__OBJC2__
1922 #endif
1923 }]
1924 }
1925
1926 proc check_effective_target_next_runtime { } {
1927 return [check_no_compiler_messages objc2 object {
1928 #ifdef __NEXT_RUNTIME__
1929 int dummy[1];
1930 #else
1931 #error !__NEXT_RUNTIME__
1932 #endif
1933 }]
1934 }
1935
1936 # Return 1 if we're generating 32-bit code using default options, 0
1937 # otherwise.
1938
1939 proc check_effective_target_ilp32 { } {
1940 return [check_no_compiler_messages ilp32 object {
1941 int dummy[sizeof (int) == 4
1942 && sizeof (void *) == 4
1943 && sizeof (long) == 4 ? 1 : -1];
1944 }]
1945 }
1946
1947 # Return 1 if we're generating ia32 code using default options, 0
1948 # otherwise.
1949
1950 proc check_effective_target_ia32 { } {
1951 return [check_no_compiler_messages ia32 object {
1952 int dummy[sizeof (int) == 4
1953 && sizeof (void *) == 4
1954 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
1955 }]
1956 }
1957
1958 # Return 1 if we're generating x32 code using default options, 0
1959 # otherwise.
1960
1961 proc check_effective_target_x32 { } {
1962 return [check_no_compiler_messages x32 object {
1963 int dummy[sizeof (int) == 4
1964 && sizeof (void *) == 4
1965 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
1966 }]
1967 }
1968
1969 # Return 1 if we're generating 32-bit integers using default
1970 # options, 0 otherwise.
1971
1972 proc check_effective_target_int32 { } {
1973 return [check_no_compiler_messages int32 object {
1974 int dummy[sizeof (int) == 4 ? 1 : -1];
1975 }]
1976 }
1977
1978 # Return 1 if we're generating 32-bit or larger integers using default
1979 # options, 0 otherwise.
1980
1981 proc check_effective_target_int32plus { } {
1982 return [check_no_compiler_messages int32plus object {
1983 int dummy[sizeof (int) >= 4 ? 1 : -1];
1984 }]
1985 }
1986
1987 # Return 1 if we're generating 32-bit or larger pointers using default
1988 # options, 0 otherwise.
1989
1990 proc check_effective_target_ptr32plus { } {
1991 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
1992 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
1993 # cannot really hold a 32-bit address, so we always return false here.
1994 if { [istarget msp430-*-*] } {
1995 return 0
1996 }
1997
1998 return [check_no_compiler_messages ptr32plus object {
1999 int dummy[sizeof (void *) >= 4 ? 1 : -1];
2000 }]
2001 }
2002
2003 # Return 1 if we support 32-bit or larger array and structure sizes
2004 # using default options, 0 otherwise. Avoid false positive on
2005 # targets with 20 or 24 bit address spaces.
2006
2007 proc check_effective_target_size32plus { } {
2008 return [check_no_compiler_messages size32plus object {
2009 char dummy[16777217L];
2010 }]
2011 }
2012
2013 # Returns 1 if we're generating 16-bit or smaller integers with the
2014 # default options, 0 otherwise.
2015
2016 proc check_effective_target_int16 { } {
2017 return [check_no_compiler_messages int16 object {
2018 int dummy[sizeof (int) < 4 ? 1 : -1];
2019 }]
2020 }
2021
2022 # Return 1 if we're generating 64-bit code using default options, 0
2023 # otherwise.
2024
2025 proc check_effective_target_lp64 { } {
2026 return [check_no_compiler_messages lp64 object {
2027 int dummy[sizeof (int) == 4
2028 && sizeof (void *) == 8
2029 && sizeof (long) == 8 ? 1 : -1];
2030 }]
2031 }
2032
2033 # Return 1 if we're generating 64-bit code using default llp64 options,
2034 # 0 otherwise.
2035
2036 proc check_effective_target_llp64 { } {
2037 return [check_no_compiler_messages llp64 object {
2038 int dummy[sizeof (int) == 4
2039 && sizeof (void *) == 8
2040 && sizeof (long long) == 8
2041 && sizeof (long) == 4 ? 1 : -1];
2042 }]
2043 }
2044
2045 # Return 1 if long and int have different sizes,
2046 # 0 otherwise.
2047
2048 proc check_effective_target_long_neq_int { } {
2049 return [check_no_compiler_messages long_ne_int object {
2050 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2051 }]
2052 }
2053
2054 # Return 1 if the target supports long double larger than double,
2055 # 0 otherwise.
2056
2057 proc check_effective_target_large_long_double { } {
2058 return [check_no_compiler_messages large_long_double object {
2059 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2060 }]
2061 }
2062
2063 # Return 1 if the target supports double larger than float,
2064 # 0 otherwise.
2065
2066 proc check_effective_target_large_double { } {
2067 return [check_no_compiler_messages large_double object {
2068 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2069 }]
2070 }
2071
2072 # Return 1 if the target supports long double of 128 bits,
2073 # 0 otherwise.
2074
2075 proc check_effective_target_longdouble128 { } {
2076 return [check_no_compiler_messages longdouble128 object {
2077 int dummy[sizeof(long double) == 16 ? 1 : -1];
2078 }]
2079 }
2080
2081 # Return 1 if the target supports double of 64 bits,
2082 # 0 otherwise.
2083
2084 proc check_effective_target_double64 { } {
2085 return [check_no_compiler_messages double64 object {
2086 int dummy[sizeof(double) == 8 ? 1 : -1];
2087 }]
2088 }
2089
2090 # Return 1 if the target supports double of at least 64 bits,
2091 # 0 otherwise.
2092
2093 proc check_effective_target_double64plus { } {
2094 return [check_no_compiler_messages double64plus object {
2095 int dummy[sizeof(double) >= 8 ? 1 : -1];
2096 }]
2097 }
2098
2099 # Return 1 if the target supports 'w' suffix on floating constant
2100 # 0 otherwise.
2101
2102 proc check_effective_target_has_w_floating_suffix { } {
2103 set opts ""
2104 if [check_effective_target_c++] {
2105 append opts "-std=gnu++03"
2106 }
2107 return [check_no_compiler_messages w_fp_suffix object {
2108 float dummy = 1.0w;
2109 } "$opts"]
2110 }
2111
2112 # Return 1 if the target supports 'q' suffix on floating constant
2113 # 0 otherwise.
2114
2115 proc check_effective_target_has_q_floating_suffix { } {
2116 set opts ""
2117 if [check_effective_target_c++] {
2118 append opts "-std=gnu++03"
2119 }
2120 return [check_no_compiler_messages q_fp_suffix object {
2121 float dummy = 1.0q;
2122 } "$opts"]
2123 }
2124 # Return 1 if the target supports compiling fixed-point,
2125 # 0 otherwise.
2126
2127 proc check_effective_target_fixed_point { } {
2128 return [check_no_compiler_messages fixed_point object {
2129 _Sat _Fract x; _Sat _Accum y;
2130 }]
2131 }
2132
2133 # Return 1 if the target supports compiling decimal floating point,
2134 # 0 otherwise.
2135
2136 proc check_effective_target_dfp_nocache { } {
2137 verbose "check_effective_target_dfp_nocache: compiling source" 2
2138 set ret [check_no_compiler_messages_nocache dfp object {
2139 float x __attribute__((mode(DD)));
2140 }]
2141 verbose "check_effective_target_dfp_nocache: returning $ret" 2
2142 return $ret
2143 }
2144
2145 proc check_effective_target_dfprt_nocache { } {
2146 return [check_runtime_nocache dfprt {
2147 typedef float d64 __attribute__((mode(DD)));
2148 d64 x = 1.2df, y = 2.3dd, z;
2149 int main () { z = x + y; return 0; }
2150 }]
2151 }
2152
2153 # Return 1 if the target supports compiling Decimal Floating Point,
2154 # 0 otherwise.
2155 #
2156 # This won't change for different subtargets so cache the result.
2157
2158 proc check_effective_target_dfp { } {
2159 return [check_cached_effective_target dfp {
2160 check_effective_target_dfp_nocache
2161 }]
2162 }
2163
2164 # Return 1 if the target supports linking and executing Decimal Floating
2165 # Point, 0 otherwise.
2166 #
2167 # This won't change for different subtargets so cache the result.
2168
2169 proc check_effective_target_dfprt { } {
2170 return [check_cached_effective_target dfprt {
2171 check_effective_target_dfprt_nocache
2172 }]
2173 }
2174
2175 # Return 1 if the target supports executing DFP hardware instructions,
2176 # 0 otherwise. Cache the result.
2177
2178 proc check_dfp_hw_available { } {
2179 return [check_cached_effective_target dfp_hw_available {
2180 # For now, disable on Darwin
2181 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2182 expr 0
2183 } else {
2184 check_runtime_nocache dfp_hw_available {
2185 volatile _Decimal64 r;
2186 volatile _Decimal64 a = 4.0DD;
2187 volatile _Decimal64 b = 2.0DD;
2188 int main()
2189 {
2190 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2191 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2192 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2193 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2194 return 0;
2195 }
2196 } "-mcpu=power6 -mhard-float"
2197 }
2198 }]
2199 }
2200
2201 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2202
2203 proc check_effective_target_ucn_nocache { } {
2204 # -std=c99 is only valid for C
2205 if [check_effective_target_c] {
2206 set ucnopts "-std=c99"
2207 } else {
2208 set ucnopts ""
2209 }
2210 verbose "check_effective_target_ucn_nocache: compiling source" 2
2211 set ret [check_no_compiler_messages_nocache ucn object {
2212 int \u00C0;
2213 } $ucnopts]
2214 verbose "check_effective_target_ucn_nocache: returning $ret" 2
2215 return $ret
2216 }
2217
2218 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2219 #
2220 # This won't change for different subtargets, so cache the result.
2221
2222 proc check_effective_target_ucn { } {
2223 return [check_cached_effective_target ucn {
2224 check_effective_target_ucn_nocache
2225 }]
2226 }
2227
2228 # Return 1 if the target needs a command line argument to enable a SIMD
2229 # instruction set.
2230
2231 proc check_effective_target_vect_cmdline_needed { } {
2232 global et_vect_cmdline_needed_saved
2233 global et_vect_cmdline_needed_target_name
2234
2235 if { ![info exists et_vect_cmdline_needed_target_name] } {
2236 set et_vect_cmdline_needed_target_name ""
2237 }
2238
2239 # If the target has changed since we set the cached value, clear it.
2240 set current_target [current_target_name]
2241 if { $current_target != $et_vect_cmdline_needed_target_name } {
2242 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
2243 set et_vect_cmdline_needed_target_name $current_target
2244 if { [info exists et_vect_cmdline_needed_saved] } {
2245 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
2246 unset et_vect_cmdline_needed_saved
2247 }
2248 }
2249
2250 if [info exists et_vect_cmdline_needed_saved] {
2251 verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
2252 } else {
2253 set et_vect_cmdline_needed_saved 1
2254 if { [istarget alpha*-*-*]
2255 || [istarget ia64-*-*]
2256 || (([istarget x86_64-*-*] || [istarget i?86-*-*])
2257 && ([check_effective_target_x32]
2258 || [check_effective_target_lp64]))
2259 || ([istarget powerpc*-*-*]
2260 && ([check_effective_target_powerpc_spe]
2261 || [check_effective_target_powerpc_altivec]))
2262 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
2263 || [istarget spu-*-*]
2264 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
2265 || [istarget aarch64*-*-*] } {
2266 set et_vect_cmdline_needed_saved 0
2267 }
2268 }
2269
2270 verbose "check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
2271 return $et_vect_cmdline_needed_saved
2272 }
2273
2274 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
2275 #
2276 # This won't change for different subtargets so cache the result.
2277
2278 proc check_effective_target_vect_int { } {
2279 global et_vect_int_saved
2280
2281 if [info exists et_vect_int_saved] {
2282 verbose "check_effective_target_vect_int: using cached result" 2
2283 } else {
2284 set et_vect_int_saved 0
2285 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2286 || ([istarget powerpc*-*-*]
2287 && ![istarget powerpc-*-linux*paired*])
2288 || [istarget spu-*-*]
2289 || [istarget sparc*-*-*]
2290 || [istarget alpha*-*-*]
2291 || [istarget ia64-*-*]
2292 || [istarget aarch64*-*-*]
2293 || [check_effective_target_arm32]
2294 || ([istarget mips*-*-*]
2295 && [check_effective_target_mips_loongson]) } {
2296 set et_vect_int_saved 1
2297 }
2298 }
2299
2300 verbose "check_effective_target_vect_int: returning $et_vect_int_saved" 2
2301 return $et_vect_int_saved
2302 }
2303
2304 # Return 1 if the target supports signed int->float conversion
2305 #
2306
2307 proc check_effective_target_vect_intfloat_cvt { } {
2308 global et_vect_intfloat_cvt_saved
2309
2310 if [info exists et_vect_intfloat_cvt_saved] {
2311 verbose "check_effective_target_vect_intfloat_cvt: using cached result" 2
2312 } else {
2313 set et_vect_intfloat_cvt_saved 0
2314 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2315 || ([istarget powerpc*-*-*]
2316 && ![istarget powerpc-*-linux*paired*])
2317 || ([istarget arm*-*-*]
2318 && [check_effective_target_arm_neon_ok])} {
2319 set et_vect_intfloat_cvt_saved 1
2320 }
2321 }
2322
2323 verbose "check_effective_target_vect_intfloat_cvt: returning $et_vect_intfloat_cvt_saved" 2
2324 return $et_vect_intfloat_cvt_saved
2325 }
2326
2327 #Return 1 if we're supporting __int128 for target, 0 otherwise.
2328
2329 proc check_effective_target_int128 { } {
2330 return [check_no_compiler_messages int128 object {
2331 int dummy[
2332 #ifndef __SIZEOF_INT128__
2333 -1
2334 #else
2335 1
2336 #endif
2337 ];
2338 }]
2339 }
2340
2341 # Return 1 if the target supports unsigned int->float conversion
2342 #
2343
2344 proc check_effective_target_vect_uintfloat_cvt { } {
2345 global et_vect_uintfloat_cvt_saved
2346
2347 if [info exists et_vect_uintfloat_cvt_saved] {
2348 verbose "check_effective_target_vect_uintfloat_cvt: using cached result" 2
2349 } else {
2350 set et_vect_uintfloat_cvt_saved 0
2351 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2352 || ([istarget powerpc*-*-*]
2353 && ![istarget powerpc-*-linux*paired*])
2354 || [istarget aarch64*-*-*]
2355 || ([istarget arm*-*-*]
2356 && [check_effective_target_arm_neon_ok])} {
2357 set et_vect_uintfloat_cvt_saved 1
2358 }
2359 }
2360
2361 verbose "check_effective_target_vect_uintfloat_cvt: returning $et_vect_uintfloat_cvt_saved" 2
2362 return $et_vect_uintfloat_cvt_saved
2363 }
2364
2365
2366 # Return 1 if the target supports signed float->int conversion
2367 #
2368
2369 proc check_effective_target_vect_floatint_cvt { } {
2370 global et_vect_floatint_cvt_saved
2371
2372 if [info exists et_vect_floatint_cvt_saved] {
2373 verbose "check_effective_target_vect_floatint_cvt: using cached result" 2
2374 } else {
2375 set et_vect_floatint_cvt_saved 0
2376 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2377 || ([istarget powerpc*-*-*]
2378 && ![istarget powerpc-*-linux*paired*])
2379 || ([istarget arm*-*-*]
2380 && [check_effective_target_arm_neon_ok])} {
2381 set et_vect_floatint_cvt_saved 1
2382 }
2383 }
2384
2385 verbose "check_effective_target_vect_floatint_cvt: returning $et_vect_floatint_cvt_saved" 2
2386 return $et_vect_floatint_cvt_saved
2387 }
2388
2389 # Return 1 if the target supports unsigned float->int conversion
2390 #
2391
2392 proc check_effective_target_vect_floatuint_cvt { } {
2393 global et_vect_floatuint_cvt_saved
2394
2395 if [info exists et_vect_floatuint_cvt_saved] {
2396 verbose "check_effective_target_vect_floatuint_cvt: using cached result" 2
2397 } else {
2398 set et_vect_floatuint_cvt_saved 0
2399 if { ([istarget powerpc*-*-*]
2400 && ![istarget powerpc-*-linux*paired*])
2401 || ([istarget arm*-*-*]
2402 && [check_effective_target_arm_neon_ok])} {
2403 set et_vect_floatuint_cvt_saved 1
2404 }
2405 }
2406
2407 verbose "check_effective_target_vect_floatuint_cvt: returning $et_vect_floatuint_cvt_saved" 2
2408 return $et_vect_floatuint_cvt_saved
2409 }
2410
2411 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
2412 #
2413 # This won't change for different subtargets so cache the result.
2414
2415 proc check_effective_target_vect_simd_clones { } {
2416 global et_vect_simd_clones_saved
2417
2418 if [info exists et_vect_simd_clones_saved] {
2419 verbose "check_effective_target_vect_simd_clones: using cached result" 2
2420 } else {
2421 set et_vect_simd_clones_saved 0
2422 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2423 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx and
2424 # avx2 clone. Only the right clone for the specified arch will be
2425 # chosen, but still we need to at least be able to assemble
2426 # avx2.
2427 if { [check_effective_target_avx2] } {
2428 set et_vect_simd_clones_saved 1
2429 }
2430 }
2431 }
2432
2433 verbose "check_effective_target_vect_simd_clones: returning $et_vect_simd_clones_saved" 2
2434 return $et_vect_simd_clones_saved
2435 }
2436
2437 # Return 1 if this is a AArch64 target supporting big endian
2438 proc check_effective_target_aarch64_big_endian { } {
2439 return [check_no_compiler_messages aarch64_big_endian assembly {
2440 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
2441 #error !__aarch64__ || !__AARCH64EB__
2442 #endif
2443 }]
2444 }
2445
2446 # Return 1 if this is a AArch64 target supporting little endian
2447 proc check_effective_target_aarch64_little_endian { } {
2448 if { ![istarget aarch64*-*-*] } {
2449 return 0
2450 }
2451
2452 return [check_no_compiler_messages aarch64_little_endian assembly {
2453 #if !defined(__aarch64__) || defined(__AARCH64EB__)
2454 #error FOO
2455 #endif
2456 }]
2457 }
2458
2459 # Return 1 if this is an arm target using 32-bit instructions
2460 proc check_effective_target_arm32 { } {
2461 if { ![istarget arm*-*-*] } {
2462 return 0
2463 }
2464
2465 return [check_no_compiler_messages arm32 assembly {
2466 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
2467 #error !__arm || __thumb__ && !__thumb2__
2468 #endif
2469 }]
2470 }
2471
2472 # Return 1 if this is an arm target not using Thumb
2473 proc check_effective_target_arm_nothumb { } {
2474 if { ![istarget arm*-*-*] } {
2475 return 0
2476 }
2477
2478 return [check_no_compiler_messages arm_nothumb assembly {
2479 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
2480 #error !__arm__ || __thumb || __thumb2__
2481 #endif
2482 }]
2483 }
2484
2485 # Return 1 if this is a little-endian ARM target
2486 proc check_effective_target_arm_little_endian { } {
2487 if { ![istarget arm*-*-*] } {
2488 return 0
2489 }
2490
2491 return [check_no_compiler_messages arm_little_endian assembly {
2492 #if !defined(__arm__) || !defined(__ARMEL__)
2493 #error !__arm__ || !__ARMEL__
2494 #endif
2495 }]
2496 }
2497
2498 # Return 1 if this is an ARM target that only supports aligned vector accesses
2499 proc check_effective_target_arm_vect_no_misalign { } {
2500 if { ![istarget arm*-*-*] } {
2501 return 0
2502 }
2503
2504 return [check_no_compiler_messages arm_vect_no_misalign assembly {
2505 #if !defined(__arm__) \
2506 || (defined(__ARM_FEATURE_UNALIGNED) \
2507 && defined(__ARMEL__))
2508 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
2509 #endif
2510 }]
2511 }
2512
2513
2514 # Return 1 if this is an ARM target supporting -mfpu=vfp
2515 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
2516 # options.
2517
2518 proc check_effective_target_arm_vfp_ok { } {
2519 if { [check_effective_target_arm32] } {
2520 return [check_no_compiler_messages arm_vfp_ok object {
2521 int dummy;
2522 } "-mfpu=vfp -mfloat-abi=softfp"]
2523 } else {
2524 return 0
2525 }
2526 }
2527
2528 # Return 1 if this is an ARM target supporting -mfpu=vfp3
2529 # -mfloat-abi=softfp.
2530
2531 proc check_effective_target_arm_vfp3_ok { } {
2532 if { [check_effective_target_arm32] } {
2533 return [check_no_compiler_messages arm_vfp3_ok object {
2534 int dummy;
2535 } "-mfpu=vfp3 -mfloat-abi=softfp"]
2536 } else {
2537 return 0
2538 }
2539 }
2540
2541 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
2542 # -mfloat-abi=softfp.
2543 proc check_effective_target_arm_v8_vfp_ok {} {
2544 if { [check_effective_target_arm32] } {
2545 return [check_no_compiler_messages arm_v8_vfp_ok object {
2546 int foo (void)
2547 {
2548 __asm__ volatile ("vrinta.f32.f32 s0, s0");
2549 return 0;
2550 }
2551 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
2552 } else {
2553 return 0
2554 }
2555 }
2556
2557 # Return 1 if this is an ARM target supporting -mfpu=vfp
2558 # -mfloat-abi=hard. Some multilibs may be incompatible with these
2559 # options.
2560
2561 proc check_effective_target_arm_hard_vfp_ok { } {
2562 if { [check_effective_target_arm32]
2563 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
2564 return [check_no_compiler_messages arm_hard_vfp_ok executable {
2565 int main() { return 0;}
2566 } "-mfpu=vfp -mfloat-abi=hard"]
2567 } else {
2568 return 0
2569 }
2570 }
2571
2572 # Return 1 if this is an ARM target that supports DSP multiply with
2573 # current multilib flags.
2574
2575 proc check_effective_target_arm_dsp { } {
2576 return [check_no_compiler_messages arm_dsp assembly {
2577 #ifndef __ARM_FEATURE_DSP
2578 #error not DSP
2579 #endif
2580 int i;
2581 }]
2582 }
2583
2584 # Return 1 if this is an ARM target that supports unaligned word/halfword
2585 # load/store instructions.
2586
2587 proc check_effective_target_arm_unaligned { } {
2588 return [check_no_compiler_messages arm_unaligned assembly {
2589 #ifndef __ARM_FEATURE_UNALIGNED
2590 #error no unaligned support
2591 #endif
2592 int i;
2593 }]
2594 }
2595
2596 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2597 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2598 # incompatible with these options. Also set et_arm_crypto_flags to the
2599 # best options to add.
2600
2601 proc check_effective_target_arm_crypto_ok_nocache { } {
2602 global et_arm_crypto_flags
2603 set et_arm_crypto_flags ""
2604 if { [check_effective_target_arm32] } {
2605 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
2606 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
2607 #include "arm_neon.h"
2608 uint8x16_t
2609 foo (uint8x16_t a, uint8x16_t b)
2610 {
2611 return vaeseq_u8 (a, b);
2612 }
2613 } "$flags"] } {
2614 set et_arm_crypto_flags $flags
2615 return 1
2616 }
2617 }
2618 }
2619
2620 return 0
2621 }
2622
2623 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2624
2625 proc check_effective_target_arm_crypto_ok { } {
2626 return [check_cached_effective_target arm_crypto_ok \
2627 check_effective_target_arm_crypto_ok_nocache]
2628 }
2629
2630 # Add options for crypto extensions.
2631 proc add_options_for_arm_crypto { flags } {
2632 if { ! [check_effective_target_arm_crypto_ok] } {
2633 return "$flags"
2634 }
2635 global et_arm_crypto_flags
2636 return "$flags $et_arm_crypto_flags"
2637 }
2638
2639 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2640 # or -mfloat-abi=hard, but if one is already specified by the
2641 # multilib, use it. Similarly, if a -mfpu option already enables
2642 # NEON, do not add -mfpu=neon.
2643
2644 proc add_options_for_arm_neon { flags } {
2645 if { ! [check_effective_target_arm_neon_ok] } {
2646 return "$flags"
2647 }
2648 global et_arm_neon_flags
2649 return "$flags $et_arm_neon_flags"
2650 }
2651
2652 proc add_options_for_arm_v8_vfp { flags } {
2653 if { ! [check_effective_target_arm_v8_vfp_ok] } {
2654 return "$flags"
2655 }
2656 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
2657 }
2658
2659 proc add_options_for_arm_v8_neon { flags } {
2660 if { ! [check_effective_target_arm_v8_neon_ok] } {
2661 return "$flags"
2662 }
2663 global et_arm_v8_neon_flags
2664 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
2665 }
2666
2667 proc add_options_for_arm_crc { flags } {
2668 if { ! [check_effective_target_arm_crc_ok] } {
2669 return "$flags"
2670 }
2671 global et_arm_crc_flags
2672 return "$flags $et_arm_crc_flags"
2673 }
2674
2675 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2676 # or -mfloat-abi=hard, but if one is already specified by the
2677 # multilib, use it. Similarly, if a -mfpu option already enables
2678 # NEON, do not add -mfpu=neon.
2679
2680 proc add_options_for_arm_neonv2 { flags } {
2681 if { ! [check_effective_target_arm_neonv2_ok] } {
2682 return "$flags"
2683 }
2684 global et_arm_neonv2_flags
2685 return "$flags $et_arm_neonv2_flags"
2686 }
2687
2688 # Add the options needed for vfp3.
2689 proc add_options_for_arm_vfp3 { flags } {
2690 if { ! [check_effective_target_arm_vfp3_ok] } {
2691 return "$flags"
2692 }
2693 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
2694 }
2695
2696 # Return 1 if this is an ARM target supporting -mfpu=neon
2697 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2698 # incompatible with these options. Also set et_arm_neon_flags to the
2699 # best options to add.
2700
2701 proc check_effective_target_arm_neon_ok_nocache { } {
2702 global et_arm_neon_flags
2703 set et_arm_neon_flags ""
2704 if { [check_effective_target_arm32] } {
2705 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp"} {
2706 if { [check_no_compiler_messages_nocache arm_neon_ok object {
2707 #include "arm_neon.h"
2708 int dummy;
2709 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
2710 configured for -mcpu=arm926ej-s, for example. */
2711 #if __ARM_ARCH < 7
2712 #error Architecture too old for NEON.
2713 #endif
2714 } "$flags"] } {
2715 set et_arm_neon_flags $flags
2716 return 1
2717 }
2718 }
2719 }
2720
2721 return 0
2722 }
2723
2724 proc check_effective_target_arm_neon_ok { } {
2725 return [check_cached_effective_target arm_neon_ok \
2726 check_effective_target_arm_neon_ok_nocache]
2727 }
2728
2729 proc check_effective_target_arm_crc_ok_nocache { } {
2730 global et_arm_crc_flags
2731 set et_arm_crc_flags "-march=armv8-a+crc"
2732 return [check_no_compiler_messages_nocache arm_crc_ok object {
2733 #if !defined (__ARM_FEATURE_CRC32)
2734 #error FOO
2735 #endif
2736 } "$et_arm_crc_flags"]
2737 }
2738
2739 proc check_effective_target_arm_crc_ok { } {
2740 return [check_cached_effective_target arm_crc_ok \
2741 check_effective_target_arm_crc_ok_nocache]
2742 }
2743
2744 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
2745 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2746 # incompatible with these options. Also set et_arm_neon_flags to the
2747 # best options to add.
2748
2749 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
2750 global et_arm_neon_fp16_flags
2751 set et_arm_neon_fp16_flags ""
2752 if { [check_effective_target_arm32] } {
2753 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
2754 "-mfpu=neon-fp16 -mfloat-abi=softfp"
2755 "-mfp16-format=ieee"
2756 "-mfloat-abi=softfp -mfp16-format=ieee"
2757 "-mfpu=neon-fp16 -mfp16-format=ieee"
2758 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
2759 if { [check_no_compiler_messages_nocache arm_neon_fp_16_ok object {
2760 #include "arm_neon.h"
2761 float16x4_t
2762 foo (float32x4_t arg)
2763 {
2764 return vcvt_f16_f32 (arg);
2765 }
2766 } "$flags"] } {
2767 set et_arm_neon_fp16_flags $flags
2768 return 1
2769 }
2770 }
2771 }
2772
2773 return 0
2774 }
2775
2776 proc check_effective_target_arm_neon_fp16_ok { } {
2777 return [check_cached_effective_target arm_neon_fp16_ok \
2778 check_effective_target_arm_neon_fp16_ok_nocache]
2779 }
2780
2781 proc add_options_for_arm_neon_fp16 { flags } {
2782 if { ! [check_effective_target_arm_neon_fp16_ok] } {
2783 return "$flags"
2784 }
2785 global et_arm_neon_fp16_flags
2786 return "$flags $et_arm_neon_fp16_flags"
2787 }
2788
2789 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
2790 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2791 # incompatible with these options. Also set et_arm_v8_neon_flags to the
2792 # best options to add.
2793
2794 proc check_effective_target_arm_v8_neon_ok_nocache { } {
2795 global et_arm_v8_neon_flags
2796 set et_arm_v8_neon_flags ""
2797 if { [check_effective_target_arm32] } {
2798 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
2799 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
2800 #if __ARM_ARCH < 8
2801 #error not armv8 or later
2802 #endif
2803 #include "arm_neon.h"
2804 void
2805 foo ()
2806 {
2807 __asm__ volatile ("vrintn.f32 q0, q0");
2808 }
2809 } "$flags -march=armv8-a"] } {
2810 set et_arm_v8_neon_flags $flags
2811 return 1
2812 }
2813 }
2814 }
2815
2816 return 0
2817 }
2818
2819 proc check_effective_target_arm_v8_neon_ok { } {
2820 return [check_cached_effective_target arm_v8_neon_ok \
2821 check_effective_target_arm_v8_neon_ok_nocache]
2822 }
2823
2824 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
2825 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2826 # incompatible with these options. Also set et_arm_neonv2_flags to the
2827 # best options to add.
2828
2829 proc check_effective_target_arm_neonv2_ok_nocache { } {
2830 global et_arm_neonv2_flags
2831 set et_arm_neonv2_flags ""
2832 if { [check_effective_target_arm32] } {
2833 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
2834 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
2835 #include "arm_neon.h"
2836 float32x2_t
2837 foo (float32x2_t a, float32x2_t b, float32x2_t c)
2838 {
2839 return vfma_f32 (a, b, c);
2840 }
2841 } "$flags"] } {
2842 set et_arm_neonv2_flags $flags
2843 return 1
2844 }
2845 }
2846 }
2847
2848 return 0
2849 }
2850
2851 proc check_effective_target_arm_neonv2_ok { } {
2852 return [check_cached_effective_target arm_neonv2_ok \
2853 check_effective_target_arm_neonv2_ok_nocache]
2854 }
2855
2856 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2857 # or -mfloat-abi=hard, but if one is already specified by the
2858 # multilib, use it.
2859
2860 proc add_options_for_arm_fp16 { flags } {
2861 if { ! [check_effective_target_arm_fp16_ok] } {
2862 return "$flags"
2863 }
2864 global et_arm_fp16_flags
2865 return "$flags $et_arm_fp16_flags"
2866 }
2867
2868 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
2869 # Skip multilibs that are incompatible with these options and set
2870 # et_arm_fp16_flags to the best options to add.
2871
2872 proc check_effective_target_arm_fp16_ok_nocache { } {
2873 global et_arm_fp16_flags
2874 set et_arm_fp16_flags ""
2875 if { ! [check_effective_target_arm32] } {
2876 return 0;
2877 }
2878 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" "-mfpu=*fpv[1-9][0-9]*" } ]] {
2879 # Multilib flags would override -mfpu.
2880 return 0
2881 }
2882 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
2883 # Must generate floating-point instructions.
2884 return 0
2885 }
2886 if [check_effective_target_arm_hf_eabi] {
2887 # Use existing float-abi and force an fpu which supports fp16
2888 set et_arm_fp16_flags "-mfpu=vfpv4"
2889 return 1;
2890 }
2891 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
2892 # The existing -mfpu value is OK; use it, but add softfp.
2893 set et_arm_fp16_flags "-mfloat-abi=softfp"
2894 return 1;
2895 }
2896 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
2897 # macro to check for this support.
2898 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
2899 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
2900 int dummy;
2901 } "$flags"] } {
2902 set et_arm_fp16_flags "$flags"
2903 return 1
2904 }
2905
2906 return 0
2907 }
2908
2909 proc check_effective_target_arm_fp16_ok { } {
2910 return [check_cached_effective_target arm_fp16_ok \
2911 check_effective_target_arm_fp16_ok_nocache]
2912 }
2913
2914 # Creates a series of routines that return 1 if the given architecture
2915 # can be selected and a routine to give the flags to select that architecture
2916 # Note: Extra flags may be added to disable options from newer compilers
2917 # (Thumb in particular - but others may be added in the future)
2918 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
2919 # /* { dg-add-options arm_arch_v5 } */
2920 # /* { dg-require-effective-target arm_arch_v5_multilib } */
2921 foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__
2922 v4t "-march=armv4t" __ARM_ARCH_4T__
2923 v5 "-march=armv5 -marm" __ARM_ARCH_5__
2924 v5t "-march=armv5t" __ARM_ARCH_5T__
2925 v5te "-march=armv5te" __ARM_ARCH_5TE__
2926 v6 "-march=armv6" __ARM_ARCH_6__
2927 v6k "-march=armv6k" __ARM_ARCH_6K__
2928 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
2929 v6z "-march=armv6z" __ARM_ARCH_6Z__
2930 v6m "-march=armv6-m -mthumb" __ARM_ARCH_6M__
2931 v7a "-march=armv7-a" __ARM_ARCH_7A__
2932 v7ve "-march=armv7ve" __ARM_ARCH_7A__
2933 v7r "-march=armv7-r" __ARM_ARCH_7R__
2934 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
2935 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
2936 v8a "-march=armv8-a" __ARM_ARCH_8A__ } {
2937 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
2938 proc check_effective_target_arm_arch_FUNC_ok { } {
2939 if { [ string match "*-marm*" "FLAG" ] &&
2940 ![check_effective_target_arm_arm_ok] } {
2941 return 0
2942 }
2943 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
2944 #if !defined (DEF)
2945 #error !DEF
2946 #endif
2947 } "FLAG" ]
2948 }
2949
2950 proc add_options_for_arm_arch_FUNC { flags } {
2951 return "$flags FLAG"
2952 }
2953
2954 proc check_effective_target_arm_arch_FUNC_multilib { } {
2955 return [check_runtime arm_arch_FUNC_multilib {
2956 int
2957 main (void)
2958 {
2959 return 0;
2960 }
2961 } [add_options_for_arm_arch_FUNC ""]]
2962 }
2963 }]
2964 }
2965
2966 # Return 1 if this is an ARM target where -marm causes ARM to be
2967 # used (not Thumb)
2968
2969 proc check_effective_target_arm_arm_ok { } {
2970 return [check_no_compiler_messages arm_arm_ok assembly {
2971 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
2972 #error !__arm__ || __thumb__ || __thumb2__
2973 #endif
2974 } "-marm"]
2975 }
2976
2977
2978 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
2979 # used.
2980
2981 proc check_effective_target_arm_thumb1_ok { } {
2982 return [check_no_compiler_messages arm_thumb1_ok assembly {
2983 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
2984 #error !__arm__ || !__thumb__ || __thumb2__
2985 #endif
2986 int foo (int i) { return i; }
2987 } "-mthumb"]
2988 }
2989
2990 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
2991 # used.
2992
2993 proc check_effective_target_arm_thumb2_ok { } {
2994 return [check_no_compiler_messages arm_thumb2_ok assembly {
2995 #if !defined(__thumb2__)
2996 #error !__thumb2__
2997 #endif
2998 int foo (int i) { return i; }
2999 } "-mthumb"]
3000 }
3001
3002 # Return 1 if this is an ARM target where Thumb-1 is used without options
3003 # added by the test.
3004
3005 proc check_effective_target_arm_thumb1 { } {
3006 return [check_no_compiler_messages arm_thumb1 assembly {
3007 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3008 #error !__arm__ || !__thumb__ || __thumb2__
3009 #endif
3010 int i;
3011 } ""]
3012 }
3013
3014 # Return 1 if this is an ARM target where Thumb-2 is used without options
3015 # added by the test.
3016
3017 proc check_effective_target_arm_thumb2 { } {
3018 return [check_no_compiler_messages arm_thumb2 assembly {
3019 #if !defined(__thumb2__)
3020 #error !__thumb2__
3021 #endif
3022 int i;
3023 } ""]
3024 }
3025
3026 # Return 1 if this is an ARM target where conditional execution is available.
3027
3028 proc check_effective_target_arm_cond_exec { } {
3029 return [check_no_compiler_messages arm_cond_exec assembly {
3030 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
3031 #error FOO
3032 #endif
3033 int i;
3034 } ""]
3035 }
3036
3037 # Return 1 if this is an ARM cortex-M profile cpu
3038
3039 proc check_effective_target_arm_cortex_m { } {
3040 if { ![istarget arm*-*-*] } {
3041 return 0
3042 }
3043 return [check_no_compiler_messages arm_cortex_m assembly {
3044 #if !defined(__ARM_ARCH_7M__) \
3045 && !defined (__ARM_ARCH_7EM__) \
3046 && !defined (__ARM_ARCH_6M__)
3047 #error !__ARM_ARCH_7M__ && !__ARM_ARCH_7EM__ && !__ARM_ARCH_6M__
3048 #endif
3049 int i;
3050 } "-mthumb"]
3051 }
3052
3053 # Return 1 if this compilation turns on string_ops_prefer_neon on.
3054
3055 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
3056 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
3057 int foo (void) { return 0; }
3058 } "-O2 -mprint-tune-info" ]
3059 }
3060
3061 # Return 1 if the target supports executing NEON instructions, 0
3062 # otherwise. Cache the result.
3063
3064 proc check_effective_target_arm_neon_hw { } {
3065 return [check_runtime arm_neon_hw_available {
3066 int
3067 main (void)
3068 {
3069 long long a = 0, b = 1;
3070 asm ("vorr %P0, %P1, %P2"
3071 : "=w" (a)
3072 : "0" (a), "w" (b));
3073 return (a != 1);
3074 }
3075 } [add_options_for_arm_neon ""]]
3076 }
3077
3078 proc check_effective_target_arm_neonv2_hw { } {
3079 return [check_runtime arm_neon_hwv2_available {
3080 #include "arm_neon.h"
3081 int
3082 main (void)
3083 {
3084 float32x2_t a, b, c;
3085 asm ("vfma.f32 %P0, %P1, %P2"
3086 : "=w" (a)
3087 : "w" (b), "w" (c));
3088 return 0;
3089 }
3090 } [add_options_for_arm_neonv2 ""]]
3091 }
3092
3093 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
3094 # otherwise.
3095
3096 proc check_effective_target_arm_v8_neon_hw { } {
3097 return [check_runtime arm_v8_neon_hw_available {
3098 #include "arm_neon.h"
3099 int
3100 main (void)
3101 {
3102 float32x2_t a;
3103 asm ("vrinta.f32 %P0, %P1"
3104 : "=w" (a)
3105 : "0" (a));
3106 return 0;
3107 }
3108 } [add_options_for_arm_v8_neon ""]]
3109 }
3110
3111 # Return 1 if this is a ARM target with NEON enabled.
3112
3113 proc check_effective_target_arm_neon { } {
3114 if { [check_effective_target_arm32] } {
3115 return [check_no_compiler_messages arm_neon object {
3116 #ifndef __ARM_NEON__
3117 #error not NEON
3118 #else
3119 int dummy;
3120 #endif
3121 }]
3122 } else {
3123 return 0
3124 }
3125 }
3126
3127 proc check_effective_target_arm_neonv2 { } {
3128 if { [check_effective_target_arm32] } {
3129 return [check_no_compiler_messages arm_neon object {
3130 #ifndef __ARM_NEON__
3131 #error not NEON
3132 #else
3133 #ifndef __ARM_FEATURE_FMA
3134 #error not NEONv2
3135 #else
3136 int dummy;
3137 #endif
3138 #endif
3139 }]
3140 } else {
3141 return 0
3142 }
3143 }
3144
3145 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
3146 # the Loongson vector modes.
3147
3148 proc check_effective_target_mips_loongson { } {
3149 return [check_no_compiler_messages loongson assembly {
3150 #if !defined(__mips_loongson_vector_rev)
3151 #error !__mips_loongson_vector_rev
3152 #endif
3153 }]
3154 }
3155
3156 # Return 1 if this is a MIPS target that supports the legacy NAN.
3157
3158 proc check_effective_target_mips_nanlegacy { } {
3159 return [check_no_compiler_messages nanlegacy assembly {
3160 #include <stdlib.h>
3161 int main () { return 0; }
3162 } "-mnan=legacy"]
3163 }
3164
3165 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
3166 # Architecture.
3167
3168 proc check_effective_target_arm_eabi { } {
3169 return [check_no_compiler_messages arm_eabi object {
3170 #ifndef __ARM_EABI__
3171 #error not EABI
3172 #else
3173 int dummy;
3174 #endif
3175 }]
3176 }
3177
3178 # Return 1 if this is an ARM target that adheres to the hard-float variant of
3179 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
3180
3181 proc check_effective_target_arm_hf_eabi { } {
3182 return [check_no_compiler_messages arm_hf_eabi object {
3183 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
3184 #error not hard-float EABI
3185 #else
3186 int dummy;
3187 #endif
3188 }]
3189 }
3190
3191 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
3192 # Some multilibs may be incompatible with this option.
3193
3194 proc check_effective_target_arm_iwmmxt_ok { } {
3195 if { [check_effective_target_arm32] } {
3196 return [check_no_compiler_messages arm_iwmmxt_ok object {
3197 int dummy;
3198 } "-mcpu=iwmmxt"]
3199 } else {
3200 return 0
3201 }
3202 }
3203
3204 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
3205 # for an ARM target.
3206 proc check_effective_target_arm_prefer_ldrd_strd { } {
3207 if { ![check_effective_target_arm32] } {
3208 return 0;
3209 }
3210
3211 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
3212 void foo (int *p) { p[0] = 1; p[1] = 0;}
3213 } "-O2 -mthumb" ]
3214 }
3215
3216 # Return 1 if this is a PowerPC target supporting -meabi.
3217
3218 proc check_effective_target_powerpc_eabi_ok { } {
3219 if { [istarget powerpc*-*-*] } {
3220 return [check_no_compiler_messages powerpc_eabi_ok object {
3221 int dummy;
3222 } "-meabi"]
3223 } else {
3224 return 0
3225 }
3226 }
3227
3228 # Return 1 if this is a PowerPC target with floating-point registers.
3229
3230 proc check_effective_target_powerpc_fprs { } {
3231 if { [istarget powerpc*-*-*]
3232 || [istarget rs6000-*-*] } {
3233 return [check_no_compiler_messages powerpc_fprs object {
3234 #ifdef __NO_FPRS__
3235 #error no FPRs
3236 #else
3237 int dummy;
3238 #endif
3239 }]
3240 } else {
3241 return 0
3242 }
3243 }
3244
3245 # Return 1 if this is a PowerPC target with hardware double-precision
3246 # floating point.
3247
3248 proc check_effective_target_powerpc_hard_double { } {
3249 if { [istarget powerpc*-*-*]
3250 || [istarget rs6000-*-*] } {
3251 return [check_no_compiler_messages powerpc_hard_double object {
3252 #ifdef _SOFT_DOUBLE
3253 #error soft double
3254 #else
3255 int dummy;
3256 #endif
3257 }]
3258 } else {
3259 return 0
3260 }
3261 }
3262
3263 # Return 1 if this is a PowerPC target supporting -maltivec.
3264
3265 proc check_effective_target_powerpc_altivec_ok { } {
3266 if { ([istarget powerpc*-*-*]
3267 && ![istarget powerpc-*-linux*paired*])
3268 || [istarget rs6000-*-*] } {
3269 # AltiVec is not supported on AIX before 5.3.
3270 if { [istarget powerpc*-*-aix4*]
3271 || [istarget powerpc*-*-aix5.1*]
3272 || [istarget powerpc*-*-aix5.2*] } {
3273 return 0
3274 }
3275 return [check_no_compiler_messages powerpc_altivec_ok object {
3276 int dummy;
3277 } "-maltivec"]
3278 } else {
3279 return 0
3280 }
3281 }
3282
3283 # Return 1 if this is a PowerPC target supporting -mpower8-vector
3284
3285 proc check_effective_target_powerpc_p8vector_ok { } {
3286 if { ([istarget powerpc*-*-*]
3287 && ![istarget powerpc-*-linux*paired*])
3288 || [istarget rs6000-*-*] } {
3289 # AltiVec is not supported on AIX before 5.3.
3290 if { [istarget powerpc*-*-aix4*]
3291 || [istarget powerpc*-*-aix5.1*]
3292 || [istarget powerpc*-*-aix5.2*] } {
3293 return 0
3294 }
3295 return [check_no_compiler_messages powerpc_p8vector_ok object {
3296 int main (void) {
3297 #ifdef __MACH__
3298 asm volatile ("xxlorc vs0,vs0,vs0");
3299 #else
3300 asm volatile ("xxlorc 0,0,0");
3301 #endif
3302 return 0;
3303 }
3304 } "-mpower8-vector"]
3305 } else {
3306 return 0
3307 }
3308 }
3309
3310 # Return 1 if this is a PowerPC target supporting -mvsx
3311
3312 proc check_effective_target_powerpc_vsx_ok { } {
3313 if { ([istarget powerpc*-*-*]
3314 && ![istarget powerpc-*-linux*paired*])
3315 || [istarget rs6000-*-*] } {
3316 # VSX is not supported on AIX before 7.1.
3317 if { [istarget powerpc*-*-aix4*]
3318 || [istarget powerpc*-*-aix5*]
3319 || [istarget powerpc*-*-aix6*] } {
3320 return 0
3321 }
3322 return [check_no_compiler_messages powerpc_vsx_ok object {
3323 int main (void) {
3324 #ifdef __MACH__
3325 asm volatile ("xxlor vs0,vs0,vs0");
3326 #else
3327 asm volatile ("xxlor 0,0,0");
3328 #endif
3329 return 0;
3330 }
3331 } "-mvsx"]
3332 } else {
3333 return 0
3334 }
3335 }
3336
3337 # Return 1 if this is a PowerPC target supporting -mhtm
3338
3339 proc check_effective_target_powerpc_htm_ok { } {
3340 if { ([istarget powerpc*-*-*]
3341 && ![istarget powerpc-*-linux*paired*])
3342 || [istarget rs6000-*-*] } {
3343 # HTM is not supported on AIX yet.
3344 if { [istarget powerpc*-*-aix*] } {
3345 return 0
3346 }
3347 return [check_no_compiler_messages powerpc_htm_ok object {
3348 int main (void) {
3349 asm volatile ("tbegin. 0");
3350 return 0;
3351 }
3352 } "-mhtm"]
3353 } else {
3354 return 0
3355 }
3356 }
3357
3358 # Return 1 if the target supports executing HTM hardware instructions,
3359 # 0 otherwise. Cache the result.
3360
3361 proc check_htm_hw_available { } {
3362 return [check_cached_effective_target htm_hw_available {
3363 # For now, disable on Darwin
3364 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
3365 expr 0
3366 } else {
3367 check_runtime_nocache htm_hw_available {
3368 int main()
3369 {
3370 __builtin_ttest ();
3371 return 0;
3372 }
3373 } "-mhtm"
3374 }
3375 }]
3376 }
3377 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
3378
3379 proc check_effective_target_powerpc_ppu_ok { } {
3380 if [check_effective_target_powerpc_altivec_ok] {
3381 return [check_no_compiler_messages cell_asm_available object {
3382 int main (void) {
3383 #ifdef __MACH__
3384 asm volatile ("lvlx v0,v0,v0");
3385 #else
3386 asm volatile ("lvlx 0,0,0");
3387 #endif
3388 return 0;
3389 }
3390 }]
3391 } else {
3392 return 0
3393 }
3394 }
3395
3396 # Return 1 if this is a PowerPC target that supports SPU.
3397
3398 proc check_effective_target_powerpc_spu { } {
3399 if { [istarget powerpc*-*-linux*] } {
3400 return [check_effective_target_powerpc_altivec_ok]
3401 } else {
3402 return 0
3403 }
3404 }
3405
3406 # Return 1 if this is a PowerPC SPE target. The check includes options
3407 # specified by dg-options for this test, so don't cache the result.
3408
3409 proc check_effective_target_powerpc_spe_nocache { } {
3410 if { [istarget powerpc*-*-*] } {
3411 return [check_no_compiler_messages_nocache powerpc_spe object {
3412 #ifndef __SPE__
3413 #error not SPE
3414 #else
3415 int dummy;
3416 #endif
3417 } [current_compiler_flags]]
3418 } else {
3419 return 0
3420 }
3421 }
3422
3423 # Return 1 if this is a PowerPC target with SPE enabled.
3424
3425 proc check_effective_target_powerpc_spe { } {
3426 if { [istarget powerpc*-*-*] } {
3427 return [check_no_compiler_messages powerpc_spe object {
3428 #ifndef __SPE__
3429 #error not SPE
3430 #else
3431 int dummy;
3432 #endif
3433 }]
3434 } else {
3435 return 0
3436 }
3437 }
3438
3439 # Return 1 if this is a PowerPC target with Altivec enabled.
3440
3441 proc check_effective_target_powerpc_altivec { } {
3442 if { [istarget powerpc*-*-*] } {
3443 return [check_no_compiler_messages powerpc_altivec object {
3444 #ifndef __ALTIVEC__
3445 #error not Altivec
3446 #else
3447 int dummy;
3448 #endif
3449 }]
3450 } else {
3451 return 0
3452 }
3453 }
3454
3455 # Return 1 if this is a PowerPC 405 target. The check includes options
3456 # specified by dg-options for this test, so don't cache the result.
3457
3458 proc check_effective_target_powerpc_405_nocache { } {
3459 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
3460 return [check_no_compiler_messages_nocache powerpc_405 object {
3461 #ifdef __PPC405__
3462 int dummy;
3463 #else
3464 #error not a PPC405
3465 #endif
3466 } [current_compiler_flags]]
3467 } else {
3468 return 0
3469 }
3470 }
3471
3472 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
3473
3474 proc check_effective_target_powerpc_elfv2 { } {
3475 if { [istarget powerpc*-*-*] } {
3476 return [check_no_compiler_messages powerpc_elfv2 object {
3477 #if _CALL_ELF != 2
3478 #error not ELF v2 ABI
3479 #else
3480 int dummy;
3481 #endif
3482 }]
3483 } else {
3484 return 0
3485 }
3486 }
3487
3488 # Return 1 if this is a SPU target with a toolchain that
3489 # supports automatic overlay generation.
3490
3491 proc check_effective_target_spu_auto_overlay { } {
3492 if { [istarget spu*-*-elf*] } {
3493 return [check_no_compiler_messages spu_auto_overlay executable {
3494 int main (void) { }
3495 } "-Wl,--auto-overlay" ]
3496 } else {
3497 return 0
3498 }
3499 }
3500
3501 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
3502 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
3503 # test environment appears to run executables on such a simulator.
3504
3505 proc check_effective_target_ultrasparc_hw { } {
3506 return [check_runtime ultrasparc_hw {
3507 int main() { return 0; }
3508 } "-mcpu=ultrasparc"]
3509 }
3510
3511 # Return 1 if the test environment supports executing UltraSPARC VIS2
3512 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
3513
3514 proc check_effective_target_ultrasparc_vis2_hw { } {
3515 return [check_runtime ultrasparc_vis2_hw {
3516 int main() { __asm__(".word 0x81b00320"); return 0; }
3517 } "-mcpu=ultrasparc3"]
3518 }
3519
3520 # Return 1 if the test environment supports executing UltraSPARC VIS3
3521 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
3522
3523 proc check_effective_target_ultrasparc_vis3_hw { } {
3524 return [check_runtime ultrasparc_vis3_hw {
3525 int main() { __asm__(".word 0x81b00220"); return 0; }
3526 } "-mcpu=niagara3"]
3527 }
3528
3529 # Return 1 if this is a SPARC-V9 target.
3530
3531 proc check_effective_target_sparc_v9 { } {
3532 if { [istarget sparc*-*-*] } {
3533 return [check_no_compiler_messages sparc_v9 object {
3534 int main (void) {
3535 asm volatile ("return %i7+8");
3536 return 0;
3537 }
3538 }]
3539 } else {
3540 return 0
3541 }
3542 }
3543
3544 # Return 1 if this is a SPARC target with VIS enabled.
3545
3546 proc check_effective_target_sparc_vis { } {
3547 if { [istarget sparc*-*-*] } {
3548 return [check_no_compiler_messages sparc_vis object {
3549 #ifndef __VIS__
3550 #error not VIS
3551 #else
3552 int dummy;
3553 #endif
3554 }]
3555 } else {
3556 return 0
3557 }
3558 }
3559
3560 # Return 1 if the target supports hardware vector shift operation.
3561
3562 proc check_effective_target_vect_shift { } {
3563 global et_vect_shift_saved
3564
3565 if [info exists et_vect_shift_saved] {
3566 verbose "check_effective_target_vect_shift: using cached result" 2
3567 } else {
3568 set et_vect_shift_saved 0
3569 if { ([istarget powerpc*-*-*]
3570 && ![istarget powerpc-*-linux*paired*])
3571 || [istarget ia64-*-*]
3572 || [istarget i?86-*-*] || [istarget x86_64-*-*]
3573 || [istarget aarch64*-*-*]
3574 || [check_effective_target_arm32]
3575 || ([istarget mips*-*-*]
3576 && [check_effective_target_mips_loongson]) } {
3577 set et_vect_shift_saved 1
3578 }
3579 }
3580
3581 verbose "check_effective_target_vect_shift: returning $et_vect_shift_saved" 2
3582 return $et_vect_shift_saved
3583 }
3584
3585 proc check_effective_target_whole_vector_shift { } {
3586 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3587 || [istarget ia64-*-*]
3588 || [istarget aarch64*-*-*]
3589 || ([check_effective_target_arm32]
3590 && [check_effective_target_arm_little_endian])
3591 || ([istarget mips*-*-*]
3592 && [check_effective_target_mips_loongson]) } {
3593 set answer 1
3594 } else {
3595 set answer 0
3596 }
3597
3598 verbose "check_effective_target_vect_long: returning $answer" 2
3599 return $answer
3600 }
3601
3602 # Return 1 if the target supports vector bswap operations.
3603
3604 proc check_effective_target_vect_bswap { } {
3605 global et_vect_bswap_saved
3606
3607 if [info exists et_vect_bswap_saved] {
3608 verbose "check_effective_target_vect_bswap: using cached result" 2
3609 } else {
3610 set et_vect_bswap_saved 0
3611 if { [istarget aarch64*-*-*]
3612 || ([istarget arm*-*-*]
3613 && [check_effective_target_arm_neon])
3614 } {
3615 set et_vect_bswap_saved 1
3616 }
3617 }
3618
3619 verbose "check_effective_target_vect_bswap: returning $et_vect_bswap_saved" 2
3620 return $et_vect_bswap_saved
3621 }
3622
3623 # Return 1 if the target supports hardware vector shift operation for char.
3624
3625 proc check_effective_target_vect_shift_char { } {
3626 global et_vect_shift_char_saved
3627
3628 if [info exists et_vect_shift_char_saved] {
3629 verbose "check_effective_target_vect_shift_char: using cached result" 2
3630 } else {
3631 set et_vect_shift_char_saved 0
3632 if { ([istarget powerpc*-*-*]
3633 && ![istarget powerpc-*-linux*paired*])
3634 || [check_effective_target_arm32] } {
3635 set et_vect_shift_char_saved 1
3636 }
3637 }
3638
3639 verbose "check_effective_target_vect_shift_char: returning $et_vect_shift_char_saved" 2
3640 return $et_vect_shift_char_saved
3641 }
3642
3643 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
3644 #
3645 # This can change for different subtargets so do not cache the result.
3646
3647 proc check_effective_target_vect_long { } {
3648 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3649 || (([istarget powerpc*-*-*]
3650 && ![istarget powerpc-*-linux*paired*])
3651 && [check_effective_target_ilp32])
3652 || [check_effective_target_arm32]
3653 || ([istarget sparc*-*-*] && [check_effective_target_ilp32]) } {
3654 set answer 1
3655 } else {
3656 set answer 0
3657 }
3658
3659 verbose "check_effective_target_vect_long: returning $answer" 2
3660 return $answer
3661 }
3662
3663 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
3664 #
3665 # This won't change for different subtargets so cache the result.
3666
3667 proc check_effective_target_vect_float { } {
3668 global et_vect_float_saved
3669
3670 if [info exists et_vect_float_saved] {
3671 verbose "check_effective_target_vect_float: using cached result" 2
3672 } else {
3673 set et_vect_float_saved 0
3674 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3675 || [istarget powerpc*-*-*]
3676 || [istarget spu-*-*]
3677 || [istarget mips-sde-elf]
3678 || [istarget mipsisa64*-*-*]
3679 || [istarget ia64-*-*]
3680 || [istarget aarch64*-*-*]
3681 || [check_effective_target_arm32] } {
3682 set et_vect_float_saved 1
3683 }
3684 }
3685
3686 verbose "check_effective_target_vect_float: returning $et_vect_float_saved" 2
3687 return $et_vect_float_saved
3688 }
3689
3690 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
3691 #
3692 # This won't change for different subtargets so cache the result.
3693
3694 proc check_effective_target_vect_double { } {
3695 global et_vect_double_saved
3696
3697 if [info exists et_vect_double_saved] {
3698 verbose "check_effective_target_vect_double: using cached result" 2
3699 } else {
3700 set et_vect_double_saved 0
3701 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3702 || [istarget aarch64*-*-*] } {
3703 if { [check_no_compiler_messages vect_double assembly {
3704 #ifdef __tune_atom__
3705 # error No double vectorizer support.
3706 #endif
3707 }] } {
3708 set et_vect_double_saved 1
3709 } else {
3710 set et_vect_double_saved 0
3711 }
3712 } elseif { [istarget spu-*-*] } {
3713 set et_vect_double_saved 1
3714 }
3715 }
3716
3717 verbose "check_effective_target_vect_double: returning $et_vect_double_saved" 2
3718 return $et_vect_double_saved
3719 }
3720
3721 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
3722 #
3723 # This won't change for different subtargets so cache the result.
3724
3725 proc check_effective_target_vect_long_long { } {
3726 global et_vect_long_long_saved
3727
3728 if [info exists et_vect_long_long_saved] {
3729 verbose "check_effective_target_vect_long_long: using cached result" 2
3730 } else {
3731 set et_vect_long_long_saved 0
3732 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
3733 set et_vect_long_long_saved 1
3734 }
3735 }
3736
3737 verbose "check_effective_target_vect_long_long: returning $et_vect_long_long_saved" 2
3738 return $et_vect_long_long_saved
3739 }
3740
3741
3742 # Return 1 if the target plus current options does not support a vector
3743 # max instruction on "int", 0 otherwise.
3744 #
3745 # This won't change for different subtargets so cache the result.
3746
3747 proc check_effective_target_vect_no_int_min_max { } {
3748 global et_vect_no_int_min_max_saved
3749
3750 if [info exists et_vect_no_int_min_max_saved] {
3751 verbose "check_effective_target_vect_no_int_min_max: using cached result" 2
3752 } else {
3753 set et_vect_no_int_min_max_saved 0
3754 if { [istarget sparc*-*-*]
3755 || [istarget spu-*-*]
3756 || [istarget alpha*-*-*]
3757 || ([istarget mips*-*-*]
3758 && [check_effective_target_mips_loongson]) } {
3759 set et_vect_no_int_min_max_saved 1
3760 }
3761 }
3762 verbose "check_effective_target_vect_no_int_min_max: returning $et_vect_no_int_min_max_saved" 2
3763 return $et_vect_no_int_min_max_saved
3764 }
3765
3766 # Return 1 if the target plus current options does not support a vector
3767 # add instruction on "int", 0 otherwise.
3768 #
3769 # This won't change for different subtargets so cache the result.
3770
3771 proc check_effective_target_vect_no_int_add { } {
3772 global et_vect_no_int_add_saved
3773
3774 if [info exists et_vect_no_int_add_saved] {
3775 verbose "check_effective_target_vect_no_int_add: using cached result" 2
3776 } else {
3777 set et_vect_no_int_add_saved 0
3778 # Alpha only supports vector add on V8QI and V4HI.
3779 if { [istarget alpha*-*-*] } {
3780 set et_vect_no_int_add_saved 1
3781 }
3782 }
3783 verbose "check_effective_target_vect_no_int_add: returning $et_vect_no_int_add_saved" 2
3784 return $et_vect_no_int_add_saved
3785 }
3786
3787 # Return 1 if the target plus current options does not support vector
3788 # bitwise instructions, 0 otherwise.
3789 #
3790 # This won't change for different subtargets so cache the result.
3791
3792 proc check_effective_target_vect_no_bitwise { } {
3793 global et_vect_no_bitwise_saved
3794
3795 if [info exists et_vect_no_bitwise_saved] {
3796 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
3797 } else {
3798 set et_vect_no_bitwise_saved 0
3799 }
3800 verbose "check_effective_target_vect_no_bitwise: returning $et_vect_no_bitwise_saved" 2
3801 return $et_vect_no_bitwise_saved
3802 }
3803
3804 # Return 1 if the target plus current options supports vector permutation,
3805 # 0 otherwise.
3806 #
3807 # This won't change for different subtargets so cache the result.
3808
3809 proc check_effective_target_vect_perm { } {
3810 global et_vect_perm
3811
3812 if [info exists et_vect_perm_saved] {
3813 verbose "check_effective_target_vect_perm: using cached result" 2
3814 } else {
3815 set et_vect_perm_saved 0
3816 if { [is-effective-target arm_neon_ok]
3817 || [istarget aarch64*-*-*]
3818 || [istarget powerpc*-*-*]
3819 || [istarget spu-*-*]
3820 || [istarget i?86-*-*] || [istarget x86_64-*-*]
3821 || ([istarget mips*-*-*]
3822 && [check_effective_target_mpaired_single]) } {
3823 set et_vect_perm_saved 1
3824 }
3825 }
3826 verbose "check_effective_target_vect_perm: returning $et_vect_perm_saved" 2
3827 return $et_vect_perm_saved
3828 }
3829
3830 # Return 1 if the target plus current options supports vector permutation
3831 # on byte-sized elements, 0 otherwise.
3832 #
3833 # This won't change for different subtargets so cache the result.
3834
3835 proc check_effective_target_vect_perm_byte { } {
3836 global et_vect_perm_byte
3837
3838 if [info exists et_vect_perm_byte_saved] {
3839 verbose "check_effective_target_vect_perm_byte: using cached result" 2
3840 } else {
3841 set et_vect_perm_byte_saved 0
3842 if { ([is-effective-target arm_neon_ok]
3843 && [is-effective-target arm_little_endian])
3844 || ([istarget aarch64*-*-*]
3845 && [is-effective-target aarch64_little_endian])
3846 || [istarget powerpc*-*-*]
3847 || [istarget spu-*-*] } {
3848 set et_vect_perm_byte_saved 1
3849 }
3850 }
3851 verbose "check_effective_target_vect_perm_byte: returning $et_vect_perm_byte_saved" 2
3852 return $et_vect_perm_byte_saved
3853 }
3854
3855 # Return 1 if the target plus current options supports vector permutation
3856 # on short-sized elements, 0 otherwise.
3857 #
3858 # This won't change for different subtargets so cache the result.
3859
3860 proc check_effective_target_vect_perm_short { } {
3861 global et_vect_perm_short
3862
3863 if [info exists et_vect_perm_short_saved] {
3864 verbose "check_effective_target_vect_perm_short: using cached result" 2
3865 } else {
3866 set et_vect_perm_short_saved 0
3867 if { ([is-effective-target arm_neon_ok]
3868 && [is-effective-target arm_little_endian])
3869 || ([istarget aarch64*-*-*]
3870 && [is-effective-target aarch64_little_endian])
3871 || [istarget powerpc*-*-*]
3872 || [istarget spu-*-*] } {
3873 set et_vect_perm_short_saved 1
3874 }
3875 }
3876 verbose "check_effective_target_vect_perm_short: returning $et_vect_perm_short_saved" 2
3877 return $et_vect_perm_short_saved
3878 }
3879
3880 # Return 1 if the target plus current options supports a vector
3881 # widening summation of *short* args into *int* result, 0 otherwise.
3882 #
3883 # This won't change for different subtargets so cache the result.
3884
3885 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
3886 global et_vect_widen_sum_hi_to_si_pattern
3887
3888 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved] {
3889 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: using cached result" 2
3890 } else {
3891 set et_vect_widen_sum_hi_to_si_pattern_saved 0
3892 if { [istarget powerpc*-*-*]
3893 || [istarget ia64-*-*] } {
3894 set et_vect_widen_sum_hi_to_si_pattern_saved 1
3895 }
3896 }
3897 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: returning $et_vect_widen_sum_hi_to_si_pattern_saved" 2
3898 return $et_vect_widen_sum_hi_to_si_pattern_saved
3899 }
3900
3901 # Return 1 if the target plus current options supports a vector
3902 # widening summation of *short* args into *int* result, 0 otherwise.
3903 # A target can also support this widening summation if it can support
3904 # promotion (unpacking) from shorts to ints.
3905 #
3906 # This won't change for different subtargets so cache the result.
3907
3908 proc check_effective_target_vect_widen_sum_hi_to_si { } {
3909 global et_vect_widen_sum_hi_to_si
3910
3911 if [info exists et_vect_widen_sum_hi_to_si_saved] {
3912 verbose "check_effective_target_vect_widen_sum_hi_to_si: using cached result" 2
3913 } else {
3914 set et_vect_widen_sum_hi_to_si_saved [check_effective_target_vect_unpack]
3915 if { [istarget powerpc*-*-*]
3916 || [istarget ia64-*-*] } {
3917 set et_vect_widen_sum_hi_to_si_saved 1
3918 }
3919 }
3920 verbose "check_effective_target_vect_widen_sum_hi_to_si: returning $et_vect_widen_sum_hi_to_si_saved" 2
3921 return $et_vect_widen_sum_hi_to_si_saved
3922 }
3923
3924 # Return 1 if the target plus current options supports a vector
3925 # widening summation of *char* args into *short* result, 0 otherwise.
3926 # A target can also support this widening summation if it can support
3927 # promotion (unpacking) from chars to shorts.
3928 #
3929 # This won't change for different subtargets so cache the result.
3930
3931 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
3932 global et_vect_widen_sum_qi_to_hi
3933
3934 if [info exists et_vect_widen_sum_qi_to_hi_saved] {
3935 verbose "check_effective_target_vect_widen_sum_qi_to_hi: using cached result" 2
3936 } else {
3937 set et_vect_widen_sum_qi_to_hi_saved 0
3938 if { [check_effective_target_vect_unpack]
3939 || [check_effective_target_arm_neon_ok]
3940 || [istarget ia64-*-*] } {
3941 set et_vect_widen_sum_qi_to_hi_saved 1
3942 }
3943 }
3944 verbose "check_effective_target_vect_widen_sum_qi_to_hi: returning $et_vect_widen_sum_qi_to_hi_saved" 2
3945 return $et_vect_widen_sum_qi_to_hi_saved
3946 }
3947
3948 # Return 1 if the target plus current options supports a vector
3949 # widening summation of *char* args into *int* result, 0 otherwise.
3950 #
3951 # This won't change for different subtargets so cache the result.
3952
3953 proc check_effective_target_vect_widen_sum_qi_to_si { } {
3954 global et_vect_widen_sum_qi_to_si
3955
3956 if [info exists et_vect_widen_sum_qi_to_si_saved] {
3957 verbose "check_effective_target_vect_widen_sum_qi_to_si: using cached result" 2
3958 } else {
3959 set et_vect_widen_sum_qi_to_si_saved 0
3960 if { [istarget powerpc*-*-*] } {
3961 set et_vect_widen_sum_qi_to_si_saved 1
3962 }
3963 }
3964 verbose "check_effective_target_vect_widen_sum_qi_to_si: returning $et_vect_widen_sum_qi_to_si_saved" 2
3965 return $et_vect_widen_sum_qi_to_si_saved
3966 }
3967
3968 # Return 1 if the target plus current options supports a vector
3969 # widening multiplication of *char* args into *short* result, 0 otherwise.
3970 # A target can also support this widening multplication if it can support
3971 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
3972 # multiplication of shorts).
3973 #
3974 # This won't change for different subtargets so cache the result.
3975
3976
3977 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
3978 global et_vect_widen_mult_qi_to_hi
3979
3980 if [info exists et_vect_widen_mult_qi_to_hi_saved] {
3981 verbose "check_effective_target_vect_widen_mult_qi_to_hi: using cached result" 2
3982 } else {
3983 if { [check_effective_target_vect_unpack]
3984 && [check_effective_target_vect_short_mult] } {
3985 set et_vect_widen_mult_qi_to_hi_saved 1
3986 } else {
3987 set et_vect_widen_mult_qi_to_hi_saved 0
3988 }
3989 if { [istarget powerpc*-*-*]
3990 || [istarget aarch64*-*-*]
3991 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
3992 set et_vect_widen_mult_qi_to_hi_saved 1
3993 }
3994 }
3995 verbose "check_effective_target_vect_widen_mult_qi_to_hi: returning $et_vect_widen_mult_qi_to_hi_saved" 2
3996 return $et_vect_widen_mult_qi_to_hi_saved
3997 }
3998
3999 # Return 1 if the target plus current options supports a vector
4000 # widening multiplication of *short* args into *int* result, 0 otherwise.
4001 # A target can also support this widening multplication if it can support
4002 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
4003 # multiplication of ints).
4004 #
4005 # This won't change for different subtargets so cache the result.
4006
4007
4008 proc check_effective_target_vect_widen_mult_hi_to_si { } {
4009 global et_vect_widen_mult_hi_to_si
4010
4011 if [info exists et_vect_widen_mult_hi_to_si_saved] {
4012 verbose "check_effective_target_vect_widen_mult_hi_to_si: using cached result" 2
4013 } else {
4014 if { [check_effective_target_vect_unpack]
4015 && [check_effective_target_vect_int_mult] } {
4016 set et_vect_widen_mult_hi_to_si_saved 1
4017 } else {
4018 set et_vect_widen_mult_hi_to_si_saved 0
4019 }
4020 if { [istarget powerpc*-*-*]
4021 || [istarget spu-*-*]
4022 || [istarget ia64-*-*]
4023 || [istarget aarch64*-*-*]
4024 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4025 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4026 set et_vect_widen_mult_hi_to_si_saved 1
4027 }
4028 }
4029 verbose "check_effective_target_vect_widen_mult_hi_to_si: returning $et_vect_widen_mult_hi_to_si_saved" 2
4030 return $et_vect_widen_mult_hi_to_si_saved
4031 }
4032
4033 # Return 1 if the target plus current options supports a vector
4034 # widening multiplication of *char* args into *short* result, 0 otherwise.
4035 #
4036 # This won't change for different subtargets so cache the result.
4037
4038 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
4039 global et_vect_widen_mult_qi_to_hi_pattern
4040
4041 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved] {
4042 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: using cached result" 2
4043 } else {
4044 set et_vect_widen_mult_qi_to_hi_pattern_saved 0
4045 if { [istarget powerpc*-*-*]
4046 || ([istarget arm*-*-*]
4047 && [check_effective_target_arm_neon_ok]
4048 && [check_effective_target_arm_little_endian]) } {
4049 set et_vect_widen_mult_qi_to_hi_pattern_saved 1
4050 }
4051 }
4052 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: returning $et_vect_widen_mult_qi_to_hi_pattern_saved" 2
4053 return $et_vect_widen_mult_qi_to_hi_pattern_saved
4054 }
4055
4056 # Return 1 if the target plus current options supports a vector
4057 # widening multiplication of *short* args into *int* result, 0 otherwise.
4058 #
4059 # This won't change for different subtargets so cache the result.
4060
4061 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
4062 global et_vect_widen_mult_hi_to_si_pattern
4063
4064 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved] {
4065 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: using cached result" 2
4066 } else {
4067 set et_vect_widen_mult_hi_to_si_pattern_saved 0
4068 if { [istarget powerpc*-*-*]
4069 || [istarget spu-*-*]
4070 || [istarget ia64-*-*]
4071 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4072 || ([istarget arm*-*-*]
4073 && [check_effective_target_arm_neon_ok]
4074 && [check_effective_target_arm_little_endian]) } {
4075 set et_vect_widen_mult_hi_to_si_pattern_saved 1
4076 }
4077 }
4078 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: returning $et_vect_widen_mult_hi_to_si_pattern_saved" 2
4079 return $et_vect_widen_mult_hi_to_si_pattern_saved
4080 }
4081
4082 # Return 1 if the target plus current options supports a vector
4083 # widening multiplication of *int* args into *long* result, 0 otherwise.
4084 #
4085 # This won't change for different subtargets so cache the result.
4086
4087 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
4088 global et_vect_widen_mult_si_to_di_pattern
4089
4090 if [info exists et_vect_widen_mult_si_to_di_pattern_saved] {
4091 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: using cached result" 2
4092 } else {
4093 set et_vect_widen_mult_si_to_di_pattern_saved 0
4094 if {[istarget ia64-*-*]
4095 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4096 set et_vect_widen_mult_si_to_di_pattern_saved 1
4097 }
4098 }
4099 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: returning $et_vect_widen_mult_si_to_di_pattern_saved" 2
4100 return $et_vect_widen_mult_si_to_di_pattern_saved
4101 }
4102
4103 # Return 1 if the target plus current options supports a vector
4104 # widening shift, 0 otherwise.
4105 #
4106 # This won't change for different subtargets so cache the result.
4107
4108 proc check_effective_target_vect_widen_shift { } {
4109 global et_vect_widen_shift_saved
4110
4111 if [info exists et_vect_shift_saved] {
4112 verbose "check_effective_target_vect_widen_shift: using cached result" 2
4113 } else {
4114 set et_vect_widen_shift_saved 0
4115 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4116 set et_vect_widen_shift_saved 1
4117 }
4118 }
4119 verbose "check_effective_target_vect_widen_shift: returning $et_vect_widen_shift_saved" 2
4120 return $et_vect_widen_shift_saved
4121 }
4122
4123 # Return 1 if the target plus current options supports a vector
4124 # dot-product of signed chars, 0 otherwise.
4125 #
4126 # This won't change for different subtargets so cache the result.
4127
4128 proc check_effective_target_vect_sdot_qi { } {
4129 global et_vect_sdot_qi
4130
4131 if [info exists et_vect_sdot_qi_saved] {
4132 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
4133 } else {
4134 set et_vect_sdot_qi_saved 0
4135 if { [istarget ia64-*-*] } {
4136 set et_vect_udot_qi_saved 1
4137 }
4138 }
4139 verbose "check_effective_target_vect_sdot_qi: returning $et_vect_sdot_qi_saved" 2
4140 return $et_vect_sdot_qi_saved
4141 }
4142
4143 # Return 1 if the target plus current options supports a vector
4144 # dot-product of unsigned chars, 0 otherwise.
4145 #
4146 # This won't change for different subtargets so cache the result.
4147
4148 proc check_effective_target_vect_udot_qi { } {
4149 global et_vect_udot_qi
4150
4151 if [info exists et_vect_udot_qi_saved] {
4152 verbose "check_effective_target_vect_udot_qi: using cached result" 2
4153 } else {
4154 set et_vect_udot_qi_saved 0
4155 if { [istarget powerpc*-*-*]
4156 || [istarget ia64-*-*] } {
4157 set et_vect_udot_qi_saved 1
4158 }
4159 }
4160 verbose "check_effective_target_vect_udot_qi: returning $et_vect_udot_qi_saved" 2
4161 return $et_vect_udot_qi_saved
4162 }
4163
4164 # Return 1 if the target plus current options supports a vector
4165 # dot-product of signed shorts, 0 otherwise.
4166 #
4167 # This won't change for different subtargets so cache the result.
4168
4169 proc check_effective_target_vect_sdot_hi { } {
4170 global et_vect_sdot_hi
4171
4172 if [info exists et_vect_sdot_hi_saved] {
4173 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
4174 } else {
4175 set et_vect_sdot_hi_saved 0
4176 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4177 || [istarget ia64-*-*]
4178 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4179 set et_vect_sdot_hi_saved 1
4180 }
4181 }
4182 verbose "check_effective_target_vect_sdot_hi: returning $et_vect_sdot_hi_saved" 2
4183 return $et_vect_sdot_hi_saved
4184 }
4185
4186 # Return 1 if the target plus current options supports a vector
4187 # dot-product of unsigned shorts, 0 otherwise.
4188 #
4189 # This won't change for different subtargets so cache the result.
4190
4191 proc check_effective_target_vect_udot_hi { } {
4192 global et_vect_udot_hi
4193
4194 if [info exists et_vect_udot_hi_saved] {
4195 verbose "check_effective_target_vect_udot_hi: using cached result" 2
4196 } else {
4197 set et_vect_udot_hi_saved 0
4198 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) } {
4199 set et_vect_udot_hi_saved 1
4200 }
4201 }
4202 verbose "check_effective_target_vect_udot_hi: returning $et_vect_udot_hi_saved" 2
4203 return $et_vect_udot_hi_saved
4204 }
4205
4206 # Return 1 if the target plus current options supports a vector
4207 # sad operation of unsigned chars, 0 otherwise.
4208 #
4209 # This won't change for different subtargets so cache the result.
4210
4211 proc check_effective_target_vect_usad_char { } {
4212 global et_vect_usad_char
4213
4214 if [info exists et_vect_usad_char_saved] {
4215 verbose "check_effective_target_vect_usad_char: using cached result" 2
4216 } else {
4217 set et_vect_usad_char_saved 0
4218 if { ([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
4219 set et_vect_usad_char_saved 1
4220 }
4221 }
4222 verbose "check_effective_target_vect_usad_char: returning $et_vect_usad_char_saved" 2
4223 return $et_vect_usad_char_saved
4224 }
4225
4226 # Return 1 if the target plus current options supports a vector
4227 # demotion (packing) of shorts (to chars) and ints (to shorts)
4228 # using modulo arithmetic, 0 otherwise.
4229 #
4230 # This won't change for different subtargets so cache the result.
4231
4232 proc check_effective_target_vect_pack_trunc { } {
4233 global et_vect_pack_trunc
4234
4235 if [info exists et_vect_pack_trunc_saved] {
4236 verbose "check_effective_target_vect_pack_trunc: using cached result" 2
4237 } else {
4238 set et_vect_pack_trunc_saved 0
4239 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4240 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4241 || [istarget aarch64*-*-*]
4242 || [istarget spu-*-*]
4243 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4244 && [check_effective_target_arm_little_endian]) } {
4245 set et_vect_pack_trunc_saved 1
4246 }
4247 }
4248 verbose "check_effective_target_vect_pack_trunc: returning $et_vect_pack_trunc_saved" 2
4249 return $et_vect_pack_trunc_saved
4250 }
4251
4252 # Return 1 if the target plus current options supports a vector
4253 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
4254 #
4255 # This won't change for different subtargets so cache the result.
4256
4257 proc check_effective_target_vect_unpack { } {
4258 global et_vect_unpack
4259
4260 if [info exists et_vect_unpack_saved] {
4261 verbose "check_effective_target_vect_unpack: using cached result" 2
4262 } else {
4263 set et_vect_unpack_saved 0
4264 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
4265 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4266 || [istarget spu-*-*]
4267 || [istarget ia64-*-*]
4268 || [istarget aarch64*-*-*]
4269 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4270 && [check_effective_target_arm_little_endian]) } {
4271 set et_vect_unpack_saved 1
4272 }
4273 }
4274 verbose "check_effective_target_vect_unpack: returning $et_vect_unpack_saved" 2
4275 return $et_vect_unpack_saved
4276 }
4277
4278 # Return 1 if the target plus current options does not guarantee
4279 # that its STACK_BOUNDARY is >= the reguired vector alignment.
4280 #
4281 # This won't change for different subtargets so cache the result.
4282
4283 proc check_effective_target_unaligned_stack { } {
4284 global et_unaligned_stack_saved
4285
4286 if [info exists et_unaligned_stack_saved] {
4287 verbose "check_effective_target_unaligned_stack: using cached result" 2
4288 } else {
4289 set et_unaligned_stack_saved 0
4290 }
4291 verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
4292 return $et_unaligned_stack_saved
4293 }
4294
4295 # Return 1 if the target plus current options does not support a vector
4296 # alignment mechanism, 0 otherwise.
4297 #
4298 # This won't change for different subtargets so cache the result.
4299
4300 proc check_effective_target_vect_no_align { } {
4301 global et_vect_no_align_saved
4302
4303 if [info exists et_vect_no_align_saved] {
4304 verbose "check_effective_target_vect_no_align: using cached result" 2
4305 } else {
4306 set et_vect_no_align_saved 0
4307 if { [istarget mipsisa64*-*-*]
4308 || [istarget mips-sde-elf]
4309 || [istarget sparc*-*-*]
4310 || [istarget ia64-*-*]
4311 || [check_effective_target_arm_vect_no_misalign]
4312 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
4313 || ([istarget mips*-*-*]
4314 && [check_effective_target_mips_loongson]) } {
4315 set et_vect_no_align_saved 1
4316 }
4317 }
4318 verbose "check_effective_target_vect_no_align: returning $et_vect_no_align_saved" 2
4319 return $et_vect_no_align_saved
4320 }
4321
4322 # Return 1 if the target supports a vector misalign access, 0 otherwise.
4323 #
4324 # This won't change for different subtargets so cache the result.
4325
4326 proc check_effective_target_vect_hw_misalign { } {
4327 global et_vect_hw_misalign_saved
4328
4329 if [info exists et_vect_hw_misalign_saved] {
4330 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
4331 } else {
4332 set et_vect_hw_misalign_saved 0
4333 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4334 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
4335 || [istarget aarch64*-*-*] } {
4336 set et_vect_hw_misalign_saved 1
4337 }
4338 }
4339 verbose "check_effective_target_vect_hw_misalign: returning $et_vect_hw_misalign_saved" 2
4340 return $et_vect_hw_misalign_saved
4341 }
4342
4343
4344 # Return 1 if arrays are aligned to the vector alignment
4345 # boundary, 0 otherwise.
4346 #
4347 # This won't change for different subtargets so cache the result.
4348
4349 proc check_effective_target_vect_aligned_arrays { } {
4350 global et_vect_aligned_arrays
4351
4352 if [info exists et_vect_aligned_arrays_saved] {
4353 verbose "check_effective_target_vect_aligned_arrays: using cached result" 2
4354 } else {
4355 set et_vect_aligned_arrays_saved 0
4356 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
4357 if { ([is-effective-target lp64]
4358 && ( ![check_avx_available]
4359 || [check_prefer_avx128])) } {
4360 set et_vect_aligned_arrays_saved 1
4361 }
4362 }
4363 if [istarget spu-*-*] {
4364 set et_vect_aligned_arrays_saved 1
4365 }
4366 }
4367 verbose "check_effective_target_vect_aligned_arrays: returning $et_vect_aligned_arrays_saved" 2
4368 return $et_vect_aligned_arrays_saved
4369 }
4370
4371 # Return 1 if types of size 32 bit or less are naturally aligned
4372 # (aligned to their type-size), 0 otherwise.
4373 #
4374 # This won't change for different subtargets so cache the result.
4375
4376 proc check_effective_target_natural_alignment_32 { } {
4377 global et_natural_alignment_32
4378
4379 if [info exists et_natural_alignment_32_saved] {
4380 verbose "check_effective_target_natural_alignment_32: using cached result" 2
4381 } else {
4382 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
4383 set et_natural_alignment_32_saved 1
4384 if { ([istarget *-*-darwin*] && [is-effective-target lp64]) } {
4385 set et_natural_alignment_32_saved 0
4386 }
4387 }
4388 verbose "check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
4389 return $et_natural_alignment_32_saved
4390 }
4391
4392 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
4393 # type-size), 0 otherwise.
4394 #
4395 # This won't change for different subtargets so cache the result.
4396
4397 proc check_effective_target_natural_alignment_64 { } {
4398 global et_natural_alignment_64
4399
4400 if [info exists et_natural_alignment_64_saved] {
4401 verbose "check_effective_target_natural_alignment_64: using cached result" 2
4402 } else {
4403 set et_natural_alignment_64_saved 0
4404 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
4405 || [istarget spu-*-*] } {
4406 set et_natural_alignment_64_saved 1
4407 }
4408 }
4409 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
4410 return $et_natural_alignment_64_saved
4411 }
4412
4413 # Return 1 if all vector types are naturally aligned (aligned to their
4414 # type-size), 0 otherwise.
4415 #
4416 # This won't change for different subtargets so cache the result.
4417
4418 proc check_effective_target_vect_natural_alignment { } {
4419 global et_vect_natural_alignment
4420
4421 if [info exists et_vect_natural_alignment_saved] {
4422 verbose "check_effective_target_vect_natural_alignment: using cached result" 2
4423 } else {
4424 set et_vect_natural_alignment_saved 1
4425 if { [check_effective_target_arm_eabi]
4426 || [istarget nvptx-*-*]
4427 || [istarget s390*-*-*] } {
4428 set et_vect_natural_alignment_saved 0
4429 }
4430 }
4431 verbose "check_effective_target_vect_natural_alignment: returning $et_vect_natural_alignment_saved" 2
4432 return $et_vect_natural_alignment_saved
4433 }
4434
4435 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
4436 #
4437 # This won't change for different subtargets so cache the result.
4438
4439 proc check_effective_target_vector_alignment_reachable { } {
4440 global et_vector_alignment_reachable
4441
4442 if [info exists et_vector_alignment_reachable_saved] {
4443 verbose "check_effective_target_vector_alignment_reachable: using cached result" 2
4444 } else {
4445 if { [check_effective_target_vect_aligned_arrays]
4446 || [check_effective_target_natural_alignment_32] } {
4447 set et_vector_alignment_reachable_saved 1
4448 } else {
4449 set et_vector_alignment_reachable_saved 0
4450 }
4451 }
4452 verbose "check_effective_target_vector_alignment_reachable: returning $et_vector_alignment_reachable_saved" 2
4453 return $et_vector_alignment_reachable_saved
4454 }
4455
4456 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
4457 #
4458 # This won't change for different subtargets so cache the result.
4459
4460 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
4461 global et_vector_alignment_reachable_for_64bit
4462
4463 if [info exists et_vector_alignment_reachable_for_64bit_saved] {
4464 verbose "check_effective_target_vector_alignment_reachable_for_64bit: using cached result" 2
4465 } else {
4466 if { [check_effective_target_vect_aligned_arrays]
4467 || [check_effective_target_natural_alignment_64] } {
4468 set et_vector_alignment_reachable_for_64bit_saved 1
4469 } else {
4470 set et_vector_alignment_reachable_for_64bit_saved 0
4471 }
4472 }
4473 verbose "check_effective_target_vector_alignment_reachable_for_64bit: returning $et_vector_alignment_reachable_for_64bit_saved" 2
4474 return $et_vector_alignment_reachable_for_64bit_saved
4475 }
4476
4477 # Return 1 if the target only requires element alignment for vector accesses
4478
4479 proc check_effective_target_vect_element_align { } {
4480 global et_vect_element_align
4481
4482 if [info exists et_vect_element_align] {
4483 verbose "check_effective_target_vect_element_align: using cached result" 2
4484 } else {
4485 set et_vect_element_align 0
4486 if { ([istarget arm*-*-*]
4487 && ![check_effective_target_arm_vect_no_misalign])
4488 || [check_effective_target_vect_hw_misalign] } {
4489 set et_vect_element_align 1
4490 }
4491 }
4492
4493 verbose "check_effective_target_vect_element_align: returning $et_vect_element_align" 2
4494 return $et_vect_element_align
4495 }
4496
4497 # Return 1 if the target supports vector conditional operations, 0 otherwise.
4498
4499 proc check_effective_target_vect_condition { } {
4500 global et_vect_cond_saved
4501
4502 if [info exists et_vect_cond_saved] {
4503 verbose "check_effective_target_vect_cond: using cached result" 2
4504 } else {
4505 set et_vect_cond_saved 0
4506 if { [istarget aarch64*-*-*]
4507 || [istarget powerpc*-*-*]
4508 || [istarget ia64-*-*]
4509 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4510 || [istarget spu-*-*]
4511 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4512 set et_vect_cond_saved 1
4513 }
4514 }
4515
4516 verbose "check_effective_target_vect_cond: returning $et_vect_cond_saved" 2
4517 return $et_vect_cond_saved
4518 }
4519
4520 # Return 1 if the target supports vector conditional operations where
4521 # the comparison has different type from the lhs, 0 otherwise.
4522
4523 proc check_effective_target_vect_cond_mixed { } {
4524 global et_vect_cond_mixed_saved
4525
4526 if [info exists et_vect_cond_mixed_saved] {
4527 verbose "check_effective_target_vect_cond_mixed: using cached result" 2
4528 } else {
4529 set et_vect_cond_mixed_saved 0
4530 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4531 || [istarget powerpc*-*-*] } {
4532 set et_vect_cond_mixed_saved 1
4533 }
4534 }
4535
4536 verbose "check_effective_target_vect_cond_mixed: returning $et_vect_cond_mixed_saved" 2
4537 return $et_vect_cond_mixed_saved
4538 }
4539
4540 # Return 1 if the target supports vector char multiplication, 0 otherwise.
4541
4542 proc check_effective_target_vect_char_mult { } {
4543 global et_vect_char_mult_saved
4544
4545 if [info exists et_vect_char_mult_saved] {
4546 verbose "check_effective_target_vect_char_mult: using cached result" 2
4547 } else {
4548 set et_vect_char_mult_saved 0
4549 if { [istarget aarch64*-*-*]
4550 || [istarget ia64-*-*]
4551 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4552 || [check_effective_target_arm32] } {
4553 set et_vect_char_mult_saved 1
4554 }
4555 }
4556
4557 verbose "check_effective_target_vect_char_mult: returning $et_vect_char_mult_saved" 2
4558 return $et_vect_char_mult_saved
4559 }
4560
4561 # Return 1 if the target supports vector short multiplication, 0 otherwise.
4562
4563 proc check_effective_target_vect_short_mult { } {
4564 global et_vect_short_mult_saved
4565
4566 if [info exists et_vect_short_mult_saved] {
4567 verbose "check_effective_target_vect_short_mult: using cached result" 2
4568 } else {
4569 set et_vect_short_mult_saved 0
4570 if { [istarget ia64-*-*]
4571 || [istarget spu-*-*]
4572 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4573 || [istarget powerpc*-*-*]
4574 || [istarget aarch64*-*-*]
4575 || [check_effective_target_arm32]
4576 || ([istarget mips*-*-*]
4577 && [check_effective_target_mips_loongson]) } {
4578 set et_vect_short_mult_saved 1
4579 }
4580 }
4581
4582 verbose "check_effective_target_vect_short_mult: returning $et_vect_short_mult_saved" 2
4583 return $et_vect_short_mult_saved
4584 }
4585
4586 # Return 1 if the target supports vector int multiplication, 0 otherwise.
4587
4588 proc check_effective_target_vect_int_mult { } {
4589 global et_vect_int_mult_saved
4590
4591 if [info exists et_vect_int_mult_saved] {
4592 verbose "check_effective_target_vect_int_mult: using cached result" 2
4593 } else {
4594 set et_vect_int_mult_saved 0
4595 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4596 || [istarget spu-*-*]
4597 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4598 || [istarget ia64-*-*]
4599 || [istarget aarch64*-*-*]
4600 || [check_effective_target_arm32] } {
4601 set et_vect_int_mult_saved 1
4602 }
4603 }
4604
4605 verbose "check_effective_target_vect_int_mult: returning $et_vect_int_mult_saved" 2
4606 return $et_vect_int_mult_saved
4607 }
4608
4609 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
4610
4611 proc check_effective_target_vect_extract_even_odd { } {
4612 global et_vect_extract_even_odd_saved
4613
4614 if [info exists et_vect_extract_even_odd_saved] {
4615 verbose "check_effective_target_vect_extract_even_odd: using cached result" 2
4616 } else {
4617 set et_vect_extract_even_odd_saved 0
4618 if { [istarget aarch64*-*-*]
4619 || [istarget powerpc*-*-*]
4620 || [is-effective-target arm_neon_ok]
4621 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4622 || [istarget ia64-*-*]
4623 || [istarget spu-*-*]
4624 || ([istarget mips*-*-*]
4625 && [check_effective_target_mpaired_single]) } {
4626 set et_vect_extract_even_odd_saved 1
4627 }
4628 }
4629
4630 verbose "check_effective_target_vect_extract_even_odd: returning $et_vect_extract_even_odd_saved" 2
4631 return $et_vect_extract_even_odd_saved
4632 }
4633
4634 # Return 1 if the target supports vector interleaving, 0 otherwise.
4635
4636 proc check_effective_target_vect_interleave { } {
4637 global et_vect_interleave_saved
4638
4639 if [info exists et_vect_interleave_saved] {
4640 verbose "check_effective_target_vect_interleave: using cached result" 2
4641 } else {
4642 set et_vect_interleave_saved 0
4643 if { [istarget aarch64*-*-*]
4644 || [istarget powerpc*-*-*]
4645 || [is-effective-target arm_neon_ok]
4646 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4647 || [istarget ia64-*-*]
4648 || [istarget spu-*-*]
4649 || ([istarget mips*-*-*]
4650 && [check_effective_target_mpaired_single]) } {
4651 set et_vect_interleave_saved 1
4652 }
4653 }
4654
4655 verbose "check_effective_target_vect_interleave: returning $et_vect_interleave_saved" 2
4656 return $et_vect_interleave_saved
4657 }
4658
4659 foreach N {2 3 4 8} {
4660 eval [string map [list N $N] {
4661 # Return 1 if the target supports 2-vector interleaving
4662 proc check_effective_target_vect_stridedN { } {
4663 global et_vect_stridedN_saved
4664
4665 if [info exists et_vect_stridedN_saved] {
4666 verbose "check_effective_target_vect_stridedN: using cached result" 2
4667 } else {
4668 set et_vect_stridedN_saved 0
4669 if { (N & -N) == N
4670 && [check_effective_target_vect_interleave]
4671 && [check_effective_target_vect_extract_even_odd] } {
4672 set et_vect_stridedN_saved 1
4673 }
4674 if { ([istarget arm*-*-*]
4675 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
4676 set et_vect_stridedN_saved 1
4677 }
4678 }
4679
4680 verbose "check_effective_target_vect_stridedN: returning $et_vect_stridedN_saved" 2
4681 return $et_vect_stridedN_saved
4682 }
4683 }]
4684 }
4685
4686 # Return 1 if the target supports multiple vector sizes
4687
4688 proc check_effective_target_vect_multiple_sizes { } {
4689 global et_vect_multiple_sizes_saved
4690
4691 set et_vect_multiple_sizes_saved 0
4692 if { ([istarget aarch64*-*-*]
4693 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])) } {
4694 set et_vect_multiple_sizes_saved 1
4695 }
4696 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
4697 if { ([check_avx_available] && ![check_prefer_avx128]) } {
4698 set et_vect_multiple_sizes_saved 1
4699 }
4700 }
4701
4702 verbose "check_effective_target_vect_multiple_sizes: returning $et_vect_multiple_sizes_saved" 2
4703 return $et_vect_multiple_sizes_saved
4704 }
4705
4706 # Return 1 if the target supports vectors of 64 bits.
4707
4708 proc check_effective_target_vect64 { } {
4709 global et_vect64_saved
4710
4711 if [info exists et_vect64_saved] {
4712 verbose "check_effective_target_vect64: using cached result" 2
4713 } else {
4714 set et_vect64_saved 0
4715 if { ([istarget arm*-*-*]
4716 && [check_effective_target_arm_neon_ok]
4717 && [check_effective_target_arm_little_endian])
4718 || [istarget sparc*-*-*] } {
4719 set et_vect64_saved 1
4720 }
4721 }
4722
4723 verbose "check_effective_target_vect64: returning $et_vect64_saved" 2
4724 return $et_vect64_saved
4725 }
4726
4727 # Return 1 if the target supports vector copysignf calls.
4728
4729 proc check_effective_target_vect_call_copysignf { } {
4730 global et_vect_call_copysignf_saved
4731
4732 if [info exists et_vect_call_copysignf_saved] {
4733 verbose "check_effective_target_vect_call_copysignf: using cached result" 2
4734 } else {
4735 set et_vect_call_copysignf_saved 0
4736 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4737 || [istarget powerpc*-*-*] } {
4738 set et_vect_call_copysignf_saved 1
4739 }
4740 }
4741
4742 verbose "check_effective_target_vect_call_copysignf: returning $et_vect_call_copysignf_saved" 2
4743 return $et_vect_call_copysignf_saved
4744 }
4745
4746 # Return 1 if the target supports hardware square root instructions.
4747
4748 proc check_effective_target_sqrt_insn { } {
4749 global et_sqrt_insn_saved
4750
4751 if [info exists et_sqrt_insn_saved] {
4752 verbose "check_effective_target_hw_sqrt: using cached result" 2
4753 } else {
4754 set et_sqrt_insn_saved 0
4755 if { [istarget x86_64-*-*]
4756 || [istarget powerpc*-*-*]
4757 || [istarget aarch64*-*-*]
4758 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok]) } {
4759 set et_sqrt_insn_saved 1
4760 }
4761 }
4762
4763 verbose "check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2
4764 return $et_sqrt_insn_saved
4765 }
4766
4767 # Return 1 if the target supports vector sqrtf calls.
4768
4769 proc check_effective_target_vect_call_sqrtf { } {
4770 global et_vect_call_sqrtf_saved
4771
4772 if [info exists et_vect_call_sqrtf_saved] {
4773 verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
4774 } else {
4775 set et_vect_call_sqrtf_saved 0
4776 if { [istarget aarch64*-*-*]
4777 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4778 || ([istarget powerpc*-*-*] && [check_vsx_hw_available]) } {
4779 set et_vect_call_sqrtf_saved 1
4780 }
4781 }
4782
4783 verbose "check_effective_target_vect_call_sqrtf: returning $et_vect_call_sqrtf_saved" 2
4784 return $et_vect_call_sqrtf_saved
4785 }
4786
4787 # Return 1 if the target supports vector lrint calls.
4788
4789 proc check_effective_target_vect_call_lrint { } {
4790 set et_vect_call_lrint 0
4791 if { ([istarget i?86-*-*] || [istarget x86_64-*-*])
4792 && [check_effective_target_ilp32] } {
4793 set et_vect_call_lrint 1
4794 }
4795
4796 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
4797 return $et_vect_call_lrint
4798 }
4799
4800 # Return 1 if the target supports vector btrunc calls.
4801
4802 proc check_effective_target_vect_call_btrunc { } {
4803 global et_vect_call_btrunc_saved
4804
4805 if [info exists et_vect_call_btrunc_saved] {
4806 verbose "check_effective_target_vect_call_btrunc: using cached result" 2
4807 } else {
4808 set et_vect_call_btrunc_saved 0
4809 if { [istarget aarch64*-*-*] } {
4810 set et_vect_call_btrunc_saved 1
4811 }
4812 }
4813
4814 verbose "check_effective_target_vect_call_btrunc: returning $et_vect_call_btrunc_saved" 2
4815 return $et_vect_call_btrunc_saved
4816 }
4817
4818 # Return 1 if the target supports vector btruncf calls.
4819
4820 proc check_effective_target_vect_call_btruncf { } {
4821 global et_vect_call_btruncf_saved
4822
4823 if [info exists et_vect_call_btruncf_saved] {
4824 verbose "check_effective_target_vect_call_btruncf: using cached result" 2
4825 } else {
4826 set et_vect_call_btruncf_saved 0
4827 if { [istarget aarch64*-*-*] } {
4828 set et_vect_call_btruncf_saved 1
4829 }
4830 }
4831
4832 verbose "check_effective_target_vect_call_btruncf: returning $et_vect_call_btruncf_saved" 2
4833 return $et_vect_call_btruncf_saved
4834 }
4835
4836 # Return 1 if the target supports vector ceil calls.
4837
4838 proc check_effective_target_vect_call_ceil { } {
4839 global et_vect_call_ceil_saved
4840
4841 if [info exists et_vect_call_ceil_saved] {
4842 verbose "check_effective_target_vect_call_ceil: using cached result" 2
4843 } else {
4844 set et_vect_call_ceil_saved 0
4845 if { [istarget aarch64*-*-*] } {
4846 set et_vect_call_ceil_saved 1
4847 }
4848 }
4849
4850 verbose "check_effective_target_vect_call_ceil: returning $et_vect_call_ceil_saved" 2
4851 return $et_vect_call_ceil_saved
4852 }
4853
4854 # Return 1 if the target supports vector ceilf calls.
4855
4856 proc check_effective_target_vect_call_ceilf { } {
4857 global et_vect_call_ceilf_saved
4858
4859 if [info exists et_vect_call_ceilf_saved] {
4860 verbose "check_effective_target_vect_call_ceilf: using cached result" 2
4861 } else {
4862 set et_vect_call_ceilf_saved 0
4863 if { [istarget aarch64*-*-*] } {
4864 set et_vect_call_ceilf_saved 1
4865 }
4866 }
4867
4868 verbose "check_effective_target_vect_call_ceilf: returning $et_vect_call_ceilf_saved" 2
4869 return $et_vect_call_ceilf_saved
4870 }
4871
4872 # Return 1 if the target supports vector floor calls.
4873
4874 proc check_effective_target_vect_call_floor { } {
4875 global et_vect_call_floor_saved
4876
4877 if [info exists et_vect_call_floor_saved] {
4878 verbose "check_effective_target_vect_call_floor: using cached result" 2
4879 } else {
4880 set et_vect_call_floor_saved 0
4881 if { [istarget aarch64*-*-*] } {
4882 set et_vect_call_floor_saved 1
4883 }
4884 }
4885
4886 verbose "check_effective_target_vect_call_floor: returning $et_vect_call_floor_saved" 2
4887 return $et_vect_call_floor_saved
4888 }
4889
4890 # Return 1 if the target supports vector floorf calls.
4891
4892 proc check_effective_target_vect_call_floorf { } {
4893 global et_vect_call_floorf_saved
4894
4895 if [info exists et_vect_call_floorf_saved] {
4896 verbose "check_effective_target_vect_call_floorf: using cached result" 2
4897 } else {
4898 set et_vect_call_floorf_saved 0
4899 if { [istarget aarch64*-*-*] } {
4900 set et_vect_call_floorf_saved 1
4901 }
4902 }
4903
4904 verbose "check_effective_target_vect_call_floorf: returning $et_vect_call_floorf_saved" 2
4905 return $et_vect_call_floorf_saved
4906 }
4907
4908 # Return 1 if the target supports vector lceil calls.
4909
4910 proc check_effective_target_vect_call_lceil { } {
4911 global et_vect_call_lceil_saved
4912
4913 if [info exists et_vect_call_lceil_saved] {
4914 verbose "check_effective_target_vect_call_lceil: using cached result" 2
4915 } else {
4916 set et_vect_call_lceil_saved 0
4917 if { [istarget aarch64*-*-*] } {
4918 set et_vect_call_lceil_saved 1
4919 }
4920 }
4921
4922 verbose "check_effective_target_vect_call_lceil: returning $et_vect_call_lceil_saved" 2
4923 return $et_vect_call_lceil_saved
4924 }
4925
4926 # Return 1 if the target supports vector lfloor calls.
4927
4928 proc check_effective_target_vect_call_lfloor { } {
4929 global et_vect_call_lfloor_saved
4930
4931 if [info exists et_vect_call_lfloor_saved] {
4932 verbose "check_effective_target_vect_call_lfloor: using cached result" 2
4933 } else {
4934 set et_vect_call_lfloor_saved 0
4935 if { [istarget aarch64*-*-*] } {
4936 set et_vect_call_lfloor_saved 1
4937 }
4938 }
4939
4940 verbose "check_effective_target_vect_call_lfloor: returning $et_vect_call_lfloor_saved" 2
4941 return $et_vect_call_lfloor_saved
4942 }
4943
4944 # Return 1 if the target supports vector nearbyint calls.
4945
4946 proc check_effective_target_vect_call_nearbyint { } {
4947 global et_vect_call_nearbyint_saved
4948
4949 if [info exists et_vect_call_nearbyint_saved] {
4950 verbose "check_effective_target_vect_call_nearbyint: using cached result" 2
4951 } else {
4952 set et_vect_call_nearbyint_saved 0
4953 if { [istarget aarch64*-*-*] } {
4954 set et_vect_call_nearbyint_saved 1
4955 }
4956 }
4957
4958 verbose "check_effective_target_vect_call_nearbyint: returning $et_vect_call_nearbyint_saved" 2
4959 return $et_vect_call_nearbyint_saved
4960 }
4961
4962 # Return 1 if the target supports vector nearbyintf calls.
4963
4964 proc check_effective_target_vect_call_nearbyintf { } {
4965 global et_vect_call_nearbyintf_saved
4966
4967 if [info exists et_vect_call_nearbyintf_saved] {
4968 verbose "check_effective_target_vect_call_nearbyintf: using cached result" 2
4969 } else {
4970 set et_vect_call_nearbyintf_saved 0
4971 if { [istarget aarch64*-*-*] } {
4972 set et_vect_call_nearbyintf_saved 1
4973 }
4974 }
4975
4976 verbose "check_effective_target_vect_call_nearbyintf: returning $et_vect_call_nearbyintf_saved" 2
4977 return $et_vect_call_nearbyintf_saved
4978 }
4979
4980 # Return 1 if the target supports vector round calls.
4981
4982 proc check_effective_target_vect_call_round { } {
4983 global et_vect_call_round_saved
4984
4985 if [info exists et_vect_call_round_saved] {
4986 verbose "check_effective_target_vect_call_round: using cached result" 2
4987 } else {
4988 set et_vect_call_round_saved 0
4989 if { [istarget aarch64*-*-*] } {
4990 set et_vect_call_round_saved 1
4991 }
4992 }
4993
4994 verbose "check_effective_target_vect_call_round: returning $et_vect_call_round_saved" 2
4995 return $et_vect_call_round_saved
4996 }
4997
4998 # Return 1 if the target supports vector roundf calls.
4999
5000 proc check_effective_target_vect_call_roundf { } {
5001 global et_vect_call_roundf_saved
5002
5003 if [info exists et_vect_call_roundf_saved] {
5004 verbose "check_effective_target_vect_call_roundf: using cached result" 2
5005 } else {
5006 set et_vect_call_roundf_saved 0
5007 if { [istarget aarch64*-*-*] } {
5008 set et_vect_call_roundf_saved 1
5009 }
5010 }
5011
5012 verbose "check_effective_target_vect_call_roundf: returning $et_vect_call_roundf_saved" 2
5013 return $et_vect_call_roundf_saved
5014 }
5015
5016 # Return 1 if the target supports section-anchors
5017
5018 proc check_effective_target_section_anchors { } {
5019 global et_section_anchors_saved
5020
5021 if [info exists et_section_anchors_saved] {
5022 verbose "check_effective_target_section_anchors: using cached result" 2
5023 } else {
5024 set et_section_anchors_saved 0
5025 if { [istarget powerpc*-*-*]
5026 || [istarget arm*-*-*] } {
5027 set et_section_anchors_saved 1
5028 }
5029 }
5030
5031 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
5032 return $et_section_anchors_saved
5033 }
5034
5035 # Return 1 if the target supports atomic operations on "int_128" values.
5036
5037 proc check_effective_target_sync_int_128 { } {
5038 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
5039 && ![is-effective-target ia32] } {
5040 return 1
5041 } else {
5042 return 0
5043 }
5044 }
5045
5046 # Return 1 if the target supports atomic operations on "int_128" values
5047 # and can execute them.
5048
5049 proc check_effective_target_sync_int_128_runtime { } {
5050 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
5051 && ![is-effective-target ia32] } {
5052 return [check_cached_effective_target sync_int_128_available {
5053 check_runtime_nocache sync_int_128_available {
5054 #include "cpuid.h"
5055 int main ()
5056 {
5057 unsigned int eax, ebx, ecx, edx;
5058 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
5059 return !(ecx & bit_CMPXCHG16B);
5060 return 1;
5061 }
5062 } ""
5063 }]
5064 } else {
5065 return 0
5066 }
5067 }
5068
5069 # Return 1 if the target supports atomic operations on "long long".
5070 #
5071 # Note: 32bit x86 targets require -march=pentium in dg-options.
5072
5073 proc check_effective_target_sync_long_long { } {
5074 if { [istarget x86_64-*-*] || [istarget i?86-*-*])
5075 || [istarget aarch64*-*-*]
5076 || [istarget arm*-*-*]
5077 || [istarget alpha*-*-*]
5078 || ([istarget sparc*-*-*] && [check_effective_target_lp64]) } {
5079 return 1
5080 } else {
5081 return 0
5082 }
5083 }
5084
5085 # Return 1 if the target supports atomic operations on "long long"
5086 # and can execute them.
5087 #
5088 # Note: 32bit x86 targets require -march=pentium in dg-options.
5089
5090 proc check_effective_target_sync_long_long_runtime { } {
5091 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
5092 return [check_cached_effective_target sync_long_long_available {
5093 check_runtime_nocache sync_long_long_available {
5094 #include "cpuid.h"
5095 int main ()
5096 {
5097 unsigned int eax, ebx, ecx, edx;
5098 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
5099 return !(edx & bit_CMPXCHG8B);
5100 return 1;
5101 }
5102 } ""
5103 }]
5104 } elseif { [istarget aarch64*-*-*] } {
5105 return 1
5106 } elseif { [istarget arm*-*-linux-*] } {
5107 return [check_runtime sync_longlong_runtime {
5108 #include <stdlib.h>
5109 int main ()
5110 {
5111 long long l1;
5112
5113 if (sizeof (long long) != 8)
5114 exit (1);
5115
5116 /* Just check for native; checking for kernel fallback is tricky. */
5117 asm volatile ("ldrexd r0,r1, [%0]" : : "r" (&l1) : "r0", "r1");
5118
5119 exit (0);
5120 }
5121 } "" ]
5122 } elseif { [istarget alpha*-*-*] } {
5123 return 1
5124 } elseif { ([istarget sparc*-*-*]
5125 && [check_effective_target_lp64]
5126 && [check_effective_target_ultrasparc_hw]) } {
5127 return 1
5128 } elseif { [istarget powerpc*-*-*] && [check_effective_target_lp64] } {
5129 return 1
5130 } else {
5131 return 0
5132 }
5133 }
5134
5135 # Return 1 if the target supports byte swap instructions.
5136
5137 proc check_effective_target_bswap { } {
5138 global et_bswap_saved
5139
5140 if [info exists et_bswap_saved] {
5141 verbose "check_effective_target_bswap: using cached result" 2
5142 } else {
5143 set et_bswap_saved 0
5144 if { [istarget aarch64*-*-*]
5145 || [istarget alpha*-*-*]
5146 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5147 || [istarget m68k-*-*]
5148 || [istarget powerpc*-*-*]
5149 || [istarget rs6000-*-*]
5150 || [istarget s390*-*-*] } {
5151 set et_bswap_saved 1
5152 } else {
5153 if { [istarget arm*-*-*]
5154 && [check_no_compiler_messages_nocache arm_v6_or_later object {
5155 #if __ARM_ARCH < 6
5156 #error not armv6 or later
5157 #endif
5158 int i;
5159 } ""] } {
5160 set et_bswap_saved 1
5161 }
5162 }
5163 }
5164
5165 verbose "check_effective_target_bswap: returning $et_bswap_saved" 2
5166 return $et_bswap_saved
5167 }
5168
5169 # Return 1 if the target supports 16-bit byte swap instructions.
5170
5171 proc check_effective_target_bswap16 { } {
5172 global et_bswap16_saved
5173
5174 if [info exists et_bswap16_saved] {
5175 verbose "check_effective_target_bswap16: using cached result" 2
5176 } else {
5177 set et_bswap16_saved 0
5178 if { [is-effective-target bswap]
5179 && ![istarget alpha*-*-*]
5180 && !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
5181 set et_bswap16_saved 1
5182 }
5183 }
5184
5185 verbose "check_effective_target_bswap16: returning $et_bswap16_saved" 2
5186 return $et_bswap16_saved
5187 }
5188
5189 # Return 1 if the target supports 32-bit byte swap instructions.
5190
5191 proc check_effective_target_bswap32 { } {
5192 global et_bswap32_saved
5193
5194 if [info exists et_bswap32_saved] {
5195 verbose "check_effective_target_bswap32: using cached result" 2
5196 } else {
5197 set et_bswap32_saved 0
5198 if { [is-effective-target bswap] } {
5199 set et_bswap32_saved 1
5200 }
5201 }
5202
5203 verbose "check_effective_target_bswap32: returning $et_bswap32_saved" 2
5204 return $et_bswap32_saved
5205 }
5206
5207 # Return 1 if the target supports 64-bit byte swap instructions.
5208
5209 proc check_effective_target_bswap64 { } {
5210 global et_bswap64_saved
5211
5212 # expand_unop can expand 64-bit byte swap on 32-bit targets
5213 if { [is-effective-target bswap] && [is-effective-target int32plus] } {
5214 return 1
5215 }
5216 return 0
5217 }
5218
5219 # Return 1 if the target supports atomic operations on "int" and "long".
5220
5221 proc check_effective_target_sync_int_long { } {
5222 global et_sync_int_long_saved
5223
5224 if [info exists et_sync_int_long_saved] {
5225 verbose "check_effective_target_sync_int_long: using cached result" 2
5226 } else {
5227 set et_sync_int_long_saved 0
5228 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
5229 # load-reserved/store-conditional instructions.
5230 if { [istarget ia64-*-*]
5231 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5232 || [istarget aarch64*-*-*]
5233 || [istarget alpha*-*-*]
5234 || [istarget arm*-*-linux-*]
5235 || [istarget bfin*-*linux*]
5236 || [istarget hppa*-*linux*]
5237 || [istarget s390*-*-*]
5238 || [istarget powerpc*-*-*]
5239 || [istarget crisv32-*-*] || [istarget cris-*-*]
5240 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
5241 || [check_effective_target_mips_llsc] } {
5242 set et_sync_int_long_saved 1
5243 }
5244 }
5245
5246 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
5247 return $et_sync_int_long_saved
5248 }
5249
5250 # Return 1 if the target supports atomic operations on "char" and "short".
5251
5252 proc check_effective_target_sync_char_short { } {
5253 global et_sync_char_short_saved
5254
5255 if [info exists et_sync_char_short_saved] {
5256 verbose "check_effective_target_sync_char_short: using cached result" 2
5257 } else {
5258 set et_sync_char_short_saved 0
5259 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
5260 # load-reserved/store-conditional instructions.
5261 if { [istarget aarch64*-*-*]
5262 || [istarget ia64-*-*]
5263 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5264 || [istarget alpha*-*-*]
5265 || [istarget arm*-*-linux-*]
5266 || [istarget hppa*-*linux*]
5267 || [istarget s390*-*-*]
5268 || [istarget powerpc*-*-*]
5269 || [istarget crisv32-*-*] || [istarget cris-*-*]
5270 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
5271 || [check_effective_target_mips_llsc] } {
5272 set et_sync_char_short_saved 1
5273 }
5274 }
5275
5276 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
5277 return $et_sync_char_short_saved
5278 }
5279
5280 # Return 1 if the target uses a ColdFire FPU.
5281
5282 proc check_effective_target_coldfire_fpu { } {
5283 return [check_no_compiler_messages coldfire_fpu assembly {
5284 #ifndef __mcffpu__
5285 #error !__mcffpu__
5286 #endif
5287 }]
5288 }
5289
5290 # Return true if this is a uClibc target.
5291
5292 proc check_effective_target_uclibc {} {
5293 return [check_no_compiler_messages uclibc object {
5294 #include <features.h>
5295 #if !defined (__UCLIBC__)
5296 #error !__UCLIBC__
5297 #endif
5298 }]
5299 }
5300
5301 # Return true if this is a uclibc target and if the uclibc feature
5302 # described by __$feature__ is not present.
5303
5304 proc check_missing_uclibc_feature {feature} {
5305 return [check_no_compiler_messages $feature object "
5306 #include <features.h>
5307 #if !defined (__UCLIBC) || defined (__${feature}__)
5308 #error FOO
5309 #endif
5310 "]
5311 }
5312
5313 # Return true if this is a Newlib target.
5314
5315 proc check_effective_target_newlib {} {
5316 return [check_no_compiler_messages newlib object {
5317 #include <newlib.h>
5318 }]
5319 }
5320
5321 # Return true if this is NOT a Bionic target.
5322
5323 proc check_effective_target_non_bionic {} {
5324 return [check_no_compiler_messages non_bionic object {
5325 #include <ctype.h>
5326 #if defined (__BIONIC__)
5327 #error FOO
5328 #endif
5329 }]
5330 }
5331
5332 # Return true if this target has error.h header.
5333
5334 proc check_effective_target_error_h {} {
5335 return [check_no_compiler_messages error_h object {
5336 #include <error.h>
5337 }]
5338 }
5339
5340 # Return true if this target has tgmath.h header.
5341
5342 proc check_effective_target_tgmath_h {} {
5343 return [check_no_compiler_messages tgmath_h object {
5344 #include <tgmath.h>
5345 }]
5346 }
5347
5348 # Return true if target's libc supports complex functions.
5349
5350 proc check_effective_target_libc_has_complex_functions {} {
5351 return [check_no_compiler_messages libc_has_complex_functions object {
5352 #include <complex.h>
5353 }]
5354 }
5355
5356 # Return 1 if
5357 # (a) an error of a few ULP is expected in string to floating-point
5358 # conversion functions; and
5359 # (b) overflow is not always detected correctly by those functions.
5360
5361 proc check_effective_target_lax_strtofp {} {
5362 # By default, assume that all uClibc targets suffer from this.
5363 return [check_effective_target_uclibc]
5364 }
5365
5366 # Return 1 if this is a target for which wcsftime is a dummy
5367 # function that always returns 0.
5368
5369 proc check_effective_target_dummy_wcsftime {} {
5370 # By default, assume that all uClibc targets suffer from this.
5371 return [check_effective_target_uclibc]
5372 }
5373
5374 # Return 1 if constructors with initialization priority arguments are
5375 # supposed on this target.
5376
5377 proc check_effective_target_init_priority {} {
5378 return [check_no_compiler_messages init_priority assembly "
5379 void f() __attribute__((constructor (1000)));
5380 void f() \{\}
5381 "]
5382 }
5383
5384 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
5385 # This can be used with any check_* proc that takes no argument and
5386 # returns only 1 or 0. It could be used with check_* procs that take
5387 # arguments with keywords that pass particular arguments.
5388
5389 proc is-effective-target { arg } {
5390 set selected 0
5391 if { [info procs check_effective_target_${arg}] != [list] } {
5392 set selected [check_effective_target_${arg}]
5393 } else {
5394 switch $arg {
5395 "vmx_hw" { set selected [check_vmx_hw_available] }
5396 "vsx_hw" { set selected [check_vsx_hw_available] }
5397 "p8vector_hw" { set selected [check_p8vector_hw_available] }
5398 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
5399 "dfp_hw" { set selected [check_dfp_hw_available] }
5400 "htm_hw" { set selected [check_htm_hw_available] }
5401 "named_sections" { set selected [check_named_sections_available] }
5402 "gc_sections" { set selected [check_gc_sections_available] }
5403 "cxa_atexit" { set selected [check_cxa_atexit_available] }
5404 default { error "unknown effective target keyword `$arg'" }
5405 }
5406 }
5407 verbose "is-effective-target: $arg $selected" 2
5408 return $selected
5409 }
5410
5411 # Return 1 if the argument is an effective-target keyword, 0 otherwise.
5412
5413 proc is-effective-target-keyword { arg } {
5414 if { [info procs check_effective_target_${arg}] != [list] } {
5415 return 1
5416 } else {
5417 # These have different names for their check_* procs.
5418 switch $arg {
5419 "vmx_hw" { return 1 }
5420 "vsx_hw" { return 1 }
5421 "p8vector_hw" { return 1 }
5422 "ppc_recip_hw" { return 1 }
5423 "dfp_hw" { return 1 }
5424 "htm_hw" { return 1 }
5425 "named_sections" { return 1 }
5426 "gc_sections" { return 1 }
5427 "cxa_atexit" { return 1 }
5428 default { return 0 }
5429 }
5430 }
5431 }
5432
5433 # Return 1 if target default to short enums
5434
5435 proc check_effective_target_short_enums { } {
5436 return [check_no_compiler_messages short_enums assembly {
5437 enum foo { bar };
5438 int s[sizeof (enum foo) == 1 ? 1 : -1];
5439 }]
5440 }
5441
5442 # Return 1 if target supports merging string constants at link time.
5443
5444 proc check_effective_target_string_merging { } {
5445 return [check_no_messages_and_pattern string_merging \
5446 "rodata\\.str" assembly {
5447 const char *var = "String";
5448 } {-O2}]
5449 }
5450
5451 # Return 1 if target has the basic signed and unsigned types in
5452 # <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
5453 # working <stdint.h> for all targets.
5454
5455 proc check_effective_target_stdint_types { } {
5456 return [check_no_compiler_messages stdint_types assembly {
5457 #include <stdint.h>
5458 int8_t a; int16_t b; int32_t c; int64_t d;
5459 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
5460 }]
5461 }
5462
5463 # Return 1 if target has the basic signed and unsigned types in
5464 # <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
5465 # these types agree with those in the header, as some systems have
5466 # only <inttypes.h>.
5467
5468 proc check_effective_target_inttypes_types { } {
5469 return [check_no_compiler_messages inttypes_types assembly {
5470 #include <inttypes.h>
5471 int8_t a; int16_t b; int32_t c; int64_t d;
5472 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
5473 }]
5474 }
5475
5476 # Return 1 if programs are intended to be run on a simulator
5477 # (i.e. slowly) rather than hardware (i.e. fast).
5478
5479 proc check_effective_target_simulator { } {
5480
5481 # All "src/sim" simulators set this one.
5482 if [board_info target exists is_simulator] {
5483 return [board_info target is_simulator]
5484 }
5485
5486 # The "sid" simulators don't set that one, but at least they set
5487 # this one.
5488 if [board_info target exists slow_simulator] {
5489 return [board_info target slow_simulator]
5490 }
5491
5492 return 0
5493 }
5494
5495 # Return 1 if programs are intended to be run on hardware rather than
5496 # on a simulator
5497
5498 proc check_effective_target_hw { } {
5499
5500 # All "src/sim" simulators set this one.
5501 if [board_info target exists is_simulator] {
5502 if [board_info target is_simulator] {
5503 return 0
5504 } else {
5505 return 1
5506 }
5507 }
5508
5509 # The "sid" simulators don't set that one, but at least they set
5510 # this one.
5511 if [board_info target exists slow_simulator] {
5512 if [board_info target slow_simulator] {
5513 return 0
5514 } else {
5515 return 1
5516 }
5517 }
5518
5519 return 1
5520 }
5521
5522 # Return 1 if the target is a VxWorks kernel.
5523
5524 proc check_effective_target_vxworks_kernel { } {
5525 return [check_no_compiler_messages vxworks_kernel assembly {
5526 #if !defined __vxworks || defined __RTP__
5527 #error NO
5528 #endif
5529 }]
5530 }
5531
5532 # Return 1 if the target is a VxWorks RTP.
5533
5534 proc check_effective_target_vxworks_rtp { } {
5535 return [check_no_compiler_messages vxworks_rtp assembly {
5536 #if !defined __vxworks || !defined __RTP__
5537 #error NO
5538 #endif
5539 }]
5540 }
5541
5542 # Return 1 if the target is expected to provide wide character support.
5543
5544 proc check_effective_target_wchar { } {
5545 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
5546 return 0
5547 }
5548 return [check_no_compiler_messages wchar assembly {
5549 #include <wchar.h>
5550 }]
5551 }
5552
5553 # Return 1 if the target has <pthread.h>.
5554
5555 proc check_effective_target_pthread_h { } {
5556 return [check_no_compiler_messages pthread_h assembly {
5557 #include <pthread.h>
5558 }]
5559 }
5560
5561 # Return 1 if the target can truncate a file from a file-descriptor,
5562 # as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
5563 # chsize. We test for a trivially functional truncation; no stubs.
5564 # As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
5565 # different function to be used.
5566
5567 proc check_effective_target_fd_truncate { } {
5568 set prog {
5569 #define _FILE_OFFSET_BITS 64
5570 #include <unistd.h>
5571 #include <stdio.h>
5572 #include <stdlib.h>
5573 #include <string.h>
5574 int main ()
5575 {
5576 FILE *f = fopen ("tst.tmp", "wb");
5577 int fd;
5578 const char t[] = "test writing more than ten characters";
5579 char s[11];
5580 int status = 0;
5581 fd = fileno (f);
5582 write (fd, t, sizeof (t) - 1);
5583 lseek (fd, 0, 0);
5584 if (ftruncate (fd, 10) != 0)
5585 status = 1;
5586 close (fd);
5587 fclose (f);
5588 if (status)
5589 {
5590 unlink ("tst.tmp");
5591 exit (status);
5592 }
5593 f = fopen ("tst.tmp", "rb");
5594 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
5595 status = 1;
5596 fclose (f);
5597 unlink ("tst.tmp");
5598 exit (status);
5599 }
5600 }
5601
5602 if { [check_runtime ftruncate $prog] } {
5603 return 1;
5604 }
5605
5606 regsub "ftruncate" $prog "chsize" prog
5607 return [check_runtime chsize $prog]
5608 }
5609
5610 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
5611
5612 proc add_options_for_c99_runtime { flags } {
5613 if { [istarget *-*-solaris2*] } {
5614 return "$flags -std=c99"
5615 }
5616 if { [istarget powerpc-*-darwin*] } {
5617 return "$flags -mmacosx-version-min=10.3"
5618 }
5619 return $flags
5620 }
5621
5622 # Add to FLAGS all the target-specific flags needed to enable
5623 # full IEEE compliance mode.
5624
5625 proc add_options_for_ieee { flags } {
5626 if { [istarget alpha*-*-*]
5627 || [istarget sh*-*-*] } {
5628 return "$flags -mieee"
5629 }
5630 if { [istarget rx-*-*] } {
5631 return "$flags -mnofpu"
5632 }
5633 return $flags
5634 }
5635
5636 if {![info exists flags_to_postpone]} {
5637 set flags_to_postpone ""
5638 }
5639
5640 # Add to FLAGS the flags needed to enable functions to bind locally
5641 # when using pic/PIC passes in the testsuite.
5642 proc add_options_for_bind_pic_locally { flags } {
5643 global flags_to_postpone
5644
5645 # Instead of returning 'flags' with the -fPIE or -fpie appended, we save it
5646 # in 'flags_to_postpone' and append it later in gcc_target_compile procedure in
5647 # order to make sure that the multilib_flags doesn't override this.
5648
5649 if {[check_no_compiler_messages using_pic2 assembly {
5650 #if __PIC__ != 2
5651 #error __PIC__ != 2
5652 #endif
5653 }]} {
5654 set flags_to_postpone "-fPIE"
5655 return $flags
5656 }
5657 if {[check_no_compiler_messages using_pic1 assembly {
5658 #if __PIC__ != 1
5659 #error __PIC__ != 1
5660 #endif
5661 }]} {
5662 set flags_to_postpone "-fpie"
5663 return $flags
5664 }
5665 return $flags
5666 }
5667
5668 # Add to FLAGS the flags needed to enable 64-bit vectors.
5669
5670 proc add_options_for_double_vectors { flags } {
5671 if [is-effective-target arm_neon_ok] {
5672 return "$flags -mvectorize-with-neon-double"
5673 }
5674
5675 return $flags
5676 }
5677
5678 # Return 1 if the target provides a full C99 runtime.
5679
5680 proc check_effective_target_c99_runtime { } {
5681 return [check_cached_effective_target c99_runtime {
5682 global srcdir
5683
5684 set file [open "$srcdir/gcc.dg/builtins-config.h"]
5685 set contents [read $file]
5686 close $file
5687 append contents {
5688 #ifndef HAVE_C99_RUNTIME
5689 #error !HAVE_C99_RUNTIME
5690 #endif
5691 }
5692 check_no_compiler_messages_nocache c99_runtime assembly \
5693 $contents [add_options_for_c99_runtime ""]
5694 }]
5695 }
5696
5697 # Return 1 if target wchar_t is at least 4 bytes.
5698
5699 proc check_effective_target_4byte_wchar_t { } {
5700 return [check_no_compiler_messages 4byte_wchar_t object {
5701 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
5702 }]
5703 }
5704
5705 # Return 1 if the target supports automatic stack alignment.
5706
5707 proc check_effective_target_automatic_stack_alignment { } {
5708 # Ordinarily x86 supports automatic stack alignment ...
5709 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
5710 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
5711 # ... except Win64 SEH doesn't. Succeed for Win32 though.
5712 return [check_effective_target_ilp32];
5713 }
5714 return 1;
5715 }
5716 return 0;
5717 }
5718
5719 # Return true if we are compiling for AVX target.
5720
5721 proc check_avx_available { } {
5722 if { [check_no_compiler_messages avx_available assembly {
5723 #ifndef __AVX__
5724 #error unsupported
5725 #endif
5726 } ""] } {
5727 return 1;
5728 }
5729 return 0;
5730 }
5731
5732 # Return true if 32- and 16-bytes vectors are available.
5733
5734 proc check_effective_target_vect_sizes_32B_16B { } {
5735 if { [check_avx_available] && ![check_prefer_avx128] } {
5736 return 1;
5737 } else {
5738 return 0;
5739 }
5740 }
5741
5742 # Return true if 128-bits vectors are preferred even if 256-bits vectors
5743 # are available.
5744
5745 proc check_prefer_avx128 { } {
5746 if ![check_avx_available] {
5747 return 0;
5748 }
5749 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
5750 float a[1024],b[1024],c[1024];
5751 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
5752 } "-O2 -ftree-vectorize"]
5753 }
5754
5755
5756 # Return 1 if avx512f instructions can be compiled.
5757
5758 proc check_effective_target_avx512f { } {
5759 return [check_no_compiler_messages avx512f object {
5760 typedef double __m512d __attribute__ ((__vector_size__ (64)));
5761
5762 __m512d _mm512_add (__m512d a)
5763 {
5764 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
5765 }
5766 } "-O2 -mavx512f" ]
5767 }
5768
5769 # Return 1 if avx instructions can be compiled.
5770
5771 proc check_effective_target_avx { } {
5772 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
5773 return 0
5774 }
5775 return [check_no_compiler_messages avx object {
5776 void _mm256_zeroall (void)
5777 {
5778 __builtin_ia32_vzeroall ();
5779 }
5780 } "-O2 -mavx" ]
5781 }
5782
5783 # Return 1 if avx2 instructions can be compiled.
5784 proc check_effective_target_avx2 { } {
5785 return [check_no_compiler_messages avx2 object {
5786 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
5787 __v4di
5788 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
5789 {
5790 return __builtin_ia32_andnotsi256 (__X, __Y);
5791 }
5792 } "-O0 -mavx2" ]
5793 }
5794
5795 # Return 1 if sse instructions can be compiled.
5796 proc check_effective_target_sse { } {
5797 return [check_no_compiler_messages sse object {
5798 int main ()
5799 {
5800 __builtin_ia32_stmxcsr ();
5801 return 0;
5802 }
5803 } "-O2 -msse" ]
5804 }
5805
5806 # Return 1 if sse2 instructions can be compiled.
5807 proc check_effective_target_sse2 { } {
5808 return [check_no_compiler_messages sse2 object {
5809 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
5810
5811 __m128i _mm_srli_si128 (__m128i __A, int __N)
5812 {
5813 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
5814 }
5815 } "-O2 -msse2" ]
5816 }
5817
5818 # Return 1 if F16C instructions can be compiled.
5819
5820 proc check_effective_target_f16c { } {
5821 return [check_no_compiler_messages f16c object {
5822 #include "immintrin.h"
5823 float
5824 foo (unsigned short val)
5825 {
5826 return _cvtsh_ss (val);
5827 }
5828 } "-O2 -mf16c" ]
5829 }
5830
5831 # Return 1 if C wchar_t type is compatible with char16_t.
5832
5833 proc check_effective_target_wchar_t_char16_t_compatible { } {
5834 return [check_no_compiler_messages wchar_t_char16_t object {
5835 __WCHAR_TYPE__ wc;
5836 __CHAR16_TYPE__ *p16 = &wc;
5837 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
5838 }]
5839 }
5840
5841 # Return 1 if C wchar_t type is compatible with char32_t.
5842
5843 proc check_effective_target_wchar_t_char32_t_compatible { } {
5844 return [check_no_compiler_messages wchar_t_char32_t object {
5845 __WCHAR_TYPE__ wc;
5846 __CHAR32_TYPE__ *p32 = &wc;
5847 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
5848 }]
5849 }
5850
5851 # Return 1 if pow10 function exists.
5852
5853 proc check_effective_target_pow10 { } {
5854 return [check_runtime pow10 {
5855 #include <math.h>
5856 int main () {
5857 double x;
5858 x = pow10 (1);
5859 return 0;
5860 }
5861 } "-lm" ]
5862 }
5863
5864 # Return 1 if current options generate DFP instructions, 0 otherwise.
5865
5866 proc check_effective_target_hard_dfp {} {
5867 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
5868 typedef float d64 __attribute__((mode(DD)));
5869 d64 x, y, z;
5870 void foo (void) { z = x + y; }
5871 }]
5872 }
5873
5874 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
5875 # for strchr etc. functions.
5876
5877 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
5878 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
5879 #include <string.h>
5880 #include <wchar.h>
5881 #if !defined(__cplusplus) \
5882 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
5883 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
5884 ISO C++ correct string.h and wchar.h protos not supported.
5885 #else
5886 int i;
5887 #endif
5888 }]
5889 }
5890
5891 # Return 1 if GNU as is used.
5892
5893 proc check_effective_target_gas { } {
5894 global use_gas_saved
5895 global tool
5896
5897 if {![info exists use_gas_saved]} {
5898 # Check if the as used by gcc is GNU as.
5899 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
5900 # Provide /dev/null as input, otherwise gas times out reading from
5901 # stdin.
5902 set status [remote_exec host "$gcc_as" "-v /dev/null"]
5903 set as_output [lindex $status 1]
5904 if { [ string first "GNU" $as_output ] >= 0 } {
5905 set use_gas_saved 1
5906 } else {
5907 set use_gas_saved 0
5908 }
5909 }
5910 return $use_gas_saved
5911 }
5912
5913 # Return 1 if GNU ld is used.
5914
5915 proc check_effective_target_gld { } {
5916 global use_gld_saved
5917 global tool
5918
5919 if {![info exists use_gld_saved]} {
5920 # Check if the ld used by gcc is GNU ld.
5921 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
5922 set status [remote_exec host "$gcc_ld" "--version"]
5923 set ld_output [lindex $status 1]
5924 if { [ string first "GNU" $ld_output ] >= 0 } {
5925 set use_gld_saved 1
5926 } else {
5927 set use_gld_saved 0
5928 }
5929 }
5930 return $use_gld_saved
5931 }
5932
5933 # Return 1 if the compiler has been configure with link-time optimization
5934 # (LTO) support.
5935
5936 proc check_effective_target_lto { } {
5937 if { [istarget nvptx-*-*] } {
5938 return 0;
5939 }
5940 return [check_no_compiler_messages lto object {
5941 void foo (void) { }
5942 } "-flto"]
5943 }
5944
5945 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
5946
5947 proc check_effective_target_maybe_x32 { } {
5948 return [check_no_compiler_messages maybe_x32 object {
5949 void foo (void) {}
5950 } "-mx32 -maddress-mode=short"]
5951 }
5952
5953 # Return 1 if this target supports the -fsplit-stack option, 0
5954 # otherwise.
5955
5956 proc check_effective_target_split_stack {} {
5957 return [check_no_compiler_messages split_stack object {
5958 void foo (void) { }
5959 } "-fsplit-stack"]
5960 }
5961
5962 # Return 1 if this target supports the -masm=intel option, 0
5963 # otherwise
5964
5965 proc check_effective_target_masm_intel {} {
5966 return [check_no_compiler_messages masm_intel object {
5967 extern void abort (void);
5968 } "-masm=intel"]
5969 }
5970
5971 # Return 1 if the language for the compiler under test is C.
5972
5973 proc check_effective_target_c { } {
5974 global tool
5975 if [string match $tool "gcc"] {
5976 return 1
5977 }
5978 return 0
5979 }
5980
5981 # Return 1 if the language for the compiler under test is C++.
5982
5983 proc check_effective_target_c++ { } {
5984 global tool
5985 if [string match $tool "g++"] {
5986 return 1
5987 }
5988 return 0
5989 }
5990
5991 set cxx_default "c++14"
5992 # Check whether the current active language standard supports the features
5993 # of C++11/C++14 by checking for the presence of one of the -std flags.
5994 # This assumes that the default for the compiler is $cxx_default, and that
5995 # there will never be multiple -std= arguments on the command line.
5996 proc check_effective_target_c++11_only { } {
5997 global cxx_default
5998 if ![check_effective_target_c++] {
5999 return 0
6000 }
6001 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
6002 return 1
6003 }
6004 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
6005 return 1
6006 }
6007 return 0
6008 }
6009 proc check_effective_target_c++11 { } {
6010 if [check_effective_target_c++11_only] {
6011 return 1
6012 }
6013 return [check_effective_target_c++14]
6014 }
6015 proc check_effective_target_c++11_down { } {
6016 if ![check_effective_target_c++] {
6017 return 0
6018 }
6019 return [expr ![check_effective_target_c++14] ]
6020 }
6021
6022 proc check_effective_target_c++14_only { } {
6023 global cxx_default
6024 if ![check_effective_target_c++] {
6025 return 0
6026 }
6027 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
6028 return 1
6029 }
6030 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
6031 return 1
6032 }
6033 return 0
6034 }
6035
6036 proc check_effective_target_c++14 { } {
6037 if [check_effective_target_c++14_only] {
6038 return 1
6039 }
6040 return [check_effective_target_c++1z]
6041 }
6042 proc check_effective_target_c++14_down { } {
6043 if ![check_effective_target_c++] {
6044 return 0
6045 }
6046 return [expr ![check_effective_target_c++1z] ]
6047 }
6048
6049 proc check_effective_target_c++98_only { } {
6050 global cxx_default
6051 if ![check_effective_target_c++] {
6052 return 0
6053 }
6054 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
6055 return 1
6056 }
6057 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
6058 return 1
6059 }
6060 return 0
6061 }
6062
6063 proc check_effective_target_c++1z_only { } {
6064 global cxx_default
6065 if ![check_effective_target_c++] {
6066 return 0
6067 }
6068 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
6069 return 1
6070 }
6071 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
6072 return 1
6073 }
6074 return 0
6075 }
6076 proc check_effective_target_c++1z { } {
6077 return [check_effective_target_c++1z_only]
6078 }
6079
6080 # Return 1 if expensive testcases should be run.
6081
6082 proc check_effective_target_run_expensive_tests { } {
6083 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
6084 return 1
6085 }
6086 return 0
6087 }
6088
6089 # Returns 1 if "mempcpy" is available on the target system.
6090
6091 proc check_effective_target_mempcpy {} {
6092 return [check_function_available "mempcpy"]
6093 }
6094
6095 # Returns 1 if "stpcpy" is available on the target system.
6096
6097 proc check_effective_target_stpcpy {} {
6098 return [check_function_available "stpcpy"]
6099 }
6100
6101 # Check whether the vectorizer tests are supported by the target and
6102 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
6103 # Set dg-do-what-default to either compile or run, depending on target
6104 # capabilities. Return 1 if vectorizer tests are supported by
6105 # target, 0 otherwise.
6106
6107 proc check_vect_support_and_set_flags { } {
6108 global DEFAULT_VECTCFLAGS
6109 global dg-do-what-default
6110
6111 if [istarget powerpc-*paired*] {
6112 lappend DEFAULT_VECTCFLAGS "-mpaired"
6113 if [check_750cl_hw_available] {
6114 set dg-do-what-default run
6115 } else {
6116 set dg-do-what-default compile
6117 }
6118 } elseif [istarget powerpc*-*-*] {
6119 # Skip targets not supporting -maltivec.
6120 if ![is-effective-target powerpc_altivec_ok] {
6121 return 0
6122 }
6123
6124 lappend DEFAULT_VECTCFLAGS "-maltivec"
6125 if [check_p8vector_hw_available] {
6126 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
6127 } elseif [check_vsx_hw_available] {
6128 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
6129 }
6130
6131 if [check_vmx_hw_available] {
6132 set dg-do-what-default run
6133 } else {
6134 if [is-effective-target ilp32] {
6135 # Specify a cpu that supports VMX for compile-only tests.
6136 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
6137 }
6138 set dg-do-what-default compile
6139 }
6140 } elseif { [istarget spu-*-*] } {
6141 set dg-do-what-default run
6142 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
6143 lappend DEFAULT_VECTCFLAGS "-msse2"
6144 if { [check_effective_target_sse2_runtime] } {
6145 set dg-do-what-default run
6146 } else {
6147 set dg-do-what-default compile
6148 }
6149 } elseif { [istarget mips*-*-*]
6150 && ([check_effective_target_mpaired_single]
6151 || [check_effective_target_mips_loongson])
6152 && [check_effective_target_nomips16] } {
6153 if { [check_effective_target_mpaired_single] } {
6154 lappend DEFAULT_VECTCFLAGS "-mpaired-single"
6155 }
6156 set dg-do-what-default run
6157 } elseif [istarget sparc*-*-*] {
6158 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
6159 if [check_effective_target_ultrasparc_hw] {
6160 set dg-do-what-default run
6161 } else {
6162 set dg-do-what-default compile
6163 }
6164 } elseif [istarget alpha*-*-*] {
6165 # Alpha's vectorization capabilities are extremely limited.
6166 # It's more effort than its worth disabling all of the tests
6167 # that it cannot pass. But if you actually want to see what
6168 # does work, command out the return.
6169 return 0
6170
6171 lappend DEFAULT_VECTCFLAGS "-mmax"
6172 if [check_alpha_max_hw_available] {
6173 set dg-do-what-default run
6174 } else {
6175 set dg-do-what-default compile
6176 }
6177 } elseif [istarget ia64-*-*] {
6178 set dg-do-what-default run
6179 } elseif [is-effective-target arm_neon_ok] {
6180 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
6181 # NEON does not support denormals, so is not used for vectorization by
6182 # default to avoid loss of precision. We must pass -ffast-math to test
6183 # vectorization of float operations.
6184 lappend DEFAULT_VECTCFLAGS "-ffast-math"
6185 if [is-effective-target arm_neon_hw] {
6186 set dg-do-what-default run
6187 } else {
6188 set dg-do-what-default compile
6189 }
6190 } elseif [istarget "aarch64*-*-*"] {
6191 set dg-do-what-default run
6192 } else {
6193 return 0
6194 }
6195
6196 return 1
6197 }
6198
6199 # Return 1 if the target does *not* require strict alignment.
6200
6201 proc check_effective_target_non_strict_align {} {
6202 return [check_no_compiler_messages non_strict_align assembly {
6203 char *y;
6204 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
6205 c *z;
6206 void foo(void) { z = (c *) y; }
6207 } "-Wcast-align"]
6208 }
6209
6210 # Return 1 if the target has <ucontext.h>.
6211
6212 proc check_effective_target_ucontext_h { } {
6213 return [check_no_compiler_messages ucontext_h assembly {
6214 #include <ucontext.h>
6215 }]
6216 }
6217
6218 proc check_effective_target_aarch64_tiny { } {
6219 if { [istarget aarch64*-*-*] } {
6220 return [check_no_compiler_messages aarch64_tiny object {
6221 #ifdef __AARCH64_CMODEL_TINY__
6222 int dummy;
6223 #else
6224 #error target not AArch64 tiny code model
6225 #endif
6226 }]
6227 } else {
6228 return 0
6229 }
6230 }
6231
6232 proc check_effective_target_aarch64_small { } {
6233 if { [istarget aarch64*-*-*] } {
6234 return [check_no_compiler_messages aarch64_small object {
6235 #ifdef __AARCH64_CMODEL_SMALL__
6236 int dummy;
6237 #else
6238 #error target not AArch64 small code model
6239 #endif
6240 }]
6241 } else {
6242 return 0
6243 }
6244 }
6245
6246 proc check_effective_target_aarch64_large { } {
6247 if { [istarget aarch64*-*-*] } {
6248 return [check_no_compiler_messages aarch64_large object {
6249 #ifdef __AARCH64_CMODEL_LARGE__
6250 int dummy;
6251 #else
6252 #error target not AArch64 large code model
6253 #endif
6254 }]
6255 } else {
6256 return 0
6257 }
6258 }
6259
6260 # Return 1 if <fenv.h> is available with all the standard IEEE
6261 # exceptions and floating-point exceptions are raised by arithmetic
6262 # operations. (If the target requires special options for "inexact"
6263 # exceptions, those need to be specified in the testcases.)
6264
6265 proc check_effective_target_fenv_exceptions {} {
6266 return [check_runtime fenv_exceptions {
6267 #include <fenv.h>
6268 #include <stdlib.h>
6269 #ifndef FE_DIVBYZERO
6270 # error Missing FE_DIVBYZERO
6271 #endif
6272 #ifndef FE_INEXACT
6273 # error Missing FE_INEXACT
6274 #endif
6275 #ifndef FE_INVALID
6276 # error Missing FE_INVALID
6277 #endif
6278 #ifndef FE_OVERFLOW
6279 # error Missing FE_OVERFLOW
6280 #endif
6281 #ifndef FE_UNDERFLOW
6282 # error Missing FE_UNDERFLOW
6283 #endif
6284 volatile float a = 0.0f, r;
6285 int
6286 main (void)
6287 {
6288 r = a / a;
6289 if (fetestexcept (FE_INVALID))
6290 exit (0);
6291 else
6292 abort ();
6293 }
6294 } [add_options_for_ieee "-std=gnu99"]]
6295 }
6296
6297 proc check_effective_target_tiny {} {
6298 global et_target_tiny_saved
6299
6300 if [info exists et_target_tine_saved] {
6301 verbose "check_effective_target_tiny: using cached result" 2
6302 } else {
6303 set et_target_tiny_saved 0
6304 if { [istarget aarch64*-*-*]
6305 && [check_effective_target_aarch64_tiny] } {
6306 set et_target_tiny_saved 1
6307 }
6308 }
6309
6310 return $et_target_tiny_saved
6311 }
6312
6313 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
6314
6315 proc check_effective_target_logical_op_short_circuit {} {
6316 if { [istarget mips*-*-*]
6317 || [istarget arc*-*-*]
6318 || [istarget avr*-*-*]
6319 || [istarget crisv32-*-*] || [istarget cris-*-*]
6320 || [istarget mmix-*-*]
6321 || [istarget s390*-*-*]
6322 || [istarget powerpc*-*-*]
6323 || [istarget nios2*-*-*]
6324 || [istarget visium-*-*]
6325 || [check_effective_target_arm_cortex_m] } {
6326 return 1
6327 }
6328 return 0
6329 }
6330
6331 # Record that dg-final test TEST requires convential compilation.
6332
6333 proc force_conventional_output_for { test } {
6334 if { [info proc $test] == "" } {
6335 perror "$test does not exist"
6336 exit 1
6337 }
6338 proc ${test}_required_options {} {
6339 global gcc_force_conventional_output
6340 return $gcc_force_conventional_output
6341 }
6342 }
6343
6344 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
6345 # otherwise. Cache the result.
6346
6347 proc check_effective_target_pie_copyreloc { } {
6348 global pie_copyreloc_available_saved
6349 global tool
6350 global GCC_UNDER_TEST
6351
6352 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
6353 return 0
6354 }
6355
6356 # Need auto-host.h to check linker support.
6357 if { ![file exists ../../auto-host.h ] } {
6358 return 0
6359 }
6360
6361 if [info exists pie_copyreloc_available_saved] {
6362 verbose "check_effective_target_pie_copyreloc returning saved $pie_copyreloc_available_saved" 2
6363 } else {
6364 # Set up and compile to see if linker supports PIE with copy
6365 # reloc. Include the current process ID in the file names to
6366 # prevent conflicts with invocations for multiple testsuites.
6367
6368 set src pie[pid].c
6369 set obj pie[pid].o
6370
6371 set f [open $src "w"]
6372 puts $f "#include \"../../auto-host.h\""
6373 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
6374 puts $f "# error Linker does not support PIE with copy reloc."
6375 puts $f "#endif"
6376 close $f
6377
6378 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
6379 set lines [${tool}_target_compile $src $obj object ""]
6380
6381 file delete $src
6382 file delete $obj
6383
6384 if [string match "" $lines] then {
6385 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
6386 set pie_copyreloc_available_saved 1
6387 } else {
6388 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
6389 set pie_copyreloc_available_saved 0
6390 }
6391 }
6392
6393 return $pie_copyreloc_available_saved
6394 }
6395
6396 # Return 1 if the target uses comdat groups.
6397
6398 proc check_effective_target_comdat_group {} {
6399 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat" assembly {
6400 // C++
6401 inline int foo () { return 1; }
6402 int (*fn) () = foo;
6403 }]
6404 }