1 # Copyright (C) 1999-2016 Free Software Foundation, Inc.
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC; see the file COPYING3. If not see
15 # <http://www.gnu.org/licenses/>.
17 # Please email any bugs, comments, and/or additions to this file to:
18 # gcc-patches@gcc.gnu.org
20 # This file defines procs for determining features supported by the target.
22 # Try to compile the code given by CONTENTS into an output file of
23 # type TYPE, where TYPE is as for target_compile. Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the name of the output file.
27 # BASENAME is a prefix to use for source and output files.
28 # If ARGS is not empty, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise, code should contain:
34 # "! Fortran" for Fortran code,
36 # "// ObjC++" for ObjC++
38 # If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
39 # allow for ObjC/ObjC++ specific flags.
40 proc check_compile {basename type contents args} {
42 verbose "check_compile tool: $tool for $basename"
44 # Save additional_sources to avoid compiling testsuite's sources
45 # against check_compile's source.
46 global additional_sources
47 if [info exists additional_sources] {
48 set tmp_additional_sources "$additional_sources"
49 set additional_sources ""
52 if { [llength $args] > 0 } {
53 set options [list "additional_flags=[lindex $args 0]"]
57 switch -glob -- $contents {
58 "*! Fortran*" { set src ${basename}[pid].f90 }
59 "*// C++*" { set src ${basename}[pid].cc }
60 "*// ObjC++*" { set src ${basename}[pid].mm }
61 "*/* ObjC*" { set src ${basename}[pid].m }
62 "*// Go*" { set src ${basename}[pid].go }
65 "objc" { set src ${basename}[pid].m }
66 "obj-c++" { set src ${basename}[pid].mm }
67 default { set src ${basename}[pid].c }
72 set compile_type $type
74 assembly { set output ${basename}[pid].s }
75 object { set output ${basename}[pid].o }
76 executable { set output ${basename}[pid].exe }
78 set output ${basename}[pid].s
79 lappend options "additional_flags=-fdump-$type"
80 set compile_type assembly
86 set lines [${tool}_target_compile $src $output $compile_type "$options"]
89 set scan_output $output
90 # Don't try folding this into the switch above; calling "glob" before the
91 # file is created won't work.
92 if [regexp "rtl-(.*)" $type dummy rtl_type] {
93 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
97 # Restore additional_sources.
98 if [info exists additional_sources] {
99 set additional_sources "$tmp_additional_sources"
102 return [list $lines $scan_output]
105 proc current_target_name { } {
107 if [info exists target_info(target,name)] {
108 set answer $target_info(target,name)
115 # Implement an effective-target check for property PROP by invoking
116 # the Tcl command ARGS and seeing if it returns true.
118 proc check_cached_effective_target { prop args } {
122 set target [current_target_name]
123 if {![info exists et_cache($prop,target)]
124 || $et_cache($prop,target) != $target} {
125 verbose "check_cached_effective_target $prop: checking $target" 2
126 set et_cache($prop,target) $target
127 set et_cache($prop,value) [uplevel eval $args]
128 if {![info exists et_prop_list]
129 || [lsearch $et_prop_list $prop] < 0} {
130 lappend et_prop_list $prop
132 verbose "check_cached_effective_target cached list is now: $et_prop_list" 2
134 set value $et_cache($prop,value)
135 verbose "check_cached_effective_target $prop: returning $value for $target" 2
139 # Clear effective-target cache. This is useful after testing
140 # effective-target features and overriding TEST_ALWAYS_FLAGS and/or
142 # If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS then they should
143 # do a clear_effective_target_cache at the end as the target cache can
144 # make decisions based upon the flags, and those decisions need to be
145 # redone when the flags change. An example of this is the
146 # asan_init/asan_finish pair.
148 proc clear_effective_target_cache { } {
152 if {[info exists et_prop_list]} {
153 verbose "clear_effective_target_cache: $et_prop_list" 2
154 foreach prop $et_prop_list {
155 unset et_cache($prop,value)
156 unset et_cache($prop,target)
162 # Like check_compile, but delete the output file and return true if the
163 # compiler printed no messages.
164 proc check_no_compiler_messages_nocache {args} {
165 set result [eval check_compile $args]
166 set lines [lindex $result 0]
167 set output [lindex $result 1]
168 remote_file build delete $output
169 return [string match "" $lines]
172 # Like check_no_compiler_messages_nocache, but cache the result.
173 # PROP is the property we're checking, and doubles as a prefix for
174 # temporary filenames.
175 proc check_no_compiler_messages {prop args} {
176 return [check_cached_effective_target $prop {
177 eval [list check_no_compiler_messages_nocache $prop] $args
181 # Like check_compile, but return true if the compiler printed no
182 # messages and if the contents of the output file satisfy PATTERN.
183 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
184 # don't match regular expression REGEXP, otherwise they satisfy it
185 # if they do match regular expression PATTERN. (PATTERN can start
186 # with something like "[!]" if the regular expression needs to match
187 # "!" as the first character.)
189 # Delete the output file before returning. The other arguments are
190 # as for check_compile.
191 proc check_no_messages_and_pattern_nocache {basename pattern args} {
194 set result [eval [list check_compile $basename] $args]
195 set lines [lindex $result 0]
196 set output [lindex $result 1]
199 if { [string match "" $lines] } {
200 set chan [open "$output"]
201 set invert [regexp {^!(.*)} $pattern dummy pattern]
202 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
206 remote_file build delete $output
210 # Like check_no_messages_and_pattern_nocache, but cache the result.
211 # PROP is the property we're checking, and doubles as a prefix for
212 # temporary filenames.
213 proc check_no_messages_and_pattern {prop pattern args} {
214 return [check_cached_effective_target $prop {
215 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
219 # Try to compile and run an executable from code CONTENTS. Return true
220 # if the compiler reports no messages and if execution "passes" in the
221 # usual DejaGNU sense. The arguments are as for check_compile, with
222 # TYPE implicitly being "executable".
223 proc check_runtime_nocache {basename contents args} {
226 set result [eval [list check_compile $basename executable $contents] $args]
227 set lines [lindex $result 0]
228 set output [lindex $result 1]
231 if { [string match "" $lines] } {
232 # No error messages, everything is OK.
233 set result [remote_load target "./$output" "" ""]
234 set status [lindex $result 0]
235 verbose "check_runtime_nocache $basename: status is <$status>" 2
236 if { $status == "pass" } {
240 remote_file build delete $output
244 # Like check_runtime_nocache, but cache the result. PROP is the
245 # property we're checking, and doubles as a prefix for temporary
247 proc check_runtime {prop args} {
250 return [check_cached_effective_target $prop {
251 eval [list check_runtime_nocache $prop] $args
255 ###############################
256 # proc check_weak_available { }
257 ###############################
259 # weak symbols are only supported in some configs/object formats
260 # this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
262 proc check_weak_available { } {
265 # All mips targets should support it
267 if { [ string first "mips" $target_cpu ] >= 0 } {
271 # All AIX targets should support it
273 if { [istarget *-*-aix*] } {
277 # All solaris2 targets should support it
279 if { [istarget *-*-solaris2*] } {
283 # Windows targets Cygwin and MingW32 support it
285 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
289 # HP-UX 10.X doesn't support it
291 if { [istarget hppa*-*-hpux10*] } {
295 # nvptx (nearly) supports it
297 if { [istarget nvptx-*-*] } {
301 # ELF and ECOFF support it. a.out does with gas/gld but may also with
302 # other linkers, so we should try it
304 set objformat [gcc_target_object_format]
312 unknown { return -1 }
317 ###############################
318 # proc check_weak_override_available { }
319 ###############################
321 # Like check_weak_available, but return 0 if weak symbol definitions
322 # cannot be overridden.
324 proc check_weak_override_available { } {
325 if { [istarget *-*-mingw*] } {
328 return [check_weak_available]
331 ###############################
332 # proc check_visibility_available { what_kind }
333 ###############################
335 # The visibility attribute is only support in some object formats
336 # This proc returns 1 if it is supported, 0 if not.
337 # The argument is the kind of visibility, default/protected/hidden/internal.
339 proc check_visibility_available { what_kind } {
340 if [string match "" $what_kind] { set what_kind "hidden" }
342 return [check_no_compiler_messages visibility_available_$what_kind object "
343 void f() __attribute__((visibility(\"$what_kind\")));
348 ###############################
349 # proc check_alias_available { }
350 ###############################
352 # Determine if the target toolchain supports the alias attribute.
354 # Returns 2 if the target supports aliases. Returns 1 if the target
355 # only supports weak aliased. Returns 0 if the target does not
356 # support aliases at all. Returns -1 if support for aliases could not
359 proc check_alias_available { } {
360 global alias_available_saved
363 if [info exists alias_available_saved] {
364 verbose "check_alias_available returning saved $alias_available_saved" 2
368 verbose "check_alias_available compiling testfile $src" 2
369 set f [open $src "w"]
370 # Compile a small test program. The definition of "g" is
371 # necessary to keep the Solaris assembler from complaining
373 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
374 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
376 set lines [${tool}_target_compile $src $obj object ""]
378 remote_file build delete $obj
380 if [string match "" $lines] then {
381 # No error messages, everything is OK.
382 set alias_available_saved 2
384 if [regexp "alias definitions not supported" $lines] {
385 verbose "check_alias_available target does not support aliases" 2
387 set objformat [gcc_target_object_format]
389 if { $objformat == "elf" } {
390 verbose "check_alias_available but target uses ELF format, so it ought to" 2
391 set alias_available_saved -1
393 set alias_available_saved 0
396 if [regexp "only weak aliases are supported" $lines] {
397 verbose "check_alias_available target supports only weak aliases" 2
398 set alias_available_saved 1
400 set alias_available_saved -1
405 verbose "check_alias_available returning $alias_available_saved" 2
408 return $alias_available_saved
411 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
413 proc check_effective_target_alias { } {
414 if { [check_alias_available] < 2 } {
421 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
423 proc check_ifunc_available { } {
424 return [check_no_compiler_messages ifunc_available object {
429 void f() __attribute__((ifunc("g")));
433 # Returns true if --gc-sections is supported on the target.
435 proc check_gc_sections_available { } {
436 global gc_sections_available_saved
439 if {![info exists gc_sections_available_saved]} {
440 # Some targets don't support gc-sections despite whatever's
441 # advertised by ld's options.
442 if { [istarget alpha*-*-*]
443 || [istarget ia64-*-*] } {
444 set gc_sections_available_saved 0
448 # elf2flt uses -q (--emit-relocs), which is incompatible with
450 if { [board_info target exists ldflags]
451 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
452 set gc_sections_available_saved 0
456 # VxWorks kernel modules are relocatable objects linked with -r,
457 # while RTP executables are linked with -q (--emit-relocs).
458 # Both of these options are incompatible with --gc-sections.
459 if { [istarget *-*-vxworks*] } {
460 set gc_sections_available_saved 0
464 # Check if the ld used by gcc supports --gc-sections.
465 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
466 set ld_output [remote_exec host "$gcc_ld" "--help"]
467 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
468 set gc_sections_available_saved 1
470 set gc_sections_available_saved 0
473 return $gc_sections_available_saved
476 # Return 1 if according to target_info struct and explicit target list
477 # target is supposed to support trampolines.
479 proc check_effective_target_trampolines { } {
480 if [target_info exists no_trampolines] {
483 if { [istarget avr-*-*]
484 || [istarget msp430-*-*]
485 || [istarget nvptx-*-*]
486 || [istarget hppa2.0w-hp-hpux11.23]
487 || [istarget hppa64-hp-hpux11.23] } {
493 # Return 1 if according to target_info struct and explicit target list
494 # target disables -fdelete-null-pointer-checks. Targets should return 0
495 # if they simply default to -fno-delete-null-pointer-checks but obey
496 # -fdelete-null-pointer-checks when passed explicitly (and tests that
497 # depend on this option should do that).
499 proc check_effective_target_keeps_null_pointer_checks { } {
500 if [target_info exists keeps_null_pointer_checks] {
503 if { [istarget avr-*-*] } {
509 # Return the autofdo profile wrapper
511 proc profopt-perf-wrapper { } {
513 return "$srcdir/../config/i386/gcc-auto-profile -o perf.data "
516 # Return true if profiling is supported on the target.
518 proc check_profiling_available { test_what } {
519 global profiling_available_saved
521 verbose "Profiling argument is <$test_what>" 1
523 # These conditions depend on the argument so examine them before
524 # looking at the cache variable.
526 # Tree profiling requires TLS runtime support.
527 if { $test_what == "-fprofile-generate" } {
528 if { ![check_effective_target_tls_runtime] } {
533 if { $test_what == "-fauto-profile" } {
534 if { !([istarget i?86-*-linux*] || [istarget x86_64-*-linux*]) } {
535 verbose "autofdo only supported on linux"
538 # not cross compiling?
540 verbose "autofdo not supported for non native builds"
543 set event [profopt-perf-wrapper]
545 verbose "autofdo not supported"
549 set status [remote_exec host "$srcdir/../config/i386/gcc-auto-profile" "true -v >/dev/null"]
550 if { [lindex $status 0] != 0 } {
551 verbose "autofdo not supported because perf does not work"
555 # no good way to check this in advance -- check later instead.
556 #set status [remote_exec host "create_gcov" "2>/dev/null"]
557 #if { [lindex $status 0] != 255 } {
558 # verbose "autofdo not supported due to missing create_gcov"
563 # Support for -p on solaris2 relies on mcrt1.o which comes with the
564 # vendor compiler. We cannot reliably predict the directory where the
565 # vendor compiler (and thus mcrt1.o) is installed so we can't
566 # necessarily find mcrt1.o even if we have it.
567 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
571 # We don't yet support profiling for MIPS16.
572 if { [istarget mips*-*-*]
573 && ![check_effective_target_nomips16]
574 && ($test_what == "-p" || $test_what == "-pg") } {
578 # MinGW does not support -p.
579 if { [istarget *-*-mingw*] && $test_what == "-p" } {
583 # cygwin does not support -p.
584 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
588 # uClibc does not have gcrt1.o.
589 if { [check_effective_target_uclibc]
590 && ($test_what == "-p" || $test_what == "-pg") } {
594 # Now examine the cache variable.
595 if {![info exists profiling_available_saved]} {
596 # Some targets don't have any implementation of __bb_init_func or are
597 # missing other needed machinery.
598 if {[istarget aarch64*-*-elf]
599 || [istarget am3*-*-linux*]
600 || [istarget arm*-*-eabi*]
601 || [istarget arm*-*-elf]
602 || [istarget arm*-*-symbianelf*]
603 || [istarget avr-*-*]
604 || [istarget bfin-*-*]
605 || [istarget cris-*-*]
606 || [istarget crisv32-*-*]
607 || [istarget fido-*-elf]
608 || [istarget h8300-*-*]
609 || [istarget lm32-*-*]
610 || [istarget m32c-*-elf]
611 || [istarget m68k-*-elf]
612 || [istarget m68k-*-uclinux*]
613 || [istarget mips*-*-elf*]
614 || [istarget mmix-*-*]
615 || [istarget mn10300-*-elf*]
616 || [istarget moxie-*-elf*]
617 || [istarget msp430-*-*]
618 || [istarget nds32*-*-elf]
619 || [istarget nios2-*-elf]
620 || [istarget nvptx-*-*]
621 || [istarget powerpc-*-eabi*]
622 || [istarget powerpc-*-elf]
624 || [istarget tic6x-*-elf]
625 || [istarget visium-*-*]
626 || [istarget xstormy16-*]
627 || [istarget xtensa*-*-elf]
628 || [istarget *-*-rtems*]
629 || [istarget *-*-vxworks*] } {
630 set profiling_available_saved 0
632 set profiling_available_saved 1
636 # -pg link test result can't be cached since it may change between
638 set profiling_working $profiling_available_saved
639 if { $profiling_available_saved == 1
640 && ![check_no_compiler_messages_nocache profiling executable {
641 int main() { return 0; } } "-pg"] } {
642 set profiling_working 0
645 return $profiling_working
648 # Check to see if a target is "freestanding". This is as per the definition
649 # in Section 4 of C99 standard. Effectively, it is a target which supports no
650 # extra headers or libraries other than what is considered essential.
651 proc check_effective_target_freestanding { } {
652 if { [istarget nvptx-*-*] } {
658 # Return 1 if target has packed layout of structure members by
659 # default, 0 otherwise. Note that this is slightly different than
660 # whether the target has "natural alignment": both attributes may be
663 proc check_effective_target_default_packed { } {
664 return [check_no_compiler_messages default_packed assembly {
665 struct x { char a; long b; } c;
666 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
670 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
671 # documentation, where the test also comes from.
673 proc check_effective_target_pcc_bitfield_type_matters { } {
674 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
675 # bitfields, but let's stick to the example code from the docs.
676 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
677 struct foo1 { char x; char :0; char y; };
678 struct foo2 { char x; int :0; char y; };
679 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
683 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
685 proc add_options_for_tls { flags } {
686 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
687 # libthread, so always pass -pthread for native TLS. Same for AIX.
688 # Need to duplicate native TLS check from
689 # check_effective_target_tls_native to avoid recursion.
690 if { ([istarget powerpc-ibm-aix*]) &&
691 [check_no_messages_and_pattern tls_native "!emutls" assembly {
693 int f (void) { return i; }
694 void g (int j) { i = j; }
696 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
701 # Return 1 if indirect jumps are supported, 0 otherwise.
703 proc check_effective_target_indirect_jumps {} {
704 if { [istarget nvptx-*-*] } {
710 # Return 1 if nonlocal goto is supported, 0 otherwise.
712 proc check_effective_target_nonlocal_goto {} {
713 if { [istarget nvptx-*-*] } {
719 # Return 1 if global constructors are supported, 0 otherwise.
721 proc check_effective_target_global_constructor {} {
722 if { [istarget nvptx-*-*] } {
728 # Return 1 if taking label values is supported, 0 otherwise.
730 proc check_effective_target_label_values {} {
731 if { [istarget nvptx-*-*] } {
734 return [check_no_compiler_messages label_values assembly {
735 #ifdef NO_LABEL_VALUES
741 # Return 1 if builtin_return_address and builtin_frame_address are
742 # supported, 0 otherwise.
744 proc check_effective_target_return_address {} {
745 if { [istarget nvptx-*-*] } {
751 # Return 1 if the assembler does not verify function types against
752 # calls, 0 otherwise. Such verification will typically show up problems
753 # with K&R C function declarations.
755 proc check_effective_target_untyped_assembly {} {
756 if { [istarget nvptx-*-*] } {
762 # Return 1 if alloca is supported, 0 otherwise.
764 proc check_effective_target_alloca {} {
765 if { [istarget nvptx-*-*] } {
771 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
773 proc check_effective_target_tls {} {
774 return [check_no_compiler_messages tls assembly {
776 int f (void) { return i; }
777 void g (int j) { i = j; }
781 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
783 proc check_effective_target_tls_native {} {
784 # VxWorks uses emulated TLS machinery, but with non-standard helper
785 # functions, so we fail to automatically detect it.
786 if { [istarget *-*-vxworks*] } {
790 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
792 int f (void) { return i; }
793 void g (int j) { i = j; }
797 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
799 proc check_effective_target_tls_emulated {} {
800 # VxWorks uses emulated TLS machinery, but with non-standard helper
801 # functions, so we fail to automatically detect it.
802 if { [istarget *-*-vxworks*] } {
806 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
808 int f (void) { return i; }
809 void g (int j) { i = j; }
813 # Return 1 if TLS executables can run correctly, 0 otherwise.
815 proc check_effective_target_tls_runtime {} {
816 # The runtime does not have TLS support, but just
817 # running the test below is insufficient to show this.
818 if { [istarget msp430-*-*] || [istarget visium-*-*] } {
821 return [check_runtime tls_runtime {
822 __thread int thr = 0;
823 int main (void) { return thr; }
824 } [add_options_for_tls ""]]
827 # Return 1 if atomic compare-and-swap is supported on 'int'
829 proc check_effective_target_cas_char {} {
830 return [check_no_compiler_messages cas_char assembly {
831 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
837 proc check_effective_target_cas_int {} {
838 return [check_no_compiler_messages cas_int assembly {
839 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
841 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
849 # Return 1 if -ffunction-sections is supported, 0 otherwise.
851 proc check_effective_target_function_sections {} {
852 # Darwin has its own scheme and silently accepts -ffunction-sections.
853 if { [istarget *-*-darwin*] } {
857 return [check_no_compiler_messages functionsections assembly {
859 } "-ffunction-sections"]
862 # Return 1 if instruction scheduling is available, 0 otherwise.
864 proc check_effective_target_scheduling {} {
865 return [check_no_compiler_messages scheduling object {
867 } "-fschedule-insns"]
870 # Return 1 if trapping arithmetic is available, 0 otherwise.
872 proc check_effective_target_trapping {} {
873 return [check_no_compiler_messages trapping object {
874 int add (int a, int b) { return a + b; }
878 # Return 1 if compilation with -fgraphite is error-free for trivial
881 proc check_effective_target_fgraphite {} {
882 return [check_no_compiler_messages fgraphite object {
887 # Return 1 if compilation with -fopenacc is error-free for trivial
890 proc check_effective_target_fopenacc {} {
891 # nvptx can be built with the device-side bits of openacc, but it
892 # does not make sense to test it as an openacc host.
893 if [istarget nvptx-*-*] { return 0 }
895 return [check_no_compiler_messages fopenacc object {
900 # Return 1 if compilation with -fopenmp is error-free for trivial
903 proc check_effective_target_fopenmp {} {
904 # nvptx can be built with the device-side bits of libgomp, but it
905 # does not make sense to test it as an openmp host.
906 if [istarget nvptx-*-*] { return 0 }
908 return [check_no_compiler_messages fopenmp object {
913 # Return 1 if compilation with -fgnu-tm is error-free for trivial
916 proc check_effective_target_fgnu_tm {} {
917 return [check_no_compiler_messages fgnu_tm object {
922 # Return 1 if the target supports mmap, 0 otherwise.
924 proc check_effective_target_mmap {} {
925 return [check_function_available "mmap"]
928 # Return 1 if the target supports dlopen, 0 otherwise.
929 proc check_effective_target_dlopen {} {
930 return [check_no_compiler_messages dlopen executable {
932 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
933 } [add_options_for_dlopen ""]]
936 proc add_options_for_dlopen { flags } {
940 # Return 1 if the target supports clone, 0 otherwise.
941 proc check_effective_target_clone {} {
942 return [check_function_available "clone"]
945 # Return 1 if the target supports setrlimit, 0 otherwise.
946 proc check_effective_target_setrlimit {} {
947 # Darwin has non-posix compliant RLIMIT_AS
948 if { [istarget *-*-darwin*] } {
951 return [check_function_available "setrlimit"]
954 # Return 1 if the target supports swapcontext, 0 otherwise.
955 proc check_effective_target_swapcontext {} {
956 return [check_no_compiler_messages swapcontext executable {
957 #include <ucontext.h>
960 ucontext_t orig_context,child_context;
961 if (swapcontext(&child_context, &orig_context) < 0) { }
966 # Return 1 if compilation with -pthread is error-free for trivial
969 proc check_effective_target_pthread {} {
970 return [check_no_compiler_messages pthread object {
975 # Return 1 if compilation with -gstabs is error-free for trivial
978 proc check_effective_target_stabs {} {
979 return [check_no_compiler_messages stabs object {
984 # Return 1 if compilation with -mpe-aligned-commons is error-free
985 # for trivial code, 0 otherwise.
987 proc check_effective_target_pe_aligned_commons {} {
988 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
989 return [check_no_compiler_messages pe_aligned_commons object {
991 } "-mpe-aligned-commons"]
996 # Return 1 if the target supports -static
997 proc check_effective_target_static {} {
998 return [check_no_compiler_messages static executable {
999 int main (void) { return 0; }
1003 # Return 1 if the target supports -fstack-protector
1004 proc check_effective_target_fstack_protector {} {
1005 return [check_runtime fstack_protector {
1006 int main (void) { return 0; }
1007 } "-fstack-protector"]
1010 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
1011 # for trivial code, 0 otherwise.
1013 proc check_effective_target_freorder {} {
1014 return [check_no_compiler_messages freorder object {
1016 } "-freorder-blocks-and-partition"]
1019 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
1020 # emitted, 0 otherwise. Whether a shared library can actually be built is
1021 # out of scope for this test.
1023 proc check_effective_target_fpic { } {
1024 # Note that M68K has a multilib that supports -fpic but not
1025 # -fPIC, so we need to check both. We test with a program that
1026 # requires GOT references.
1027 foreach arg {fpic fPIC} {
1028 if [check_no_compiler_messages $arg object {
1029 extern int foo (void); extern int bar;
1030 int baz (void) { return foo () + bar; }
1038 # On AArch64, if -fpic is not supported, then we will fall back to -fPIC
1039 # silently. So, we can't rely on above "check_effective_target_fpic" as it
1040 # assumes compiler will give warning if -fpic not supported. Here we check
1041 # whether binutils supports those new -fpic relocation modifiers, and assume
1042 # -fpic is supported if there is binutils support. GCC configuration will
1043 # enable -fpic for AArch64 in this case.
1045 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1046 # memory model -fpic relocation types.
1048 proc check_effective_target_aarch64_small_fpic { } {
1049 if { [istarget aarch64*-*-*] } {
1050 return [check_no_compiler_messages aarch64_small_fpic object {
1051 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1058 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1059 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1060 # in binutils since 2015-03-04 as PR gas/17843.
1062 # This test directive make sure binutils support all features needed by TLS LE
1063 # under -mtls-size=32 on AArch64.
1065 proc check_effective_target_aarch64_tlsle32 { } {
1066 if { [istarget aarch64*-*-*] } {
1067 return [check_no_compiler_messages aarch64_tlsle32 object {
1068 void foo (void) { asm ("movk x1,#:tprel_g0_nc:t1"); }
1075 # Return 1 if -shared is supported, as in no warnings or errors
1076 # emitted, 0 otherwise.
1078 proc check_effective_target_shared { } {
1079 # Note that M68K has a multilib that supports -fpic but not
1080 # -fPIC, so we need to check both. We test with a program that
1081 # requires GOT references.
1082 return [check_no_compiler_messages shared executable {
1083 extern int foo (void); extern int bar;
1084 int baz (void) { return foo () + bar; }
1088 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
1090 proc check_effective_target_pie { } {
1091 if { [istarget *-*-darwin\[912\]*]
1092 || [istarget *-*-dragonfly*]
1093 || [istarget *-*-freebsd*]
1094 || [istarget *-*-linux*]
1095 || [istarget *-*-gnu*] } {
1098 if { [istarget *-*-solaris2.1\[1-9\]*] } {
1099 # Full PIE support was added in Solaris 11.x and Solaris 12, but gcc
1100 # errors out if missing, so check for that.
1101 return [check_no_compiler_messages pie executable {
1102 int main (void) { return 0; }
1108 # Return true if the target supports -mpaired-single (as used on MIPS).
1110 proc check_effective_target_mpaired_single { } {
1111 return [check_no_compiler_messages mpaired_single object {
1113 } "-mpaired-single"]
1116 # Return true if the target has access to FPU instructions.
1118 proc check_effective_target_hard_float { } {
1119 if { [istarget mips*-*-*] } {
1120 return [check_no_compiler_messages hard_float assembly {
1121 #if (defined __mips_soft_float || defined __mips16)
1122 #error __mips_soft_float || __mips16
1127 # This proc is actually checking the availabilty of FPU
1128 # support for doubles, so on the RX we must fail if the
1129 # 64-bit double multilib has been selected.
1130 if { [istarget rx-*-*] } {
1132 # return [check_no_compiler_messages hard_float assembly {
1133 #if defined __RX_64_BIT_DOUBLES__
1134 #error __RX_64_BIT_DOUBLES__
1139 # The generic test equates hard_float with "no call for adding doubles".
1140 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
1141 double a (double b, double c) { return b + c; }
1145 # Return true if the target is a 64-bit MIPS target.
1147 proc check_effective_target_mips64 { } {
1148 return [check_no_compiler_messages mips64 assembly {
1155 # Return true if the target is a MIPS target that does not produce
1158 proc check_effective_target_nomips16 { } {
1159 return [check_no_compiler_messages nomips16 object {
1163 /* A cheap way of testing for -mflip-mips16. */
1164 void foo (void) { asm ("addiu $20,$20,1"); }
1165 void bar (void) { asm ("addiu $20,$20,1"); }
1170 # Add the options needed for MIPS16 function attributes. At the moment,
1171 # we don't support MIPS16 PIC.
1173 proc add_options_for_mips16_attribute { flags } {
1174 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1177 # Return true if we can force a mode that allows MIPS16 code generation.
1178 # We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
1181 proc check_effective_target_mips16_attribute { } {
1182 return [check_no_compiler_messages mips16_attribute assembly {
1186 #if defined __mips_hard_float \
1187 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
1188 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
1189 #error __mips_hard_float && (!_ABIO32 || !_ABIO64)
1191 } [add_options_for_mips16_attribute ""]]
1194 # Return 1 if the target supports long double larger than double when
1195 # using the new ABI, 0 otherwise.
1197 proc check_effective_target_mips_newabi_large_long_double { } {
1198 return [check_no_compiler_messages mips_newabi_large_long_double object {
1199 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1203 # Return true if the target is a MIPS target that has access
1204 # to the LL and SC instructions.
1206 proc check_effective_target_mips_llsc { } {
1207 if { ![istarget mips*-*-*] } {
1210 # Assume that these instructions are always implemented for
1211 # non-elf* targets, via emulation if necessary.
1212 if { ![istarget *-*-elf*] } {
1215 # Otherwise assume LL/SC support for everything but MIPS I.
1216 return [check_no_compiler_messages mips_llsc assembly {
1223 # Return true if the target is a MIPS target that uses in-place relocations.
1225 proc check_effective_target_mips_rel { } {
1226 if { ![istarget mips*-*-*] } {
1229 return [check_no_compiler_messages mips_rel object {
1230 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
1231 || (defined _ABI64 && _MIPS_SIM == _ABI64)
1232 #error _ABIN32 && (_ABIN32 || _ABI64)
1237 # Return true if the target is a MIPS target that uses the EABI.
1239 proc check_effective_target_mips_eabi { } {
1240 if { ![istarget mips*-*-*] } {
1243 return [check_no_compiler_messages mips_eabi object {
1250 # Return 1 if the current multilib does not generate PIC by default.
1252 proc check_effective_target_nonpic { } {
1253 return [check_no_compiler_messages nonpic assembly {
1260 # Return 1 if the current multilib generates PIE by default.
1262 proc check_effective_target_pie_enabled { } {
1263 return [check_no_compiler_messages pie_enabled assembly {
1270 # Return 1 if the target generates -fstack-protector by default.
1272 proc check_effective_target_fstack_protector_enabled {} {
1273 return [ check_no_compiler_messages fstack_protector_enabled assembly {
1274 #if !defined(__SSP__) && !defined(__SSP_ALL__) && \
1275 !defined(__SSP_STRONG__) && !defined(__SSP_EXPICIT__)
1281 # Return 1 if the target does not use a status wrapper.
1283 proc check_effective_target_unwrapped { } {
1284 if { [target_info needs_status_wrapper] != "" \
1285 && [target_info needs_status_wrapper] != "0" } {
1291 # Return true if iconv is supported on the target. In particular IBM1047.
1293 proc check_iconv_available { test_what } {
1296 # If the tool configuration file has not set libiconv, try "-liconv"
1297 if { ![info exists libiconv] } {
1298 set libiconv "-liconv"
1300 set test_what [lindex $test_what 1]
1301 return [check_runtime_nocache $test_what [subst {
1307 cd = iconv_open ("$test_what", "UTF-8");
1308 if (cd == (iconv_t) -1)
1315 # Return true if Cilk Library is supported on the target.
1316 proc check_effective_target_cilkplus_runtime { } {
1317 return [ check_no_compiler_messages_nocache cilkplus_runtime executable {
1321 int __cilkrts_set_param (const char *, const char *);
1323 int x = __cilkrts_set_param ("nworkers", "0");
1326 } "-fcilkplus -lcilkrts" ]
1329 # Return true if the atomic library is supported on the target.
1330 proc check_effective_target_libatomic_available { } {
1331 return [check_no_compiler_messages libatomic_available executable {
1332 int main (void) { return 0; }
1336 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1338 proc check_ascii_locale_available { } {
1342 # Return true if named sections are supported on this target.
1344 proc check_named_sections_available { } {
1345 return [check_no_compiler_messages named_sections assembly {
1346 int __attribute__ ((section("whatever"))) foo;
1350 # Return true if the "naked" function attribute is supported on this target.
1352 proc check_effective_target_naked_functions { } {
1353 return [check_no_compiler_messages naked_functions assembly {
1354 void f() __attribute__((naked));
1358 # Return 1 if the target supports Fortran real kinds larger than real(8),
1361 # When the target name changes, replace the cached result.
1363 proc check_effective_target_fortran_large_real { } {
1364 return [check_no_compiler_messages fortran_large_real executable {
1366 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1373 # Return 1 if the target supports Fortran real kind real(16),
1374 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1375 # this checks for Real(16) only; the other returned real(10) if
1376 # both real(10) and real(16) are available.
1378 # When the target name changes, replace the cached result.
1380 proc check_effective_target_fortran_real_16 { } {
1381 return [check_no_compiler_messages fortran_real_16 executable {
1390 # Return 1 if the target supports Fortran's IEEE modules,
1393 # When the target name changes, replace the cached result.
1395 proc check_effective_target_fortran_ieee { flags } {
1396 return [check_no_compiler_messages fortran_ieee executable {
1398 use, intrinsic :: ieee_features
1404 # Return 1 if the target supports SQRT for the largest floating-point
1405 # type. (Some targets lack the libm support for this FP type.)
1406 # On most targets, this check effectively checks either whether sqrtl is
1407 # available or on __float128 systems whether libquadmath is installed,
1408 # which provides sqrtq.
1410 # When the target name changes, replace the cached result.
1412 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1413 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1415 use iso_fortran_env, only: real_kinds
1416 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1417 real(kind=maxFP), volatile :: x
1425 # Return 1 if the target supports Fortran integer kinds larger than
1426 # integer(8), 0 otherwise.
1428 # When the target name changes, replace the cached result.
1430 proc check_effective_target_fortran_large_int { } {
1431 return [check_no_compiler_messages fortran_large_int executable {
1433 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1434 integer(kind=k) :: i
1439 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1441 # When the target name changes, replace the cached result.
1443 proc check_effective_target_fortran_integer_16 { } {
1444 return [check_no_compiler_messages fortran_integer_16 executable {
1451 # Return 1 if we can statically link libgfortran, 0 otherwise.
1453 # When the target name changes, replace the cached result.
1455 proc check_effective_target_static_libgfortran { } {
1456 return [check_no_compiler_messages static_libgfortran executable {
1463 # Return 1 if cilk-plus is supported by the target, 0 otherwise.
1465 proc check_effective_target_cilkplus { } {
1466 # Skip cilk-plus tests on int16 and size16 targets for now.
1467 # The cilk-plus tests are not generic enough to cover these
1468 # cases and would throw hundreds of FAILs.
1469 if { [check_effective_target_int16]
1470 || ![check_effective_target_size32plus] } {
1474 # Skip AVR, its RAM is too small and too many tests would fail.
1475 if { [istarget avr-*-*] } {
1479 if { ! [check_effective_target_pthread] } {
1486 proc check_linker_plugin_available { } {
1487 return [check_no_compiler_messages_nocache linker_plugin executable {
1488 int main() { return 0; }
1489 } "-flto -fuse-linker-plugin"]
1492 # Return 1 if the target supports executing 750CL paired-single instructions, 0
1493 # otherwise. Cache the result.
1495 proc check_750cl_hw_available { } {
1496 return [check_cached_effective_target 750cl_hw_available {
1497 # If this is not the right target then we can skip the test.
1498 if { ![istarget powerpc-*paired*] } {
1501 check_runtime_nocache 750cl_hw_available {
1505 asm volatile ("ps_mul v0,v0,v0");
1507 asm volatile ("ps_mul 0,0,0");
1516 # Return 1 if the target OS supports running SSE executables, 0
1517 # otherwise. Cache the result.
1519 proc check_sse_os_support_available { } {
1520 return [check_cached_effective_target sse_os_support_available {
1521 # If this is not the right target then we can skip the test.
1522 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1524 } elseif { [istarget i?86-*-solaris2*] } {
1525 # The Solaris 2 kernel doesn't save and restore SSE registers
1526 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1527 check_runtime_nocache sse_os_support_available {
1530 asm volatile ("movaps %xmm0,%xmm0");
1540 # Return 1 if the target OS supports running AVX executables, 0
1541 # otherwise. Cache the result.
1543 proc check_avx_os_support_available { } {
1544 return [check_cached_effective_target avx_os_support_available {
1545 # If this is not the right target then we can skip the test.
1546 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1549 # Check that OS has AVX and SSE saving enabled.
1550 check_runtime_nocache avx_os_support_available {
1553 unsigned int eax, edx;
1555 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1556 return (eax & 6) != 6;
1563 # Return 1 if the target supports executing SSE instructions, 0
1564 # otherwise. Cache the result.
1566 proc check_sse_hw_available { } {
1567 return [check_cached_effective_target sse_hw_available {
1568 # If this is not the right target then we can skip the test.
1569 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1572 check_runtime_nocache sse_hw_available {
1576 unsigned int eax, ebx, ecx, edx;
1577 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1578 return !(edx & bit_SSE);
1586 # Return 1 if the target supports executing MIPS Paired-Single instructions,
1587 # 0 otherwise. Cache the result.
1589 proc check_mpaired_single_hw_available { } {
1590 return [check_cached_effective_target mpaired_single_hw_available {
1591 # If this is not the right target then we can skip the test.
1592 if { !([istarget mips*-*-*]) } {
1595 check_runtime_nocache mpaired_single_hw_available {
1598 asm volatile ("pll.ps $f2,$f4,$f6");
1606 # Return 1 if the target supports executing Loongson vector instructions,
1607 # 0 otherwise. Cache the result.
1609 proc check_mips_loongson_hw_available { } {
1610 return [check_cached_effective_target mips_loongson_hw_available {
1611 # If this is not the right target then we can skip the test.
1612 if { !([istarget mips*-*-*]) } {
1615 check_runtime_nocache mips_loongson_hw_available {
1616 #include <loongson.h>
1619 asm volatile ("paddw $f2,$f4,$f6");
1627 # Return 1 if the target supports executing MIPS MSA instructions, 0
1628 # otherwise. Cache the result.
1630 proc check_mips_msa_hw_available { } {
1631 return [check_cached_effective_target mips_msa_hw_available {
1632 # If this is not the right target then we can skip the test.
1633 if { !([istarget mips*-*-*]) } {
1636 check_runtime_nocache mips_msa_hw_available {
1637 #if !defined(__mips_msa)
1638 #error "MSA NOT AVAIL"
1640 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
1641 #error "MSA NOT AVAIL FOR ISA REV < 2"
1643 #if !defined(__mips_hard_float)
1644 #error "MSA HARD_FLOAT REQUIRED"
1646 #if __mips_fpr != 64
1647 #error "MSA 64-bit FPR REQUIRED"
1653 v8i16 v = __builtin_msa_ldi_h (0);
1663 # Return 1 if the target supports executing SSE2 instructions, 0
1664 # otherwise. Cache the result.
1666 proc check_sse2_hw_available { } {
1667 return [check_cached_effective_target sse2_hw_available {
1668 # If this is not the right target then we can skip the test.
1669 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1672 check_runtime_nocache sse2_hw_available {
1676 unsigned int eax, ebx, ecx, edx;
1677 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1678 return !(edx & bit_SSE2);
1686 # Return 1 if the target supports executing SSE4 instructions, 0
1687 # otherwise. Cache the result.
1689 proc check_sse4_hw_available { } {
1690 return [check_cached_effective_target sse4_hw_available {
1691 # If this is not the right target then we can skip the test.
1692 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1695 check_runtime_nocache sse4_hw_available {
1699 unsigned int eax, ebx, ecx, edx;
1700 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1701 return !(ecx & bit_SSE4_2);
1709 # Return 1 if the target supports executing AVX instructions, 0
1710 # otherwise. Cache the result.
1712 proc check_avx_hw_available { } {
1713 return [check_cached_effective_target avx_hw_available {
1714 # If this is not the right target then we can skip the test.
1715 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1718 check_runtime_nocache avx_hw_available {
1722 unsigned int eax, ebx, ecx, edx;
1723 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1724 return ((ecx & (bit_AVX | bit_OSXSAVE))
1725 != (bit_AVX | bit_OSXSAVE));
1733 # Return 1 if the target supports executing AVX2 instructions, 0
1734 # otherwise. Cache the result.
1736 proc check_avx2_hw_available { } {
1737 return [check_cached_effective_target avx2_hw_available {
1738 # If this is not the right target then we can skip the test.
1739 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1742 check_runtime_nocache avx2_hw_available {
1746 unsigned int eax, ebx, ecx, edx;
1747 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)
1748 || ((ecx & bit_OSXSAVE) != bit_OSXSAVE))
1751 if (__get_cpuid_max (0, NULL) < 7)
1754 __cpuid_count (7, 0, eax, ebx, ecx, edx);
1756 return (ebx & bit_AVX2) != bit_AVX2;
1763 # Return 1 if the target supports running SSE executables, 0 otherwise.
1765 proc check_effective_target_sse_runtime { } {
1766 if { [check_effective_target_sse]
1767 && [check_sse_hw_available]
1768 && [check_sse_os_support_available] } {
1774 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1776 proc check_effective_target_sse2_runtime { } {
1777 if { [check_effective_target_sse2]
1778 && [check_sse2_hw_available]
1779 && [check_sse_os_support_available] } {
1785 # Return 1 if the target supports running SSE4 executables, 0 otherwise.
1787 proc check_effective_target_sse4_runtime { } {
1788 if { [check_effective_target_sse4]
1789 && [check_sse4_hw_available]
1790 && [check_sse_os_support_available] } {
1796 # Return 1 if the target supports running MIPS Paired-Single
1797 # executables, 0 otherwise.
1799 proc check_effective_target_mpaired_single_runtime { } {
1800 if { [check_effective_target_mpaired_single]
1801 && [check_mpaired_single_hw_available] } {
1807 # Return 1 if the target supports running Loongson executables, 0 otherwise.
1809 proc check_effective_target_mips_loongson_runtime { } {
1810 if { [check_effective_target_mips_loongson]
1811 && [check_mips_loongson_hw_available] } {
1817 # Return 1 if the target supports running MIPS MSA executables, 0 otherwise.
1819 proc check_effective_target_mips_msa_runtime { } {
1820 if { [check_effective_target_mips_msa]
1821 && [check_mips_msa_hw_available] } {
1827 # Return 1 if the target supports running AVX executables, 0 otherwise.
1829 proc check_effective_target_avx_runtime { } {
1830 if { [check_effective_target_avx]
1831 && [check_avx_hw_available]
1832 && [check_avx_os_support_available] } {
1838 # Return 1 if the target supports running AVX2 executables, 0 otherwise.
1840 proc check_effective_target_avx2_runtime { } {
1841 if { [check_effective_target_avx2]
1842 && [check_avx2_hw_available]
1843 && [check_avx_os_support_available] } {
1849 # Return 1 if we are compiling for 64-bit PowerPC but we do not use direct
1850 # move instructions for moves from GPR to FPR.
1852 proc check_effective_target_powerpc64_no_dm { } {
1853 # The "mulld" checks if we are generating PowerPC64 code. The "lfd"
1854 # checks if we do not use direct moves, but use the old-fashioned
1855 # slower move-via-the-stack.
1856 return [check_no_messages_and_pattern powerpc64_no_dm \
1857 {\mmulld\M.*\mlfd} assembly {
1858 double f(long long x) { return x*x; }
1862 # Return 1 if the target supports executing power8 vector instructions, 0
1863 # otherwise. Cache the result.
1865 proc check_p8vector_hw_available { } {
1866 return [check_cached_effective_target p8vector_hw_available {
1867 # Some simulators are known to not support VSX/power8 instructions.
1868 # For now, disable on Darwin
1869 if { [istarget powerpc-*-eabi]
1870 || [istarget powerpc*-*-eabispe]
1871 || [istarget *-*-darwin*]} {
1874 set options "-mpower8-vector"
1875 check_runtime_nocache p8vector_hw_available {
1879 asm volatile ("xxlorc vs0,vs0,vs0");
1881 asm volatile ("xxlorc 0,0,0");
1890 # Return 1 if the target supports executing power9 vector instructions, 0
1891 # otherwise. Cache the result.
1893 proc check_p9vector_hw_available { } {
1894 return [check_cached_effective_target p9vector_hw_available {
1895 # Some simulators are known to not support VSX/power8/power9
1896 # instructions. For now, disable on Darwin.
1897 if { [istarget powerpc-*-eabi]
1898 || [istarget powerpc*-*-eabispe]
1899 || [istarget *-*-darwin*]} {
1902 set options "-mpower9-vector"
1903 check_runtime_nocache p9vector_hw_available {
1907 vector double v = (vector double) { 0.0, 0.0 };
1908 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
1916 # Return 1 if the target supports executing power9 modulo instructions, 0
1917 # otherwise. Cache the result.
1919 proc check_p9modulo_hw_available { } {
1920 return [check_cached_effective_target p9modulo_hw_available {
1921 # Some simulators are known to not support VSX/power8/power9
1922 # instructions. For now, disable on Darwin.
1923 if { [istarget powerpc-*-eabi]
1924 || [istarget powerpc*-*-eabispe]
1925 || [istarget *-*-darwin*]} {
1928 set options "-mmodulo"
1929 check_runtime_nocache p9modulo_hw_available {
1932 int i = 5, j = 3, r = -1;
1933 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
1941 # Return 1 if the target supports executing __float128 on PowerPC via software
1942 # emulation, 0 otherwise. Cache the result.
1944 proc check_ppc_float128_sw_available { } {
1945 return [check_cached_effective_target ppc_float128_sw_available {
1946 # Some simulators are known to not support VSX/power8/power9
1947 # instructions. For now, disable on Darwin.
1948 if { [istarget powerpc-*-eabi]
1949 || [istarget powerpc*-*-eabispe]
1950 || [istarget *-*-darwin*]} {
1953 set options "-mfloat128 -mvsx"
1954 check_runtime_nocache ppc_float128_sw_available {
1955 volatile __float128 x = 1.0q;
1956 volatile __float128 y = 2.0q;
1959 __float128 z = x + y;
1967 # Return 1 if the target supports executing __float128 on PowerPC via power9
1968 # hardware instructions, 0 otherwise. Cache the result.
1970 proc check_ppc_float128_hw_available { } {
1971 return [check_cached_effective_target ppc_float128_hw_available {
1972 # Some simulators are known to not support VSX/power8/power9
1973 # instructions. For now, disable on Darwin.
1974 if { [istarget powerpc-*-eabi]
1975 || [istarget powerpc*-*-eabispe]
1976 || [istarget *-*-darwin*]} {
1979 set options "-mfloat128 -mvsx -mfloat128-hardware -mpower9-vector"
1980 check_runtime_nocache ppc_float128_hw_available {
1981 volatile __float128 x = 1.0q;
1982 volatile __float128 y = 2.0q;
1985 __float128 z = x + y;
1986 __float128 w = -1.0q;
1988 __asm__ ("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
1989 return ((z != 3.0q) || (z != w);
1996 # Return 1 if the target supports executing VSX instructions, 0
1997 # otherwise. Cache the result.
1999 proc check_vsx_hw_available { } {
2000 return [check_cached_effective_target vsx_hw_available {
2001 # Some simulators are known to not support VSX instructions.
2002 # For now, disable on Darwin
2003 if { [istarget powerpc-*-eabi]
2004 || [istarget powerpc*-*-eabispe]
2005 || [istarget *-*-darwin*]} {
2009 check_runtime_nocache vsx_hw_available {
2013 asm volatile ("xxlor vs0,vs0,vs0");
2015 asm volatile ("xxlor 0,0,0");
2024 # Return 1 if the target supports executing AltiVec instructions, 0
2025 # otherwise. Cache the result.
2027 proc check_vmx_hw_available { } {
2028 return [check_cached_effective_target vmx_hw_available {
2029 # Some simulators are known to not support VMX instructions.
2030 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
2033 # Most targets don't require special flags for this test case, but
2034 # Darwin does. Just to be sure, make sure VSX is not enabled for
2035 # the altivec tests.
2036 if { [istarget *-*-darwin*]
2037 || [istarget *-*-aix*] } {
2038 set options "-maltivec -mno-vsx"
2040 set options "-mno-vsx"
2042 check_runtime_nocache vmx_hw_available {
2046 asm volatile ("vor v0,v0,v0");
2048 asm volatile ("vor 0,0,0");
2057 proc check_ppc_recip_hw_available { } {
2058 return [check_cached_effective_target ppc_recip_hw_available {
2059 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
2060 # For now, disable on Darwin
2061 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2064 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
2065 check_runtime_nocache ppc_recip_hw_available {
2066 volatile double d_recip, d_rsqrt, d_four = 4.0;
2067 volatile float f_recip, f_rsqrt, f_four = 4.0f;
2070 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
2071 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
2072 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
2073 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
2081 # Return 1 if the target supports executing AltiVec and Cell PPU
2082 # instructions, 0 otherwise. Cache the result.
2084 proc check_effective_target_cell_hw { } {
2085 return [check_cached_effective_target cell_hw_available {
2086 # Some simulators are known to not support VMX and PPU instructions.
2087 if { [istarget powerpc-*-eabi*] } {
2090 # Most targets don't require special flags for this test
2091 # case, but Darwin and AIX do.
2092 if { [istarget *-*-darwin*]
2093 || [istarget *-*-aix*] } {
2094 set options "-maltivec -mcpu=cell"
2096 set options "-mcpu=cell"
2098 check_runtime_nocache cell_hw_available {
2102 asm volatile ("vor v0,v0,v0");
2103 asm volatile ("lvlx v0,r0,r0");
2105 asm volatile ("vor 0,0,0");
2106 asm volatile ("lvlx 0,0,0");
2115 # Return 1 if the target supports executing 64-bit instructions, 0
2116 # otherwise. Cache the result.
2118 proc check_effective_target_powerpc64 { } {
2119 global powerpc64_available_saved
2122 if [info exists powerpc64_available_saved] {
2123 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
2125 set powerpc64_available_saved 0
2127 # Some simulators are known to not support powerpc64 instructions.
2128 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
2129 verbose "check_effective_target_powerpc64 returning 0" 2
2130 return $powerpc64_available_saved
2133 # Set up, compile, and execute a test program containing a 64-bit
2134 # instruction. Include the current process ID in the file
2135 # names to prevent conflicts with invocations for multiple
2140 set f [open $src "w"]
2141 puts $f "int main() {"
2142 puts $f "#ifdef __MACH__"
2143 puts $f " asm volatile (\"extsw r0,r0\");"
2145 puts $f " asm volatile (\"extsw 0,0\");"
2147 puts $f " return 0; }"
2150 set opts "additional_flags=-mcpu=G5"
2152 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
2153 set lines [${tool}_target_compile $src $exe executable "$opts"]
2156 if [string match "" $lines] then {
2157 # No error message, compilation succeeded.
2158 set result [${tool}_load "./$exe" "" ""]
2159 set status [lindex $result 0]
2160 remote_file build delete $exe
2161 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
2163 if { $status == "pass" } then {
2164 set powerpc64_available_saved 1
2167 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
2171 return $powerpc64_available_saved
2174 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
2175 # complex float arguments. This affects gfortran tests that call cabsf
2176 # in libm built by an earlier compiler. Return 1 if libm uses the same
2177 # argument passing as the compiler under test, 0 otherwise.
2179 # When the target name changes, replace the cached result.
2181 proc check_effective_target_broken_cplxf_arg { } {
2182 return [check_cached_effective_target broken_cplxf_arg {
2183 # Skip the work for targets known not to be affected.
2184 if { ![istarget powerpc64-*-linux*] } {
2186 } elseif { ![is-effective-target lp64] } {
2189 check_runtime_nocache broken_cplxf_arg {
2190 #include <complex.h>
2191 extern void abort (void);
2192 float fabsf (float);
2193 float cabsf (_Complex float);
2200 if (fabsf (f - 5.0) > 0.0001)
2209 # Return 1 is this is a TI C6X target supporting C67X instructions
2210 proc check_effective_target_ti_c67x { } {
2211 return [check_no_compiler_messages ti_c67x assembly {
2212 #if !defined(_TMS320C6700)
2213 #error !_TMS320C6700
2218 # Return 1 is this is a TI C6X target supporting C64X+ instructions
2219 proc check_effective_target_ti_c64xp { } {
2220 return [check_no_compiler_messages ti_c64xp assembly {
2221 #if !defined(_TMS320C6400_PLUS)
2222 #error !_TMS320C6400_PLUS
2228 proc check_alpha_max_hw_available { } {
2229 return [check_runtime alpha_max_hw_available {
2230 int main() { return __builtin_alpha_amask(1<<8) != 0; }
2234 # Returns true iff the FUNCTION is available on the target system.
2235 # (This is essentially a Tcl implementation of Autoconf's
2238 proc check_function_available { function } {
2239 return [check_no_compiler_messages ${function}_available \
2245 int main () { $function (); }
2249 # Returns true iff "fork" is available on the target system.
2251 proc check_fork_available {} {
2252 return [check_function_available "fork"]
2255 # Returns true iff "mkfifo" is available on the target system.
2257 proc check_mkfifo_available {} {
2258 if { [istarget *-*-cygwin*] } {
2259 # Cygwin has mkfifo, but support is incomplete.
2263 return [check_function_available "mkfifo"]
2266 # Returns true iff "__cxa_atexit" is used on the target system.
2268 proc check_cxa_atexit_available { } {
2269 return [check_cached_effective_target cxa_atexit_available {
2270 if { [istarget hppa*-*-hpux10*] } {
2271 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
2273 } elseif { [istarget *-*-vxworks] } {
2274 # vxworks doesn't have __cxa_atexit but subsequent test passes.
2277 check_runtime_nocache cxa_atexit_available {
2280 static unsigned int count;
2297 Y() { f(); count = 2; }
2306 int main() { return 0; }
2312 proc check_effective_target_objc2 { } {
2313 return [check_no_compiler_messages objc2 object {
2322 proc check_effective_target_next_runtime { } {
2323 return [check_no_compiler_messages objc2 object {
2324 #ifdef __NEXT_RUNTIME__
2327 #error !__NEXT_RUNTIME__
2332 # Return 1 if we're generating 32-bit code using default options, 0
2335 proc check_effective_target_ilp32 { } {
2336 return [check_no_compiler_messages ilp32 object {
2337 int dummy[sizeof (int) == 4
2338 && sizeof (void *) == 4
2339 && sizeof (long) == 4 ? 1 : -1];
2343 # Return 1 if we're generating ia32 code using default options, 0
2346 proc check_effective_target_ia32 { } {
2347 return [check_no_compiler_messages ia32 object {
2348 int dummy[sizeof (int) == 4
2349 && sizeof (void *) == 4
2350 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
2354 # Return 1 if we're generating x32 code using default options, 0
2357 proc check_effective_target_x32 { } {
2358 return [check_no_compiler_messages x32 object {
2359 int dummy[sizeof (int) == 4
2360 && sizeof (void *) == 4
2361 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
2365 # Return 1 if we're generating 32-bit integers using default
2366 # options, 0 otherwise.
2368 proc check_effective_target_int32 { } {
2369 return [check_no_compiler_messages int32 object {
2370 int dummy[sizeof (int) == 4 ? 1 : -1];
2374 # Return 1 if we're generating 32-bit or larger integers using default
2375 # options, 0 otherwise.
2377 proc check_effective_target_int32plus { } {
2378 return [check_no_compiler_messages int32plus object {
2379 int dummy[sizeof (int) >= 4 ? 1 : -1];
2383 # Return 1 if we're generating 32-bit or larger pointers using default
2384 # options, 0 otherwise.
2386 proc check_effective_target_ptr32plus { } {
2387 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
2388 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
2389 # cannot really hold a 32-bit address, so we always return false here.
2390 if { [istarget msp430-*-*] } {
2394 return [check_no_compiler_messages ptr32plus object {
2395 int dummy[sizeof (void *) >= 4 ? 1 : -1];
2399 # Return 1 if we support 32-bit or larger array and structure sizes
2400 # using default options, 0 otherwise. Avoid false positive on
2401 # targets with 20 or 24 bit address spaces.
2403 proc check_effective_target_size32plus { } {
2404 return [check_no_compiler_messages size32plus object {
2405 char dummy[16777217L];
2409 # Returns 1 if we're generating 16-bit or smaller integers with the
2410 # default options, 0 otherwise.
2412 proc check_effective_target_int16 { } {
2413 return [check_no_compiler_messages int16 object {
2414 int dummy[sizeof (int) < 4 ? 1 : -1];
2418 # Return 1 if we're generating 64-bit code using default options, 0
2421 proc check_effective_target_lp64 { } {
2422 return [check_no_compiler_messages lp64 object {
2423 int dummy[sizeof (int) == 4
2424 && sizeof (void *) == 8
2425 && sizeof (long) == 8 ? 1 : -1];
2429 # Return 1 if we're generating 64-bit code using default llp64 options,
2432 proc check_effective_target_llp64 { } {
2433 return [check_no_compiler_messages llp64 object {
2434 int dummy[sizeof (int) == 4
2435 && sizeof (void *) == 8
2436 && sizeof (long long) == 8
2437 && sizeof (long) == 4 ? 1 : -1];
2441 # Return 1 if long and int have different sizes,
2444 proc check_effective_target_long_neq_int { } {
2445 return [check_no_compiler_messages long_ne_int object {
2446 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2450 # Return 1 if the target supports long double larger than double,
2453 proc check_effective_target_large_long_double { } {
2454 return [check_no_compiler_messages large_long_double object {
2455 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2459 # Return 1 if the target supports double larger than float,
2462 proc check_effective_target_large_double { } {
2463 return [check_no_compiler_messages large_double object {
2464 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2468 # Return 1 if the target supports long double of 128 bits,
2471 proc check_effective_target_longdouble128 { } {
2472 return [check_no_compiler_messages longdouble128 object {
2473 int dummy[sizeof(long double) == 16 ? 1 : -1];
2477 # Return 1 if the target supports double of 64 bits,
2480 proc check_effective_target_double64 { } {
2481 return [check_no_compiler_messages double64 object {
2482 int dummy[sizeof(double) == 8 ? 1 : -1];
2486 # Return 1 if the target supports double of at least 64 bits,
2489 proc check_effective_target_double64plus { } {
2490 return [check_no_compiler_messages double64plus object {
2491 int dummy[sizeof(double) >= 8 ? 1 : -1];
2495 # Return 1 if the target supports 'w' suffix on floating constant
2498 proc check_effective_target_has_w_floating_suffix { } {
2500 if [check_effective_target_c++] {
2501 append opts "-std=gnu++03"
2503 return [check_no_compiler_messages w_fp_suffix object {
2508 # Return 1 if the target supports 'q' suffix on floating constant
2511 proc check_effective_target_has_q_floating_suffix { } {
2513 if [check_effective_target_c++] {
2514 append opts "-std=gnu++03"
2516 return [check_no_compiler_messages q_fp_suffix object {
2521 # Return 1 if the target supports the _FloatN / _FloatNx type
2522 # indicated in the function name, 0 otherwise.
2524 proc check_effective_target_float16 {} {
2525 return [check_no_compiler_messages_nocache float16 object {
2530 proc check_effective_target_float32 {} {
2531 return [check_no_compiler_messages_nocache float32 object {
2536 proc check_effective_target_float64 {} {
2537 return [check_no_compiler_messages_nocache float64 object {
2542 proc check_effective_target_float128 {} {
2543 return [check_no_compiler_messages_nocache float128 object {
2548 proc check_effective_target_float32x {} {
2549 return [check_no_compiler_messages_nocache float32x object {
2554 proc check_effective_target_float64x {} {
2555 return [check_no_compiler_messages_nocache float64x object {
2560 proc check_effective_target_float128x {} {
2561 return [check_no_compiler_messages_nocache float128x object {
2566 # Likewise, but runtime support for any special options used as well
2567 # as compile-time support is required.
2569 proc check_effective_target_float16_runtime {} {
2570 return [check_effective_target_float16]
2573 proc check_effective_target_float32_runtime {} {
2574 return [check_effective_target_float32]
2577 proc check_effective_target_float64_runtime {} {
2578 return [check_effective_target_float64]
2581 proc check_effective_target_float128_runtime {} {
2582 if { ![check_effective_target_float128] } {
2585 if { [istarget powerpc*-*-*] } {
2586 return [check_effective_target_base_quadfloat_support]
2591 proc check_effective_target_float32x_runtime {} {
2592 return [check_effective_target_float32x]
2595 proc check_effective_target_float64x_runtime {} {
2596 if { ![check_effective_target_float64x] } {
2599 if { [istarget powerpc*-*-*] } {
2600 return [check_effective_target_base_quadfloat_support]
2605 proc check_effective_target_float128x_runtime {} {
2606 return [check_effective_target_float128x]
2609 # Return 1 if the target hardware supports any options added for
2610 # _FloatN and _FloatNx types, 0 otherwise.
2612 proc check_effective_target_floatn_nx_runtime {} {
2613 if { [istarget powerpc*-*-aix*] } {
2616 if { [istarget powerpc*-*-*] } {
2617 return [check_effective_target_base_quadfloat_support]
2622 # Add options needed to use the _FloatN / _FloatNx type indicated in
2623 # the function name.
2625 proc add_options_for_float16 { flags } {
2629 proc add_options_for_float32 { flags } {
2633 proc add_options_for_float64 { flags } {
2637 proc add_options_for_float128 { flags } {
2638 return [add_options_for___float128 "$flags"]
2641 proc add_options_for_float32x { flags } {
2645 proc add_options_for_float64x { flags } {
2646 return [add_options_for___float128 "$flags"]
2649 proc add_options_for_float128x { flags } {
2653 # Return 1 if the target supports __float128,
2656 proc check_effective_target___float128 { } {
2657 if { [istarget powerpc*-*-*] } {
2658 return [check_ppc_float128_sw_available]
2660 if { [istarget ia64-*-*]
2661 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2667 proc add_options_for___float128 { flags } {
2668 if { [istarget powerpc*-*-*] } {
2669 return "$flags -mfloat128 -mvsx"
2674 # Return 1 if the target supports any special run-time requirements
2675 # for __float128 or _Float128,
2678 proc check_effective_target_base_quadfloat_support { } {
2679 if { [istarget powerpc*-*-*] } {
2680 return [check_vsx_hw_available]
2685 # Return 1 if the target supports compiling fixed-point,
2688 proc check_effective_target_fixed_point { } {
2689 return [check_no_compiler_messages fixed_point object {
2690 _Sat _Fract x; _Sat _Accum y;
2694 # Return 1 if the target supports compiling decimal floating point,
2697 proc check_effective_target_dfp_nocache { } {
2698 verbose "check_effective_target_dfp_nocache: compiling source" 2
2699 set ret [check_no_compiler_messages_nocache dfp object {
2700 float x __attribute__((mode(DD)));
2702 verbose "check_effective_target_dfp_nocache: returning $ret" 2
2706 proc check_effective_target_dfprt_nocache { } {
2707 return [check_runtime_nocache dfprt {
2708 typedef float d64 __attribute__((mode(DD)));
2709 d64 x = 1.2df, y = 2.3dd, z;
2710 int main () { z = x + y; return 0; }
2714 # Return 1 if the target supports compiling Decimal Floating Point,
2717 # This won't change for different subtargets so cache the result.
2719 proc check_effective_target_dfp { } {
2720 return [check_cached_effective_target dfp {
2721 check_effective_target_dfp_nocache
2725 # Return 1 if the target supports linking and executing Decimal Floating
2726 # Point, 0 otherwise.
2728 # This won't change for different subtargets so cache the result.
2730 proc check_effective_target_dfprt { } {
2731 return [check_cached_effective_target dfprt {
2732 check_effective_target_dfprt_nocache
2736 # Return 1 if the target supports executing DFP hardware instructions,
2737 # 0 otherwise. Cache the result.
2739 proc check_dfp_hw_available { } {
2740 return [check_cached_effective_target dfp_hw_available {
2741 # For now, disable on Darwin
2742 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2745 check_runtime_nocache dfp_hw_available {
2746 volatile _Decimal64 r;
2747 volatile _Decimal64 a = 4.0DD;
2748 volatile _Decimal64 b = 2.0DD;
2751 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2752 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2753 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2754 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2757 } "-mcpu=power6 -mhard-float"
2762 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2764 proc check_effective_target_ucn_nocache { } {
2765 # -std=c99 is only valid for C
2766 if [check_effective_target_c] {
2767 set ucnopts "-std=c99"
2771 verbose "check_effective_target_ucn_nocache: compiling source" 2
2772 set ret [check_no_compiler_messages_nocache ucn object {
2775 verbose "check_effective_target_ucn_nocache: returning $ret" 2
2779 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2781 # This won't change for different subtargets, so cache the result.
2783 proc check_effective_target_ucn { } {
2784 return [check_cached_effective_target ucn {
2785 check_effective_target_ucn_nocache
2789 # Return 1 if the target needs a command line argument to enable a SIMD
2792 proc check_effective_target_vect_cmdline_needed { } {
2793 global et_vect_cmdline_needed_saved
2794 global et_vect_cmdline_needed_target_name
2796 if { ![info exists et_vect_cmdline_needed_target_name] } {
2797 set et_vect_cmdline_needed_target_name ""
2800 # If the target has changed since we set the cached value, clear it.
2801 set current_target [current_target_name]
2802 if { $current_target != $et_vect_cmdline_needed_target_name } {
2803 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
2804 set et_vect_cmdline_needed_target_name $current_target
2805 if { [info exists et_vect_cmdline_needed_saved] } {
2806 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
2807 unset et_vect_cmdline_needed_saved
2811 if [info exists et_vect_cmdline_needed_saved] {
2812 verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
2814 set et_vect_cmdline_needed_saved 1
2815 if { [istarget alpha*-*-*]
2816 || [istarget ia64-*-*]
2817 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
2818 && ![is-effective-target ia32])
2819 || ([istarget powerpc*-*-*]
2820 && ([check_effective_target_powerpc_spe]
2821 || [check_effective_target_powerpc_altivec]))
2822 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
2823 || [istarget spu-*-*]
2824 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
2825 || [istarget aarch64*-*-*] } {
2826 set et_vect_cmdline_needed_saved 0
2830 verbose "check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
2831 return $et_vect_cmdline_needed_saved
2834 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
2836 # This won't change for different subtargets so cache the result.
2838 proc check_effective_target_vect_int { } {
2839 global et_vect_int_saved
2842 if [info exists et_vect_int_saved($et_index)] {
2843 verbose "check_effective_target_vect_int: using cached result" 2
2845 set et_vect_int_saved($et_index) 0
2846 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2847 || ([istarget powerpc*-*-*]
2848 && ![istarget powerpc-*-linux*paired*])
2849 || [istarget spu-*-*]
2850 || [istarget sparc*-*-*]
2851 || [istarget alpha*-*-*]
2852 || [istarget ia64-*-*]
2853 || [istarget aarch64*-*-*]
2854 || [check_effective_target_arm32]
2855 || ([istarget mips*-*-*]
2856 && ([et-is-effective-target mips_loongson]
2857 || [et-is-effective-target mips_msa])) } {
2858 set et_vect_int_saved($et_index) 1
2862 verbose "check_effective_target_vect_int:\
2863 returning $et_vect_int_saved($et_index)" 2
2864 return $et_vect_int_saved($et_index)
2867 # Return 1 if the target supports signed int->float conversion
2870 proc check_effective_target_vect_intfloat_cvt { } {
2871 global et_vect_intfloat_cvt_saved
2874 if [info exists et_vect_intfloat_cvt_saved($et_index)] {
2875 verbose "check_effective_target_vect_intfloat_cvt:\
2876 using cached result" 2
2878 set et_vect_intfloat_cvt_saved($et_index) 0
2879 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2880 || ([istarget powerpc*-*-*]
2881 && ![istarget powerpc-*-linux*paired*])
2882 || ([istarget arm*-*-*]
2883 && [check_effective_target_arm_neon_ok])
2884 || ([istarget mips*-*-*]
2885 && [et-is-effective-target mips_msa]) } {
2886 set et_vect_intfloat_cvt_saved($et_index) 1
2890 verbose "check_effective_target_vect_intfloat_cvt:\
2891 returning $et_vect_intfloat_cvt_saved($et_index)" 2
2892 return $et_vect_intfloat_cvt_saved($et_index)
2895 #Return 1 if we're supporting __int128 for target, 0 otherwise.
2897 proc check_effective_target_int128 { } {
2898 return [check_no_compiler_messages int128 object {
2900 #ifndef __SIZEOF_INT128__
2909 # Return 1 if the target supports unsigned int->float conversion
2912 proc check_effective_target_vect_uintfloat_cvt { } {
2913 global et_vect_uintfloat_cvt_saved
2916 if [info exists et_vect_uintfloat_cvt_saved($et_index)] {
2917 verbose "check_effective_target_vect_uintfloat_cvt:\
2918 using cached result" 2
2920 set et_vect_uintfloat_cvt_saved($et_index) 0
2921 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2922 || ([istarget powerpc*-*-*]
2923 && ![istarget powerpc-*-linux*paired*])
2924 || [istarget aarch64*-*-*]
2925 || ([istarget arm*-*-*]
2926 && [check_effective_target_arm_neon_ok])
2927 || ([istarget mips*-*-*]
2928 && [et-is-effective-target mips_msa]) } {
2929 set et_vect_uintfloat_cvt_saved($et_index) 1
2933 verbose "check_effective_target_vect_uintfloat_cvt:\
2934 returning $et_vect_uintfloat_cvt_saved($et_index)" 2
2935 return $et_vect_uintfloat_cvt_saved($et_index)
2939 # Return 1 if the target supports signed float->int conversion
2942 proc check_effective_target_vect_floatint_cvt { } {
2943 global et_vect_floatint_cvt_saved
2946 if [info exists et_vect_floatint_cvt_saved($et_index)] {
2947 verbose "check_effective_target_vect_floatint_cvt:\
2948 using cached result" 2
2950 set et_vect_floatint_cvt_saved($et_index) 0
2951 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2952 || ([istarget powerpc*-*-*]
2953 && ![istarget powerpc-*-linux*paired*])
2954 || ([istarget arm*-*-*]
2955 && [check_effective_target_arm_neon_ok])
2956 || ([istarget mips*-*-*]
2957 && [et-is-effective-target mips_msa]) } {
2958 set et_vect_floatint_cvt_saved($et_index) 1
2962 verbose "check_effective_target_vect_floatint_cvt:\
2963 returning $et_vect_floatint_cvt_saved($et_index)" 2
2964 return $et_vect_floatint_cvt_saved($et_index)
2967 # Return 1 if the target supports unsigned float->int conversion
2970 proc check_effective_target_vect_floatuint_cvt { } {
2971 global et_vect_floatuint_cvt_saved
2974 if [info exists et_vect_floatuint_cvt_saved($et_index)] {
2975 verbose "check_effective_target_vect_floatuint_cvt:\
2976 using cached result" 2
2978 set et_vect_floatuint_cvt_saved($et_index) 0
2979 if { ([istarget powerpc*-*-*]
2980 && ![istarget powerpc-*-linux*paired*])
2981 || ([istarget arm*-*-*]
2982 && [check_effective_target_arm_neon_ok])
2983 || ([istarget mips*-*-*]
2984 && [et-is-effective-target mips_msa]) } {
2985 set et_vect_floatuint_cvt_saved($et_index) 1
2989 verbose "check_effective_target_vect_floatuint_cvt:\
2990 returning $et_vect_floatuint_cvt_saved($et_index)" 2
2991 return $et_vect_floatuint_cvt_saved($et_index)
2994 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
2996 # This won't change for different subtargets so cache the result.
2998 proc check_effective_target_vect_simd_clones { } {
2999 global et_vect_simd_clones_saved
3002 if [info exists et_vect_simd_clones_saved($et_index)] {
3003 verbose "check_effective_target_vect_simd_clones: using cached result" 2
3005 set et_vect_simd_clones_saved($et_index) 0
3006 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx,
3007 # avx2 and avx512f clone. Only the right clone for the
3008 # specified arch will be chosen, but still we need to at least
3009 # be able to assemble avx512f.
3010 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3011 && [check_effective_target_avx512f]) } {
3012 set et_vect_simd_clones_saved($et_index) 1
3016 verbose "check_effective_target_vect_simd_clones:\
3017 returning $et_vect_simd_clones_saved($et_index)" 2
3018 return $et_vect_simd_clones_saved($et_index)
3021 # Return 1 if this is a AArch64 target supporting big endian
3022 proc check_effective_target_aarch64_big_endian { } {
3023 return [check_no_compiler_messages aarch64_big_endian assembly {
3024 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
3025 #error !__aarch64__ || !__AARCH64EB__
3030 # Return 1 if this is a AArch64 target supporting little endian
3031 proc check_effective_target_aarch64_little_endian { } {
3032 if { ![istarget aarch64*-*-*] } {
3036 return [check_no_compiler_messages aarch64_little_endian assembly {
3037 #if !defined(__aarch64__) || defined(__AARCH64EB__)
3043 # Return 1 if this is a compiler supporting ARC atomic operations
3044 proc check_effective_target_arc_atomic { } {
3045 return [check_no_compiler_messages arc_atomic assembly {
3046 #if !defined(__ARC_ATOMIC__)
3052 # Return 1 if this is an arm target using 32-bit instructions
3053 proc check_effective_target_arm32 { } {
3054 if { ![istarget arm*-*-*] } {
3058 return [check_no_compiler_messages arm32 assembly {
3059 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
3060 #error !__arm || __thumb__ && !__thumb2__
3065 # Return 1 if this is an arm target not using Thumb
3066 proc check_effective_target_arm_nothumb { } {
3067 if { ![istarget arm*-*-*] } {
3071 return [check_no_compiler_messages arm_nothumb assembly {
3072 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
3073 #error !__arm__ || __thumb || __thumb2__
3078 # Return 1 if this is a little-endian ARM target
3079 proc check_effective_target_arm_little_endian { } {
3080 if { ![istarget arm*-*-*] } {
3084 return [check_no_compiler_messages arm_little_endian assembly {
3085 #if !defined(__arm__) || !defined(__ARMEL__)
3086 #error !__arm__ || !__ARMEL__
3091 # Return 1 if this is an ARM target that only supports aligned vector accesses
3092 proc check_effective_target_arm_vect_no_misalign { } {
3093 if { ![istarget arm*-*-*] } {
3097 return [check_no_compiler_messages arm_vect_no_misalign assembly {
3098 #if !defined(__arm__) \
3099 || (defined(__ARM_FEATURE_UNALIGNED) \
3100 && defined(__ARMEL__))
3101 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
3107 # Return 1 if this is an ARM target supporting -mfpu=vfp
3108 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
3111 proc check_effective_target_arm_vfp_ok { } {
3112 if { [check_effective_target_arm32] } {
3113 return [check_no_compiler_messages arm_vfp_ok object {
3115 } "-mfpu=vfp -mfloat-abi=softfp"]
3121 # Return 1 if this is an ARM target supporting -mfpu=vfp3
3122 # -mfloat-abi=softfp.
3124 proc check_effective_target_arm_vfp3_ok { } {
3125 if { [check_effective_target_arm32] } {
3126 return [check_no_compiler_messages arm_vfp3_ok object {
3128 } "-mfpu=vfp3 -mfloat-abi=softfp"]
3134 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
3135 # -mfloat-abi=softfp.
3136 proc check_effective_target_arm_v8_vfp_ok {} {
3137 if { [check_effective_target_arm32] } {
3138 return [check_no_compiler_messages arm_v8_vfp_ok object {
3141 __asm__ volatile ("vrinta.f32.f32 s0, s0");
3144 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
3150 # Return 1 if this is an ARM target supporting -mfpu=vfp
3151 # -mfloat-abi=hard. Some multilibs may be incompatible with these
3154 proc check_effective_target_arm_hard_vfp_ok { } {
3155 if { [check_effective_target_arm32]
3156 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
3157 return [check_no_compiler_messages arm_hard_vfp_ok executable {
3158 int main() { return 0;}
3159 } "-mfpu=vfp -mfloat-abi=hard"]
3165 # Return 1 if this is an ARM target defining __ARM_FP. We may need
3166 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3167 # incompatible with these options. Also set et_arm_fp_flags to the
3168 # best options to add.
3170 proc check_effective_target_arm_fp_ok_nocache { } {
3171 global et_arm_fp_flags
3172 set et_arm_fp_flags ""
3173 if { [check_effective_target_arm32] } {
3174 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
3175 if { [check_no_compiler_messages_nocache arm_fp_ok object {
3177 #error __ARM_FP not defined
3180 set et_arm_fp_flags $flags
3189 proc check_effective_target_arm_fp_ok { } {
3190 return [check_cached_effective_target arm_fp_ok \
3191 check_effective_target_arm_fp_ok_nocache]
3194 # Add the options needed to define __ARM_FP. We need either
3195 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
3196 # specified by the multilib, use it.
3198 proc add_options_for_arm_fp { flags } {
3199 if { ! [check_effective_target_arm_fp_ok] } {
3202 global et_arm_fp_flags
3203 return "$flags $et_arm_fp_flags"
3206 # Return 1 if this is an ARM target that supports DSP multiply with
3207 # current multilib flags.
3209 proc check_effective_target_arm_dsp { } {
3210 return [check_no_compiler_messages arm_dsp assembly {
3211 #ifndef __ARM_FEATURE_DSP
3218 # Return 1 if this is an ARM target that supports unaligned word/halfword
3219 # load/store instructions.
3221 proc check_effective_target_arm_unaligned { } {
3222 return [check_no_compiler_messages arm_unaligned assembly {
3223 #ifndef __ARM_FEATURE_UNALIGNED
3224 #error no unaligned support
3230 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3231 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3232 # incompatible with these options. Also set et_arm_crypto_flags to the
3233 # best options to add.
3235 proc check_effective_target_arm_crypto_ok_nocache { } {
3236 global et_arm_crypto_flags
3237 set et_arm_crypto_flags ""
3238 if { [check_effective_target_arm_v8_neon_ok] } {
3239 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
3240 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
3241 #include "arm_neon.h"
3243 foo (uint8x16_t a, uint8x16_t b)
3245 return vaeseq_u8 (a, b);
3248 set et_arm_crypto_flags $flags
3257 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3259 proc check_effective_target_arm_crypto_ok { } {
3260 return [check_cached_effective_target arm_crypto_ok \
3261 check_effective_target_arm_crypto_ok_nocache]
3264 # Add options for crypto extensions.
3265 proc add_options_for_arm_crypto { flags } {
3266 if { ! [check_effective_target_arm_crypto_ok] } {
3269 global et_arm_crypto_flags
3270 return "$flags $et_arm_crypto_flags"
3273 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3274 # or -mfloat-abi=hard, but if one is already specified by the
3275 # multilib, use it. Similarly, if a -mfpu option already enables
3276 # NEON, do not add -mfpu=neon.
3278 proc add_options_for_arm_neon { flags } {
3279 if { ! [check_effective_target_arm_neon_ok] } {
3282 global et_arm_neon_flags
3283 return "$flags $et_arm_neon_flags"
3286 proc add_options_for_arm_v8_vfp { flags } {
3287 if { ! [check_effective_target_arm_v8_vfp_ok] } {
3290 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
3293 proc add_options_for_arm_v8_neon { flags } {
3294 if { ! [check_effective_target_arm_v8_neon_ok] } {
3297 global et_arm_v8_neon_flags
3298 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
3301 # Add the options needed for ARMv8.1 Adv.SIMD. Also adds the ARMv8 NEON
3302 # options for AArch64 and for ARM.
3304 proc add_options_for_arm_v8_1a_neon { flags } {
3305 if { ! [check_effective_target_arm_v8_1a_neon_ok] } {
3308 global et_arm_v8_1a_neon_flags
3309 return "$flags $et_arm_v8_1a_neon_flags -march=armv8.1-a"
3312 # Add the options needed for ARMv8.2 with the scalar FP16 extension.
3313 # Also adds the ARMv8 FP options for ARM and for AArch64.
3315 proc add_options_for_arm_v8_2a_fp16_scalar { flags } {
3316 if { ! [check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
3319 global et_arm_v8_2a_fp16_scalar_flags
3320 return "$flags $et_arm_v8_2a_fp16_scalar_flags"
3323 # Add the options needed for ARMv8.2 with the FP16 extension. Also adds
3324 # the ARMv8 NEON options for ARM and for AArch64.
3326 proc add_options_for_arm_v8_2a_fp16_neon { flags } {
3327 if { ! [check_effective_target_arm_v8_2a_fp16_neon_ok] } {
3330 global et_arm_v8_2a_fp16_neon_flags
3331 return "$flags $et_arm_v8_2a_fp16_neon_flags"
3334 proc add_options_for_arm_crc { flags } {
3335 if { ! [check_effective_target_arm_crc_ok] } {
3338 global et_arm_crc_flags
3339 return "$flags $et_arm_crc_flags"
3342 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3343 # or -mfloat-abi=hard, but if one is already specified by the
3344 # multilib, use it. Similarly, if a -mfpu option already enables
3345 # NEON, do not add -mfpu=neon.
3347 proc add_options_for_arm_neonv2 { flags } {
3348 if { ! [check_effective_target_arm_neonv2_ok] } {
3351 global et_arm_neonv2_flags
3352 return "$flags $et_arm_neonv2_flags"
3355 # Add the options needed for vfp3.
3356 proc add_options_for_arm_vfp3 { flags } {
3357 if { ! [check_effective_target_arm_vfp3_ok] } {
3360 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
3363 # Return 1 if this is an ARM target supporting -mfpu=neon
3364 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3365 # incompatible with these options. Also set et_arm_neon_flags to the
3366 # best options to add.
3368 proc check_effective_target_arm_neon_ok_nocache { } {
3369 global et_arm_neon_flags
3370 set et_arm_neon_flags ""
3371 if { [check_effective_target_arm32] } {
3372 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a"} {
3373 if { [check_no_compiler_messages_nocache arm_neon_ok object {
3375 #ifndef __ARM_NEON__
3378 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3379 configured for -mcpu=arm926ej-s, for example. */
3380 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
3381 #error Architecture does not support NEON.
3384 set et_arm_neon_flags $flags
3393 proc check_effective_target_arm_neon_ok { } {
3394 return [check_cached_effective_target arm_neon_ok \
3395 check_effective_target_arm_neon_ok_nocache]
3398 proc check_effective_target_arm_crc_ok_nocache { } {
3399 global et_arm_crc_flags
3400 set et_arm_crc_flags "-march=armv8-a+crc"
3401 return [check_no_compiler_messages_nocache arm_crc_ok object {
3402 #if !defined (__ARM_FEATURE_CRC32)
3405 } "$et_arm_crc_flags"]
3408 proc check_effective_target_arm_crc_ok { } {
3409 return [check_cached_effective_target arm_crc_ok \
3410 check_effective_target_arm_crc_ok_nocache]
3413 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
3414 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3415 # incompatible with these options. Also set et_arm_neon_fp16_flags to
3416 # the best options to add.
3418 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
3419 global et_arm_neon_fp16_flags
3420 global et_arm_neon_flags
3421 set et_arm_neon_fp16_flags ""
3422 if { [check_effective_target_arm32]
3423 && [check_effective_target_arm_neon_ok] } {
3424 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3425 "-mfpu=neon-fp16 -mfloat-abi=softfp"
3426 "-mfp16-format=ieee"
3427 "-mfloat-abi=softfp -mfp16-format=ieee"
3428 "-mfpu=neon-fp16 -mfp16-format=ieee"
3429 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
3430 if { [check_no_compiler_messages_nocache arm_neon_fp16_ok object {
3431 #include "arm_neon.h"
3433 foo (float32x4_t arg)
3435 return vcvt_f16_f32 (arg);
3437 } "$et_arm_neon_flags $flags"] } {
3438 set et_arm_neon_fp16_flags [concat $et_arm_neon_flags $flags]
3447 proc check_effective_target_arm_neon_fp16_ok { } {
3448 return [check_cached_effective_target arm_neon_fp16_ok \
3449 check_effective_target_arm_neon_fp16_ok_nocache]
3452 proc check_effective_target_arm_neon_fp16_hw { } {
3453 if {! [check_effective_target_arm_neon_fp16_ok] } {
3456 global et_arm_neon_fp16_flags
3457 check_runtime_nocache arm_neon_fp16_hw {
3459 main (int argc, char **argv)
3461 asm ("vcvt.f32.f16 q1, d0");
3464 } $et_arm_neon_fp16_flags
3467 proc add_options_for_arm_neon_fp16 { flags } {
3468 if { ! [check_effective_target_arm_neon_fp16_ok] } {
3471 global et_arm_neon_fp16_flags
3472 return "$flags $et_arm_neon_fp16_flags"
3475 # Return 1 if this is an ARM target supporting the FP16 alternative
3476 # format. Some multilibs may be incompatible with the options needed. Also
3477 # set et_arm_neon_fp16_flags to the best options to add.
3479 proc check_effective_target_arm_fp16_alternative_ok_nocache { } {
3480 global et_arm_neon_fp16_flags
3481 set et_arm_neon_fp16_flags ""
3482 if { [check_effective_target_arm32] } {
3483 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3484 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3485 if { [check_no_compiler_messages_nocache \
3486 arm_fp16_alternative_ok object {
3487 #if !defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3488 #error __ARM_FP16_FORMAT_ALTERNATIVE not defined
3490 } "$flags -mfp16-format=alternative"] } {
3491 set et_arm_neon_fp16_flags "$flags -mfp16-format=alternative"
3500 proc check_effective_target_arm_fp16_alternative_ok { } {
3501 return [check_cached_effective_target arm_fp16_alternative_ok \
3502 check_effective_target_arm_fp16_alternative_ok_nocache]
3505 # Return 1 if this is an ARM target supports specifying the FP16 none
3506 # format. Some multilibs may be incompatible with the options needed.
3508 proc check_effective_target_arm_fp16_none_ok_nocache { } {
3509 if { [check_effective_target_arm32] } {
3510 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3511 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3512 if { [check_no_compiler_messages_nocache \
3513 arm_fp16_none_ok object {
3514 #if defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3515 #error __ARM_FP16_FORMAT_ALTERNATIVE defined
3517 #if defined (__ARM_FP16_FORMAT_IEEE)
3518 #error __ARM_FP16_FORMAT_IEEE defined
3520 } "$flags -mfp16-format=none"] } {
3529 proc check_effective_target_arm_fp16_none_ok { } {
3530 return [check_cached_effective_target arm_fp16_none_ok \
3531 check_effective_target_arm_fp16_none_ok_nocache]
3534 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
3535 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3536 # incompatible with these options. Also set et_arm_v8_neon_flags to the
3537 # best options to add.
3539 proc check_effective_target_arm_v8_neon_ok_nocache { } {
3540 global et_arm_v8_neon_flags
3541 set et_arm_v8_neon_flags ""
3542 if { [check_effective_target_arm32] } {
3543 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3544 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
3546 #error not armv8 or later
3548 #include "arm_neon.h"
3552 __asm__ volatile ("vrintn.f32 q0, q0");
3554 } "$flags -march=armv8-a"] } {
3555 set et_arm_v8_neon_flags $flags
3564 proc check_effective_target_arm_v8_neon_ok { } {
3565 return [check_cached_effective_target arm_v8_neon_ok \
3566 check_effective_target_arm_v8_neon_ok_nocache]
3569 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
3570 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3571 # incompatible with these options. Also set et_arm_neonv2_flags to the
3572 # best options to add.
3574 proc check_effective_target_arm_neonv2_ok_nocache { } {
3575 global et_arm_neonv2_flags
3576 global et_arm_neon_flags
3577 set et_arm_neonv2_flags ""
3578 if { [check_effective_target_arm32]
3579 && [check_effective_target_arm_neon_ok] } {
3580 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
3581 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
3582 #include "arm_neon.h"
3584 foo (float32x2_t a, float32x2_t b, float32x2_t c)
3586 return vfma_f32 (a, b, c);
3588 } "$et_arm_neon_flags $flags"] } {
3589 set et_arm_neonv2_flags [concat $et_arm_neon_flags $flags]
3598 proc check_effective_target_arm_neonv2_ok { } {
3599 return [check_cached_effective_target arm_neonv2_ok \
3600 check_effective_target_arm_neonv2_ok_nocache]
3603 # Add the options needed for VFP FP16 support. We need either
3604 # -mfloat-abi=softfp or -mfloat-abi=hard. If one is already specified by
3605 # the multilib, use it.
3607 proc add_options_for_arm_fp16 { flags } {
3608 if { ! [check_effective_target_arm_fp16_ok] } {
3611 global et_arm_fp16_flags
3612 return "$flags $et_arm_fp16_flags"
3615 # Add the options needed to enable support for IEEE format
3616 # half-precision support. This is valid for ARM targets.
3618 proc add_options_for_arm_fp16_ieee { flags } {
3619 if { ! [check_effective_target_arm_fp16_ok] } {
3622 global et_arm_fp16_flags
3623 return "$flags $et_arm_fp16_flags -mfp16-format=ieee"
3626 # Add the options needed to enable support for ARM Alternative format
3627 # half-precision support. This is valid for ARM targets.
3629 proc add_options_for_arm_fp16_alternative { flags } {
3630 if { ! [check_effective_target_arm_fp16_ok] } {
3633 global et_arm_fp16_flags
3634 return "$flags $et_arm_fp16_flags -mfp16-format=alternative"
3637 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
3638 # Skip multilibs that are incompatible with these options and set
3639 # et_arm_fp16_flags to the best options to add. This test is valid for
3642 proc check_effective_target_arm_fp16_ok_nocache { } {
3643 global et_arm_fp16_flags
3644 set et_arm_fp16_flags ""
3645 if { ! [check_effective_target_arm32] } {
3649 [list "" { *-*-* } { "-mfpu=*" } \
3650 { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" \
3651 "-mfpu=*fpv[1-9][0-9]*" "-mfpu=*fp-armv8*" } ]] {
3652 # Multilib flags would override -mfpu.
3655 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
3656 # Must generate floating-point instructions.
3659 if [check_effective_target_arm_hf_eabi] {
3660 # Use existing float-abi and force an fpu which supports fp16
3661 set et_arm_fp16_flags "-mfpu=vfpv4"
3664 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
3665 # The existing -mfpu value is OK; use it, but add softfp.
3666 set et_arm_fp16_flags "-mfloat-abi=softfp"
3669 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
3670 # macro to check for this support.
3671 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
3672 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
3675 set et_arm_fp16_flags "$flags"
3682 proc check_effective_target_arm_fp16_ok { } {
3683 return [check_cached_effective_target arm_fp16_ok \
3684 check_effective_target_arm_fp16_ok_nocache]
3687 # Return 1 if the target supports executing VFP FP16 instructions, 0
3688 # otherwise. This test is valid for ARM only.
3690 proc check_effective_target_arm_fp16_hw { } {
3691 if {! [check_effective_target_arm_fp16_ok] } {
3694 global et_arm_fp16_flags
3695 check_runtime_nocache arm_fp16_hw {
3697 main (int argc, char **argv)
3701 asm ("vcvtb.f32.f16 %0, %1"
3702 : "=w" (r) : "w" (a)
3703 : /* No clobbers. */);
3704 return (r == 1.0) ? 0 : 1;
3706 } "$et_arm_fp16_flags -mfp16-format=ieee"
3709 # Creates a series of routines that return 1 if the given architecture
3710 # can be selected and a routine to give the flags to select that architecture
3711 # Note: Extra flags may be added to disable options from newer compilers
3712 # (Thumb in particular - but others may be added in the future).
3713 # -march=armv7ve is special and is handled explicitly after this loop because
3714 # it needs more than one predefine check to identify.
3715 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
3716 # /* { dg-add-options arm_arch_v5 } */
3717 # /* { dg-require-effective-target arm_arch_v5_multilib } */
3718 foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__
3719 v4t "-march=armv4t" __ARM_ARCH_4T__
3720 v5 "-march=armv5 -marm" __ARM_ARCH_5__
3721 v5t "-march=armv5t" __ARM_ARCH_5T__
3722 v5te "-march=armv5te" __ARM_ARCH_5TE__
3723 v6 "-march=armv6" __ARM_ARCH_6__
3724 v6k "-march=armv6k" __ARM_ARCH_6K__
3725 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
3726 v6z "-march=armv6z" __ARM_ARCH_6Z__
3727 v6m "-march=armv6-m -mthumb" __ARM_ARCH_6M__
3728 v7a "-march=armv7-a" __ARM_ARCH_7A__
3729 v7r "-march=armv7-r" __ARM_ARCH_7R__
3730 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
3731 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
3732 v8a "-march=armv8-a" __ARM_ARCH_8A__
3733 v8_1a "-march=armv8.1a" __ARM_ARCH_8A__
3734 v8_2a "-march=armv8.2a" __ARM_ARCH_8A__
3735 v8m_base "-march=armv8-m.base -mthumb" __ARM_ARCH_8M_BASE__
3736 v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__ } {
3737 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
3738 proc check_effective_target_arm_arch_FUNC_ok { } {
3739 if { [ string match "*-marm*" "FLAG" ] &&
3740 ![check_effective_target_arm_arm_ok] } {
3743 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
3750 proc add_options_for_arm_arch_FUNC { flags } {
3751 return "$flags FLAG"
3754 proc check_effective_target_arm_arch_FUNC_multilib { } {
3755 return [check_runtime arm_arch_FUNC_multilib {
3761 } [add_options_for_arm_arch_FUNC ""]]
3766 # Same functions as above but for -march=armv7ve. To uniquely identify
3767 # -march=armv7ve we need to check for __ARM_ARCH_7A__ as well as
3768 # __ARM_FEATURE_IDIV otherwise it aliases with armv7-a.
3770 proc check_effective_target_arm_arch_v7ve_ok { } {
3771 if { [ string match "*-marm*" "-march=armv7ve" ] &&
3772 ![check_effective_target_arm_arm_ok] } {
3775 return [check_no_compiler_messages arm_arch_v7ve_ok assembly {
3776 #if !defined (__ARM_ARCH_7A__) || !defined (__ARM_FEATURE_IDIV)
3779 } "-march=armv7ve" ]
3782 proc add_options_for_arm_arch_v7ve { flags } {
3783 return "$flags -march=armv7ve"
3786 # Return 1 if this is an ARM target where -marm causes ARM to be
3789 proc check_effective_target_arm_arm_ok { } {
3790 return [check_no_compiler_messages arm_arm_ok assembly {
3791 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
3792 #error !__arm__ || __thumb__ || __thumb2__
3798 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
3801 proc check_effective_target_arm_thumb1_ok { } {
3802 return [check_no_compiler_messages arm_thumb1_ok assembly {
3803 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3804 #error !__arm__ || !__thumb__ || __thumb2__
3806 int foo (int i) { return i; }
3810 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
3813 proc check_effective_target_arm_thumb2_ok { } {
3814 return [check_no_compiler_messages arm_thumb2_ok assembly {
3815 #if !defined(__thumb2__)
3818 int foo (int i) { return i; }
3822 # Return 1 if this is an ARM target where Thumb-1 is used without options
3823 # added by the test.
3825 proc check_effective_target_arm_thumb1 { } {
3826 return [check_no_compiler_messages arm_thumb1 assembly {
3827 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3828 #error !__arm__ || !__thumb__ || __thumb2__
3834 # Return 1 if this is an ARM target where Thumb-2 is used without options
3835 # added by the test.
3837 proc check_effective_target_arm_thumb2 { } {
3838 return [check_no_compiler_messages arm_thumb2 assembly {
3839 #if !defined(__thumb2__)
3846 # Return 1 if this is an ARM target where conditional execution is available.
3848 proc check_effective_target_arm_cond_exec { } {
3849 return [check_no_compiler_messages arm_cond_exec assembly {
3850 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
3857 # Return 1 if this is an ARM cortex-M profile cpu
3859 proc check_effective_target_arm_cortex_m { } {
3860 if { ![istarget arm*-*-*] } {
3863 return [check_no_compiler_messages arm_cortex_m assembly {
3864 #if defined(__ARM_ARCH_ISA_ARM)
3865 #error __ARM_ARCH_ISA_ARM is defined
3871 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
3872 # used and MOVT/MOVW instructions to be available.
3874 proc check_effective_target_arm_thumb1_movt_ok {} {
3875 if [check_effective_target_arm_thumb1_ok] {
3876 return [check_no_compiler_messages arm_movt object {
3880 asm ("movt r0, #42");
3888 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
3889 # used and CBZ and CBNZ instructions are available.
3891 proc check_effective_target_arm_thumb1_cbz_ok {} {
3892 if [check_effective_target_arm_thumb1_ok] {
3893 return [check_no_compiler_messages arm_movt object {
3897 asm ("cbz r0, 2f\n2:");
3905 # Return 1 if this compilation turns on string_ops_prefer_neon on.
3907 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
3908 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
3909 int foo (void) { return 0; }
3910 } "-O2 -mprint-tune-info" ]
3913 # Return 1 if the target supports executing NEON instructions, 0
3914 # otherwise. Cache the result.
3916 proc check_effective_target_arm_neon_hw { } {
3917 return [check_runtime arm_neon_hw_available {
3921 long long a = 0, b = 1;
3922 asm ("vorr %P0, %P1, %P2"
3924 : "0" (a), "w" (b));
3927 } [add_options_for_arm_neon ""]]
3930 proc check_effective_target_arm_neonv2_hw { } {
3931 return [check_runtime arm_neon_hwv2_available {
3932 #include "arm_neon.h"
3936 float32x2_t a, b, c;
3937 asm ("vfma.f32 %P0, %P1, %P2"
3939 : "w" (b), "w" (c));
3942 } [add_options_for_arm_neonv2 ""]]
3945 # Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
3946 # otherwise. The test is valid for AArch64 and ARM. Record the command
3947 # line options needed.
3949 proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
3950 global et_arm_v8_1a_neon_flags
3951 set et_arm_v8_1a_neon_flags ""
3953 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
3957 # Iterate through sets of options to find the compiler flags that
3958 # need to be added to the -march option. Start with the empty set
3959 # since AArch64 only needs the -march setting.
3960 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
3961 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3962 if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object {
3963 #if !defined (__ARM_FEATURE_QRDMX)
3964 #error "__ARM_FEATURE_QRDMX not defined"
3966 } "$flags -march=armv8.1-a"] } {
3967 set et_arm_v8_1a_neon_flags "$flags -march=armv8.1-a"
3975 proc check_effective_target_arm_v8_1a_neon_ok { } {
3976 return [check_cached_effective_target arm_v8_1a_neon_ok \
3977 check_effective_target_arm_v8_1a_neon_ok_nocache]
3980 # Return 1 if the target supports ARMv8.2 scalar FP16 arithmetic
3981 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
3982 # Record the command line options needed.
3984 proc check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache { } {
3985 global et_arm_v8_2a_fp16_scalar_flags
3986 set et_arm_v8_2a_fp16_scalar_flags ""
3988 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
3992 # Iterate through sets of options to find the compiler flags that
3993 # need to be added to the -march option.
3994 foreach flags {"" "-mfpu=fp-armv8" "-mfloat-abi=softfp" \
3995 "-mfpu=fp-armv8 -mfloat-abi=softfp"} {
3996 if { [check_no_compiler_messages_nocache \
3997 arm_v8_2a_fp16_scalar_ok object {
3998 #if !defined (__ARM_FEATURE_FP16_SCALAR_ARITHMETIC)
3999 #error "__ARM_FEATURE_FP16_SCALAR_ARITHMETIC not defined"
4001 } "$flags -march=armv8.2-a+fp16"] } {
4002 set et_arm_v8_2a_fp16_scalar_flags "$flags -march=armv8.2-a+fp16"
4010 proc check_effective_target_arm_v8_2a_fp16_scalar_ok { } {
4011 return [check_cached_effective_target arm_v8_2a_fp16_scalar_ok \
4012 check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache]
4015 # Return 1 if the target supports ARMv8.2 Adv.SIMD FP16 arithmetic
4016 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4017 # Record the command line options needed.
4019 proc check_effective_target_arm_v8_2a_fp16_neon_ok_nocache { } {
4020 global et_arm_v8_2a_fp16_neon_flags
4021 set et_arm_v8_2a_fp16_neon_flags ""
4023 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4027 # Iterate through sets of options to find the compiler flags that
4028 # need to be added to the -march option.
4029 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4030 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4031 if { [check_no_compiler_messages_nocache \
4032 arm_v8_2a_fp16_neon_ok object {
4033 #if !defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
4034 #error "__ARM_FEATURE_FP16_VECTOR_ARITHMETIC not defined"
4036 } "$flags -march=armv8.2-a+fp16"] } {
4037 set et_arm_v8_2a_fp16_neon_flags "$flags -march=armv8.2-a+fp16"
4045 proc check_effective_target_arm_v8_2a_fp16_neon_ok { } {
4046 return [check_cached_effective_target arm_v8_2a_fp16_neon_ok \
4047 check_effective_target_arm_v8_2a_fp16_neon_ok_nocache]
4050 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
4053 proc check_effective_target_arm_v8_neon_hw { } {
4054 return [check_runtime arm_v8_neon_hw_available {
4055 #include "arm_neon.h"
4059 float32x2_t a = { 1.0f, 2.0f };
4060 #ifdef __ARM_ARCH_ISA_A64
4061 asm ("frinta %0.2s, %1.2s"
4065 asm ("vrinta.f32 %P0, %P1"
4069 return a[0] == 2.0f;
4071 } [add_options_for_arm_v8_neon ""]]
4074 # Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
4075 # otherwise. The test is valid for AArch64 and ARM.
4077 proc check_effective_target_arm_v8_1a_neon_hw { } {
4078 if { ![check_effective_target_arm_v8_1a_neon_ok] } {
4081 return [check_runtime arm_v8_1a_neon_hw_available {
4085 #ifdef __ARM_ARCH_ISA_A64
4086 __Int32x2_t a = {0, 1};
4087 __Int32x2_t b = {0, 2};
4090 asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
4093 : /* No clobbers. */);
4097 __simd64_int32_t a = {0, 1};
4098 __simd64_int32_t b = {0, 2};
4099 __simd64_int32_t result;
4101 asm ("vqrdmlah.s32 %P0, %P1, %P2"
4104 : /* No clobbers. */);
4109 } [add_options_for_arm_v8_1a_neon ""]]
4112 # Return 1 if the target supports executing floating point instructions from
4113 # ARMv8.2 with the FP16 extension, 0 otherwise. The test is valid for ARM and
4116 proc check_effective_target_arm_v8_2a_fp16_scalar_hw { } {
4117 if { ![check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
4120 return [check_runtime arm_v8_2a_fp16_scalar_hw_available {
4127 #ifdef __ARM_ARCH_ISA_A64
4129 asm ("fabs %h0, %h1"
4132 : /* No clobbers. */);
4136 asm ("vabs.f16 %0, %1"
4139 : /* No clobbers. */);
4143 return (result == 1.0) ? 0 : 1;
4145 } [add_options_for_arm_v8_2a_fp16_scalar ""]]
4148 # Return 1 if the target supports executing Adv.SIMD instructions from ARMv8.2
4149 # with the FP16 extension, 0 otherwise. The test is valid for ARM and for
4152 proc check_effective_target_arm_v8_2a_fp16_neon_hw { } {
4153 if { ![check_effective_target_arm_v8_2a_fp16_neon_ok] } {
4156 return [check_runtime arm_v8_2a_fp16_neon_hw_available {
4160 #ifdef __ARM_ARCH_ISA_A64
4162 __Float16x4_t a = {1.0, -1.0, 1.0, -1.0};
4163 __Float16x4_t result;
4165 asm ("fabs %0.4h, %1.4h"
4168 : /* No clobbers. */);
4172 __simd64_float16_t a = {1.0, -1.0, 1.0, -1.0};
4173 __simd64_float16_t result;
4175 asm ("vabs.f16 %P0, %P1"
4178 : /* No clobbers. */);
4182 return (result[0] == 1.0) ? 0 : 1;
4184 } [add_options_for_arm_v8_2a_fp16_neon ""]]
4187 # Return 1 if this is a ARM target with NEON enabled.
4189 proc check_effective_target_arm_neon { } {
4190 if { [check_effective_target_arm32] } {
4191 return [check_no_compiler_messages arm_neon object {
4192 #ifndef __ARM_NEON__
4203 proc check_effective_target_arm_neonv2 { } {
4204 if { [check_effective_target_arm32] } {
4205 return [check_no_compiler_messages arm_neon object {
4206 #ifndef __ARM_NEON__
4209 #ifndef __ARM_FEATURE_FMA
4221 # Return 1 if this is an ARM target with load acquire and store release
4222 # instructions for 8-, 16- and 32-bit types.
4224 proc check_effective_target_arm_acq_rel { } {
4225 return [check_no_compiler_messages arm_acq_rel object {
4227 load_acquire_store_release (void)
4229 asm ("lda r0, [r1]\n\t"
4235 : : : "r0", "memory");
4240 # Add the options needed for MIPS Paired-Single.
4242 proc add_options_for_mpaired_single { flags } {
4243 if { ! [check_effective_target_mpaired_single] } {
4246 return "$flags -mpaired-single"
4249 # Add the options needed for MIPS SIMD Architecture.
4251 proc add_options_for_mips_msa { flags } {
4252 if { ! [check_effective_target_mips_msa] } {
4255 return "$flags -mmsa"
4258 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
4259 # the Loongson vector modes.
4261 proc check_effective_target_mips_loongson { } {
4262 return [check_no_compiler_messages loongson assembly {
4263 #if !defined(__mips_loongson_vector_rev)
4264 #error !__mips_loongson_vector_rev
4269 # Return 1 if this is a MIPS target that supports the legacy NAN.
4271 proc check_effective_target_mips_nanlegacy { } {
4272 return [check_no_compiler_messages nanlegacy assembly {
4274 int main () { return 0; }
4278 # Return 1 if an MSA program can be compiled to object
4280 proc check_effective_target_mips_msa { } {
4281 if ![check_effective_target_nomips16] {
4284 return [check_no_compiler_messages msa object {
4285 #if !defined(__mips_msa)
4286 #error "MSA NOT AVAIL"
4288 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
4289 #error "MSA NOT AVAIL FOR ISA REV < 2"
4291 #if !defined(__mips_hard_float)
4292 #error "MSA HARD_FLOAT REQUIRED"
4294 #if __mips_fpr != 64
4295 #error "MSA 64-bit FPR REQUIRED"
4301 v8i16 v = __builtin_msa_ldi_h (1);
4309 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
4312 proc check_effective_target_arm_eabi { } {
4313 return [check_no_compiler_messages arm_eabi object {
4314 #ifndef __ARM_EABI__
4322 # Return 1 if this is an ARM target that adheres to the hard-float variant of
4323 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
4325 proc check_effective_target_arm_hf_eabi { } {
4326 return [check_no_compiler_messages arm_hf_eabi object {
4327 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
4328 #error not hard-float EABI
4335 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
4336 # Some multilibs may be incompatible with this option.
4338 proc check_effective_target_arm_iwmmxt_ok { } {
4339 if { [check_effective_target_arm32] } {
4340 return [check_no_compiler_messages arm_iwmmxt_ok object {
4348 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
4349 # for an ARM target.
4350 proc check_effective_target_arm_prefer_ldrd_strd { } {
4351 if { ![check_effective_target_arm32] } {
4355 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
4356 void foo (int *p) { p[0] = 1; p[1] = 0;}
4360 # Return 1 if this is a PowerPC target supporting -meabi.
4362 proc check_effective_target_powerpc_eabi_ok { } {
4363 if { [istarget powerpc*-*-*] } {
4364 return [check_no_compiler_messages powerpc_eabi_ok object {
4372 # Return 1 if this is a PowerPC target with floating-point registers.
4374 proc check_effective_target_powerpc_fprs { } {
4375 if { [istarget powerpc*-*-*]
4376 || [istarget rs6000-*-*] } {
4377 return [check_no_compiler_messages powerpc_fprs object {
4389 # Return 1 if this is a PowerPC target with hardware double-precision
4392 proc check_effective_target_powerpc_hard_double { } {
4393 if { [istarget powerpc*-*-*]
4394 || [istarget rs6000-*-*] } {
4395 return [check_no_compiler_messages powerpc_hard_double object {
4407 # Return 1 if this is a PowerPC target supporting -maltivec.
4409 proc check_effective_target_powerpc_altivec_ok { } {
4410 if { ([istarget powerpc*-*-*]
4411 && ![istarget powerpc-*-linux*paired*])
4412 || [istarget rs6000-*-*] } {
4413 # AltiVec is not supported on AIX before 5.3.
4414 if { [istarget powerpc*-*-aix4*]
4415 || [istarget powerpc*-*-aix5.1*]
4416 || [istarget powerpc*-*-aix5.2*] } {
4419 return [check_no_compiler_messages powerpc_altivec_ok object {
4427 # Return 1 if this is a PowerPC target supporting -mpower8-vector
4429 proc check_effective_target_powerpc_p8vector_ok { } {
4430 if { ([istarget powerpc*-*-*]
4431 && ![istarget powerpc-*-linux*paired*])
4432 || [istarget rs6000-*-*] } {
4433 # AltiVec is not supported on AIX before 5.3.
4434 if { [istarget powerpc*-*-aix4*]
4435 || [istarget powerpc*-*-aix5.1*]
4436 || [istarget powerpc*-*-aix5.2*] } {
4439 return [check_no_compiler_messages powerpc_p8vector_ok object {
4442 asm volatile ("xxlorc vs0,vs0,vs0");
4444 asm volatile ("xxlorc 0,0,0");
4448 } "-mpower8-vector"]
4454 # Return 1 if this is a PowerPC target supporting -mpower9-vector
4456 proc check_effective_target_powerpc_p9vector_ok { } {
4457 if { ([istarget powerpc*-*-*]
4458 && ![istarget powerpc-*-linux*paired*])
4459 || [istarget rs6000-*-*] } {
4460 # AltiVec is not supported on AIX before 5.3.
4461 if { [istarget powerpc*-*-aix4*]
4462 || [istarget powerpc*-*-aix5.1*]
4463 || [istarget powerpc*-*-aix5.2*] } {
4466 return [check_no_compiler_messages powerpc_p9vector_ok object {
4469 vector double v = (vector double) { 0.0, 0.0 };
4470 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
4473 } "-mpower9-vector"]
4479 # Return 1 if this is a PowerPC target supporting -mmodulo
4481 proc check_effective_target_powerpc_p9modulo_ok { } {
4482 if { ([istarget powerpc*-*-*]
4483 && ![istarget powerpc-*-linux*paired*])
4484 || [istarget rs6000-*-*] } {
4485 # AltiVec is not supported on AIX before 5.3.
4486 if { [istarget powerpc*-*-aix4*]
4487 || [istarget powerpc*-*-aix5.1*]
4488 || [istarget powerpc*-*-aix5.2*] } {
4491 return [check_no_compiler_messages powerpc_p9modulo_ok object {
4493 int i = 5, j = 3, r = -1;
4494 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
4503 # Return 1 if this is a PowerPC target supporting -mfloat128 via either
4504 # software emulation on power7/power8 systems or hardware support on power9.
4506 proc check_effective_target_powerpc_float128_sw_ok { } {
4507 if { ([istarget powerpc*-*-*]
4508 && ![istarget powerpc-*-linux*paired*])
4509 || [istarget rs6000-*-*] } {
4510 # AltiVec is not supported on AIX before 5.3.
4511 if { [istarget powerpc*-*-aix4*]
4512 || [istarget powerpc*-*-aix5.1*]
4513 || [istarget powerpc*-*-aix5.2*] } {
4516 return [check_no_compiler_messages powerpc_float128_sw_ok object {
4517 volatile __float128 x = 1.0q;
4518 volatile __float128 y = 2.0q;
4520 __float128 z = x + y;
4523 } "-mfloat128 -mvsx"]
4529 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
4530 # support on power9.
4532 proc check_effective_target_powerpc_float128_hw_ok { } {
4533 if { ([istarget powerpc*-*-*]
4534 && ![istarget powerpc-*-linux*paired*])
4535 || [istarget rs6000-*-*] } {
4536 # AltiVec is not supported on AIX before 5.3.
4537 if { [istarget powerpc*-*-aix4*]
4538 || [istarget powerpc*-*-aix5.1*]
4539 || [istarget powerpc*-*-aix5.2*] } {
4542 return [check_no_compiler_messages powerpc_float128_hw_ok object {
4543 volatile __float128 x = 1.0q;
4544 volatile __float128 y = 2.0q;
4547 __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
4550 } "-mfloat128-hardware"]
4556 # Return 1 if this is a PowerPC target supporting -mvsx
4558 proc check_effective_target_powerpc_vsx_ok { } {
4559 if { ([istarget powerpc*-*-*]
4560 && ![istarget powerpc-*-linux*paired*])
4561 || [istarget rs6000-*-*] } {
4562 # VSX is not supported on AIX before 7.1.
4563 if { [istarget powerpc*-*-aix4*]
4564 || [istarget powerpc*-*-aix5*]
4565 || [istarget powerpc*-*-aix6*] } {
4568 return [check_no_compiler_messages powerpc_vsx_ok object {
4571 asm volatile ("xxlor vs0,vs0,vs0");
4573 asm volatile ("xxlor 0,0,0");
4583 # Return 1 if this is a PowerPC target supporting -mhtm
4585 proc check_effective_target_powerpc_htm_ok { } {
4586 if { ([istarget powerpc*-*-*]
4587 && ![istarget powerpc-*-linux*paired*])
4588 || [istarget rs6000-*-*] } {
4589 # HTM is not supported on AIX yet.
4590 if { [istarget powerpc*-*-aix*] } {
4593 return [check_no_compiler_messages powerpc_htm_ok object {
4595 asm volatile ("tbegin. 0");
4604 # Return 1 if the target supports executing HTM hardware instructions,
4605 # 0 otherwise. Cache the result.
4607 proc check_htm_hw_available { } {
4608 return [check_cached_effective_target htm_hw_available {
4609 # For now, disable on Darwin
4610 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
4613 check_runtime_nocache htm_hw_available {
4623 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
4625 proc check_effective_target_powerpc_ppu_ok { } {
4626 if [check_effective_target_powerpc_altivec_ok] {
4627 return [check_no_compiler_messages cell_asm_available object {
4630 asm volatile ("lvlx v0,v0,v0");
4632 asm volatile ("lvlx 0,0,0");
4642 # Return 1 if this is a PowerPC target that supports SPU.
4644 proc check_effective_target_powerpc_spu { } {
4645 if { [istarget powerpc*-*-linux*] } {
4646 return [check_effective_target_powerpc_altivec_ok]
4652 # Return 1 if this is a PowerPC SPE target. The check includes options
4653 # specified by dg-options for this test, so don't cache the result.
4655 proc check_effective_target_powerpc_spe_nocache { } {
4656 if { [istarget powerpc*-*-*] } {
4657 return [check_no_compiler_messages_nocache powerpc_spe object {
4663 } [current_compiler_flags]]
4669 # Return 1 if this is a PowerPC target with SPE enabled.
4671 proc check_effective_target_powerpc_spe { } {
4672 if { [istarget powerpc*-*-*] } {
4673 return [check_no_compiler_messages powerpc_spe object {
4685 # Return 1 if this is a PowerPC target with Altivec enabled.
4687 proc check_effective_target_powerpc_altivec { } {
4688 if { [istarget powerpc*-*-*] } {
4689 return [check_no_compiler_messages powerpc_altivec object {
4701 # Return 1 if this is a PowerPC 405 target. The check includes options
4702 # specified by dg-options for this test, so don't cache the result.
4704 proc check_effective_target_powerpc_405_nocache { } {
4705 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
4706 return [check_no_compiler_messages_nocache powerpc_405 object {
4712 } [current_compiler_flags]]
4718 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
4720 proc check_effective_target_powerpc_elfv2 { } {
4721 if { [istarget powerpc*-*-*] } {
4722 return [check_no_compiler_messages powerpc_elfv2 object {
4724 #error not ELF v2 ABI
4734 # Return 1 if this is a SPU target with a toolchain that
4735 # supports automatic overlay generation.
4737 proc check_effective_target_spu_auto_overlay { } {
4738 if { [istarget spu*-*-elf*] } {
4739 return [check_no_compiler_messages spu_auto_overlay executable {
4741 } "-Wl,--auto-overlay" ]
4747 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
4748 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
4749 # test environment appears to run executables on such a simulator.
4751 proc check_effective_target_ultrasparc_hw { } {
4752 return [check_runtime ultrasparc_hw {
4753 int main() { return 0; }
4754 } "-mcpu=ultrasparc"]
4757 # Return 1 if the test environment supports executing UltraSPARC VIS2
4758 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
4760 proc check_effective_target_ultrasparc_vis2_hw { } {
4761 return [check_runtime ultrasparc_vis2_hw {
4762 int main() { __asm__(".word 0x81b00320"); return 0; }
4763 } "-mcpu=ultrasparc3"]
4766 # Return 1 if the test environment supports executing UltraSPARC VIS3
4767 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
4769 proc check_effective_target_ultrasparc_vis3_hw { } {
4770 return [check_runtime ultrasparc_vis3_hw {
4771 int main() { __asm__(".word 0x81b00220"); return 0; }
4775 # Return 1 if this is a SPARC-V9 target.
4777 proc check_effective_target_sparc_v9 { } {
4778 if { [istarget sparc*-*-*] } {
4779 return [check_no_compiler_messages sparc_v9 object {
4781 asm volatile ("return %i7+8");
4790 # Return 1 if this is a SPARC target with VIS enabled.
4792 proc check_effective_target_sparc_vis { } {
4793 if { [istarget sparc*-*-*] } {
4794 return [check_no_compiler_messages sparc_vis object {
4806 # Return 1 if the target supports hardware vector shift operation.
4808 proc check_effective_target_vect_shift { } {
4809 global et_vect_shift_saved
4812 if [info exists et_vect_shift_saved($et_index)] {
4813 verbose "check_effective_target_vect_shift: using cached result" 2
4815 set et_vect_shift_saved($et_index) 0
4816 if { ([istarget powerpc*-*-*]
4817 && ![istarget powerpc-*-linux*paired*])
4818 || [istarget ia64-*-*]
4819 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4820 || [istarget aarch64*-*-*]
4821 || [check_effective_target_arm32]
4822 || ([istarget mips*-*-*]
4823 && ([et-is-effective-target mips_msa]
4824 || [et-is-effective-target mips_loongson])) } {
4825 set et_vect_shift_saved($et_index) 1
4829 verbose "check_effective_target_vect_shift:\
4830 returning $et_vect_shift_saved($et_index)" 2
4831 return $et_vect_shift_saved($et_index)
4834 proc check_effective_target_whole_vector_shift { } {
4835 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4836 || [istarget ia64-*-*]
4837 || [istarget aarch64*-*-*]
4838 || [istarget powerpc64*-*-*]
4839 || ([check_effective_target_arm32]
4840 && [check_effective_target_arm_little_endian])
4841 || ([istarget mips*-*-*]
4842 && [et-is-effective-target mips_loongson]) } {
4848 verbose "check_effective_target_vect_long: returning $answer" 2
4852 # Return 1 if the target supports vector bswap operations.
4854 proc check_effective_target_vect_bswap { } {
4855 global et_vect_bswap_saved
4858 if [info exists et_vect_bswap_saved($et_index)] {
4859 verbose "check_effective_target_vect_bswap: using cached result" 2
4861 set et_vect_bswap_saved($et_index) 0
4862 if { [istarget aarch64*-*-*]
4863 || ([istarget arm*-*-*]
4864 && [check_effective_target_arm_neon])
4866 set et_vect_bswap_saved($et_index) 1
4870 verbose "check_effective_target_vect_bswap:\
4871 returning $et_vect_bswap_saved($et_index)" 2
4872 return $et_vect_bswap_saved($et_index)
4875 # Return 1 if the target supports hardware vector shift operation for char.
4877 proc check_effective_target_vect_shift_char { } {
4878 global et_vect_shift_char_saved
4881 if [info exists et_vect_shift_char_saved($et_index)] {
4882 verbose "check_effective_target_vect_shift_char: using cached result" 2
4884 set et_vect_shift_char_saved($et_index) 0
4885 if { ([istarget powerpc*-*-*]
4886 && ![istarget powerpc-*-linux*paired*])
4887 || [check_effective_target_arm32]
4888 || ([istarget mips*-*-*]
4889 && [et-is-effective-target mips_msa]) } {
4890 set et_vect_shift_char_saved($et_index) 1
4894 verbose "check_effective_target_vect_shift_char:\
4895 returning $et_vect_shift_char_saved($et_index)" 2
4896 return $et_vect_shift_char_saved($et_index)
4899 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
4901 # This can change for different subtargets so do not cache the result.
4903 proc check_effective_target_vect_long { } {
4904 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4905 || (([istarget powerpc*-*-*]
4906 && ![istarget powerpc-*-linux*paired*])
4907 && [check_effective_target_ilp32])
4908 || [check_effective_target_arm32]
4909 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
4910 || [istarget aarch64*-*-*]
4911 || ([istarget mips*-*-*]
4912 && [et-is-effective-target mips_msa]) } {
4918 verbose "check_effective_target_vect_long: returning $answer" 2
4922 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
4924 # This won't change for different subtargets so cache the result.
4926 proc check_effective_target_vect_float { } {
4927 global et_vect_float_saved
4930 if [info exists et_vect_float_saved($et_index)] {
4931 verbose "check_effective_target_vect_float: using cached result" 2
4933 set et_vect_float_saved($et_index) 0
4934 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4935 || [istarget powerpc*-*-*]
4936 || [istarget spu-*-*]
4937 || [istarget mips-sde-elf]
4938 || [istarget mipsisa64*-*-*]
4939 || [istarget ia64-*-*]
4940 || [istarget aarch64*-*-*]
4941 || ([istarget mips*-*-*]
4942 && [et-is-effective-target mips_msa])
4943 || [check_effective_target_arm32] } {
4944 set et_vect_float_saved($et_index) 1
4948 verbose "check_effective_target_vect_float:\
4949 returning $et_vect_float_saved($et_index)" 2
4950 return $et_vect_float_saved($et_index)
4953 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
4955 # This won't change for different subtargets so cache the result.
4957 proc check_effective_target_vect_double { } {
4958 global et_vect_double_saved
4961 if [info exists et_vect_double_saved($et_index)] {
4962 verbose "check_effective_target_vect_double: using cached result" 2
4964 set et_vect_double_saved($et_index) 0
4965 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
4966 && [check_no_compiler_messages vect_double assembly {
4967 #ifdef __tune_atom__
4968 # error No double vectorizer support.
4971 || [istarget aarch64*-*-*]
4972 || [istarget spu-*-*]
4973 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
4974 || ([istarget mips*-*-*]
4975 && [et-is-effective-target mips_msa]) } {
4976 set et_vect_double_saved($et_index) 1
4980 verbose "check_effective_target_vect_double:\
4981 returning $et_vect_double_saved($et_index)" 2
4982 return $et_vect_double_saved($et_index)
4985 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
4987 # This won't change for different subtargets so cache the result.
4989 proc check_effective_target_vect_long_long { } {
4990 global et_vect_long_long_saved
4993 if [info exists et_vect_long_long_saved($et_index)] {
4994 verbose "check_effective_target_vect_long_long: using cached result" 2
4996 set et_vect_long_long_saved($et_index) 0
4997 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4998 || ([istarget mips*-*-*]
4999 && [et-is-effective-target mips_msa]) } {
5000 set et_vect_long_long_saved($et_index) 1
5004 verbose "check_effective_target_vect_long_long:\
5005 returning $et_vect_long_long_saved($et_index)" 2
5006 return $et_vect_long_long_saved($et_index)
5010 # Return 1 if the target plus current options does not support a vector
5011 # max instruction on "int", 0 otherwise.
5013 # This won't change for different subtargets so cache the result.
5015 proc check_effective_target_vect_no_int_min_max { } {
5016 global et_vect_no_int_min_max_saved
5019 if [info exists et_vect_no_int_min_max_saved($et_index)] {
5020 verbose "check_effective_target_vect_no_int_min_max:\
5021 using cached result" 2
5023 set et_vect_no_int_min_max_saved($et_index) 0
5024 if { [istarget sparc*-*-*]
5025 || [istarget spu-*-*]
5026 || [istarget alpha*-*-*]
5027 || ([istarget mips*-*-*]
5028 && [et-is-effective-target mips_loongson]) } {
5029 set et_vect_no_int_min_max_saved($et_index) 1
5032 verbose "check_effective_target_vect_no_int_min_max:\
5033 returning $et_vect_no_int_min_max_saved($et_index)" 2
5034 return $et_vect_no_int_min_max_saved($et_index)
5037 # Return 1 if the target plus current options does not support a vector
5038 # add instruction on "int", 0 otherwise.
5040 # This won't change for different subtargets so cache the result.
5042 proc check_effective_target_vect_no_int_add { } {
5043 global et_vect_no_int_add_saved
5046 if [info exists et_vect_no_int_add_saved($et_index)] {
5047 verbose "check_effective_target_vect_no_int_add: using cached result" 2
5049 set et_vect_no_int_add_saved($et_index) 0
5050 # Alpha only supports vector add on V8QI and V4HI.
5051 if { [istarget alpha*-*-*] } {
5052 set et_vect_no_int_add_saved($et_index) 1
5055 verbose "check_effective_target_vect_no_int_add:\
5056 returning $et_vect_no_int_add_saved($et_index)" 2
5057 return $et_vect_no_int_add_saved($et_index)
5060 # Return 1 if the target plus current options does not support vector
5061 # bitwise instructions, 0 otherwise.
5063 # This won't change for different subtargets so cache the result.
5065 proc check_effective_target_vect_no_bitwise { } {
5066 global et_vect_no_bitwise_saved
5069 if [info exists et_vect_no_bitwise_saved($et_index)] {
5070 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
5072 set et_vect_no_bitwise_saved($et_index) 0
5074 verbose "check_effective_target_vect_no_bitwise:\
5075 returning $et_vect_no_bitwise_saved($et_index)" 2
5076 return $et_vect_no_bitwise_saved($et_index)
5079 # Return 1 if the target plus current options supports vector permutation,
5082 # This won't change for different subtargets so cache the result.
5084 proc check_effective_target_vect_perm { } {
5085 global et_vect_perm_saved
5088 if [info exists et_vect_perm_saved($et_index)] {
5089 verbose "check_effective_target_vect_perm: using cached result" 2
5091 set et_vect_perm_saved($et_index) 0
5092 if { [is-effective-target arm_neon_ok]
5093 || [istarget aarch64*-*-*]
5094 || [istarget powerpc*-*-*]
5095 || [istarget spu-*-*]
5096 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5097 || ([istarget mips*-*-*]
5098 && ([et-is-effective-target mpaired_single]
5099 || [et-is-effective-target mips_msa])) } {
5100 set et_vect_perm_saved($et_index) 1
5103 verbose "check_effective_target_vect_perm:\
5104 returning $et_vect_perm_saved($et_index)" 2
5105 return $et_vect_perm_saved($et_index)
5108 # Return 1 if the target plus current options supports vector permutation
5109 # on byte-sized elements, 0 otherwise.
5111 # This won't change for different subtargets so cache the result.
5113 proc check_effective_target_vect_perm_byte { } {
5114 global et_vect_perm_byte_saved
5117 if [info exists et_vect_perm_byte_saved($et_index)] {
5118 verbose "check_effective_target_vect_perm_byte: using cached result" 2
5120 set et_vect_perm_byte_saved($et_index) 0
5121 if { ([is-effective-target arm_neon_ok]
5122 && [is-effective-target arm_little_endian])
5123 || ([istarget aarch64*-*-*]
5124 && [is-effective-target aarch64_little_endian])
5125 || [istarget powerpc*-*-*]
5126 || [istarget spu-*-*]
5127 || ([istarget mips-*.*]
5128 && [et-is-effective-target mips_msa]) } {
5129 set et_vect_perm_byte_saved($et_index) 1
5132 verbose "check_effective_target_vect_perm_byte:\
5133 returning $et_vect_perm_byte_saved($et_index)" 2
5134 return $et_vect_perm_byte_saved($et_index)
5137 # Return 1 if the target plus current options supports vector permutation
5138 # on short-sized elements, 0 otherwise.
5140 # This won't change for different subtargets so cache the result.
5142 proc check_effective_target_vect_perm_short { } {
5143 global et_vect_perm_short_saved
5146 if [info exists et_vect_perm_short_saved($et_index)] {
5147 verbose "check_effective_target_vect_perm_short: using cached result" 2
5149 set et_vect_perm_short_saved($et_index) 0
5150 if { ([is-effective-target arm_neon_ok]
5151 && [is-effective-target arm_little_endian])
5152 || ([istarget aarch64*-*-*]
5153 && [is-effective-target aarch64_little_endian])
5154 || [istarget powerpc*-*-*]
5155 || [istarget spu-*-*]
5156 || ([istarget mips*-*-*]
5157 && [et-is-effective-target mips_msa]) } {
5158 set et_vect_perm_short_saved($et_index) 1
5161 verbose "check_effective_target_vect_perm_short:\
5162 returning $et_vect_perm_short_saved($et_index)" 2
5163 return $et_vect_perm_short_saved($et_index)
5166 # Return 1 if the target plus current options supports a vector
5167 # widening summation of *short* args into *int* result, 0 otherwise.
5169 # This won't change for different subtargets so cache the result.
5171 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
5172 global et_vect_widen_sum_hi_to_si_pattern_saved
5175 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved($et_index)] {
5176 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5177 using cached result" 2
5179 set et_vect_widen_sum_hi_to_si_pattern_saved($et_index) 0
5180 if { [istarget powerpc*-*-*]
5181 || [istarget aarch64*-*-*]
5182 || ([istarget arm*-*-*] &&
5183 [check_effective_target_arm_neon_ok])
5184 || [istarget ia64-*-*] } {
5185 set et_vect_widen_sum_hi_to_si_pattern_saved($et_index) 1
5188 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5189 returning $et_vect_widen_sum_hi_to_si_pattern_saved($et_index)" 2
5190 return $et_vect_widen_sum_hi_to_si_pattern_saved($et_index)
5193 # Return 1 if the target plus current options supports a vector
5194 # widening summation of *short* args into *int* result, 0 otherwise.
5195 # A target can also support this widening summation if it can support
5196 # promotion (unpacking) from shorts to ints.
5198 # This won't change for different subtargets so cache the result.
5200 proc check_effective_target_vect_widen_sum_hi_to_si { } {
5201 global et_vect_widen_sum_hi_to_si_saved
5204 if [info exists et_vect_widen_sum_hi_to_si_saved($et_index)] {
5205 verbose "check_effective_target_vect_widen_sum_hi_to_si:\
5206 using cached result" 2
5208 set et_vect_widen_sum_hi_to_si_saved($et_index) \
5209 [check_effective_target_vect_unpack]
5210 if { [istarget powerpc*-*-*]
5211 || [istarget ia64-*-*] } {
5212 set et_vect_widen_sum_hi_to_si_saved($et_index) 1
5215 verbose "check_effective_target_vect_widen_sum_hi_to_si:\
5216 returning $et_vect_widen_sum_hi_to_si_saved($et_index)" 2
5217 return $et_vect_widen_sum_hi_to_si_saved($et_index)
5220 # Return 1 if the target plus current options supports a vector
5221 # widening summation of *char* args into *short* result, 0 otherwise.
5222 # A target can also support this widening summation if it can support
5223 # promotion (unpacking) from chars to shorts.
5225 # This won't change for different subtargets so cache the result.
5227 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
5228 global et_vect_widen_sum_qi_to_hi_saved
5231 if [info exists et_vect_widen_sum_qi_to_hi_saved($et_index)] {
5232 verbose "check_effective_target_vect_widen_sum_qi_to_hi:\
5233 using cached result" 2
5235 set et_vect_widen_sum_qi_to_hi_saved($et_index) 0
5236 if { [check_effective_target_vect_unpack]
5237 || [check_effective_target_arm_neon_ok]
5238 || [istarget ia64-*-*] } {
5239 set et_vect_widen_sum_qi_to_hi_saved($et_index) 1
5242 verbose "check_effective_target_vect_widen_sum_qi_to_hi:\
5243 returning $et_vect_widen_sum_qi_to_hi_saved($et_index)" 2
5244 return $et_vect_widen_sum_qi_to_hi_saved($et_index)
5247 # Return 1 if the target plus current options supports a vector
5248 # widening summation of *char* args into *int* result, 0 otherwise.
5250 # This won't change for different subtargets so cache the result.
5252 proc check_effective_target_vect_widen_sum_qi_to_si { } {
5253 global et_vect_widen_sum_qi_to_si_saved
5256 if [info exists et_vect_widen_sum_qi_to_si_saved($et_index)] {
5257 verbose "check_effective_target_vect_widen_sum_qi_to_si:\
5258 using cached result" 2
5260 set et_vect_widen_sum_qi_to_si_saved($et_index) 0
5261 if { [istarget powerpc*-*-*] } {
5262 set et_vect_widen_sum_qi_to_si_saved($et_index) 1
5265 verbose "check_effective_target_vect_widen_sum_qi_to_si:\
5266 returning $et_vect_widen_sum_qi_to_si_saved($et_index)" 2
5267 return $et_vect_widen_sum_qi_to_si_saved($et_index)
5270 # Return 1 if the target plus current options supports a vector
5271 # widening multiplication of *char* args into *short* result, 0 otherwise.
5272 # A target can also support this widening multplication if it can support
5273 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
5274 # multiplication of shorts).
5276 # This won't change for different subtargets so cache the result.
5279 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
5280 global et_vect_widen_mult_qi_to_hi_saved
5283 if [info exists et_vect_widen_mult_qi_to_hi_saved($et_index)] {
5284 verbose "check_effective_target_vect_widen_mult_qi_to_hi:\
5285 using cached result" 2
5287 if { [check_effective_target_vect_unpack]
5288 && [check_effective_target_vect_short_mult] } {
5289 set et_vect_widen_mult_qi_to_hi_saved($et_index) 1
5291 set et_vect_widen_mult_qi_to_hi_saved($et_index) 0
5293 if { [istarget powerpc*-*-*]
5294 || [istarget aarch64*-*-*]
5295 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
5296 set et_vect_widen_mult_qi_to_hi_saved($et_index) 1
5299 verbose "check_effective_target_vect_widen_mult_qi_to_hi:\
5300 returning $et_vect_widen_mult_qi_to_hi_saved($et_index)" 2
5301 return $et_vect_widen_mult_qi_to_hi_saved($et_index)
5304 # Return 1 if the target plus current options supports a vector
5305 # widening multiplication of *short* args into *int* result, 0 otherwise.
5306 # A target can also support this widening multplication if it can support
5307 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
5308 # multiplication of ints).
5310 # This won't change for different subtargets so cache the result.
5313 proc check_effective_target_vect_widen_mult_hi_to_si { } {
5314 global et_vect_widen_mult_hi_to_si_saved
5317 if [info exists et_vect_widen_mult_hi_to_si_saved($et_index)] {
5318 verbose "check_effective_target_vect_widen_mult_hi_to_si:\
5319 using cached result" 2
5321 if { [check_effective_target_vect_unpack]
5322 && [check_effective_target_vect_int_mult] } {
5323 set et_vect_widen_mult_hi_to_si_saved($et_index) 1
5325 set et_vect_widen_mult_hi_to_si_saved($et_index) 0
5327 if { [istarget powerpc*-*-*]
5328 || [istarget spu-*-*]
5329 || [istarget ia64-*-*]
5330 || [istarget aarch64*-*-*]
5331 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5332 || ([istarget arm*-*-*]
5333 && [check_effective_target_arm_neon_ok]) } {
5334 set et_vect_widen_mult_hi_to_si_saved($et_index) 1
5337 verbose "check_effective_target_vect_widen_mult_hi_to_si:\
5338 returning $et_vect_widen_mult_hi_to_si_saved($et_index)" 2
5339 return $et_vect_widen_mult_hi_to_si_saved($et_index)
5342 # Return 1 if the target plus current options supports a vector
5343 # widening multiplication of *char* args into *short* result, 0 otherwise.
5345 # This won't change for different subtargets so cache the result.
5347 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
5348 global et_vect_widen_mult_qi_to_hi_pattern_saved
5351 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)] {
5352 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
5353 using cached result" 2
5355 set et_vect_widen_mult_qi_to_hi_pattern_saved($et_index) 0
5356 if { [istarget powerpc*-*-*]
5357 || ([istarget arm*-*-*]
5358 && [check_effective_target_arm_neon_ok]
5359 && [check_effective_target_arm_little_endian]) } {
5360 set et_vect_widen_mult_qi_to_hi_pattern_saved($et_index) 1
5363 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
5364 returning $et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)" 2
5365 return $et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)
5368 # Return 1 if the target plus current options supports a vector
5369 # widening multiplication of *short* args into *int* result, 0 otherwise.
5371 # This won't change for different subtargets so cache the result.
5373 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
5374 global et_vect_widen_mult_hi_to_si_pattern_saved
5377 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved($et_index)] {
5378 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern:\
5379 using cached result" 2
5381 set et_vect_widen_mult_hi_to_si_pattern_saved($et_index) 0
5382 if { [istarget powerpc*-*-*]
5383 || [istarget spu-*-*]
5384 || [istarget ia64-*-*]
5385 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5386 || ([istarget arm*-*-*]
5387 && [check_effective_target_arm_neon_ok]
5388 && [check_effective_target_arm_little_endian]) } {
5389 set et_vect_widen_mult_hi_to_si_pattern_saved($et_index) 1
5392 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern:\
5393 returning $et_vect_widen_mult_hi_to_si_pattern_saved($et_index)" 2
5394 return $et_vect_widen_mult_hi_to_si_pattern_saved($et_index)
5397 # Return 1 if the target plus current options supports a vector
5398 # widening multiplication of *int* args into *long* result, 0 otherwise.
5400 # This won't change for different subtargets so cache the result.
5402 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
5403 global et_vect_widen_mult_si_to_di_pattern_saved
5406 if [info exists et_vect_widen_mult_si_to_di_pattern_saved($et_index)] {
5407 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern:\
5408 using cached result" 2
5410 set et_vect_widen_mult_si_to_di_pattern_saved($et_index) 0
5411 if {[istarget ia64-*-*]
5412 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
5413 set et_vect_widen_mult_si_to_di_pattern_saved($et_index) 1
5416 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern:\
5417 returning $et_vect_widen_mult_si_to_di_pattern_saved($et_index)" 2
5418 return $et_vect_widen_mult_si_to_di_pattern_saved($et_index)
5421 # Return 1 if the target plus current options supports a vector
5422 # widening shift, 0 otherwise.
5424 # This won't change for different subtargets so cache the result.
5426 proc check_effective_target_vect_widen_shift { } {
5427 global et_vect_widen_shift_saved
5430 if [info exists et_vect_shift_saved($et_index)] {
5431 verbose "check_effective_target_vect_widen_shift: using cached result" 2
5433 set et_vect_widen_shift_saved($et_index) 0
5434 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
5435 set et_vect_widen_shift_saved($et_index) 1
5438 verbose "check_effective_target_vect_widen_shift:\
5439 returning $et_vect_widen_shift_saved($et_index)" 2
5440 return $et_vect_widen_shift_saved($et_index)
5443 # Return 1 if the target plus current options supports a vector
5444 # dot-product of signed chars, 0 otherwise.
5446 # This won't change for different subtargets so cache the result.
5448 proc check_effective_target_vect_sdot_qi { } {
5449 global et_vect_sdot_qi_saved
5452 if [info exists et_vect_sdot_qi_saved($et_index)] {
5453 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
5455 set et_vect_sdot_qi_saved($et_index) 0
5456 if { [istarget ia64-*-*]
5457 || ([istarget mips*-*-*]
5458 && [et-is-effective-target mips_msa]) } {
5459 set et_vect_udot_qi_saved 1
5462 verbose "check_effective_target_vect_sdot_qi:\
5463 returning $et_vect_sdot_qi_saved($et_index)" 2
5464 return $et_vect_sdot_qi_saved($et_index)
5467 # Return 1 if the target plus current options supports a vector
5468 # dot-product of unsigned chars, 0 otherwise.
5470 # This won't change for different subtargets so cache the result.
5472 proc check_effective_target_vect_udot_qi { } {
5473 global et_vect_udot_qi_saved
5476 if [info exists et_vect_udot_qi_saved($et_index)] {
5477 verbose "check_effective_target_vect_udot_qi: using cached result" 2
5479 set et_vect_udot_qi_saved($et_index) 0
5480 if { [istarget powerpc*-*-*]
5481 || [istarget ia64-*-*]
5482 || ([istarget mips*-*-*]
5483 && [et-is-effective-target mips_msa]) } {
5484 set et_vect_udot_qi_saved($et_index) 1
5487 verbose "check_effective_target_vect_udot_qi:\
5488 returning $et_vect_udot_qi_saved($et_index)" 2
5489 return $et_vect_udot_qi_saved($et_index)
5492 # Return 1 if the target plus current options supports a vector
5493 # dot-product of signed shorts, 0 otherwise.
5495 # This won't change for different subtargets so cache the result.
5497 proc check_effective_target_vect_sdot_hi { } {
5498 global et_vect_sdot_hi_saved
5501 if [info exists et_vect_sdot_hi_saved($et_index)] {
5502 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
5504 set et_vect_sdot_hi_saved($et_index) 0
5505 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5506 || [istarget ia64-*-*]
5507 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5508 || ([istarget mips*-*-*]
5509 && [et-is-effective-target mips_msa]) } {
5510 set et_vect_sdot_hi_saved($et_index) 1
5513 verbose "check_effective_target_vect_sdot_hi:\
5514 returning $et_vect_sdot_hi_saved($et_index)" 2
5515 return $et_vect_sdot_hi_saved($et_index)
5518 # Return 1 if the target plus current options supports a vector
5519 # dot-product of unsigned shorts, 0 otherwise.
5521 # This won't change for different subtargets so cache the result.
5523 proc check_effective_target_vect_udot_hi { } {
5524 global et_vect_udot_hi_saved
5527 if [info exists et_vect_udot_hi_saved($et_index)] {
5528 verbose "check_effective_target_vect_udot_hi: using cached result" 2
5530 set et_vect_udot_hi_saved($et_index) 0
5531 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5532 || ([istarget mips*-*-*]
5533 && [et-is-effective-target mips_msa]) } {
5534 set et_vect_udot_hi_saved($et_index) 1
5537 verbose "check_effective_target_vect_udot_hi:\
5538 returning $et_vect_udot_hi_saved($et_index)" 2
5539 return $et_vect_udot_hi_saved($et_index)
5542 # Return 1 if the target plus current options supports a vector
5543 # sad operation of unsigned chars, 0 otherwise.
5545 # This won't change for different subtargets so cache the result.
5547 proc check_effective_target_vect_usad_char { } {
5548 global et_vect_usad_char_saved
5551 if [info exists et_vect_usad_char_saved($et_index)] {
5552 verbose "check_effective_target_vect_usad_char: using cached result" 2
5554 set et_vect_usad_char_saved($et_index) 0
5555 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
5556 set et_vect_usad_char_saved($et_index) 1
5559 verbose "check_effective_target_vect_usad_char:\
5560 returning $et_vect_usad_char_saved($et_index)" 2
5561 return $et_vect_usad_char_saved($et_index)
5564 # Return 1 if the target plus current options supports a vector
5565 # demotion (packing) of shorts (to chars) and ints (to shorts)
5566 # using modulo arithmetic, 0 otherwise.
5568 # This won't change for different subtargets so cache the result.
5570 proc check_effective_target_vect_pack_trunc { } {
5571 global et_vect_pack_trunc_saved
5574 if [info exists et_vect_pack_trunc_saved($et_index)] {
5575 verbose "check_effective_target_vect_pack_trunc: using cached result" 2
5577 set et_vect_pack_trunc_saved($et_index) 0
5578 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5579 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5580 || [istarget aarch64*-*-*]
5581 || [istarget spu-*-*]
5582 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
5583 && [check_effective_target_arm_little_endian])
5584 || ([istarget mips*-*-*]
5585 && [et-is-effective-target mips_msa]) } {
5586 set et_vect_pack_trunc_saved($et_index) 1
5589 verbose "check_effective_target_vect_pack_trunc:\
5590 returning $et_vect_pack_trunc_saved($et_index)" 2
5591 return $et_vect_pack_trunc_saved($et_index)
5594 # Return 1 if the target plus current options supports a vector
5595 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
5597 # This won't change for different subtargets so cache the result.
5599 proc check_effective_target_vect_unpack { } {
5600 global et_vect_unpack_saved
5603 if [info exists et_vect_unpack_saved($et_index)] {
5604 verbose "check_effective_target_vect_unpack: using cached result" 2
5606 set et_vect_unpack_saved($et_index) 0
5607 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
5608 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5609 || [istarget spu-*-*]
5610 || [istarget ia64-*-*]
5611 || [istarget aarch64*-*-*]
5612 || ([istarget mips*-*-*]
5613 && [et-is-effective-target mips_msa])
5614 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
5615 && [check_effective_target_arm_little_endian]) } {
5616 set et_vect_unpack_saved($et_index) 1
5619 verbose "check_effective_target_vect_unpack:\
5620 returning $et_vect_unpack_saved($et_index)" 2
5621 return $et_vect_unpack_saved($et_index)
5624 # Return 1 if the target plus current options does not guarantee
5625 # that its STACK_BOUNDARY is >= the reguired vector alignment.
5627 # This won't change for different subtargets so cache the result.
5629 proc check_effective_target_unaligned_stack { } {
5630 global et_unaligned_stack_saved
5632 if [info exists et_unaligned_stack_saved] {
5633 verbose "check_effective_target_unaligned_stack: using cached result" 2
5635 set et_unaligned_stack_saved 0
5637 verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
5638 return $et_unaligned_stack_saved
5641 # Return 1 if the target plus current options does not support a vector
5642 # alignment mechanism, 0 otherwise.
5644 # This won't change for different subtargets so cache the result.
5646 proc check_effective_target_vect_no_align { } {
5647 global et_vect_no_align_saved
5650 if [info exists et_vect_no_align_saved($et_index)] {
5651 verbose "check_effective_target_vect_no_align: using cached result" 2
5653 set et_vect_no_align_saved($et_index) 0
5654 if { [istarget mipsisa64*-*-*]
5655 || [istarget mips-sde-elf]
5656 || [istarget sparc*-*-*]
5657 || [istarget ia64-*-*]
5658 || [check_effective_target_arm_vect_no_misalign]
5659 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
5660 || ([istarget mips*-*-*]
5661 && [et-is-effective-target mips_loongson]) } {
5662 set et_vect_no_align_saved($et_index) 1
5665 verbose "check_effective_target_vect_no_align:\
5666 returning $et_vect_no_align_saved($et_index)" 2
5667 return $et_vect_no_align_saved($et_index)
5670 # Return 1 if the target supports a vector misalign access, 0 otherwise.
5672 # This won't change for different subtargets so cache the result.
5674 proc check_effective_target_vect_hw_misalign { } {
5675 global et_vect_hw_misalign_saved
5678 if [info exists et_vect_hw_misalign_saved($et_index)] {
5679 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
5681 set et_vect_hw_misalign_saved($et_index) 0
5682 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5683 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
5684 || [istarget aarch64*-*-*]
5685 || ([istarget mips*-*-*] && [et-is-effective-target mips_msa]) } {
5686 set et_vect_hw_misalign_saved($et_index) 1
5689 verbose "check_effective_target_vect_hw_misalign:\
5690 returning $et_vect_hw_misalign_saved($et_index)" 2
5691 return $et_vect_hw_misalign_saved($et_index)
5695 # Return 1 if arrays are aligned to the vector alignment
5696 # boundary, 0 otherwise.
5698 proc check_effective_target_vect_aligned_arrays { } {
5699 set et_vect_aligned_arrays 0
5700 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
5701 && !([is-effective-target ia32]
5702 || ([check_avx_available] && ![check_prefer_avx128])))
5703 || [istarget spu-*-*] } {
5704 set et_vect_aligned_arrays 1
5707 verbose "check_effective_target_vect_aligned_arrays:\
5708 returning $et_vect_aligned_arrays" 2
5709 return $et_vect_aligned_arrays
5712 # Return 1 if types of size 32 bit or less are naturally aligned
5713 # (aligned to their type-size), 0 otherwise.
5715 # This won't change for different subtargets so cache the result.
5717 proc check_effective_target_natural_alignment_32 { } {
5718 global et_natural_alignment_32
5720 if [info exists et_natural_alignment_32_saved] {
5721 verbose "check_effective_target_natural_alignment_32: using cached result" 2
5723 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
5724 set et_natural_alignment_32_saved 1
5725 if { ([istarget *-*-darwin*] && [is-effective-target lp64])
5726 || [istarget avr-*-*] } {
5727 set et_natural_alignment_32_saved 0
5730 verbose "check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
5731 return $et_natural_alignment_32_saved
5734 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
5735 # type-size), 0 otherwise.
5737 # This won't change for different subtargets so cache the result.
5739 proc check_effective_target_natural_alignment_64 { } {
5740 global et_natural_alignment_64
5742 if [info exists et_natural_alignment_64_saved] {
5743 verbose "check_effective_target_natural_alignment_64: using cached result" 2
5745 set et_natural_alignment_64_saved 0
5746 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
5747 || [istarget spu-*-*] } {
5748 set et_natural_alignment_64_saved 1
5751 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
5752 return $et_natural_alignment_64_saved
5755 # Return 1 if all vector types are naturally aligned (aligned to their
5756 # type-size), 0 otherwise.
5758 proc check_effective_target_vect_natural_alignment { } {
5759 set et_vect_natural_alignment 1
5760 if { [check_effective_target_arm_eabi]
5761 || [istarget nvptx-*-*]
5762 || [istarget s390*-*-*] } {
5763 set et_vect_natural_alignment 0
5765 verbose "check_effective_target_vect_natural_alignment:\
5766 returning $et_vect_natural_alignment" 2
5767 return $et_vect_natural_alignment
5770 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
5772 proc check_effective_target_vector_alignment_reachable { } {
5773 set et_vector_alignment_reachable 0
5774 if { [check_effective_target_vect_aligned_arrays]
5775 || [check_effective_target_natural_alignment_32] } {
5776 set et_vector_alignment_reachable 1
5778 verbose "check_effective_target_vector_alignment_reachable:\
5779 returning $et_vector_alignment_reachable" 2
5780 return $et_vector_alignment_reachable
5783 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
5785 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
5786 set et_vector_alignment_reachable_for_64bit 0
5787 if { [check_effective_target_vect_aligned_arrays]
5788 || [check_effective_target_natural_alignment_64] } {
5789 set et_vector_alignment_reachable_for_64bit 1
5791 verbose "check_effective_target_vector_alignment_reachable_for_64bit:\
5792 returning $et_vector_alignment_reachable_for_64bit" 2
5793 return $et_vector_alignment_reachable_for_64bit
5796 # Return 1 if the target only requires element alignment for vector accesses
5798 proc check_effective_target_vect_element_align { } {
5799 global et_vect_element_align
5802 if [info exists et_vect_element_align($et_index)] {
5803 verbose "check_effective_target_vect_element_align:\
5804 using cached result" 2
5806 set et_vect_element_align($et_index) 0
5807 if { ([istarget arm*-*-*]
5808 && ![check_effective_target_arm_vect_no_misalign])
5809 || [check_effective_target_vect_hw_misalign] } {
5810 set et_vect_element_align($et_index) 1
5814 verbose "check_effective_target_vect_element_align:\
5815 returning $et_vect_element_align($et_index)" 2
5816 return $et_vect_element_align($et_index)
5819 # Return 1 if the target supports vector LOAD_LANES operations, 0 otherwise.
5821 proc check_effective_target_vect_load_lanes { } {
5822 global et_vect_load_lanes
5824 if [info exists et_vect_load_lanes] {
5825 verbose "check_effective_target_vect_load_lanes: using cached result" 2
5827 set et_vect_load_lanes 0
5828 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])
5829 || [istarget aarch64*-*-*] } {
5830 set et_vect_load_lanes 1
5834 verbose "check_effective_target_vect_load_lanes: returning $et_vect_load_lanes" 2
5835 return $et_vect_load_lanes
5838 # Return 1 if the target supports vector conditional operations, 0 otherwise.
5840 proc check_effective_target_vect_condition { } {
5841 global et_vect_cond_saved
5844 if [info exists et_vect_cond_saved($et_index)] {
5845 verbose "check_effective_target_vect_cond: using cached result" 2
5847 set et_vect_cond_saved($et_index) 0
5848 if { [istarget aarch64*-*-*]
5849 || [istarget powerpc*-*-*]
5850 || [istarget ia64-*-*]
5851 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5852 || [istarget spu-*-*]
5853 || ([istarget mips*-*-*]
5854 && [et-is-effective-target mips_msa])
5855 || ([istarget arm*-*-*]
5856 && [check_effective_target_arm_neon_ok]) } {
5857 set et_vect_cond_saved($et_index) 1
5861 verbose "check_effective_target_vect_cond:\
5862 returning $et_vect_cond_saved($et_index)" 2
5863 return $et_vect_cond_saved($et_index)
5866 # Return 1 if the target supports vector conditional operations where
5867 # the comparison has different type from the lhs, 0 otherwise.
5869 proc check_effective_target_vect_cond_mixed { } {
5870 global et_vect_cond_mixed_saved
5873 if [info exists et_vect_cond_mixed_saved($et_index)] {
5874 verbose "check_effective_target_vect_cond_mixed: using cached result" 2
5876 set et_vect_cond_mixed_saved($et_index) 0
5877 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5878 || [istarget aarch64*-*-*]
5879 || [istarget powerpc*-*-*]
5880 || ([istarget mips*-*-*]
5881 && [et-is-effective-target mips_msa]) } {
5882 set et_vect_cond_mixed_saved($et_index) 1
5886 verbose "check_effective_target_vect_cond_mixed:\
5887 returning $et_vect_cond_mixed_saved($et_index)" 2
5888 return $et_vect_cond_mixed_saved($et_index)
5891 # Return 1 if the target supports vector char multiplication, 0 otherwise.
5893 proc check_effective_target_vect_char_mult { } {
5894 global et_vect_char_mult_saved
5897 if [info exists et_vect_char_mult_saved($et_index)] {
5898 verbose "check_effective_target_vect_char_mult: using cached result" 2
5900 set et_vect_char_mult_saved($et_index) 0
5901 if { [istarget aarch64*-*-*]
5902 || [istarget ia64-*-*]
5903 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5904 || [check_effective_target_arm32]
5905 || [check_effective_target_powerpc_altivec]
5906 || ([istarget mips*-*-*]
5907 && [et-is-effective-target mips_msa]) } {
5908 set et_vect_char_mult_saved($et_index) 1
5912 verbose "check_effective_target_vect_char_mult:\
5913 returning $et_vect_char_mult_saved($et_index)" 2
5914 return $et_vect_char_mult_saved($et_index)
5917 # Return 1 if the target supports vector short multiplication, 0 otherwise.
5919 proc check_effective_target_vect_short_mult { } {
5920 global et_vect_short_mult_saved
5923 if [info exists et_vect_short_mult_saved($et_index)] {
5924 verbose "check_effective_target_vect_short_mult: using cached result" 2
5926 set et_vect_short_mult_saved($et_index) 0
5927 if { [istarget ia64-*-*]
5928 || [istarget spu-*-*]
5929 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5930 || [istarget powerpc*-*-*]
5931 || [istarget aarch64*-*-*]
5932 || [check_effective_target_arm32]
5933 || ([istarget mips*-*-*]
5934 && ([et-is-effective-target mips_msa]
5935 || [et-is-effective-target mips_loongson])) } {
5936 set et_vect_short_mult_saved($et_index) 1
5940 verbose "check_effective_target_vect_short_mult:\
5941 returning $et_vect_short_mult_saved($et_index)" 2
5942 return $et_vect_short_mult_saved($et_index)
5945 # Return 1 if the target supports vector int multiplication, 0 otherwise.
5947 proc check_effective_target_vect_int_mult { } {
5948 global et_vect_int_mult_saved
5951 if [info exists et_vect_int_mult_saved($et_index)] {
5952 verbose "check_effective_target_vect_int_mult: using cached result" 2
5954 set et_vect_int_mult_saved($et_index) 0
5955 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5956 || [istarget spu-*-*]
5957 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5958 || [istarget ia64-*-*]
5959 || [istarget aarch64*-*-*]
5960 || ([istarget mips*-*-*]
5961 && [et-is-effective-target mips_msa])
5962 || [check_effective_target_arm32] } {
5963 set et_vect_int_mult_saved($et_index) 1
5967 verbose "check_effective_target_vect_int_mult:\
5968 returning $et_vect_int_mult_saved($et_index)" 2
5969 return $et_vect_int_mult_saved($et_index)
5972 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
5974 proc check_effective_target_vect_extract_even_odd { } {
5975 global et_vect_extract_even_odd_saved
5978 if [info exists et_vect_extract_even_odd_saved($et_index)] {
5979 verbose "check_effective_target_vect_extract_even_odd:\
5980 using cached result" 2
5982 set et_vect_extract_even_odd_saved($et_index) 0
5983 if { [istarget aarch64*-*-*]
5984 || [istarget powerpc*-*-*]
5985 || [is-effective-target arm_neon_ok]
5986 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5987 || [istarget ia64-*-*]
5988 || [istarget spu-*-*]
5989 || ([istarget mips*-*-*]
5990 && ([et-is-effective-target mips_msa]
5991 || [et-is-effective-target mpaired_single])) } {
5992 set et_vect_extract_even_odd_saved($et_index) 1
5996 verbose "check_effective_target_vect_extract_even_odd:\
5997 returning $et_vect_extract_even_odd_saved($et_index)" 2
5998 return $et_vect_extract_even_odd_saved($et_index)
6001 # Return 1 if the target supports vector interleaving, 0 otherwise.
6003 proc check_effective_target_vect_interleave { } {
6004 global et_vect_interleave_saved
6007 if [info exists et_vect_interleave_saved($et_index)] {
6008 verbose "check_effective_target_vect_interleave: using cached result" 2
6010 set et_vect_interleave_saved($et_index) 0
6011 if { [istarget aarch64*-*-*]
6012 || [istarget powerpc*-*-*]
6013 || [is-effective-target arm_neon_ok]
6014 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6015 || [istarget ia64-*-*]
6016 || [istarget spu-*-*]
6017 || ([istarget mips*-*-*]
6018 && ([et-is-effective-target mpaired_single]
6019 || [et-is-effective-target mips_msa])) } {
6020 set et_vect_interleave_saved($et_index) 1
6024 verbose "check_effective_target_vect_interleave:\
6025 returning $et_vect_interleave_saved($et_index)" 2
6026 return $et_vect_interleave_saved($et_index)
6029 foreach N {2 3 4 8} {
6030 eval [string map [list N $N] {
6031 # Return 1 if the target supports 2-vector interleaving
6032 proc check_effective_target_vect_stridedN { } {
6033 global et_vect_stridedN_saved
6036 if [info exists et_vect_stridedN_saved($et_index)] {
6037 verbose "check_effective_target_vect_stridedN:\
6038 using cached result" 2
6040 set et_vect_stridedN_saved($et_index) 0
6042 && [check_effective_target_vect_interleave]
6043 && [check_effective_target_vect_extract_even_odd] } {
6044 set et_vect_stridedN_saved($et_index) 1
6046 if { ([istarget arm*-*-*]
6047 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
6048 set et_vect_stridedN_saved($et_index) 1
6052 verbose "check_effective_target_vect_stridedN:\
6053 returning $et_vect_stridedN_saved($et_index)" 2
6054 return $et_vect_stridedN_saved($et_index)
6059 # Return 1 if the target supports multiple vector sizes
6061 proc check_effective_target_vect_multiple_sizes { } {
6062 global et_vect_multiple_sizes_saved
6065 set et_vect_multiple_sizes_saved($et_index) 0
6066 if { [istarget aarch64*-*-*]
6067 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])
6068 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
6069 && ([check_avx_available] && ![check_prefer_avx128])) } {
6070 set et_vect_multiple_sizes_saved($et_index) 1
6073 verbose "check_effective_target_vect_multiple_sizes:\
6074 returning $et_vect_multiple_sizes_saved($et_index)" 2
6075 return $et_vect_multiple_sizes_saved($et_index)
6078 # Return 1 if the target supports vectors of 64 bits.
6080 proc check_effective_target_vect64 { } {
6081 global et_vect64_saved
6084 if [info exists et_vect64_saved($et_index)] {
6085 verbose "check_effective_target_vect64: using cached result" 2
6087 set et_vect64_saved($et_index) 0
6088 if { ([istarget arm*-*-*]
6089 && [check_effective_target_arm_neon_ok]
6090 && [check_effective_target_arm_little_endian])
6091 || [istarget aarch64*-*-*]
6092 || [istarget sparc*-*-*] } {
6093 set et_vect64_saved($et_index) 1
6097 verbose "check_effective_target_vect64:\
6098 returning $et_vect64_saved($et_index)" 2
6099 return $et_vect64_saved($et_index)
6102 # Return 1 if the target supports vector copysignf calls.
6104 proc check_effective_target_vect_call_copysignf { } {
6105 global et_vect_call_copysignf_saved
6108 if [info exists et_vect_call_copysignf_saved($et_index)] {
6109 verbose "check_effective_target_vect_call_copysignf:\
6110 using cached result" 2
6112 set et_vect_call_copysignf_saved($et_index) 0
6113 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6114 || [istarget powerpc*-*-*] } {
6115 set et_vect_call_copysignf_saved($et_index) 1
6119 verbose "check_effective_target_vect_call_copysignf:\
6120 returning $et_vect_call_copysignf_saved($et_index)" 2
6121 return $et_vect_call_copysignf_saved($et_index)
6124 # Return 1 if the target supports hardware square root instructions.
6126 proc check_effective_target_sqrt_insn { } {
6127 global et_sqrt_insn_saved
6129 if [info exists et_sqrt_insn_saved] {
6130 verbose "check_effective_target_hw_sqrt: using cached result" 2
6132 set et_sqrt_insn_saved 0
6133 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6134 || [istarget powerpc*-*-*]
6135 || [istarget aarch64*-*-*]
6136 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok]) } {
6137 set et_sqrt_insn_saved 1
6141 verbose "check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2
6142 return $et_sqrt_insn_saved
6145 # Return 1 if the target supports vector sqrtf calls.
6147 proc check_effective_target_vect_call_sqrtf { } {
6148 global et_vect_call_sqrtf_saved
6151 if [info exists et_vect_call_sqrtf_saved($et_index)] {
6152 verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
6154 set et_vect_call_sqrtf_saved($et_index) 0
6155 if { [istarget aarch64*-*-*]
6156 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6157 || ([istarget powerpc*-*-*] && [check_vsx_hw_available]) } {
6158 set et_vect_call_sqrtf_saved($et_index) 1
6162 verbose "check_effective_target_vect_call_sqrtf:\
6163 returning $et_vect_call_sqrtf_saved($et_index)" 2
6164 return $et_vect_call_sqrtf_saved($et_index)
6167 # Return 1 if the target supports vector lrint calls.
6169 proc check_effective_target_vect_call_lrint { } {
6170 set et_vect_call_lrint 0
6171 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6172 && [check_effective_target_ilp32]) } {
6173 set et_vect_call_lrint 1
6176 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
6177 return $et_vect_call_lrint
6180 # Return 1 if the target supports vector btrunc calls.
6182 proc check_effective_target_vect_call_btrunc { } {
6183 global et_vect_call_btrunc_saved
6186 if [info exists et_vect_call_btrunc_saved($et_index)] {
6187 verbose "check_effective_target_vect_call_btrunc:\
6188 using cached result" 2
6190 set et_vect_call_btrunc_saved($et_index) 0
6191 if { [istarget aarch64*-*-*] } {
6192 set et_vect_call_btrunc_saved($et_index) 1
6196 verbose "check_effective_target_vect_call_btrunc:\
6197 returning $et_vect_call_btrunc_saved($et_index)" 2
6198 return $et_vect_call_btrunc_saved($et_index)
6201 # Return 1 if the target supports vector btruncf calls.
6203 proc check_effective_target_vect_call_btruncf { } {
6204 global et_vect_call_btruncf_saved
6207 if [info exists et_vect_call_btruncf_saved($et_index)] {
6208 verbose "check_effective_target_vect_call_btruncf:\
6209 using cached result" 2
6211 set et_vect_call_btruncf_saved($et_index) 0
6212 if { [istarget aarch64*-*-*] } {
6213 set et_vect_call_btruncf_saved($et_index) 1
6217 verbose "check_effective_target_vect_call_btruncf:\
6218 returning $et_vect_call_btruncf_saved($et_index)" 2
6219 return $et_vect_call_btruncf_saved($et_index)
6222 # Return 1 if the target supports vector ceil calls.
6224 proc check_effective_target_vect_call_ceil { } {
6225 global et_vect_call_ceil_saved
6228 if [info exists et_vect_call_ceil_saved($et_index)] {
6229 verbose "check_effective_target_vect_call_ceil: using cached result" 2
6231 set et_vect_call_ceil_saved($et_index) 0
6232 if { [istarget aarch64*-*-*] } {
6233 set et_vect_call_ceil_saved($et_index) 1
6237 verbose "check_effective_target_vect_call_ceil:\
6238 returning $et_vect_call_ceil_saved($et_index)" 2
6239 return $et_vect_call_ceil_saved($et_index)
6242 # Return 1 if the target supports vector ceilf calls.
6244 proc check_effective_target_vect_call_ceilf { } {
6245 global et_vect_call_ceilf_saved
6248 if [info exists et_vect_call_ceilf_saved($et_index)] {
6249 verbose "check_effective_target_vect_call_ceilf: using cached result" 2
6251 set et_vect_call_ceilf_saved($et_index) 0
6252 if { [istarget aarch64*-*-*] } {
6253 set et_vect_call_ceilf_saved($et_index) 1
6257 verbose "check_effective_target_vect_call_ceilf:\
6258 returning $et_vect_call_ceilf_saved($et_index)" 2
6259 return $et_vect_call_ceilf_saved($et_index)
6262 # Return 1 if the target supports vector floor calls.
6264 proc check_effective_target_vect_call_floor { } {
6265 global et_vect_call_floor_saved
6268 if [info exists et_vect_call_floor_saved($et_index)] {
6269 verbose "check_effective_target_vect_call_floor: using cached result" 2
6271 set et_vect_call_floor_saved($et_index) 0
6272 if { [istarget aarch64*-*-*] } {
6273 set et_vect_call_floor_saved($et_index) 1
6277 verbose "check_effective_target_vect_call_floor:\
6278 returning $et_vect_call_floor_saved($et_index)" 2
6279 return $et_vect_call_floor_saved($et_index)
6282 # Return 1 if the target supports vector floorf calls.
6284 proc check_effective_target_vect_call_floorf { } {
6285 global et_vect_call_floorf_saved
6288 if [info exists et_vect_call_floorf_saved($et_index)] {
6289 verbose "check_effective_target_vect_call_floorf: using cached result" 2
6291 set et_vect_call_floorf_saved($et_index) 0
6292 if { [istarget aarch64*-*-*] } {
6293 set et_vect_call_floorf_saved($et_index) 1
6297 verbose "check_effective_target_vect_call_floorf:\
6298 returning $et_vect_call_floorf_saved($et_index)" 2
6299 return $et_vect_call_floorf_saved($et_index)
6302 # Return 1 if the target supports vector lceil calls.
6304 proc check_effective_target_vect_call_lceil { } {
6305 global et_vect_call_lceil_saved
6308 if [info exists et_vect_call_lceil_saved($et_index)] {
6309 verbose "check_effective_target_vect_call_lceil: using cached result" 2
6311 set et_vect_call_lceil_saved($et_index) 0
6312 if { [istarget aarch64*-*-*] } {
6313 set et_vect_call_lceil_saved($et_index) 1
6317 verbose "check_effective_target_vect_call_lceil:\
6318 returning $et_vect_call_lceil_saved($et_index)" 2
6319 return $et_vect_call_lceil_saved($et_index)
6322 # Return 1 if the target supports vector lfloor calls.
6324 proc check_effective_target_vect_call_lfloor { } {
6325 global et_vect_call_lfloor_saved
6328 if [info exists et_vect_call_lfloor_saved($et_index)] {
6329 verbose "check_effective_target_vect_call_lfloor: using cached result" 2
6331 set et_vect_call_lfloor_saved($et_index) 0
6332 if { [istarget aarch64*-*-*] } {
6333 set et_vect_call_lfloor_saved($et_index) 1
6337 verbose "check_effective_target_vect_call_lfloor:\
6338 returning $et_vect_call_lfloor_saved($et_index)" 2
6339 return $et_vect_call_lfloor_saved($et_index)
6342 # Return 1 if the target supports vector nearbyint calls.
6344 proc check_effective_target_vect_call_nearbyint { } {
6345 global et_vect_call_nearbyint_saved
6348 if [info exists et_vect_call_nearbyint_saved($et_index)] {
6349 verbose "check_effective_target_vect_call_nearbyint: using cached result" 2
6351 set et_vect_call_nearbyint_saved($et_index) 0
6352 if { [istarget aarch64*-*-*] } {
6353 set et_vect_call_nearbyint_saved($et_index) 1
6357 verbose "check_effective_target_vect_call_nearbyint:\
6358 returning $et_vect_call_nearbyint_saved($et_index)" 2
6359 return $et_vect_call_nearbyint_saved($et_index)
6362 # Return 1 if the target supports vector nearbyintf calls.
6364 proc check_effective_target_vect_call_nearbyintf { } {
6365 global et_vect_call_nearbyintf_saved
6368 if [info exists et_vect_call_nearbyintf_saved($et_index)] {
6369 verbose "check_effective_target_vect_call_nearbyintf:\
6370 using cached result" 2
6372 set et_vect_call_nearbyintf_saved($et_index) 0
6373 if { [istarget aarch64*-*-*] } {
6374 set et_vect_call_nearbyintf_saved($et_index) 1
6378 verbose "check_effective_target_vect_call_nearbyintf:\
6379 returning $et_vect_call_nearbyintf_saved($et_index)" 2
6380 return $et_vect_call_nearbyintf_saved($et_index)
6383 # Return 1 if the target supports vector round calls.
6385 proc check_effective_target_vect_call_round { } {
6386 global et_vect_call_round_saved
6389 if [info exists et_vect_call_round_saved($et_index)] {
6390 verbose "check_effective_target_vect_call_round: using cached result" 2
6392 set et_vect_call_round_saved($et_index) 0
6393 if { [istarget aarch64*-*-*] } {
6394 set et_vect_call_round_saved($et_index) 1
6398 verbose "check_effective_target_vect_call_round:\
6399 returning $et_vect_call_round_saved($et_index)" 2
6400 return $et_vect_call_round_saved($et_index)
6403 # Return 1 if the target supports vector roundf calls.
6405 proc check_effective_target_vect_call_roundf { } {
6406 global et_vect_call_roundf_saved
6409 if [info exists et_vect_call_roundf_saved($et_index)] {
6410 verbose "check_effective_target_vect_call_roundf: using cached result" 2
6412 set et_vect_call_roundf_saved($et_index) 0
6413 if { [istarget aarch64*-*-*] } {
6414 set et_vect_call_roundf_saved($et_index) 1
6418 verbose "check_effective_target_vect_call_roundf:\
6419 returning $et_vect_call_roundf_saved($et_index)" 2
6420 return $et_vect_call_roundf_saved($et_index)
6423 # Return 1 if the target supports section-anchors
6425 proc check_effective_target_section_anchors { } {
6426 global et_section_anchors_saved
6428 if [info exists et_section_anchors_saved] {
6429 verbose "check_effective_target_section_anchors: using cached result" 2
6431 set et_section_anchors_saved 0
6432 if { [istarget powerpc*-*-*]
6433 || [istarget arm*-*-*]
6434 || [istarget aarch64*-*-*] } {
6435 set et_section_anchors_saved 1
6439 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
6440 return $et_section_anchors_saved
6443 # Return 1 if the target supports atomic operations on "int_128" values.
6445 proc check_effective_target_sync_int_128 { } {
6446 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6447 && ![is-effective-target ia32])
6448 || [istarget spu-*-*] } {
6455 # Return 1 if the target supports atomic operations on "int_128" values
6456 # and can execute them.
6458 proc check_effective_target_sync_int_128_runtime { } {
6459 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6460 && ![is-effective-target ia32]
6461 && [check_cached_effective_target sync_int_128_available {
6462 check_runtime_nocache sync_int_128_available {
6466 unsigned int eax, ebx, ecx, edx;
6467 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
6468 return !(ecx & bit_CMPXCHG16B);
6473 || [istarget spu-*-*] } {
6480 # Return 1 if the target supports atomic operations on "long long".
6482 # Note: 32bit x86 targets require -march=pentium in dg-options.
6483 # Note: 32bit s390 targets require -mzarch in dg-options.
6485 proc check_effective_target_sync_long_long { } {
6486 if { [istarget i?86-*-*] || [istarget x86_64-*-*])
6487 || [istarget aarch64*-*-*]
6488 || [istarget arm*-*-*]
6489 || [istarget alpha*-*-*]
6490 || ([istarget sparc*-*-*] && [check_effective_target_lp64])
6491 || [istarget s390*-*-*]
6492 || [istarget spu-*-*] } {
6499 # Return 1 if the target supports atomic operations on "long long"
6500 # and can execute them.
6502 # Note: 32bit x86 targets require -march=pentium in dg-options.
6504 proc check_effective_target_sync_long_long_runtime { } {
6505 if { (([istarget x86_64-*-*] || [istarget i?86-*-*])
6506 && [check_cached_effective_target sync_long_long_available {
6507 check_runtime_nocache sync_long_long_available {
6511 unsigned int eax, ebx, ecx, edx;
6512 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
6513 return !(edx & bit_CMPXCHG8B);
6518 || [istarget aarch64*-*-*]
6519 || ([istarget arm*-*-linux-*]
6520 && [check_runtime sync_longlong_runtime {
6526 if (sizeof (long long) != 8)
6529 /* Just check for native;
6530 checking for kernel fallback is tricky. */
6531 asm volatile ("ldrexd r0,r1, [%0]"
6532 : : "r" (&l1) : "r0", "r1");
6536 || [istarget alpha*-*-*]
6537 || ([istarget sparc*-*-*]
6538 && [check_effective_target_lp64]
6539 && [check_effective_target_ultrasparc_hw])
6540 || [istarget spu-*-*]
6541 || ([istarget powerpc*-*-*] && [check_effective_target_lp64]) } {
6548 # Return 1 if the target supports byte swap instructions.
6550 proc check_effective_target_bswap { } {
6551 global et_bswap_saved
6553 if [info exists et_bswap_saved] {
6554 verbose "check_effective_target_bswap: using cached result" 2
6556 set et_bswap_saved 0
6557 if { [istarget aarch64*-*-*]
6558 || [istarget alpha*-*-*]
6559 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6560 || [istarget m68k-*-*]
6561 || [istarget powerpc*-*-*]
6562 || [istarget rs6000-*-*]
6563 || [istarget s390*-*-*]
6564 || ([istarget arm*-*-*]
6565 && [check_no_compiler_messages_nocache arm_v6_or_later object {
6567 #error not armv6 or later
6571 set et_bswap_saved 1
6575 verbose "check_effective_target_bswap: returning $et_bswap_saved" 2
6576 return $et_bswap_saved
6579 # Return 1 if the target supports 16-bit byte swap instructions.
6581 proc check_effective_target_bswap16 { } {
6582 global et_bswap16_saved
6584 if [info exists et_bswap16_saved] {
6585 verbose "check_effective_target_bswap16: using cached result" 2
6587 set et_bswap16_saved 0
6588 if { [is-effective-target bswap]
6589 && ![istarget alpha*-*-*]
6590 && !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
6591 set et_bswap16_saved 1
6595 verbose "check_effective_target_bswap16: returning $et_bswap16_saved" 2
6596 return $et_bswap16_saved
6599 # Return 1 if the target supports 32-bit byte swap instructions.
6601 proc check_effective_target_bswap32 { } {
6602 global et_bswap32_saved
6604 if [info exists et_bswap32_saved] {
6605 verbose "check_effective_target_bswap32: using cached result" 2
6607 set et_bswap32_saved 0
6608 if { [is-effective-target bswap] } {
6609 set et_bswap32_saved 1
6613 verbose "check_effective_target_bswap32: returning $et_bswap32_saved" 2
6614 return $et_bswap32_saved
6617 # Return 1 if the target supports 64-bit byte swap instructions.
6619 # Note: 32bit s390 targets require -mzarch in dg-options.
6621 proc check_effective_target_bswap64 { } {
6622 global et_bswap64_saved
6624 # expand_unop can expand 64-bit byte swap on 32-bit targets
6625 if { [is-effective-target bswap] && [is-effective-target int32plus] } {
6631 # Return 1 if the target supports atomic operations on "int" and "long".
6633 proc check_effective_target_sync_int_long { } {
6634 global et_sync_int_long_saved
6636 if [info exists et_sync_int_long_saved] {
6637 verbose "check_effective_target_sync_int_long: using cached result" 2
6639 set et_sync_int_long_saved 0
6640 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
6641 # load-reserved/store-conditional instructions.
6642 if { [istarget ia64-*-*]
6643 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6644 || [istarget aarch64*-*-*]
6645 || [istarget alpha*-*-*]
6646 || [istarget arm*-*-linux-*]
6647 || ([istarget arm*-*-*]
6648 && [check_effective_target_arm_acq_rel])
6649 || [istarget bfin*-*linux*]
6650 || [istarget hppa*-*linux*]
6651 || [istarget s390*-*-*]
6652 || [istarget powerpc*-*-*]
6653 || [istarget crisv32-*-*] || [istarget cris-*-*]
6654 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
6655 || [istarget spu-*-*]
6656 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
6657 || [check_effective_target_mips_llsc] } {
6658 set et_sync_int_long_saved 1
6662 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
6663 return $et_sync_int_long_saved
6666 # Return 1 if the target supports atomic operations on "char" and "short".
6668 proc check_effective_target_sync_char_short { } {
6669 global et_sync_char_short_saved
6671 if [info exists et_sync_char_short_saved] {
6672 verbose "check_effective_target_sync_char_short: using cached result" 2
6674 set et_sync_char_short_saved 0
6675 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
6676 # load-reserved/store-conditional instructions.
6677 if { [istarget aarch64*-*-*]
6678 || [istarget ia64-*-*]
6679 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6680 || [istarget alpha*-*-*]
6681 || [istarget arm*-*-linux-*]
6682 || ([istarget arm*-*-*]
6683 && [check_effective_target_arm_acq_rel])
6684 || [istarget hppa*-*linux*]
6685 || [istarget s390*-*-*]
6686 || [istarget powerpc*-*-*]
6687 || [istarget crisv32-*-*] || [istarget cris-*-*]
6688 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
6689 || [istarget spu-*-*]
6690 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
6691 || [check_effective_target_mips_llsc] } {
6692 set et_sync_char_short_saved 1
6696 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
6697 return $et_sync_char_short_saved
6700 # Return 1 if the target uses a ColdFire FPU.
6702 proc check_effective_target_coldfire_fpu { } {
6703 return [check_no_compiler_messages coldfire_fpu assembly {
6710 # Return true if this is a uClibc target.
6712 proc check_effective_target_uclibc {} {
6713 return [check_no_compiler_messages uclibc object {
6714 #include <features.h>
6715 #if !defined (__UCLIBC__)
6721 # Return true if this is a uclibc target and if the uclibc feature
6722 # described by __$feature__ is not present.
6724 proc check_missing_uclibc_feature {feature} {
6725 return [check_no_compiler_messages $feature object "
6726 #include <features.h>
6727 #if !defined (__UCLIBC) || defined (__${feature}__)
6733 # Return true if this is a Newlib target.
6735 proc check_effective_target_newlib {} {
6736 return [check_no_compiler_messages newlib object {
6741 # Return true if this is NOT a Bionic target.
6743 proc check_effective_target_non_bionic {} {
6744 return [check_no_compiler_messages non_bionic object {
6746 #if defined (__BIONIC__)
6752 # Return true if this target has error.h header.
6754 proc check_effective_target_error_h {} {
6755 return [check_no_compiler_messages error_h object {
6760 # Return true if this target has tgmath.h header.
6762 proc check_effective_target_tgmath_h {} {
6763 return [check_no_compiler_messages tgmath_h object {
6768 # Return true if target's libc supports complex functions.
6770 proc check_effective_target_libc_has_complex_functions {} {
6771 return [check_no_compiler_messages libc_has_complex_functions object {
6772 #include <complex.h>
6777 # (a) an error of a few ULP is expected in string to floating-point
6778 # conversion functions; and
6779 # (b) overflow is not always detected correctly by those functions.
6781 proc check_effective_target_lax_strtofp {} {
6782 # By default, assume that all uClibc targets suffer from this.
6783 return [check_effective_target_uclibc]
6786 # Return 1 if this is a target for which wcsftime is a dummy
6787 # function that always returns 0.
6789 proc check_effective_target_dummy_wcsftime {} {
6790 # By default, assume that all uClibc targets suffer from this.
6791 return [check_effective_target_uclibc]
6794 # Return 1 if constructors with initialization priority arguments are
6795 # supposed on this target.
6797 proc check_effective_target_init_priority {} {
6798 return [check_no_compiler_messages init_priority assembly "
6799 void f() __attribute__((constructor (1000)));
6804 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
6805 # This can be used with any check_* proc that takes no argument and
6806 # returns only 1 or 0. It could be used with check_* procs that take
6807 # arguments with keywords that pass particular arguments.
6809 proc is-effective-target { arg } {
6812 if { ![info exists et_index] } {
6813 # Initialize the effective target index that is used in some
6814 # check_effective_target_* procs.
6817 if { [info procs check_effective_target_${arg}] != [list] } {
6818 set selected [check_effective_target_${arg}]
6821 "vmx_hw" { set selected [check_vmx_hw_available] }
6822 "vsx_hw" { set selected [check_vsx_hw_available] }
6823 "p8vector_hw" { set selected [check_p8vector_hw_available] }
6824 "p9vector_hw" { set selected [check_p9vector_hw_available] }
6825 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
6826 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
6827 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
6828 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
6829 "dfp_hw" { set selected [check_dfp_hw_available] }
6830 "htm_hw" { set selected [check_htm_hw_available] }
6831 "named_sections" { set selected [check_named_sections_available] }
6832 "gc_sections" { set selected [check_gc_sections_available] }
6833 "cxa_atexit" { set selected [check_cxa_atexit_available] }
6834 default { error "unknown effective target keyword `$arg'" }
6837 verbose "is-effective-target: $arg $selected" 2
6841 # Return 1 if the argument is an effective-target keyword, 0 otherwise.
6843 proc is-effective-target-keyword { arg } {
6844 if { [info procs check_effective_target_${arg}] != [list] } {
6847 # These have different names for their check_* procs.
6849 "vmx_hw" { return 1 }
6850 "vsx_hw" { return 1 }
6851 "p8vector_hw" { return 1 }
6852 "p9vector_hw" { return 1 }
6853 "p9modulo_hw" { return 1 }
6854 "ppc_float128_sw" { return 1 }
6855 "ppc_float128_hw" { return 1 }
6856 "ppc_recip_hw" { return 1 }
6857 "dfp_hw" { return 1 }
6858 "htm_hw" { return 1 }
6859 "named_sections" { return 1 }
6860 "gc_sections" { return 1 }
6861 "cxa_atexit" { return 1 }
6862 default { return 0 }
6867 # Execute tests for all targets in EFFECTIVE_TARGETS list. Set et_index to
6868 # indicate what target is currently being processed. This is for
6869 # the vectorizer tests, e.g. vect_int, to keep track what target supports
6872 proc et-dg-runtest { runtest testcases flags default-extra-flags } {
6873 global dg-do-what-default
6874 global EFFECTIVE_TARGETS
6877 if { [llength $EFFECTIVE_TARGETS] > 0 } {
6878 foreach target $EFFECTIVE_TARGETS {
6879 set target_flags $flags
6880 set dg-do-what-default compile
6881 set et_index [lsearch -exact $EFFECTIVE_TARGETS $target]
6882 if { [info procs add_options_for_${target}] != [list] } {
6883 set target_flags [add_options_for_${target} "$flags"]
6885 if { [info procs check_effective_target_${target}_runtime]
6886 != [list] && [check_effective_target_${target}_runtime] } {
6887 set dg-do-what-default run
6889 $runtest $testcases $target_flags ${default-extra-flags}
6893 $runtest $testcases $flags ${default-extra-flags}
6897 # Return 1 if a target matches the target in EFFECTIVE_TARGETS at index
6898 # et_index, 0 otherwise.
6900 proc et-is-effective-target { target } {
6901 global EFFECTIVE_TARGETS
6904 if { [llength $EFFECTIVE_TARGETS] > $et_index
6905 && [lindex $EFFECTIVE_TARGETS $et_index] == $target } {
6911 # Return 1 if target default to short enums
6913 proc check_effective_target_short_enums { } {
6914 return [check_no_compiler_messages short_enums assembly {
6916 int s[sizeof (enum foo) == 1 ? 1 : -1];
6920 # Return 1 if target supports merging string constants at link time.
6922 proc check_effective_target_string_merging { } {
6923 return [check_no_messages_and_pattern string_merging \
6924 "rodata\\.str" assembly {
6925 const char *var = "String";
6929 # Return 1 if target has the basic signed and unsigned types in
6930 # <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
6931 # working <stdint.h> for all targets.
6933 proc check_effective_target_stdint_types { } {
6934 return [check_no_compiler_messages stdint_types assembly {
6936 int8_t a; int16_t b; int32_t c; int64_t d;
6937 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
6941 # Return 1 if target has the basic signed and unsigned types in
6942 # <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
6943 # these types agree with those in the header, as some systems have
6944 # only <inttypes.h>.
6946 proc check_effective_target_inttypes_types { } {
6947 return [check_no_compiler_messages inttypes_types assembly {
6948 #include <inttypes.h>
6949 int8_t a; int16_t b; int32_t c; int64_t d;
6950 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
6954 # Return 1 if programs are intended to be run on a simulator
6955 # (i.e. slowly) rather than hardware (i.e. fast).
6957 proc check_effective_target_simulator { } {
6959 # All "src/sim" simulators set this one.
6960 if [board_info target exists is_simulator] {
6961 return [board_info target is_simulator]
6964 # The "sid" simulators don't set that one, but at least they set
6966 if [board_info target exists slow_simulator] {
6967 return [board_info target slow_simulator]
6973 # Return 1 if programs are intended to be run on hardware rather than
6976 proc check_effective_target_hw { } {
6978 # All "src/sim" simulators set this one.
6979 if [board_info target exists is_simulator] {
6980 if [board_info target is_simulator] {
6987 # The "sid" simulators don't set that one, but at least they set
6989 if [board_info target exists slow_simulator] {
6990 if [board_info target slow_simulator] {
7000 # Return 1 if the target is a VxWorks kernel.
7002 proc check_effective_target_vxworks_kernel { } {
7003 return [check_no_compiler_messages vxworks_kernel assembly {
7004 #if !defined __vxworks || defined __RTP__
7010 # Return 1 if the target is a VxWorks RTP.
7012 proc check_effective_target_vxworks_rtp { } {
7013 return [check_no_compiler_messages vxworks_rtp assembly {
7014 #if !defined __vxworks || !defined __RTP__
7020 # Return 1 if the target is expected to provide wide character support.
7022 proc check_effective_target_wchar { } {
7023 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
7026 return [check_no_compiler_messages wchar assembly {
7031 # Return 1 if the target has <pthread.h>.
7033 proc check_effective_target_pthread_h { } {
7034 return [check_no_compiler_messages pthread_h assembly {
7035 #include <pthread.h>
7039 # Return 1 if the target can truncate a file from a file-descriptor,
7040 # as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
7041 # chsize. We test for a trivially functional truncation; no stubs.
7042 # As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
7043 # different function to be used.
7045 proc check_effective_target_fd_truncate { } {
7047 #define _FILE_OFFSET_BITS 64
7054 FILE *f = fopen ("tst.tmp", "wb");
7056 const char t[] = "test writing more than ten characters";
7060 write (fd, t, sizeof (t) - 1);
7062 if (ftruncate (fd, 10) != 0)
7071 f = fopen ("tst.tmp", "rb");
7072 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
7080 if { [check_runtime ftruncate $prog] } {
7084 regsub "ftruncate" $prog "chsize" prog
7085 return [check_runtime chsize $prog]
7088 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
7090 proc add_options_for_c99_runtime { flags } {
7091 if { [istarget *-*-solaris2*] } {
7092 return "$flags -std=c99"
7094 if { [istarget powerpc-*-darwin*] } {
7095 return "$flags -mmacosx-version-min=10.3"
7100 # Add to FLAGS all the target-specific flags needed to enable
7101 # full IEEE compliance mode.
7103 proc add_options_for_ieee { flags } {
7104 if { [istarget alpha*-*-*]
7105 || [istarget sh*-*-*] } {
7106 return "$flags -mieee"
7108 if { [istarget rx-*-*] } {
7109 return "$flags -mnofpu"
7114 if {![info exists flags_to_postpone]} {
7115 set flags_to_postpone ""
7118 # Add to FLAGS the flags needed to enable functions to bind locally
7119 # when using pic/PIC passes in the testsuite.
7120 proc add_options_for_bind_pic_locally { flags } {
7121 global flags_to_postpone
7123 # Instead of returning 'flags' with the -fPIE or -fpie appended, we save it
7124 # in 'flags_to_postpone' and append it later in gcc_target_compile procedure in
7125 # order to make sure that the multilib_flags doesn't override this.
7127 if {[check_no_compiler_messages using_pic2 assembly {
7132 set flags_to_postpone "-fPIE"
7135 if {[check_no_compiler_messages using_pic1 assembly {
7140 set flags_to_postpone "-fpie"
7146 # Add to FLAGS the flags needed to enable 64-bit vectors.
7148 proc add_options_for_double_vectors { flags } {
7149 if [is-effective-target arm_neon_ok] {
7150 return "$flags -mvectorize-with-neon-double"
7156 # Return 1 if the target provides a full C99 runtime.
7158 proc check_effective_target_c99_runtime { } {
7159 return [check_cached_effective_target c99_runtime {
7162 set file [open "$srcdir/gcc.dg/builtins-config.h"]
7163 set contents [read $file]
7166 #ifndef HAVE_C99_RUNTIME
7167 #error !HAVE_C99_RUNTIME
7170 check_no_compiler_messages_nocache c99_runtime assembly \
7171 $contents [add_options_for_c99_runtime ""]
7175 # Return 1 if target wchar_t is at least 4 bytes.
7177 proc check_effective_target_4byte_wchar_t { } {
7178 return [check_no_compiler_messages 4byte_wchar_t object {
7179 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
7183 # Return 1 if the target supports automatic stack alignment.
7185 proc check_effective_target_automatic_stack_alignment { } {
7186 # Ordinarily x86 supports automatic stack alignment ...
7187 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
7188 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
7189 # ... except Win64 SEH doesn't. Succeed for Win32 though.
7190 return [check_effective_target_ilp32];
7197 # Return true if we are compiling for AVX target.
7199 proc check_avx_available { } {
7200 if { [check_no_compiler_messages avx_available assembly {
7210 # Return true if 32- and 16-bytes vectors are available.
7212 proc check_effective_target_vect_sizes_32B_16B { } {
7213 if { [check_avx_available] && ![check_prefer_avx128] } {
7220 # Return true if 128-bits vectors are preferred even if 256-bits vectors
7223 proc check_prefer_avx128 { } {
7224 if ![check_avx_available] {
7227 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
7228 float a[1024],b[1024],c[1024];
7229 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
7230 } "-O2 -ftree-vectorize"]
7234 # Return 1 if avx512f instructions can be compiled.
7236 proc check_effective_target_avx512f { } {
7237 return [check_no_compiler_messages avx512f object {
7238 typedef double __m512d __attribute__ ((__vector_size__ (64)));
7240 __m512d _mm512_add (__m512d a)
7242 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
7247 # Return 1 if avx instructions can be compiled.
7249 proc check_effective_target_avx { } {
7250 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
7253 return [check_no_compiler_messages avx object {
7254 void _mm256_zeroall (void)
7256 __builtin_ia32_vzeroall ();
7261 # Return 1 if avx2 instructions can be compiled.
7262 proc check_effective_target_avx2 { } {
7263 return [check_no_compiler_messages avx2 object {
7264 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
7266 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
7268 return __builtin_ia32_andnotsi256 (__X, __Y);
7273 # Return 1 if sse instructions can be compiled.
7274 proc check_effective_target_sse { } {
7275 return [check_no_compiler_messages sse object {
7278 __builtin_ia32_stmxcsr ();
7284 # Return 1 if sse2 instructions can be compiled.
7285 proc check_effective_target_sse2 { } {
7286 return [check_no_compiler_messages sse2 object {
7287 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7289 __m128i _mm_srli_si128 (__m128i __A, int __N)
7291 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
7296 # Return 1 if sse4.1 instructions can be compiled.
7297 proc check_effective_target_sse4 { } {
7298 return [check_no_compiler_messages sse4.1 object {
7299 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7300 typedef int __v4si __attribute__ ((__vector_size__ (16)));
7302 __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
7304 return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
7310 # Return 1 if F16C instructions can be compiled.
7312 proc check_effective_target_f16c { } {
7313 return [check_no_compiler_messages f16c object {
7314 #include "immintrin.h"
7316 foo (unsigned short val)
7318 return _cvtsh_ss (val);
7323 # Return 1 if C wchar_t type is compatible with char16_t.
7325 proc check_effective_target_wchar_t_char16_t_compatible { } {
7326 return [check_no_compiler_messages wchar_t_char16_t object {
7328 __CHAR16_TYPE__ *p16 = &wc;
7329 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
7333 # Return 1 if C wchar_t type is compatible with char32_t.
7335 proc check_effective_target_wchar_t_char32_t_compatible { } {
7336 return [check_no_compiler_messages wchar_t_char32_t object {
7338 __CHAR32_TYPE__ *p32 = &wc;
7339 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
7343 # Return 1 if pow10 function exists.
7345 proc check_effective_target_pow10 { } {
7346 return [check_runtime pow10 {
7356 # Return 1 if issignaling function exists.
7357 proc check_effective_target_issignaling {} {
7358 return [check_runtime issignaling {
7363 return issignaling (0.0);
7368 # Return 1 if current options generate DFP instructions, 0 otherwise.
7369 proc check_effective_target_hard_dfp {} {
7370 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
7371 typedef float d64 __attribute__((mode(DD)));
7373 void foo (void) { z = x + y; }
7377 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
7378 # for strchr etc. functions.
7380 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
7381 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
7384 #if !defined(__cplusplus) \
7385 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
7386 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
7387 ISO C++ correct string.h and wchar.h protos not supported.
7394 # Return 1 if GNU as is used.
7396 proc check_effective_target_gas { } {
7397 global use_gas_saved
7400 if {![info exists use_gas_saved]} {
7401 # Check if the as used by gcc is GNU as.
7402 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
7403 # Provide /dev/null as input, otherwise gas times out reading from
7405 set status [remote_exec host "$gcc_as" "-v /dev/null"]
7406 set as_output [lindex $status 1]
7407 if { [ string first "GNU" $as_output ] >= 0 } {
7413 return $use_gas_saved
7416 # Return 1 if GNU ld is used.
7418 proc check_effective_target_gld { } {
7419 global use_gld_saved
7422 if {![info exists use_gld_saved]} {
7423 # Check if the ld used by gcc is GNU ld.
7424 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
7425 set status [remote_exec host "$gcc_ld" "--version"]
7426 set ld_output [lindex $status 1]
7427 if { [ string first "GNU" $ld_output ] >= 0 } {
7433 return $use_gld_saved
7436 # Return 1 if the compiler has been configure with link-time optimization
7439 proc check_effective_target_lto { } {
7440 if { [istarget nvptx-*-*] } {
7443 return [check_no_compiler_messages lto object {
7448 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
7450 proc check_effective_target_maybe_x32 { } {
7451 return [check_no_compiler_messages maybe_x32 object {
7453 } "-mx32 -maddress-mode=short"]
7456 # Return 1 if this target supports the -fsplit-stack option, 0
7459 proc check_effective_target_split_stack {} {
7460 return [check_no_compiler_messages split_stack object {
7465 # Return 1 if this target supports the -masm=intel option, 0
7468 proc check_effective_target_masm_intel {} {
7469 return [check_no_compiler_messages masm_intel object {
7470 extern void abort (void);
7474 # Return 1 if the language for the compiler under test is C.
7476 proc check_effective_target_c { } {
7478 if [string match $tool "gcc"] {
7484 # Return 1 if the language for the compiler under test is C++.
7486 proc check_effective_target_c++ { } {
7488 if { [string match $tool "g++"] || [string match $tool "libstdc++"] } {
7494 set cxx_default "c++14"
7495 # Check whether the current active language standard supports the features
7496 # of C++11/C++14 by checking for the presence of one of the -std flags.
7497 # This assumes that the default for the compiler is $cxx_default, and that
7498 # there will never be multiple -std= arguments on the command line.
7499 proc check_effective_target_c++11_only { } {
7501 if ![check_effective_target_c++] {
7504 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
7507 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
7512 proc check_effective_target_c++11 { } {
7513 if [check_effective_target_c++11_only] {
7516 return [check_effective_target_c++14]
7518 proc check_effective_target_c++11_down { } {
7519 if ![check_effective_target_c++] {
7522 return [expr ![check_effective_target_c++14] ]
7525 proc check_effective_target_c++14_only { } {
7527 if ![check_effective_target_c++] {
7530 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
7533 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
7539 proc check_effective_target_c++14 { } {
7540 if [check_effective_target_c++14_only] {
7543 return [check_effective_target_c++1z]
7545 proc check_effective_target_c++14_down { } {
7546 if ![check_effective_target_c++] {
7549 return [expr ![check_effective_target_c++1z] ]
7552 proc check_effective_target_c++98_only { } {
7554 if ![check_effective_target_c++] {
7557 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
7560 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
7566 proc check_effective_target_c++1z_only { } {
7568 if ![check_effective_target_c++] {
7571 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
7574 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
7579 proc check_effective_target_c++1z { } {
7580 return [check_effective_target_c++1z_only]
7583 # Check for C++ Concepts TS support, i.e. -fconcepts flag.
7584 proc check_effective_target_concepts { } {
7585 return [check-flags { "" { } { -fconcepts } }]
7588 # Return 1 if expensive testcases should be run.
7590 proc check_effective_target_run_expensive_tests { } {
7591 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
7597 # Returns 1 if "mempcpy" is available on the target system.
7599 proc check_effective_target_mempcpy {} {
7600 return [check_function_available "mempcpy"]
7603 # Returns 1 if "stpcpy" is available on the target system.
7605 proc check_effective_target_stpcpy {} {
7606 return [check_function_available "stpcpy"]
7609 # Check whether the vectorizer tests are supported by the target and
7610 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
7611 # If a port wants to execute the tests more than once it should append
7612 # the supported target to EFFECTIVE_TARGETS instead, and the compile flags
7613 # will be added by a call to add_options_for_<target>.
7614 # Set dg-do-what-default to either compile or run, depending on target
7615 # capabilities. Do not set this if the supported target is appended to
7616 # EFFECTIVE_TARGETS. Flags and this variable will be set by et-dg-runtest
7617 # automatically. Return the number of effective targets if vectorizer tests
7618 # are supported, 0 otherwise.
7620 proc check_vect_support_and_set_flags { } {
7621 global DEFAULT_VECTCFLAGS
7622 global dg-do-what-default
7623 global EFFECTIVE_TARGETS
7625 if [istarget powerpc-*paired*] {
7626 lappend DEFAULT_VECTCFLAGS "-mpaired"
7627 if [check_750cl_hw_available] {
7628 set dg-do-what-default run
7630 set dg-do-what-default compile
7632 } elseif [istarget powerpc*-*-*] {
7633 # Skip targets not supporting -maltivec.
7634 if ![is-effective-target powerpc_altivec_ok] {
7638 lappend DEFAULT_VECTCFLAGS "-maltivec"
7639 if [check_p9vector_hw_available] {
7640 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
7641 } elseif [check_p8vector_hw_available] {
7642 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
7643 } elseif [check_vsx_hw_available] {
7644 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
7647 if [check_vmx_hw_available] {
7648 set dg-do-what-default run
7650 if [is-effective-target ilp32] {
7651 # Specify a cpu that supports VMX for compile-only tests.
7652 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
7654 set dg-do-what-default compile
7656 } elseif { [istarget spu-*-*] } {
7657 set dg-do-what-default run
7658 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
7659 lappend DEFAULT_VECTCFLAGS "-msse2"
7660 if { [check_effective_target_sse2_runtime] } {
7661 set dg-do-what-default run
7663 set dg-do-what-default compile
7665 } elseif { [istarget mips*-*-*]
7666 && [check_effective_target_nomips16] } {
7667 if { [check_effective_target_mpaired_single] } {
7668 lappend EFFECTIVE_TARGETS mpaired_single
7670 if { [check_effective_target_mips_loongson] } {
7671 lappend EFFECTIVE_TARGETS mips_loongson
7673 if { [check_effective_target_mips_msa] } {
7674 lappend EFFECTIVE_TARGETS mips_msa
7676 return [llength $EFFECTIVE_TARGETS]
7677 } elseif [istarget sparc*-*-*] {
7678 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
7679 if [check_effective_target_ultrasparc_hw] {
7680 set dg-do-what-default run
7682 set dg-do-what-default compile
7684 } elseif [istarget alpha*-*-*] {
7685 # Alpha's vectorization capabilities are extremely limited.
7686 # It's more effort than its worth disabling all of the tests
7687 # that it cannot pass. But if you actually want to see what
7688 # does work, command out the return.
7691 lappend DEFAULT_VECTCFLAGS "-mmax"
7692 if [check_alpha_max_hw_available] {
7693 set dg-do-what-default run
7695 set dg-do-what-default compile
7697 } elseif [istarget ia64-*-*] {
7698 set dg-do-what-default run
7699 } elseif [is-effective-target arm_neon_ok] {
7700 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
7701 # NEON does not support denormals, so is not used for vectorization by
7702 # default to avoid loss of precision. We must pass -ffast-math to test
7703 # vectorization of float operations.
7704 lappend DEFAULT_VECTCFLAGS "-ffast-math"
7705 if [is-effective-target arm_neon_hw] {
7706 set dg-do-what-default run
7708 set dg-do-what-default compile
7710 } elseif [istarget "aarch64*-*-*"] {
7711 set dg-do-what-default run
7719 # Return 1 if the target does *not* require strict alignment.
7721 proc check_effective_target_non_strict_align {} {
7723 # On ARM, the default is to use STRICT_ALIGNMENT, but there
7724 # are interfaces defined for misaligned access and thus
7725 # depending on the architecture levels unaligned access is
7727 if [istarget "arm*-*-*"] {
7728 return [check_effective_target_arm_unaligned]
7731 return [check_no_compiler_messages non_strict_align assembly {
7733 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
7735 void foo(void) { z = (c *) y; }
7739 # Return 1 if the target has <ucontext.h>.
7741 proc check_effective_target_ucontext_h { } {
7742 return [check_no_compiler_messages ucontext_h assembly {
7743 #include <ucontext.h>
7747 proc check_effective_target_aarch64_tiny { } {
7748 if { [istarget aarch64*-*-*] } {
7749 return [check_no_compiler_messages aarch64_tiny object {
7750 #ifdef __AARCH64_CMODEL_TINY__
7753 #error target not AArch64 tiny code model
7761 # Create functions to check that the AArch64 assembler supports the
7762 # various architecture extensions via the .arch_extension pseudo-op.
7764 foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse"} {
7765 eval [string map [list FUNC $aarch64_ext] {
7766 proc check_effective_target_aarch64_asm_FUNC_ok { } {
7767 if { [istarget aarch64*-*-*] } {
7768 return [check_no_compiler_messages aarch64_FUNC_assembler object {
7769 __asm__ (".arch_extension FUNC");
7770 } "-march=armv8-a+FUNC"]
7778 proc check_effective_target_aarch64_small { } {
7779 if { [istarget aarch64*-*-*] } {
7780 return [check_no_compiler_messages aarch64_small object {
7781 #ifdef __AARCH64_CMODEL_SMALL__
7784 #error target not AArch64 small code model
7792 proc check_effective_target_aarch64_large { } {
7793 if { [istarget aarch64*-*-*] } {
7794 return [check_no_compiler_messages aarch64_large object {
7795 #ifdef __AARCH64_CMODEL_LARGE__
7798 #error target not AArch64 large code model
7807 # Return 1 if this is a reduced AVR Tiny core. Such cores have different
7808 # register set, instruction set, addressing capabilities and ABI.
7810 proc check_effective_target_avr_tiny { } {
7811 if { [istarget avr*-*-*] } {
7812 return [check_no_compiler_messages avr_tiny object {
7816 #error target not a reduced AVR Tiny core
7824 # Return 1 if <fenv.h> is available with all the standard IEEE
7825 # exceptions and floating-point exceptions are raised by arithmetic
7826 # operations. (If the target requires special options for "inexact"
7827 # exceptions, those need to be specified in the testcases.)
7829 proc check_effective_target_fenv_exceptions {} {
7830 return [check_runtime fenv_exceptions {
7833 #ifndef FE_DIVBYZERO
7834 # error Missing FE_DIVBYZERO
7837 # error Missing FE_INEXACT
7840 # error Missing FE_INVALID
7843 # error Missing FE_OVERFLOW
7845 #ifndef FE_UNDERFLOW
7846 # error Missing FE_UNDERFLOW
7848 volatile float a = 0.0f, r;
7853 if (fetestexcept (FE_INVALID))
7858 } [add_options_for_ieee "-std=gnu99"]]
7861 proc check_effective_target_tiny {} {
7862 global et_target_tiny_saved
7864 if [info exists et_target_tine_saved] {
7865 verbose "check_effective_target_tiny: using cached result" 2
7867 set et_target_tiny_saved 0
7868 if { [istarget aarch64*-*-*]
7869 && [check_effective_target_aarch64_tiny] } {
7870 set et_target_tiny_saved 1
7874 return $et_target_tiny_saved
7877 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
7879 proc check_effective_target_logical_op_short_circuit {} {
7880 if { [istarget mips*-*-*]
7881 || [istarget arc*-*-*]
7882 || [istarget avr*-*-*]
7883 || [istarget crisv32-*-*] || [istarget cris-*-*]
7884 || [istarget mmix-*-*]
7885 || [istarget s390*-*-*]
7886 || [istarget powerpc*-*-*]
7887 || [istarget nios2*-*-*]
7888 || [istarget visium-*-*]
7889 || [check_effective_target_arm_cortex_m] } {
7895 # Record that dg-final test TEST requires convential compilation.
7897 proc force_conventional_output_for { test } {
7898 if { [info proc $test] == "" } {
7899 perror "$test does not exist"
7902 proc ${test}_required_options {} {
7903 global gcc_force_conventional_output
7904 return $gcc_force_conventional_output
7908 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
7909 # otherwise. Cache the result.
7911 proc check_effective_target_pie_copyreloc { } {
7912 global pie_copyreloc_available_saved
7914 global GCC_UNDER_TEST
7916 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
7920 # Need auto-host.h to check linker support.
7921 if { ![file exists ../../auto-host.h ] } {
7925 if [info exists pie_copyreloc_available_saved] {
7926 verbose "check_effective_target_pie_copyreloc returning saved $pie_copyreloc_available_saved" 2
7928 # Set up and compile to see if linker supports PIE with copy
7929 # reloc. Include the current process ID in the file names to
7930 # prevent conflicts with invocations for multiple testsuites.
7935 set f [open $src "w"]
7936 puts $f "#include \"../../auto-host.h\""
7937 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
7938 puts $f "# error Linker does not support PIE with copy reloc."
7942 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
7943 set lines [${tool}_target_compile $src $obj object ""]
7948 if [string match "" $lines] then {
7949 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
7950 set pie_copyreloc_available_saved 1
7952 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
7953 set pie_copyreloc_available_saved 0
7957 return $pie_copyreloc_available_saved
7960 # Return 1 if the x86 target supports R_386_GOT32X relocation, 0
7961 # otherwise. Cache the result.
7963 proc check_effective_target_got32x_reloc { } {
7964 global got32x_reloc_available_saved
7966 global GCC_UNDER_TEST
7968 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
7972 # Need auto-host.h to check linker support.
7973 if { ![file exists ../../auto-host.h ] } {
7977 if [info exists got32x_reloc_available_saved] {
7978 verbose "check_effective_target_got32x_reloc returning saved $got32x_reloc_available_saved" 2
7980 # Include the current process ID in the file names to prevent
7981 # conflicts with invocations for multiple testsuites.
7983 set src got32x[pid].c
7984 set obj got32x[pid].o
7986 set f [open $src "w"]
7987 puts $f "#include \"../../auto-host.h\""
7988 puts $f "#if HAVE_AS_IX86_GOT32X == 0"
7989 puts $f "# error Assembler does not support R_386_GOT32X."
7993 verbose "check_effective_target_got32x_reloc compiling testfile $src" 2
7994 set lines [${tool}_target_compile $src $obj object ""]
7999 if [string match "" $lines] then {
8000 verbose "check_effective_target_got32x_reloc testfile compilation passed" 2
8001 set got32x_reloc_available_saved 1
8003 verbose "check_effective_target_got32x_reloc testfile compilation failed" 2
8004 set got32x_reloc_available_saved 0
8008 return $got32x_reloc_available_saved
8011 # Return 1 if the x86 target supports calling ___tls_get_addr via GOT,
8012 # 0 otherwise. Cache the result.
8014 proc check_effective_target_tls_get_addr_via_got { } {
8015 global tls_get_addr_via_got_available_saved
8017 global GCC_UNDER_TEST
8019 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8023 # Need auto-host.h to check linker support.
8024 if { ![file exists ../../auto-host.h ] } {
8028 if [info exists tls_get_addr_via_got_available_saved] {
8029 verbose "check_effective_target_tls_get_addr_via_got returning saved $tls_get_addr_via_got_available_saved" 2
8031 # Include the current process ID in the file names to prevent
8032 # conflicts with invocations for multiple testsuites.
8034 set src tls_get_addr_via_got[pid].c
8035 set obj tls_get_addr_via_got[pid].o
8037 set f [open $src "w"]
8038 puts $f "#include \"../../auto-host.h\""
8039 puts $f "#if HAVE_AS_IX86_TLS_GET_ADDR_GOT == 0"
8040 puts $f "# error Assembler/linker do not support calling ___tls_get_addr via GOT."
8044 verbose "check_effective_target_tls_get_addr_via_got compiling testfile $src" 2
8045 set lines [${tool}_target_compile $src $obj object ""]
8050 if [string match "" $lines] then {
8051 verbose "check_effective_target_tls_get_addr_via_got testfile compilation passed" 2
8052 set tls_get_addr_via_got_available_saved 1
8054 verbose "check_effective_target_tls_get_addr_via_got testfile compilation failed" 2
8055 set tls_get_addr_via_got_available_saved 0
8059 return $tls_get_addr_via_got_available_saved
8062 # Return 1 if the target uses comdat groups.
8064 proc check_effective_target_comdat_group {} {
8065 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat" assembly {
8067 inline int foo () { return 1; }
8072 # Return 1 if target supports __builtin_eh_return
8073 proc check_effective_target_builtin_eh_return { } {
8074 return [check_no_compiler_messages builtin_eh_return object {
8075 void test (long l, void *p)
8077 __builtin_eh_return (l, p);
8082 # Return 1 if the target supports max reduction for vectors.
8084 proc check_effective_target_vect_max_reduc { } {
8085 if { [istarget aarch64*-*-*] || [istarget arm*-*-*] } {
8091 # Return 1 if there is an nvptx offload compiler.
8093 proc check_effective_target_offload_nvptx { } {
8094 return [check_no_compiler_messages offload_nvptx object {
8095 int main () {return 0;}
8096 } "-foffload=nvptx-none" ]
8099 # Return 1 if the compiler has been configured with hsa offloading.
8101 proc check_effective_target_offload_hsa { } {
8102 return [check_no_compiler_messages offload_hsa assembly {
8103 int main () {return 0;}
8107 # Return 1 if the target support -fprofile-update=atomic
8108 proc check_effective_target_profile_update_atomic {} {
8109 return [check_no_compiler_messages profile_update_atomic assembly {
8110 int main (void) { return 0; }
8111 } "-fprofile-update=atomic -fprofile-generate"]
8114 #For versions of ARM architectures that have hardware div insn,
8115 #disable the divmod transform
8117 proc check_effective_target_arm_divmod_simode { } {
8118 return [check_no_compiler_messages arm_divmod assembly {
8119 #ifdef __ARM_ARCH_EXT_IDIV__
8126 # Return 1 if target supports divmod hardware insn or divmod libcall.
8128 proc check_effective_target_divmod { } {
8129 #TODO: Add checks for all targets that have either hardware divmod insn
8130 # or define libfunc for divmod.
8131 if { [istarget arm*-*-*]
8132 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
8138 # Return 1 if target supports divmod for SImode. The reason for
8139 # separating this from check_effective_target_divmod is that
8140 # some versions of ARM architecture define div instruction
8141 # only for simode, and for these archs, we do not want to enable
8142 # divmod transform for simode.
8144 proc check_effective_target_divmod_simode { } {
8145 if { [istarget arm*-*-*] } {
8146 return [check_effective_target_arm_divmod_simode]
8149 return [check_effective_target_divmod]
8152 # Return 1 if store merging optimization is applicable for target.
8153 # Store merging is not profitable for targets like the avr which
8154 # can load/store only one byte at a time. Use int size as a proxy
8155 # for the number of bytes the target can write, and skip for targets
8156 # with a smallish (< 32) size.
8158 proc check_effective_target_store_merge { } {
8159 if { [is-effective-target non_strict_align ] && [is-effective-target int32plus] } {