1 # Copyright (C) 1999-2016 Free Software Foundation, Inc.
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC; see the file COPYING3. If not see
15 # <http://www.gnu.org/licenses/>.
17 # Please email any bugs, comments, and/or additions to this file to:
18 # gcc-patches@gcc.gnu.org
20 # This file defines procs for determining features supported by the target.
22 # Try to compile the code given by CONTENTS into an output file of
23 # type TYPE, where TYPE is as for target_compile. Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the name of the output file.
27 # BASENAME is a prefix to use for source and output files.
28 # If ARGS is not empty, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise, code should contain:
34 # "! Fortran" for Fortran code,
36 # "// ObjC++" for ObjC++
38 # If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
39 # allow for ObjC/ObjC++ specific flags.
40 proc check_compile {basename type contents args} {
42 verbose "check_compile tool: $tool for $basename"
44 # Save additional_sources to avoid compiling testsuite's sources
45 # against check_compile's source.
46 global additional_sources
47 if [info exists additional_sources] {
48 set tmp_additional_sources "$additional_sources"
49 set additional_sources ""
52 if { [llength $args] > 0 } {
53 set options [list "additional_flags=[lindex $args 0]"]
57 switch -glob -- $contents {
58 "*! Fortran*" { set src ${basename}[pid].f90 }
59 "*// C++*" { set src ${basename}[pid].cc }
60 "*// ObjC++*" { set src ${basename}[pid].mm }
61 "*/* ObjC*" { set src ${basename}[pid].m }
62 "*// Go*" { set src ${basename}[pid].go }
65 "objc" { set src ${basename}[pid].m }
66 "obj-c++" { set src ${basename}[pid].mm }
67 default { set src ${basename}[pid].c }
72 set compile_type $type
74 assembly { set output ${basename}[pid].s }
75 object { set output ${basename}[pid].o }
76 executable { set output ${basename}[pid].exe }
78 set output ${basename}[pid].s
79 lappend options "additional_flags=-fdump-$type"
80 set compile_type assembly
86 set lines [${tool}_target_compile $src $output $compile_type "$options"]
89 set scan_output $output
90 # Don't try folding this into the switch above; calling "glob" before the
91 # file is created won't work.
92 if [regexp "rtl-(.*)" $type dummy rtl_type] {
93 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
97 # Restore additional_sources.
98 if [info exists additional_sources] {
99 set additional_sources "$tmp_additional_sources"
102 return [list $lines $scan_output]
105 proc current_target_name { } {
107 if [info exists target_info(target,name)] {
108 set answer $target_info(target,name)
115 # Implement an effective-target check for property PROP by invoking
116 # the Tcl command ARGS and seeing if it returns true.
118 proc check_cached_effective_target { prop args } {
122 set target [current_target_name]
123 if {![info exists et_cache($prop,target)]
124 || $et_cache($prop,target) != $target} {
125 verbose "check_cached_effective_target $prop: checking $target" 2
126 set et_cache($prop,target) $target
127 set et_cache($prop,value) [uplevel eval $args]
128 if {![info exists et_prop_list]
129 || [lsearch $et_prop_list $prop] < 0} {
130 lappend et_prop_list $prop
132 verbose "check_cached_effective_target cached list is now: $et_prop_list" 2
134 set value $et_cache($prop,value)
135 verbose "check_cached_effective_target $prop: returning $value for $target" 2
139 # Clear effective-target cache. This is useful after testing
140 # effective-target features and overriding TEST_ALWAYS_FLAGS and/or
142 # If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS then they should
143 # do a clear_effective_target_cache at the end as the target cache can
144 # make decisions based upon the flags, and those decisions need to be
145 # redone when the flags change. An example of this is the
146 # asan_init/asan_finish pair.
148 proc clear_effective_target_cache { } {
152 if {[info exists et_prop_list]} {
153 verbose "clear_effective_target_cache: $et_prop_list" 2
154 foreach prop $et_prop_list {
155 unset et_cache($prop,value)
156 unset et_cache($prop,target)
162 # Like check_compile, but delete the output file and return true if the
163 # compiler printed no messages.
164 proc check_no_compiler_messages_nocache {args} {
165 set result [eval check_compile $args]
166 set lines [lindex $result 0]
167 set output [lindex $result 1]
168 remote_file build delete $output
169 return [string match "" $lines]
172 # Like check_no_compiler_messages_nocache, but cache the result.
173 # PROP is the property we're checking, and doubles as a prefix for
174 # temporary filenames.
175 proc check_no_compiler_messages {prop args} {
176 return [check_cached_effective_target $prop {
177 eval [list check_no_compiler_messages_nocache $prop] $args
181 # Like check_compile, but return true if the compiler printed no
182 # messages and if the contents of the output file satisfy PATTERN.
183 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
184 # don't match regular expression REGEXP, otherwise they satisfy it
185 # if they do match regular expression PATTERN. (PATTERN can start
186 # with something like "[!]" if the regular expression needs to match
187 # "!" as the first character.)
189 # Delete the output file before returning. The other arguments are
190 # as for check_compile.
191 proc check_no_messages_and_pattern_nocache {basename pattern args} {
194 set result [eval [list check_compile $basename] $args]
195 set lines [lindex $result 0]
196 set output [lindex $result 1]
199 if { [string match "" $lines] } {
200 set chan [open "$output"]
201 set invert [regexp {^!(.*)} $pattern dummy pattern]
202 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
206 remote_file build delete $output
210 # Like check_no_messages_and_pattern_nocache, but cache the result.
211 # PROP is the property we're checking, and doubles as a prefix for
212 # temporary filenames.
213 proc check_no_messages_and_pattern {prop pattern args} {
214 return [check_cached_effective_target $prop {
215 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
219 # Try to compile and run an executable from code CONTENTS. Return true
220 # if the compiler reports no messages and if execution "passes" in the
221 # usual DejaGNU sense. The arguments are as for check_compile, with
222 # TYPE implicitly being "executable".
223 proc check_runtime_nocache {basename contents args} {
226 set result [eval [list check_compile $basename executable $contents] $args]
227 set lines [lindex $result 0]
228 set output [lindex $result 1]
231 if { [string match "" $lines] } {
232 # No error messages, everything is OK.
233 set result [remote_load target "./$output" "" ""]
234 set status [lindex $result 0]
235 verbose "check_runtime_nocache $basename: status is <$status>" 2
236 if { $status == "pass" } {
240 remote_file build delete $output
244 # Like check_runtime_nocache, but cache the result. PROP is the
245 # property we're checking, and doubles as a prefix for temporary
247 proc check_runtime {prop args} {
250 return [check_cached_effective_target $prop {
251 eval [list check_runtime_nocache $prop] $args
255 ###############################
256 # proc check_weak_available { }
257 ###############################
259 # weak symbols are only supported in some configs/object formats
260 # this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
262 proc check_weak_available { } {
265 # All mips targets should support it
267 if { [ string first "mips" $target_cpu ] >= 0 } {
271 # All AIX targets should support it
273 if { [istarget *-*-aix*] } {
277 # All solaris2 targets should support it
279 if { [istarget *-*-solaris2*] } {
283 # Windows targets Cygwin and MingW32 support it
285 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
289 # HP-UX 10.X doesn't support it
291 if { [istarget hppa*-*-hpux10*] } {
295 # nvptx (nearly) supports it
297 if { [istarget nvptx-*-*] } {
301 # ELF and ECOFF support it. a.out does with gas/gld but may also with
302 # other linkers, so we should try it
304 set objformat [gcc_target_object_format]
312 unknown { return -1 }
317 ###############################
318 # proc check_weak_override_available { }
319 ###############################
321 # Like check_weak_available, but return 0 if weak symbol definitions
322 # cannot be overridden.
324 proc check_weak_override_available { } {
325 if { [istarget *-*-mingw*] } {
328 return [check_weak_available]
331 ###############################
332 # proc check_visibility_available { what_kind }
333 ###############################
335 # The visibility attribute is only support in some object formats
336 # This proc returns 1 if it is supported, 0 if not.
337 # The argument is the kind of visibility, default/protected/hidden/internal.
339 proc check_visibility_available { what_kind } {
340 if [string match "" $what_kind] { set what_kind "hidden" }
342 return [check_no_compiler_messages visibility_available_$what_kind object "
343 void f() __attribute__((visibility(\"$what_kind\")));
348 ###############################
349 # proc check_alias_available { }
350 ###############################
352 # Determine if the target toolchain supports the alias attribute.
354 # Returns 2 if the target supports aliases. Returns 1 if the target
355 # only supports weak aliased. Returns 0 if the target does not
356 # support aliases at all. Returns -1 if support for aliases could not
359 proc check_alias_available { } {
360 global alias_available_saved
363 if [info exists alias_available_saved] {
364 verbose "check_alias_available returning saved $alias_available_saved" 2
368 verbose "check_alias_available compiling testfile $src" 2
369 set f [open $src "w"]
370 # Compile a small test program. The definition of "g" is
371 # necessary to keep the Solaris assembler from complaining
373 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
374 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
376 set lines [${tool}_target_compile $src $obj object ""]
378 remote_file build delete $obj
380 if [string match "" $lines] then {
381 # No error messages, everything is OK.
382 set alias_available_saved 2
384 if [regexp "alias definitions not supported" $lines] {
385 verbose "check_alias_available target does not support aliases" 2
387 set objformat [gcc_target_object_format]
389 if { $objformat == "elf" } {
390 verbose "check_alias_available but target uses ELF format, so it ought to" 2
391 set alias_available_saved -1
393 set alias_available_saved 0
396 if [regexp "only weak aliases are supported" $lines] {
397 verbose "check_alias_available target supports only weak aliases" 2
398 set alias_available_saved 1
400 set alias_available_saved -1
405 verbose "check_alias_available returning $alias_available_saved" 2
408 return $alias_available_saved
411 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
413 proc check_effective_target_alias { } {
414 if { [check_alias_available] < 2 } {
421 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
423 proc check_ifunc_available { } {
424 return [check_no_compiler_messages ifunc_available object {
429 void f() __attribute__((ifunc("g")));
433 # Returns true if --gc-sections is supported on the target.
435 proc check_gc_sections_available { } {
436 global gc_sections_available_saved
439 if {![info exists gc_sections_available_saved]} {
440 # Some targets don't support gc-sections despite whatever's
441 # advertised by ld's options.
442 if { [istarget alpha*-*-*]
443 || [istarget ia64-*-*] } {
444 set gc_sections_available_saved 0
448 # elf2flt uses -q (--emit-relocs), which is incompatible with
450 if { [board_info target exists ldflags]
451 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
452 set gc_sections_available_saved 0
456 # VxWorks kernel modules are relocatable objects linked with -r,
457 # while RTP executables are linked with -q (--emit-relocs).
458 # Both of these options are incompatible with --gc-sections.
459 if { [istarget *-*-vxworks*] } {
460 set gc_sections_available_saved 0
464 # Check if the ld used by gcc supports --gc-sections.
465 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
466 set ld_output [remote_exec host "$gcc_ld" "--help"]
467 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
468 set gc_sections_available_saved 1
470 set gc_sections_available_saved 0
473 return $gc_sections_available_saved
476 # Return 1 if according to target_info struct and explicit target list
477 # target is supposed to support trampolines.
479 proc check_effective_target_trampolines { } {
480 if [target_info exists no_trampolines] {
483 if { [istarget avr-*-*]
484 || [istarget msp430-*-*]
485 || [istarget nvptx-*-*]
486 || [istarget hppa2.0w-hp-hpux11.23]
487 || [istarget hppa64-hp-hpux11.23] } {
493 # Return 1 if according to target_info struct and explicit target list
494 # target disables -fdelete-null-pointer-checks. Targets should return 0
495 # if they simply default to -fno-delete-null-pointer-checks but obey
496 # -fdelete-null-pointer-checks when passed explicitly (and tests that
497 # depend on this option should do that).
499 proc check_effective_target_keeps_null_pointer_checks { } {
500 if [target_info exists keeps_null_pointer_checks] {
503 if { [istarget avr-*-*] } {
509 # Return the autofdo profile wrapper
511 proc profopt-perf-wrapper { } {
513 return "$srcdir/../config/i386/gcc-auto-profile -o perf.data "
516 # Return true if profiling is supported on the target.
518 proc check_profiling_available { test_what } {
519 global profiling_available_saved
521 verbose "Profiling argument is <$test_what>" 1
523 # These conditions depend on the argument so examine them before
524 # looking at the cache variable.
526 # Tree profiling requires TLS runtime support.
527 if { $test_what == "-fprofile-generate" } {
528 if { ![check_effective_target_tls_runtime] } {
533 if { $test_what == "-fauto-profile" } {
534 if { !([istarget i?86-*-linux*] || [istarget x86_64-*-linux*]) } {
535 verbose "autofdo only supported on linux"
538 # not cross compiling?
540 verbose "autofdo not supported for non native builds"
543 set event [profopt-perf-wrapper]
545 verbose "autofdo not supported"
549 set status [remote_exec host "$srcdir/../config/i386/gcc-auto-profile" "true -v >/dev/null"]
550 if { [lindex $status 0] != 0 } {
551 verbose "autofdo not supported because perf does not work"
555 # no good way to check this in advance -- check later instead.
556 #set status [remote_exec host "create_gcov" "2>/dev/null"]
557 #if { [lindex $status 0] != 255 } {
558 # verbose "autofdo not supported due to missing create_gcov"
563 # Support for -p on solaris2 relies on mcrt1.o which comes with the
564 # vendor compiler. We cannot reliably predict the directory where the
565 # vendor compiler (and thus mcrt1.o) is installed so we can't
566 # necessarily find mcrt1.o even if we have it.
567 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
571 # We don't yet support profiling for MIPS16.
572 if { [istarget mips*-*-*]
573 && ![check_effective_target_nomips16]
574 && ($test_what == "-p" || $test_what == "-pg") } {
578 # MinGW does not support -p.
579 if { [istarget *-*-mingw*] && $test_what == "-p" } {
583 # cygwin does not support -p.
584 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
588 # uClibc does not have gcrt1.o.
589 if { [check_effective_target_uclibc]
590 && ($test_what == "-p" || $test_what == "-pg") } {
594 # Now examine the cache variable.
595 if {![info exists profiling_available_saved]} {
596 # Some targets don't have any implementation of __bb_init_func or are
597 # missing other needed machinery.
598 if {[istarget aarch64*-*-elf]
599 || [istarget am3*-*-linux*]
600 || [istarget arm*-*-eabi*]
601 || [istarget arm*-*-elf]
602 || [istarget arm*-*-symbianelf*]
603 || [istarget avr-*-*]
604 || [istarget bfin-*-*]
605 || [istarget cris-*-*]
606 || [istarget crisv32-*-*]
607 || [istarget fido-*-elf]
608 || [istarget h8300-*-*]
609 || [istarget lm32-*-*]
610 || [istarget m32c-*-elf]
611 || [istarget m68k-*-elf]
612 || [istarget m68k-*-uclinux*]
613 || [istarget mips*-*-elf*]
614 || [istarget mmix-*-*]
615 || [istarget mn10300-*-elf*]
616 || [istarget moxie-*-elf*]
617 || [istarget msp430-*-*]
618 || [istarget nds32*-*-elf]
619 || [istarget nios2-*-elf]
620 || [istarget nvptx-*-*]
621 || [istarget powerpc-*-eabi*]
622 || [istarget powerpc-*-elf]
624 || [istarget tic6x-*-elf]
625 || [istarget visium-*-*]
626 || [istarget xstormy16-*]
627 || [istarget xtensa*-*-elf]
628 || [istarget *-*-rtems*]
629 || [istarget *-*-vxworks*] } {
630 set profiling_available_saved 0
632 set profiling_available_saved 1
636 # -pg link test result can't be cached since it may change between
638 set profiling_working $profiling_available_saved
639 if { $profiling_available_saved == 1
640 && ![check_no_compiler_messages_nocache profiling executable {
641 int main() { return 0; } } "-pg"] } {
642 set profiling_working 0
645 return $profiling_working
648 # Check to see if a target is "freestanding". This is as per the definition
649 # in Section 4 of C99 standard. Effectively, it is a target which supports no
650 # extra headers or libraries other than what is considered essential.
651 proc check_effective_target_freestanding { } {
652 if { [istarget nvptx-*-*] } {
658 # Return 1 if target has packed layout of structure members by
659 # default, 0 otherwise. Note that this is slightly different than
660 # whether the target has "natural alignment": both attributes may be
663 proc check_effective_target_default_packed { } {
664 return [check_no_compiler_messages default_packed assembly {
665 struct x { char a; long b; } c;
666 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
670 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
671 # documentation, where the test also comes from.
673 proc check_effective_target_pcc_bitfield_type_matters { } {
674 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
675 # bitfields, but let's stick to the example code from the docs.
676 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
677 struct foo1 { char x; char :0; char y; };
678 struct foo2 { char x; int :0; char y; };
679 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
683 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
685 proc add_options_for_tls { flags } {
686 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
687 # libthread, so always pass -pthread for native TLS. Same for AIX.
688 # Need to duplicate native TLS check from
689 # check_effective_target_tls_native to avoid recursion.
690 if { ([istarget powerpc-ibm-aix*]) &&
691 [check_no_messages_and_pattern tls_native "!emutls" assembly {
693 int f (void) { return i; }
694 void g (int j) { i = j; }
696 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
701 # Return 1 if indirect jumps are supported, 0 otherwise.
703 proc check_effective_target_indirect_jumps {} {
704 if { [istarget nvptx-*-*] } {
710 # Return 1 if nonlocal goto is supported, 0 otherwise.
712 proc check_effective_target_nonlocal_goto {} {
713 if { [istarget nvptx-*-*] } {
719 # Return 1 if global constructors are supported, 0 otherwise.
721 proc check_effective_target_global_constructor {} {
722 if { [istarget nvptx-*-*] } {
728 # Return 1 if taking label values is supported, 0 otherwise.
730 proc check_effective_target_label_values {} {
731 if { [istarget nvptx-*-*] } {
734 return [check_no_compiler_messages label_values assembly {
735 #ifdef NO_LABEL_VALUES
741 # Return 1 if builtin_return_address and builtin_frame_address are
742 # supported, 0 otherwise.
744 proc check_effective_target_return_address {} {
745 if { [istarget nvptx-*-*] } {
751 # Return 1 if the assembler does not verify function types against
752 # calls, 0 otherwise. Such verification will typically show up problems
753 # with K&R C function declarations.
755 proc check_effective_target_untyped_assembly {} {
756 if { [istarget nvptx-*-*] } {
762 # Return 1 if alloca is supported, 0 otherwise.
764 proc check_effective_target_alloca {} {
765 if { [istarget nvptx-*-*] } {
766 return [check_no_compiler_messages alloca assembly {
768 void g (int n) { f (__builtin_alloca (n)); }
774 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
776 proc check_effective_target_tls {} {
777 return [check_no_compiler_messages tls assembly {
779 int f (void) { return i; }
780 void g (int j) { i = j; }
784 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
786 proc check_effective_target_tls_native {} {
787 # VxWorks uses emulated TLS machinery, but with non-standard helper
788 # functions, so we fail to automatically detect it.
789 if { [istarget *-*-vxworks*] } {
793 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
795 int f (void) { return i; }
796 void g (int j) { i = j; }
800 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
802 proc check_effective_target_tls_emulated {} {
803 # VxWorks uses emulated TLS machinery, but with non-standard helper
804 # functions, so we fail to automatically detect it.
805 if { [istarget *-*-vxworks*] } {
809 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
811 int f (void) { return i; }
812 void g (int j) { i = j; }
816 # Return 1 if TLS executables can run correctly, 0 otherwise.
818 proc check_effective_target_tls_runtime {} {
819 # The runtime does not have TLS support, but just
820 # running the test below is insufficient to show this.
821 if { [istarget msp430-*-*] || [istarget visium-*-*] } {
824 return [check_runtime tls_runtime {
825 __thread int thr = 0;
826 int main (void) { return thr; }
827 } [add_options_for_tls ""]]
830 # Return 1 if atomic compare-and-swap is supported on 'int'
832 proc check_effective_target_cas_char {} {
833 return [check_no_compiler_messages cas_char assembly {
834 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
840 proc check_effective_target_cas_int {} {
841 return [check_no_compiler_messages cas_int assembly {
842 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
844 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
852 # Return 1 if -ffunction-sections is supported, 0 otherwise.
854 proc check_effective_target_function_sections {} {
855 # Darwin has its own scheme and silently accepts -ffunction-sections.
856 if { [istarget *-*-darwin*] } {
860 return [check_no_compiler_messages functionsections assembly {
862 } "-ffunction-sections"]
865 # Return 1 if instruction scheduling is available, 0 otherwise.
867 proc check_effective_target_scheduling {} {
868 return [check_no_compiler_messages scheduling object {
870 } "-fschedule-insns"]
873 # Return 1 if trapping arithmetic is available, 0 otherwise.
875 proc check_effective_target_trapping {} {
876 return [check_no_compiler_messages trapping object {
877 int add (int a, int b) { return a + b; }
881 # Return 1 if compilation with -fgraphite is error-free for trivial
884 proc check_effective_target_fgraphite {} {
885 return [check_no_compiler_messages fgraphite object {
890 # Return 1 if compilation with -fopenacc is error-free for trivial
893 proc check_effective_target_fopenacc {} {
894 # nvptx can be built with the device-side bits of openacc, but it
895 # does not make sense to test it as an openacc host.
896 if [istarget nvptx-*-*] { return 0 }
898 return [check_no_compiler_messages fopenacc object {
903 # Return 1 if compilation with -fopenmp is error-free for trivial
906 proc check_effective_target_fopenmp {} {
907 # nvptx can be built with the device-side bits of libgomp, but it
908 # does not make sense to test it as an openmp host.
909 if [istarget nvptx-*-*] { return 0 }
911 return [check_no_compiler_messages fopenmp object {
916 # Return 1 if compilation with -fgnu-tm is error-free for trivial
919 proc check_effective_target_fgnu_tm {} {
920 return [check_no_compiler_messages fgnu_tm object {
925 # Return 1 if the target supports mmap, 0 otherwise.
927 proc check_effective_target_mmap {} {
928 return [check_function_available "mmap"]
931 # Return 1 if the target supports dlopen, 0 otherwise.
932 proc check_effective_target_dlopen {} {
933 return [check_no_compiler_messages dlopen executable {
935 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
936 } [add_options_for_dlopen ""]]
939 proc add_options_for_dlopen { flags } {
943 # Return 1 if the target supports clone, 0 otherwise.
944 proc check_effective_target_clone {} {
945 return [check_function_available "clone"]
948 # Return 1 if the target supports setrlimit, 0 otherwise.
949 proc check_effective_target_setrlimit {} {
950 # Darwin has non-posix compliant RLIMIT_AS
951 if { [istarget *-*-darwin*] } {
954 return [check_function_available "setrlimit"]
957 # Return 1 if the target supports swapcontext, 0 otherwise.
958 proc check_effective_target_swapcontext {} {
959 return [check_no_compiler_messages swapcontext executable {
960 #include <ucontext.h>
963 ucontext_t orig_context,child_context;
964 if (swapcontext(&child_context, &orig_context) < 0) { }
969 # Return 1 if compilation with -pthread is error-free for trivial
972 proc check_effective_target_pthread {} {
973 return [check_no_compiler_messages pthread object {
978 # Return 1 if compilation with -gstabs is error-free for trivial
981 proc check_effective_target_stabs {} {
982 return [check_no_compiler_messages stabs object {
987 # Return 1 if compilation with -mpe-aligned-commons is error-free
988 # for trivial code, 0 otherwise.
990 proc check_effective_target_pe_aligned_commons {} {
991 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
992 return [check_no_compiler_messages pe_aligned_commons object {
994 } "-mpe-aligned-commons"]
999 # Return 1 if the target supports -static
1000 proc check_effective_target_static {} {
1001 return [check_no_compiler_messages static executable {
1002 int main (void) { return 0; }
1006 # Return 1 if the target supports -fstack-protector
1007 proc check_effective_target_fstack_protector {} {
1008 return [check_runtime fstack_protector {
1009 int main (void) { return 0; }
1010 } "-fstack-protector"]
1013 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
1014 # for trivial code, 0 otherwise.
1016 proc check_effective_target_freorder {} {
1017 return [check_no_compiler_messages freorder object {
1019 } "-freorder-blocks-and-partition"]
1022 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
1023 # emitted, 0 otherwise. Whether a shared library can actually be built is
1024 # out of scope for this test.
1026 proc check_effective_target_fpic { } {
1027 # Note that M68K has a multilib that supports -fpic but not
1028 # -fPIC, so we need to check both. We test with a program that
1029 # requires GOT references.
1030 foreach arg {fpic fPIC} {
1031 if [check_no_compiler_messages $arg object {
1032 extern int foo (void); extern int bar;
1033 int baz (void) { return foo () + bar; }
1041 # On AArch64, if -fpic is not supported, then we will fall back to -fPIC
1042 # silently. So, we can't rely on above "check_effective_target_fpic" as it
1043 # assumes compiler will give warning if -fpic not supported. Here we check
1044 # whether binutils supports those new -fpic relocation modifiers, and assume
1045 # -fpic is supported if there is binutils support. GCC configuration will
1046 # enable -fpic for AArch64 in this case.
1048 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1049 # memory model -fpic relocation types.
1051 proc check_effective_target_aarch64_small_fpic { } {
1052 if { [istarget aarch64*-*-*] } {
1053 return [check_no_compiler_messages aarch64_small_fpic object {
1054 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1061 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1062 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1063 # in binutils since 2015-03-04 as PR gas/17843.
1065 # This test directive make sure binutils support all features needed by TLS LE
1066 # under -mtls-size=32 on AArch64.
1068 proc check_effective_target_aarch64_tlsle32 { } {
1069 if { [istarget aarch64*-*-*] } {
1070 return [check_no_compiler_messages aarch64_tlsle32 object {
1071 void foo (void) { asm ("movk x1,#:tprel_g0_nc:t1"); }
1078 # Return 1 if -shared is supported, as in no warnings or errors
1079 # emitted, 0 otherwise.
1081 proc check_effective_target_shared { } {
1082 # Note that M68K has a multilib that supports -fpic but not
1083 # -fPIC, so we need to check both. We test with a program that
1084 # requires GOT references.
1085 return [check_no_compiler_messages shared executable {
1086 extern int foo (void); extern int bar;
1087 int baz (void) { return foo () + bar; }
1091 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
1093 proc check_effective_target_pie { } {
1094 if { [istarget *-*-darwin\[912\]*]
1095 || [istarget *-*-dragonfly*]
1096 || [istarget *-*-freebsd*]
1097 || [istarget *-*-linux*]
1098 || [istarget *-*-gnu*] } {
1101 if { [istarget *-*-solaris2.1\[1-9\]*] } {
1102 # Full PIE support was added in Solaris 11.x and Solaris 12, but gcc
1103 # errors out if missing, so check for that.
1104 return [check_no_compiler_messages pie executable {
1105 int main (void) { return 0; }
1111 # Return true if the target supports -mpaired-single (as used on MIPS).
1113 proc check_effective_target_mpaired_single { } {
1114 return [check_no_compiler_messages mpaired_single object {
1116 } "-mpaired-single"]
1119 # Return true if the target has access to FPU instructions.
1121 proc check_effective_target_hard_float { } {
1122 if { [istarget mips*-*-*] } {
1123 return [check_no_compiler_messages hard_float assembly {
1124 #if (defined __mips_soft_float || defined __mips16)
1125 #error __mips_soft_float || __mips16
1130 # This proc is actually checking the availabilty of FPU
1131 # support for doubles, so on the RX we must fail if the
1132 # 64-bit double multilib has been selected.
1133 if { [istarget rx-*-*] } {
1135 # return [check_no_compiler_messages hard_float assembly {
1136 #if defined __RX_64_BIT_DOUBLES__
1137 #error __RX_64_BIT_DOUBLES__
1142 # The generic test equates hard_float with "no call for adding doubles".
1143 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
1144 double a (double b, double c) { return b + c; }
1148 # Return true if the target is a 64-bit MIPS target.
1150 proc check_effective_target_mips64 { } {
1151 return [check_no_compiler_messages mips64 assembly {
1158 # Return true if the target is a MIPS target that does not produce
1161 proc check_effective_target_nomips16 { } {
1162 return [check_no_compiler_messages nomips16 object {
1166 /* A cheap way of testing for -mflip-mips16. */
1167 void foo (void) { asm ("addiu $20,$20,1"); }
1168 void bar (void) { asm ("addiu $20,$20,1"); }
1173 # Add the options needed for MIPS16 function attributes. At the moment,
1174 # we don't support MIPS16 PIC.
1176 proc add_options_for_mips16_attribute { flags } {
1177 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1180 # Return true if we can force a mode that allows MIPS16 code generation.
1181 # We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
1184 proc check_effective_target_mips16_attribute { } {
1185 return [check_no_compiler_messages mips16_attribute assembly {
1189 #if defined __mips_hard_float \
1190 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
1191 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
1192 #error __mips_hard_float && (!_ABIO32 || !_ABIO64)
1194 } [add_options_for_mips16_attribute ""]]
1197 # Return 1 if the target supports long double larger than double when
1198 # using the new ABI, 0 otherwise.
1200 proc check_effective_target_mips_newabi_large_long_double { } {
1201 return [check_no_compiler_messages mips_newabi_large_long_double object {
1202 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1206 # Return true if the target is a MIPS target that has access
1207 # to the LL and SC instructions.
1209 proc check_effective_target_mips_llsc { } {
1210 if { ![istarget mips*-*-*] } {
1213 # Assume that these instructions are always implemented for
1214 # non-elf* targets, via emulation if necessary.
1215 if { ![istarget *-*-elf*] } {
1218 # Otherwise assume LL/SC support for everything but MIPS I.
1219 return [check_no_compiler_messages mips_llsc assembly {
1226 # Return true if the target is a MIPS target that uses in-place relocations.
1228 proc check_effective_target_mips_rel { } {
1229 if { ![istarget mips*-*-*] } {
1232 return [check_no_compiler_messages mips_rel object {
1233 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
1234 || (defined _ABI64 && _MIPS_SIM == _ABI64)
1235 #error _ABIN32 && (_ABIN32 || _ABI64)
1240 # Return true if the target is a MIPS target that uses the EABI.
1242 proc check_effective_target_mips_eabi { } {
1243 if { ![istarget mips*-*-*] } {
1246 return [check_no_compiler_messages mips_eabi object {
1253 # Return 1 if the current multilib does not generate PIC by default.
1255 proc check_effective_target_nonpic { } {
1256 return [check_no_compiler_messages nonpic assembly {
1263 # Return 1 if the current multilib generates PIE by default.
1265 proc check_effective_target_pie_enabled { } {
1266 return [check_no_compiler_messages pie_enabled assembly {
1273 # Return 1 if the target generates -fstack-protector by default.
1275 proc check_effective_target_fstack_protector_enabled {} {
1276 return [ check_no_compiler_messages fstack_protector_enabled assembly {
1277 #if !defined(__SSP__) && !defined(__SSP_ALL__) && \
1278 !defined(__SSP_STRONG__) && !defined(__SSP_EXPICIT__)
1284 # Return 1 if the target does not use a status wrapper.
1286 proc check_effective_target_unwrapped { } {
1287 if { [target_info needs_status_wrapper] != "" \
1288 && [target_info needs_status_wrapper] != "0" } {
1294 # Return true if iconv is supported on the target. In particular IBM1047.
1296 proc check_iconv_available { test_what } {
1299 # If the tool configuration file has not set libiconv, try "-liconv"
1300 if { ![info exists libiconv] } {
1301 set libiconv "-liconv"
1303 set test_what [lindex $test_what 1]
1304 return [check_runtime_nocache $test_what [subst {
1310 cd = iconv_open ("$test_what", "UTF-8");
1311 if (cd == (iconv_t) -1)
1318 # Return true if Cilk Library is supported on the target.
1319 proc check_effective_target_cilkplus_runtime { } {
1320 return [ check_no_compiler_messages_nocache cilkplus_runtime executable {
1324 int __cilkrts_set_param (const char *, const char *);
1326 int x = __cilkrts_set_param ("nworkers", "0");
1329 } "-fcilkplus -lcilkrts" ]
1332 # Return true if the atomic library is supported on the target.
1333 proc check_effective_target_libatomic_available { } {
1334 return [check_no_compiler_messages libatomic_available executable {
1335 int main (void) { return 0; }
1339 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1341 proc check_ascii_locale_available { } {
1345 # Return true if named sections are supported on this target.
1347 proc check_named_sections_available { } {
1348 return [check_no_compiler_messages named_sections assembly {
1349 int __attribute__ ((section("whatever"))) foo;
1353 # Return true if the "naked" function attribute is supported on this target.
1355 proc check_effective_target_naked_functions { } {
1356 return [check_no_compiler_messages naked_functions assembly {
1357 void f() __attribute__((naked));
1361 # Return 1 if the target supports Fortran real kinds larger than real(8),
1364 # When the target name changes, replace the cached result.
1366 proc check_effective_target_fortran_large_real { } {
1367 return [check_no_compiler_messages fortran_large_real executable {
1369 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1376 # Return 1 if the target supports Fortran real kind real(16),
1377 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1378 # this checks for Real(16) only; the other returned real(10) if
1379 # both real(10) and real(16) are available.
1381 # When the target name changes, replace the cached result.
1383 proc check_effective_target_fortran_real_16 { } {
1384 return [check_no_compiler_messages fortran_real_16 executable {
1393 # Return 1 if the target supports Fortran's IEEE modules,
1396 # When the target name changes, replace the cached result.
1398 proc check_effective_target_fortran_ieee { flags } {
1399 return [check_no_compiler_messages fortran_ieee executable {
1401 use, intrinsic :: ieee_features
1407 # Return 1 if the target supports SQRT for the largest floating-point
1408 # type. (Some targets lack the libm support for this FP type.)
1409 # On most targets, this check effectively checks either whether sqrtl is
1410 # available or on __float128 systems whether libquadmath is installed,
1411 # which provides sqrtq.
1413 # When the target name changes, replace the cached result.
1415 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1416 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1418 use iso_fortran_env, only: real_kinds
1419 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1420 real(kind=maxFP), volatile :: x
1428 # Return 1 if the target supports Fortran integer kinds larger than
1429 # integer(8), 0 otherwise.
1431 # When the target name changes, replace the cached result.
1433 proc check_effective_target_fortran_large_int { } {
1434 return [check_no_compiler_messages fortran_large_int executable {
1436 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1437 integer(kind=k) :: i
1442 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1444 # When the target name changes, replace the cached result.
1446 proc check_effective_target_fortran_integer_16 { } {
1447 return [check_no_compiler_messages fortran_integer_16 executable {
1454 # Return 1 if we can statically link libgfortran, 0 otherwise.
1456 # When the target name changes, replace the cached result.
1458 proc check_effective_target_static_libgfortran { } {
1459 return [check_no_compiler_messages static_libgfortran executable {
1466 # Return 1 if cilk-plus is supported by the target, 0 otherwise.
1468 proc check_effective_target_cilkplus { } {
1469 # Skip cilk-plus tests on int16 and size16 targets for now.
1470 # The cilk-plus tests are not generic enough to cover these
1471 # cases and would throw hundreds of FAILs.
1472 if { [check_effective_target_int16]
1473 || ![check_effective_target_size32plus] } {
1477 # Skip AVR, its RAM is too small and too many tests would fail.
1478 if { [istarget avr-*-*] } {
1482 if { ! [check_effective_target_pthread] } {
1489 proc check_linker_plugin_available { } {
1490 return [check_no_compiler_messages_nocache linker_plugin executable {
1491 int main() { return 0; }
1492 } "-flto -fuse-linker-plugin"]
1495 # Return 1 if the target supports executing 750CL paired-single instructions, 0
1496 # otherwise. Cache the result.
1498 proc check_750cl_hw_available { } {
1499 return [check_cached_effective_target 750cl_hw_available {
1500 # If this is not the right target then we can skip the test.
1501 if { ![istarget powerpc-*paired*] } {
1504 check_runtime_nocache 750cl_hw_available {
1508 asm volatile ("ps_mul v0,v0,v0");
1510 asm volatile ("ps_mul 0,0,0");
1519 # Return 1 if the target OS supports running SSE executables, 0
1520 # otherwise. Cache the result.
1522 proc check_sse_os_support_available { } {
1523 return [check_cached_effective_target sse_os_support_available {
1524 # If this is not the right target then we can skip the test.
1525 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1527 } elseif { [istarget i?86-*-solaris2*] } {
1528 # The Solaris 2 kernel doesn't save and restore SSE registers
1529 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1530 check_runtime_nocache sse_os_support_available {
1533 asm volatile ("movaps %xmm0,%xmm0");
1543 # Return 1 if the target OS supports running AVX executables, 0
1544 # otherwise. Cache the result.
1546 proc check_avx_os_support_available { } {
1547 return [check_cached_effective_target avx_os_support_available {
1548 # If this is not the right target then we can skip the test.
1549 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1552 # Check that OS has AVX and SSE saving enabled.
1553 check_runtime_nocache avx_os_support_available {
1556 unsigned int eax, edx;
1558 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1559 return (eax & 6) != 6;
1566 # Return 1 if the target supports executing SSE instructions, 0
1567 # otherwise. Cache the result.
1569 proc check_sse_hw_available { } {
1570 return [check_cached_effective_target sse_hw_available {
1571 # If this is not the right target then we can skip the test.
1572 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1575 check_runtime_nocache sse_hw_available {
1579 unsigned int eax, ebx, ecx, edx;
1580 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1581 return !(edx & bit_SSE);
1589 # Return 1 if the target supports executing MIPS Paired-Single instructions,
1590 # 0 otherwise. Cache the result.
1592 proc check_mpaired_single_hw_available { } {
1593 return [check_cached_effective_target mpaired_single_hw_available {
1594 # If this is not the right target then we can skip the test.
1595 if { !([istarget mips*-*-*]) } {
1598 check_runtime_nocache mpaired_single_hw_available {
1601 asm volatile ("pll.ps $f2,$f4,$f6");
1609 # Return 1 if the target supports executing Loongson vector instructions,
1610 # 0 otherwise. Cache the result.
1612 proc check_mips_loongson_hw_available { } {
1613 return [check_cached_effective_target mips_loongson_hw_available {
1614 # If this is not the right target then we can skip the test.
1615 if { !([istarget mips*-*-*]) } {
1618 check_runtime_nocache mips_loongson_hw_available {
1619 #include <loongson.h>
1622 asm volatile ("paddw $f2,$f4,$f6");
1630 # Return 1 if the target supports executing MIPS MSA instructions, 0
1631 # otherwise. Cache the result.
1633 proc check_mips_msa_hw_available { } {
1634 return [check_cached_effective_target mips_msa_hw_available {
1635 # If this is not the right target then we can skip the test.
1636 if { !([istarget mips*-*-*]) } {
1639 check_runtime_nocache mips_msa_hw_available {
1640 #if !defined(__mips_msa)
1641 #error "MSA NOT AVAIL"
1643 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
1644 #error "MSA NOT AVAIL FOR ISA REV < 2"
1646 #if !defined(__mips_hard_float)
1647 #error "MSA HARD_FLOAT REQUIRED"
1649 #if __mips_fpr != 64
1650 #error "MSA 64-bit FPR REQUIRED"
1656 v8i16 v = __builtin_msa_ldi_h (0);
1666 # Return 1 if the target supports executing SSE2 instructions, 0
1667 # otherwise. Cache the result.
1669 proc check_sse2_hw_available { } {
1670 return [check_cached_effective_target sse2_hw_available {
1671 # If this is not the right target then we can skip the test.
1672 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1675 check_runtime_nocache sse2_hw_available {
1679 unsigned int eax, ebx, ecx, edx;
1680 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1681 return !(edx & bit_SSE2);
1689 # Return 1 if the target supports executing SSE4 instructions, 0
1690 # otherwise. Cache the result.
1692 proc check_sse4_hw_available { } {
1693 return [check_cached_effective_target sse4_hw_available {
1694 # If this is not the right target then we can skip the test.
1695 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1698 check_runtime_nocache sse4_hw_available {
1702 unsigned int eax, ebx, ecx, edx;
1703 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1704 return !(ecx & bit_SSE4_2);
1712 # Return 1 if the target supports executing AVX instructions, 0
1713 # otherwise. Cache the result.
1715 proc check_avx_hw_available { } {
1716 return [check_cached_effective_target avx_hw_available {
1717 # If this is not the right target then we can skip the test.
1718 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1721 check_runtime_nocache avx_hw_available {
1725 unsigned int eax, ebx, ecx, edx;
1726 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1727 return ((ecx & (bit_AVX | bit_OSXSAVE))
1728 != (bit_AVX | bit_OSXSAVE));
1736 # Return 1 if the target supports executing AVX2 instructions, 0
1737 # otherwise. Cache the result.
1739 proc check_avx2_hw_available { } {
1740 return [check_cached_effective_target avx2_hw_available {
1741 # If this is not the right target then we can skip the test.
1742 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1745 check_runtime_nocache avx2_hw_available {
1749 unsigned int eax, ebx, ecx, edx;
1750 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)
1751 || ((ecx & bit_OSXSAVE) != bit_OSXSAVE))
1754 if (__get_cpuid_max (0, NULL) < 7)
1757 __cpuid_count (7, 0, eax, ebx, ecx, edx);
1759 return (ebx & bit_AVX2) != bit_AVX2;
1766 # Return 1 if the target supports running SSE executables, 0 otherwise.
1768 proc check_effective_target_sse_runtime { } {
1769 if { [check_effective_target_sse]
1770 && [check_sse_hw_available]
1771 && [check_sse_os_support_available] } {
1777 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1779 proc check_effective_target_sse2_runtime { } {
1780 if { [check_effective_target_sse2]
1781 && [check_sse2_hw_available]
1782 && [check_sse_os_support_available] } {
1788 # Return 1 if the target supports running SSE4 executables, 0 otherwise.
1790 proc check_effective_target_sse4_runtime { } {
1791 if { [check_effective_target_sse4]
1792 && [check_sse4_hw_available]
1793 && [check_sse_os_support_available] } {
1799 # Return 1 if the target supports running MIPS Paired-Single
1800 # executables, 0 otherwise.
1802 proc check_effective_target_mpaired_single_runtime { } {
1803 if { [check_effective_target_mpaired_single]
1804 && [check_mpaired_single_hw_available] } {
1810 # Return 1 if the target supports running Loongson executables, 0 otherwise.
1812 proc check_effective_target_mips_loongson_runtime { } {
1813 if { [check_effective_target_mips_loongson]
1814 && [check_mips_loongson_hw_available] } {
1820 # Return 1 if the target supports running MIPS MSA executables, 0 otherwise.
1822 proc check_effective_target_mips_msa_runtime { } {
1823 if { [check_effective_target_mips_msa]
1824 && [check_mips_msa_hw_available] } {
1830 # Return 1 if the target supports running AVX executables, 0 otherwise.
1832 proc check_effective_target_avx_runtime { } {
1833 if { [check_effective_target_avx]
1834 && [check_avx_hw_available]
1835 && [check_avx_os_support_available] } {
1841 # Return 1 if the target supports running AVX2 executables, 0 otherwise.
1843 proc check_effective_target_avx2_runtime { } {
1844 if { [check_effective_target_avx2]
1845 && [check_avx2_hw_available]
1846 && [check_avx_os_support_available] } {
1852 # Return 1 if we are compiling for 64-bit PowerPC but we do not use direct
1853 # move instructions for moves from GPR to FPR.
1855 proc check_effective_target_powerpc64_no_dm { } {
1856 # The "mulld" checks if we are generating PowerPC64 code. The "lfd"
1857 # checks if we do not use direct moves, but use the old-fashioned
1858 # slower move-via-the-stack.
1859 return [check_no_messages_and_pattern powerpc64_no_dm \
1860 {\mmulld\M.*\mlfd} assembly {
1861 double f(long long x) { return x*x; }
1865 # Return 1 if the target supports executing power8 vector instructions, 0
1866 # otherwise. Cache the result.
1868 proc check_p8vector_hw_available { } {
1869 return [check_cached_effective_target p8vector_hw_available {
1870 # Some simulators are known to not support VSX/power8 instructions.
1871 # For now, disable on Darwin
1872 if { [istarget powerpc-*-eabi]
1873 || [istarget powerpc*-*-eabispe]
1874 || [istarget *-*-darwin*]} {
1877 set options "-mpower8-vector"
1878 check_runtime_nocache p8vector_hw_available {
1882 asm volatile ("xxlorc vs0,vs0,vs0");
1884 asm volatile ("xxlorc 0,0,0");
1893 # Return 1 if the target supports executing power9 vector instructions, 0
1894 # otherwise. Cache the result.
1896 proc check_p9vector_hw_available { } {
1897 return [check_cached_effective_target p9vector_hw_available {
1898 # Some simulators are known to not support VSX/power8/power9
1899 # instructions. For now, disable on Darwin.
1900 if { [istarget powerpc-*-eabi]
1901 || [istarget powerpc*-*-eabispe]
1902 || [istarget *-*-darwin*]} {
1905 set options "-mpower9-vector"
1906 check_runtime_nocache p9vector_hw_available {
1910 vector double v = (vector double) { 0.0, 0.0 };
1911 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
1919 # Return 1 if the target supports executing power9 modulo instructions, 0
1920 # otherwise. Cache the result.
1922 proc check_p9modulo_hw_available { } {
1923 return [check_cached_effective_target p9modulo_hw_available {
1924 # Some simulators are known to not support VSX/power8/power9
1925 # instructions. For now, disable on Darwin.
1926 if { [istarget powerpc-*-eabi]
1927 || [istarget powerpc*-*-eabispe]
1928 || [istarget *-*-darwin*]} {
1931 set options "-mmodulo"
1932 check_runtime_nocache p9modulo_hw_available {
1935 int i = 5, j = 3, r = -1;
1936 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
1944 # Return 1 if the target supports executing __float128 on PowerPC via software
1945 # emulation, 0 otherwise. Cache the result.
1947 proc check_ppc_float128_sw_available { } {
1948 return [check_cached_effective_target ppc_float128_sw_available {
1949 # Some simulators are known to not support VSX/power8/power9
1950 # instructions. For now, disable on Darwin.
1951 if { [istarget powerpc-*-eabi]
1952 || [istarget powerpc*-*-eabispe]
1953 || [istarget *-*-darwin*]} {
1956 set options "-mfloat128 -mvsx"
1957 check_runtime_nocache ppc_float128_sw_available {
1958 volatile __float128 x = 1.0q;
1959 volatile __float128 y = 2.0q;
1962 __float128 z = x + y;
1970 # Return 1 if the target supports executing __float128 on PowerPC via power9
1971 # hardware instructions, 0 otherwise. Cache the result.
1973 proc check_ppc_float128_hw_available { } {
1974 return [check_cached_effective_target ppc_float128_hw_available {
1975 # Some simulators are known to not support VSX/power8/power9
1976 # instructions. For now, disable on Darwin.
1977 if { [istarget powerpc-*-eabi]
1978 || [istarget powerpc*-*-eabispe]
1979 || [istarget *-*-darwin*]} {
1982 set options "-mfloat128 -mvsx -mfloat128-hardware -mpower9-vector"
1983 check_runtime_nocache ppc_float128_hw_available {
1984 volatile __float128 x = 1.0q;
1985 volatile __float128 y = 2.0q;
1988 __float128 z = x + y;
1989 __float128 w = -1.0q;
1991 __asm__ ("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
1992 return ((z != 3.0q) || (z != w);
1999 # Return 1 if the target supports executing VSX instructions, 0
2000 # otherwise. Cache the result.
2002 proc check_vsx_hw_available { } {
2003 return [check_cached_effective_target vsx_hw_available {
2004 # Some simulators are known to not support VSX instructions.
2005 # For now, disable on Darwin
2006 if { [istarget powerpc-*-eabi]
2007 || [istarget powerpc*-*-eabispe]
2008 || [istarget *-*-darwin*]} {
2012 check_runtime_nocache vsx_hw_available {
2016 asm volatile ("xxlor vs0,vs0,vs0");
2018 asm volatile ("xxlor 0,0,0");
2027 # Return 1 if the target supports executing AltiVec instructions, 0
2028 # otherwise. Cache the result.
2030 proc check_vmx_hw_available { } {
2031 return [check_cached_effective_target vmx_hw_available {
2032 # Some simulators are known to not support VMX instructions.
2033 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
2036 # Most targets don't require special flags for this test case, but
2037 # Darwin does. Just to be sure, make sure VSX is not enabled for
2038 # the altivec tests.
2039 if { [istarget *-*-darwin*]
2040 || [istarget *-*-aix*] } {
2041 set options "-maltivec -mno-vsx"
2043 set options "-mno-vsx"
2045 check_runtime_nocache vmx_hw_available {
2049 asm volatile ("vor v0,v0,v0");
2051 asm volatile ("vor 0,0,0");
2060 proc check_ppc_recip_hw_available { } {
2061 return [check_cached_effective_target ppc_recip_hw_available {
2062 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
2063 # For now, disable on Darwin
2064 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2067 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
2068 check_runtime_nocache ppc_recip_hw_available {
2069 volatile double d_recip, d_rsqrt, d_four = 4.0;
2070 volatile float f_recip, f_rsqrt, f_four = 4.0f;
2073 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
2074 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
2075 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
2076 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
2084 # Return 1 if the target supports executing AltiVec and Cell PPU
2085 # instructions, 0 otherwise. Cache the result.
2087 proc check_effective_target_cell_hw { } {
2088 return [check_cached_effective_target cell_hw_available {
2089 # Some simulators are known to not support VMX and PPU instructions.
2090 if { [istarget powerpc-*-eabi*] } {
2093 # Most targets don't require special flags for this test
2094 # case, but Darwin and AIX do.
2095 if { [istarget *-*-darwin*]
2096 || [istarget *-*-aix*] } {
2097 set options "-maltivec -mcpu=cell"
2099 set options "-mcpu=cell"
2101 check_runtime_nocache cell_hw_available {
2105 asm volatile ("vor v0,v0,v0");
2106 asm volatile ("lvlx v0,r0,r0");
2108 asm volatile ("vor 0,0,0");
2109 asm volatile ("lvlx 0,0,0");
2118 # Return 1 if the target supports executing 64-bit instructions, 0
2119 # otherwise. Cache the result.
2121 proc check_effective_target_powerpc64 { } {
2122 global powerpc64_available_saved
2125 if [info exists powerpc64_available_saved] {
2126 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
2128 set powerpc64_available_saved 0
2130 # Some simulators are known to not support powerpc64 instructions.
2131 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
2132 verbose "check_effective_target_powerpc64 returning 0" 2
2133 return $powerpc64_available_saved
2136 # Set up, compile, and execute a test program containing a 64-bit
2137 # instruction. Include the current process ID in the file
2138 # names to prevent conflicts with invocations for multiple
2143 set f [open $src "w"]
2144 puts $f "int main() {"
2145 puts $f "#ifdef __MACH__"
2146 puts $f " asm volatile (\"extsw r0,r0\");"
2148 puts $f " asm volatile (\"extsw 0,0\");"
2150 puts $f " return 0; }"
2153 set opts "additional_flags=-mcpu=G5"
2155 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
2156 set lines [${tool}_target_compile $src $exe executable "$opts"]
2159 if [string match "" $lines] then {
2160 # No error message, compilation succeeded.
2161 set result [${tool}_load "./$exe" "" ""]
2162 set status [lindex $result 0]
2163 remote_file build delete $exe
2164 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
2166 if { $status == "pass" } then {
2167 set powerpc64_available_saved 1
2170 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
2174 return $powerpc64_available_saved
2177 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
2178 # complex float arguments. This affects gfortran tests that call cabsf
2179 # in libm built by an earlier compiler. Return 1 if libm uses the same
2180 # argument passing as the compiler under test, 0 otherwise.
2182 # When the target name changes, replace the cached result.
2184 proc check_effective_target_broken_cplxf_arg { } {
2185 return [check_cached_effective_target broken_cplxf_arg {
2186 # Skip the work for targets known not to be affected.
2187 if { ![istarget powerpc64-*-linux*] } {
2189 } elseif { ![is-effective-target lp64] } {
2192 check_runtime_nocache broken_cplxf_arg {
2193 #include <complex.h>
2194 extern void abort (void);
2195 float fabsf (float);
2196 float cabsf (_Complex float);
2203 if (fabsf (f - 5.0) > 0.0001)
2212 # Return 1 is this is a TI C6X target supporting C67X instructions
2213 proc check_effective_target_ti_c67x { } {
2214 return [check_no_compiler_messages ti_c67x assembly {
2215 #if !defined(_TMS320C6700)
2216 #error !_TMS320C6700
2221 # Return 1 is this is a TI C6X target supporting C64X+ instructions
2222 proc check_effective_target_ti_c64xp { } {
2223 return [check_no_compiler_messages ti_c64xp assembly {
2224 #if !defined(_TMS320C6400_PLUS)
2225 #error !_TMS320C6400_PLUS
2231 proc check_alpha_max_hw_available { } {
2232 return [check_runtime alpha_max_hw_available {
2233 int main() { return __builtin_alpha_amask(1<<8) != 0; }
2237 # Returns true iff the FUNCTION is available on the target system.
2238 # (This is essentially a Tcl implementation of Autoconf's
2241 proc check_function_available { function } {
2242 return [check_no_compiler_messages ${function}_available \
2248 int main () { $function (); }
2252 # Returns true iff "fork" is available on the target system.
2254 proc check_fork_available {} {
2255 return [check_function_available "fork"]
2258 # Returns true iff "mkfifo" is available on the target system.
2260 proc check_mkfifo_available {} {
2261 if { [istarget *-*-cygwin*] } {
2262 # Cygwin has mkfifo, but support is incomplete.
2266 return [check_function_available "mkfifo"]
2269 # Returns true iff "__cxa_atexit" is used on the target system.
2271 proc check_cxa_atexit_available { } {
2272 return [check_cached_effective_target cxa_atexit_available {
2273 if { [istarget hppa*-*-hpux10*] } {
2274 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
2276 } elseif { [istarget *-*-vxworks] } {
2277 # vxworks doesn't have __cxa_atexit but subsequent test passes.
2280 check_runtime_nocache cxa_atexit_available {
2283 static unsigned int count;
2300 Y() { f(); count = 2; }
2309 int main() { return 0; }
2315 proc check_effective_target_objc2 { } {
2316 return [check_no_compiler_messages objc2 object {
2325 proc check_effective_target_next_runtime { } {
2326 return [check_no_compiler_messages objc2 object {
2327 #ifdef __NEXT_RUNTIME__
2330 #error !__NEXT_RUNTIME__
2335 # Return 1 if we're generating 32-bit code using default options, 0
2338 proc check_effective_target_ilp32 { } {
2339 return [check_no_compiler_messages ilp32 object {
2340 int dummy[sizeof (int) == 4
2341 && sizeof (void *) == 4
2342 && sizeof (long) == 4 ? 1 : -1];
2346 # Return 1 if we're generating ia32 code using default options, 0
2349 proc check_effective_target_ia32 { } {
2350 return [check_no_compiler_messages ia32 object {
2351 int dummy[sizeof (int) == 4
2352 && sizeof (void *) == 4
2353 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
2357 # Return 1 if we're generating x32 code using default options, 0
2360 proc check_effective_target_x32 { } {
2361 return [check_no_compiler_messages x32 object {
2362 int dummy[sizeof (int) == 4
2363 && sizeof (void *) == 4
2364 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
2368 # Return 1 if we're generating 32-bit integers using default
2369 # options, 0 otherwise.
2371 proc check_effective_target_int32 { } {
2372 return [check_no_compiler_messages int32 object {
2373 int dummy[sizeof (int) == 4 ? 1 : -1];
2377 # Return 1 if we're generating 32-bit or larger integers using default
2378 # options, 0 otherwise.
2380 proc check_effective_target_int32plus { } {
2381 return [check_no_compiler_messages int32plus object {
2382 int dummy[sizeof (int) >= 4 ? 1 : -1];
2386 # Return 1 if we're generating 32-bit or larger pointers using default
2387 # options, 0 otherwise.
2389 proc check_effective_target_ptr32plus { } {
2390 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
2391 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
2392 # cannot really hold a 32-bit address, so we always return false here.
2393 if { [istarget msp430-*-*] } {
2397 return [check_no_compiler_messages ptr32plus object {
2398 int dummy[sizeof (void *) >= 4 ? 1 : -1];
2402 # Return 1 if we support 32-bit or larger array and structure sizes
2403 # using default options, 0 otherwise. Avoid false positive on
2404 # targets with 20 or 24 bit address spaces.
2406 proc check_effective_target_size32plus { } {
2407 return [check_no_compiler_messages size32plus object {
2408 char dummy[16777217L];
2412 # Returns 1 if we're generating 16-bit or smaller integers with the
2413 # default options, 0 otherwise.
2415 proc check_effective_target_int16 { } {
2416 return [check_no_compiler_messages int16 object {
2417 int dummy[sizeof (int) < 4 ? 1 : -1];
2421 # Return 1 if we're generating 64-bit code using default options, 0
2424 proc check_effective_target_lp64 { } {
2425 return [check_no_compiler_messages lp64 object {
2426 int dummy[sizeof (int) == 4
2427 && sizeof (void *) == 8
2428 && sizeof (long) == 8 ? 1 : -1];
2432 # Return 1 if we're generating 64-bit code using default llp64 options,
2435 proc check_effective_target_llp64 { } {
2436 return [check_no_compiler_messages llp64 object {
2437 int dummy[sizeof (int) == 4
2438 && sizeof (void *) == 8
2439 && sizeof (long long) == 8
2440 && sizeof (long) == 4 ? 1 : -1];
2444 # Return 1 if long and int have different sizes,
2447 proc check_effective_target_long_neq_int { } {
2448 return [check_no_compiler_messages long_ne_int object {
2449 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2453 # Return 1 if the target supports long double larger than double,
2456 proc check_effective_target_large_long_double { } {
2457 return [check_no_compiler_messages large_long_double object {
2458 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2462 # Return 1 if the target supports double larger than float,
2465 proc check_effective_target_large_double { } {
2466 return [check_no_compiler_messages large_double object {
2467 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2471 # Return 1 if the target supports long double of 128 bits,
2474 proc check_effective_target_longdouble128 { } {
2475 return [check_no_compiler_messages longdouble128 object {
2476 int dummy[sizeof(long double) == 16 ? 1 : -1];
2480 # Return 1 if the target supports double of 64 bits,
2483 proc check_effective_target_double64 { } {
2484 return [check_no_compiler_messages double64 object {
2485 int dummy[sizeof(double) == 8 ? 1 : -1];
2489 # Return 1 if the target supports double of at least 64 bits,
2492 proc check_effective_target_double64plus { } {
2493 return [check_no_compiler_messages double64plus object {
2494 int dummy[sizeof(double) >= 8 ? 1 : -1];
2498 # Return 1 if the target supports 'w' suffix on floating constant
2501 proc check_effective_target_has_w_floating_suffix { } {
2503 if [check_effective_target_c++] {
2504 append opts "-std=gnu++03"
2506 return [check_no_compiler_messages w_fp_suffix object {
2511 # Return 1 if the target supports 'q' suffix on floating constant
2514 proc check_effective_target_has_q_floating_suffix { } {
2516 if [check_effective_target_c++] {
2517 append opts "-std=gnu++03"
2519 return [check_no_compiler_messages q_fp_suffix object {
2524 # Return 1 if the target supports the _FloatN / _FloatNx type
2525 # indicated in the function name, 0 otherwise.
2527 proc check_effective_target_float16 {} {
2528 return [check_no_compiler_messages_nocache float16 object {
2530 } [add_options_for_float16 ""]]
2533 proc check_effective_target_float32 {} {
2534 return [check_no_compiler_messages_nocache float32 object {
2536 } [add_options_for_float32 ""]]
2539 proc check_effective_target_float64 {} {
2540 return [check_no_compiler_messages_nocache float64 object {
2542 } [add_options_for_float64 ""]]
2545 proc check_effective_target_float128 {} {
2546 return [check_no_compiler_messages_nocache float128 object {
2548 } [add_options_for_float128 ""]]
2551 proc check_effective_target_float32x {} {
2552 return [check_no_compiler_messages_nocache float32x object {
2554 } [add_options_for_float32x ""]]
2557 proc check_effective_target_float64x {} {
2558 return [check_no_compiler_messages_nocache float64x object {
2560 } [add_options_for_float64x ""]]
2563 proc check_effective_target_float128x {} {
2564 return [check_no_compiler_messages_nocache float128x object {
2566 } [add_options_for_float128x ""]]
2569 # Likewise, but runtime support for any special options used as well
2570 # as compile-time support is required.
2572 proc check_effective_target_float16_runtime {} {
2573 return [check_effective_target_float16]
2576 proc check_effective_target_float32_runtime {} {
2577 return [check_effective_target_float32]
2580 proc check_effective_target_float64_runtime {} {
2581 return [check_effective_target_float64]
2584 proc check_effective_target_float128_runtime {} {
2585 if { ![check_effective_target_float128] } {
2588 if { [istarget powerpc*-*-*] } {
2589 return [check_effective_target_base_quadfloat_support]
2594 proc check_effective_target_float32x_runtime {} {
2595 return [check_effective_target_float32x]
2598 proc check_effective_target_float64x_runtime {} {
2599 if { ![check_effective_target_float64x] } {
2602 if { [istarget powerpc*-*-*] } {
2603 return [check_effective_target_base_quadfloat_support]
2608 proc check_effective_target_float128x_runtime {} {
2609 return [check_effective_target_float128x]
2612 # Return 1 if the target hardware supports any options added for
2613 # _FloatN and _FloatNx types, 0 otherwise.
2615 proc check_effective_target_floatn_nx_runtime {} {
2616 if { [istarget powerpc*-*-aix*] } {
2619 if { [istarget powerpc*-*-*] } {
2620 return [check_effective_target_base_quadfloat_support]
2625 # Add options needed to use the _FloatN / _FloatNx type indicated in
2626 # the function name.
2628 proc add_options_for_float16 { flags } {
2632 proc add_options_for_float32 { flags } {
2636 proc add_options_for_float64 { flags } {
2640 proc add_options_for_float128 { flags } {
2641 return [add_options_for___float128 "$flags"]
2644 proc add_options_for_float32x { flags } {
2648 proc add_options_for_float64x { flags } {
2649 return [add_options_for___float128 "$flags"]
2652 proc add_options_for_float128x { flags } {
2656 # Return 1 if the target supports __float128,
2659 proc check_effective_target___float128 { } {
2660 if { [istarget powerpc*-*-*] } {
2661 return [check_ppc_float128_sw_available]
2663 if { [istarget ia64-*-*]
2664 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2670 proc add_options_for___float128 { flags } {
2671 if { [istarget powerpc*-*-*] } {
2672 return "$flags -mfloat128 -mvsx"
2677 # Return 1 if the target supports any special run-time requirements
2678 # for __float128 or _Float128,
2681 proc check_effective_target_base_quadfloat_support { } {
2682 if { [istarget powerpc*-*-*] } {
2683 return [check_vsx_hw_available]
2688 # Return 1 if the target supports compiling fixed-point,
2691 proc check_effective_target_fixed_point { } {
2692 return [check_no_compiler_messages fixed_point object {
2693 _Sat _Fract x; _Sat _Accum y;
2697 # Return 1 if the target supports compiling decimal floating point,
2700 proc check_effective_target_dfp_nocache { } {
2701 verbose "check_effective_target_dfp_nocache: compiling source" 2
2702 set ret [check_no_compiler_messages_nocache dfp object {
2703 float x __attribute__((mode(DD)));
2705 verbose "check_effective_target_dfp_nocache: returning $ret" 2
2709 proc check_effective_target_dfprt_nocache { } {
2710 return [check_runtime_nocache dfprt {
2711 typedef float d64 __attribute__((mode(DD)));
2712 d64 x = 1.2df, y = 2.3dd, z;
2713 int main () { z = x + y; return 0; }
2717 # Return 1 if the target supports compiling Decimal Floating Point,
2720 # This won't change for different subtargets so cache the result.
2722 proc check_effective_target_dfp { } {
2723 return [check_cached_effective_target dfp {
2724 check_effective_target_dfp_nocache
2728 # Return 1 if the target supports linking and executing Decimal Floating
2729 # Point, 0 otherwise.
2731 # This won't change for different subtargets so cache the result.
2733 proc check_effective_target_dfprt { } {
2734 return [check_cached_effective_target dfprt {
2735 check_effective_target_dfprt_nocache
2739 # Return 1 if the target supports executing DFP hardware instructions,
2740 # 0 otherwise. Cache the result.
2742 proc check_dfp_hw_available { } {
2743 return [check_cached_effective_target dfp_hw_available {
2744 # For now, disable on Darwin
2745 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2748 check_runtime_nocache dfp_hw_available {
2749 volatile _Decimal64 r;
2750 volatile _Decimal64 a = 4.0DD;
2751 volatile _Decimal64 b = 2.0DD;
2754 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2755 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2756 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2757 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2760 } "-mcpu=power6 -mhard-float"
2765 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2767 proc check_effective_target_ucn_nocache { } {
2768 # -std=c99 is only valid for C
2769 if [check_effective_target_c] {
2770 set ucnopts "-std=c99"
2774 verbose "check_effective_target_ucn_nocache: compiling source" 2
2775 set ret [check_no_compiler_messages_nocache ucn object {
2778 verbose "check_effective_target_ucn_nocache: returning $ret" 2
2782 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2784 # This won't change for different subtargets, so cache the result.
2786 proc check_effective_target_ucn { } {
2787 return [check_cached_effective_target ucn {
2788 check_effective_target_ucn_nocache
2792 # Return 1 if the target needs a command line argument to enable a SIMD
2795 proc check_effective_target_vect_cmdline_needed { } {
2796 global et_vect_cmdline_needed_saved
2797 global et_vect_cmdline_needed_target_name
2799 if { ![info exists et_vect_cmdline_needed_target_name] } {
2800 set et_vect_cmdline_needed_target_name ""
2803 # If the target has changed since we set the cached value, clear it.
2804 set current_target [current_target_name]
2805 if { $current_target != $et_vect_cmdline_needed_target_name } {
2806 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
2807 set et_vect_cmdline_needed_target_name $current_target
2808 if { [info exists et_vect_cmdline_needed_saved] } {
2809 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
2810 unset et_vect_cmdline_needed_saved
2814 if [info exists et_vect_cmdline_needed_saved] {
2815 verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
2817 set et_vect_cmdline_needed_saved 1
2818 if { [istarget alpha*-*-*]
2819 || [istarget ia64-*-*]
2820 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
2821 && ![is-effective-target ia32])
2822 || ([istarget powerpc*-*-*]
2823 && ([check_effective_target_powerpc_spe]
2824 || [check_effective_target_powerpc_altivec]))
2825 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
2826 || [istarget spu-*-*]
2827 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
2828 || [istarget aarch64*-*-*] } {
2829 set et_vect_cmdline_needed_saved 0
2833 verbose "check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
2834 return $et_vect_cmdline_needed_saved
2837 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
2839 # This won't change for different subtargets so cache the result.
2841 proc check_effective_target_vect_int { } {
2842 global et_vect_int_saved
2845 if [info exists et_vect_int_saved($et_index)] {
2846 verbose "check_effective_target_vect_int: using cached result" 2
2848 set et_vect_int_saved($et_index) 0
2849 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2850 || ([istarget powerpc*-*-*]
2851 && ![istarget powerpc-*-linux*paired*])
2852 || [istarget spu-*-*]
2853 || [istarget sparc*-*-*]
2854 || [istarget alpha*-*-*]
2855 || [istarget ia64-*-*]
2856 || [istarget aarch64*-*-*]
2857 || [check_effective_target_arm32]
2858 || ([istarget mips*-*-*]
2859 && ([et-is-effective-target mips_loongson]
2860 || [et-is-effective-target mips_msa])) } {
2861 set et_vect_int_saved($et_index) 1
2865 verbose "check_effective_target_vect_int:\
2866 returning $et_vect_int_saved($et_index)" 2
2867 return $et_vect_int_saved($et_index)
2870 # Return 1 if the target supports signed int->float conversion
2873 proc check_effective_target_vect_intfloat_cvt { } {
2874 global et_vect_intfloat_cvt_saved
2877 if [info exists et_vect_intfloat_cvt_saved($et_index)] {
2878 verbose "check_effective_target_vect_intfloat_cvt:\
2879 using cached result" 2
2881 set et_vect_intfloat_cvt_saved($et_index) 0
2882 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2883 || ([istarget powerpc*-*-*]
2884 && ![istarget powerpc-*-linux*paired*])
2885 || ([istarget arm*-*-*]
2886 && [check_effective_target_arm_neon_ok])
2887 || ([istarget mips*-*-*]
2888 && [et-is-effective-target mips_msa]) } {
2889 set et_vect_intfloat_cvt_saved($et_index) 1
2893 verbose "check_effective_target_vect_intfloat_cvt:\
2894 returning $et_vect_intfloat_cvt_saved($et_index)" 2
2895 return $et_vect_intfloat_cvt_saved($et_index)
2898 #Return 1 if we're supporting __int128 for target, 0 otherwise.
2900 proc check_effective_target_int128 { } {
2901 return [check_no_compiler_messages int128 object {
2903 #ifndef __SIZEOF_INT128__
2912 # Return 1 if the target supports unsigned int->float conversion
2915 proc check_effective_target_vect_uintfloat_cvt { } {
2916 global et_vect_uintfloat_cvt_saved
2919 if [info exists et_vect_uintfloat_cvt_saved($et_index)] {
2920 verbose "check_effective_target_vect_uintfloat_cvt:\
2921 using cached result" 2
2923 set et_vect_uintfloat_cvt_saved($et_index) 0
2924 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2925 || ([istarget powerpc*-*-*]
2926 && ![istarget powerpc-*-linux*paired*])
2927 || [istarget aarch64*-*-*]
2928 || ([istarget arm*-*-*]
2929 && [check_effective_target_arm_neon_ok])
2930 || ([istarget mips*-*-*]
2931 && [et-is-effective-target mips_msa]) } {
2932 set et_vect_uintfloat_cvt_saved($et_index) 1
2936 verbose "check_effective_target_vect_uintfloat_cvt:\
2937 returning $et_vect_uintfloat_cvt_saved($et_index)" 2
2938 return $et_vect_uintfloat_cvt_saved($et_index)
2942 # Return 1 if the target supports signed float->int conversion
2945 proc check_effective_target_vect_floatint_cvt { } {
2946 global et_vect_floatint_cvt_saved
2949 if [info exists et_vect_floatint_cvt_saved($et_index)] {
2950 verbose "check_effective_target_vect_floatint_cvt:\
2951 using cached result" 2
2953 set et_vect_floatint_cvt_saved($et_index) 0
2954 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2955 || ([istarget powerpc*-*-*]
2956 && ![istarget powerpc-*-linux*paired*])
2957 || ([istarget arm*-*-*]
2958 && [check_effective_target_arm_neon_ok])
2959 || ([istarget mips*-*-*]
2960 && [et-is-effective-target mips_msa]) } {
2961 set et_vect_floatint_cvt_saved($et_index) 1
2965 verbose "check_effective_target_vect_floatint_cvt:\
2966 returning $et_vect_floatint_cvt_saved($et_index)" 2
2967 return $et_vect_floatint_cvt_saved($et_index)
2970 # Return 1 if the target supports unsigned float->int conversion
2973 proc check_effective_target_vect_floatuint_cvt { } {
2974 global et_vect_floatuint_cvt_saved
2977 if [info exists et_vect_floatuint_cvt_saved($et_index)] {
2978 verbose "check_effective_target_vect_floatuint_cvt:\
2979 using cached result" 2
2981 set et_vect_floatuint_cvt_saved($et_index) 0
2982 if { ([istarget powerpc*-*-*]
2983 && ![istarget powerpc-*-linux*paired*])
2984 || ([istarget arm*-*-*]
2985 && [check_effective_target_arm_neon_ok])
2986 || ([istarget mips*-*-*]
2987 && [et-is-effective-target mips_msa]) } {
2988 set et_vect_floatuint_cvt_saved($et_index) 1
2992 verbose "check_effective_target_vect_floatuint_cvt:\
2993 returning $et_vect_floatuint_cvt_saved($et_index)" 2
2994 return $et_vect_floatuint_cvt_saved($et_index)
2997 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
2999 # This won't change for different subtargets so cache the result.
3001 proc check_effective_target_vect_simd_clones { } {
3002 global et_vect_simd_clones_saved
3005 if [info exists et_vect_simd_clones_saved($et_index)] {
3006 verbose "check_effective_target_vect_simd_clones: using cached result" 2
3008 set et_vect_simd_clones_saved($et_index) 0
3009 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx,
3010 # avx2 and avx512f clone. Only the right clone for the
3011 # specified arch will be chosen, but still we need to at least
3012 # be able to assemble avx512f.
3013 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3014 && [check_effective_target_avx512f]) } {
3015 set et_vect_simd_clones_saved($et_index) 1
3019 verbose "check_effective_target_vect_simd_clones:\
3020 returning $et_vect_simd_clones_saved($et_index)" 2
3021 return $et_vect_simd_clones_saved($et_index)
3024 # Return 1 if this is a AArch64 target supporting big endian
3025 proc check_effective_target_aarch64_big_endian { } {
3026 return [check_no_compiler_messages aarch64_big_endian assembly {
3027 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
3028 #error !__aarch64__ || !__AARCH64EB__
3033 # Return 1 if this is a AArch64 target supporting little endian
3034 proc check_effective_target_aarch64_little_endian { } {
3035 if { ![istarget aarch64*-*-*] } {
3039 return [check_no_compiler_messages aarch64_little_endian assembly {
3040 #if !defined(__aarch64__) || defined(__AARCH64EB__)
3046 # Return 1 if this is a compiler supporting ARC atomic operations
3047 proc check_effective_target_arc_atomic { } {
3048 return [check_no_compiler_messages arc_atomic assembly {
3049 #if !defined(__ARC_ATOMIC__)
3055 # Return 1 if this is an arm target using 32-bit instructions
3056 proc check_effective_target_arm32 { } {
3057 if { ![istarget arm*-*-*] } {
3061 return [check_no_compiler_messages arm32 assembly {
3062 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
3063 #error !__arm || __thumb__ && !__thumb2__
3068 # Return 1 if this is an arm target not using Thumb
3069 proc check_effective_target_arm_nothumb { } {
3070 if { ![istarget arm*-*-*] } {
3074 return [check_no_compiler_messages arm_nothumb assembly {
3075 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
3076 #error !__arm__ || __thumb || __thumb2__
3081 # Return 1 if this is a little-endian ARM target
3082 proc check_effective_target_arm_little_endian { } {
3083 if { ![istarget arm*-*-*] } {
3087 return [check_no_compiler_messages arm_little_endian assembly {
3088 #if !defined(__arm__) || !defined(__ARMEL__)
3089 #error !__arm__ || !__ARMEL__
3094 # Return 1 if this is an ARM target that only supports aligned vector accesses
3095 proc check_effective_target_arm_vect_no_misalign { } {
3096 if { ![istarget arm*-*-*] } {
3100 return [check_no_compiler_messages arm_vect_no_misalign assembly {
3101 #if !defined(__arm__) \
3102 || (defined(__ARM_FEATURE_UNALIGNED) \
3103 && defined(__ARMEL__))
3104 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
3110 # Return 1 if this is an ARM target supporting -mfpu=vfp
3111 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
3114 proc check_effective_target_arm_vfp_ok { } {
3115 if { [check_effective_target_arm32] } {
3116 return [check_no_compiler_messages arm_vfp_ok object {
3118 } "-mfpu=vfp -mfloat-abi=softfp"]
3124 # Return 1 if this is an ARM target supporting -mfpu=vfp3
3125 # -mfloat-abi=softfp.
3127 proc check_effective_target_arm_vfp3_ok { } {
3128 if { [check_effective_target_arm32] } {
3129 return [check_no_compiler_messages arm_vfp3_ok object {
3131 } "-mfpu=vfp3 -mfloat-abi=softfp"]
3137 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
3138 # -mfloat-abi=softfp.
3139 proc check_effective_target_arm_v8_vfp_ok {} {
3140 if { [check_effective_target_arm32] } {
3141 return [check_no_compiler_messages arm_v8_vfp_ok object {
3144 __asm__ volatile ("vrinta.f32.f32 s0, s0");
3147 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
3153 # Return 1 if this is an ARM target supporting -mfpu=vfp
3154 # -mfloat-abi=hard. Some multilibs may be incompatible with these
3157 proc check_effective_target_arm_hard_vfp_ok { } {
3158 if { [check_effective_target_arm32]
3159 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
3160 return [check_no_compiler_messages arm_hard_vfp_ok executable {
3161 int main() { return 0;}
3162 } "-mfpu=vfp -mfloat-abi=hard"]
3168 # Return 1 if this is an ARM target defining __ARM_FP. We may need
3169 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3170 # incompatible with these options. Also set et_arm_fp_flags to the
3171 # best options to add.
3173 proc check_effective_target_arm_fp_ok_nocache { } {
3174 global et_arm_fp_flags
3175 set et_arm_fp_flags ""
3176 if { [check_effective_target_arm32] } {
3177 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
3178 if { [check_no_compiler_messages_nocache arm_fp_ok object {
3180 #error __ARM_FP not defined
3183 set et_arm_fp_flags $flags
3192 proc check_effective_target_arm_fp_ok { } {
3193 return [check_cached_effective_target arm_fp_ok \
3194 check_effective_target_arm_fp_ok_nocache]
3197 # Add the options needed to define __ARM_FP. We need either
3198 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
3199 # specified by the multilib, use it.
3201 proc add_options_for_arm_fp { flags } {
3202 if { ! [check_effective_target_arm_fp_ok] } {
3205 global et_arm_fp_flags
3206 return "$flags $et_arm_fp_flags"
3209 # Return 1 if this is an ARM target that supports DSP multiply with
3210 # current multilib flags.
3212 proc check_effective_target_arm_dsp { } {
3213 return [check_no_compiler_messages arm_dsp assembly {
3214 #ifndef __ARM_FEATURE_DSP
3221 # Return 1 if this is an ARM target that supports unaligned word/halfword
3222 # load/store instructions.
3224 proc check_effective_target_arm_unaligned { } {
3225 return [check_no_compiler_messages arm_unaligned assembly {
3226 #ifndef __ARM_FEATURE_UNALIGNED
3227 #error no unaligned support
3233 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3234 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3235 # incompatible with these options. Also set et_arm_crypto_flags to the
3236 # best options to add.
3238 proc check_effective_target_arm_crypto_ok_nocache { } {
3239 global et_arm_crypto_flags
3240 set et_arm_crypto_flags ""
3241 if { [check_effective_target_arm_v8_neon_ok] } {
3242 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
3243 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
3244 #include "arm_neon.h"
3246 foo (uint8x16_t a, uint8x16_t b)
3248 return vaeseq_u8 (a, b);
3251 set et_arm_crypto_flags $flags
3260 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3262 proc check_effective_target_arm_crypto_ok { } {
3263 return [check_cached_effective_target arm_crypto_ok \
3264 check_effective_target_arm_crypto_ok_nocache]
3267 # Add options for crypto extensions.
3268 proc add_options_for_arm_crypto { flags } {
3269 if { ! [check_effective_target_arm_crypto_ok] } {
3272 global et_arm_crypto_flags
3273 return "$flags $et_arm_crypto_flags"
3276 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3277 # or -mfloat-abi=hard, but if one is already specified by the
3278 # multilib, use it. Similarly, if a -mfpu option already enables
3279 # NEON, do not add -mfpu=neon.
3281 proc add_options_for_arm_neon { flags } {
3282 if { ! [check_effective_target_arm_neon_ok] } {
3285 global et_arm_neon_flags
3286 return "$flags $et_arm_neon_flags"
3289 proc add_options_for_arm_v8_vfp { flags } {
3290 if { ! [check_effective_target_arm_v8_vfp_ok] } {
3293 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
3296 proc add_options_for_arm_v8_neon { flags } {
3297 if { ! [check_effective_target_arm_v8_neon_ok] } {
3300 global et_arm_v8_neon_flags
3301 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
3304 # Add the options needed for ARMv8.1 Adv.SIMD. Also adds the ARMv8 NEON
3305 # options for AArch64 and for ARM.
3307 proc add_options_for_arm_v8_1a_neon { flags } {
3308 if { ! [check_effective_target_arm_v8_1a_neon_ok] } {
3311 global et_arm_v8_1a_neon_flags
3312 return "$flags $et_arm_v8_1a_neon_flags -march=armv8.1-a"
3315 # Add the options needed for ARMv8.2 with the scalar FP16 extension.
3316 # Also adds the ARMv8 FP options for ARM and for AArch64.
3318 proc add_options_for_arm_v8_2a_fp16_scalar { flags } {
3319 if { ! [check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
3322 global et_arm_v8_2a_fp16_scalar_flags
3323 return "$flags $et_arm_v8_2a_fp16_scalar_flags"
3326 # Add the options needed for ARMv8.2 with the FP16 extension. Also adds
3327 # the ARMv8 NEON options for ARM and for AArch64.
3329 proc add_options_for_arm_v8_2a_fp16_neon { flags } {
3330 if { ! [check_effective_target_arm_v8_2a_fp16_neon_ok] } {
3333 global et_arm_v8_2a_fp16_neon_flags
3334 return "$flags $et_arm_v8_2a_fp16_neon_flags"
3337 proc add_options_for_arm_crc { flags } {
3338 if { ! [check_effective_target_arm_crc_ok] } {
3341 global et_arm_crc_flags
3342 return "$flags $et_arm_crc_flags"
3345 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3346 # or -mfloat-abi=hard, but if one is already specified by the
3347 # multilib, use it. Similarly, if a -mfpu option already enables
3348 # NEON, do not add -mfpu=neon.
3350 proc add_options_for_arm_neonv2 { flags } {
3351 if { ! [check_effective_target_arm_neonv2_ok] } {
3354 global et_arm_neonv2_flags
3355 return "$flags $et_arm_neonv2_flags"
3358 # Add the options needed for vfp3.
3359 proc add_options_for_arm_vfp3 { flags } {
3360 if { ! [check_effective_target_arm_vfp3_ok] } {
3363 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
3366 # Return 1 if this is an ARM target supporting -mfpu=neon
3367 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3368 # incompatible with these options. Also set et_arm_neon_flags to the
3369 # best options to add.
3371 proc check_effective_target_arm_neon_ok_nocache { } {
3372 global et_arm_neon_flags
3373 set et_arm_neon_flags ""
3374 if { [check_effective_target_arm32] } {
3375 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a"} {
3376 if { [check_no_compiler_messages_nocache arm_neon_ok object {
3378 #ifndef __ARM_NEON__
3381 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3382 configured for -mcpu=arm926ej-s, for example. */
3383 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
3384 #error Architecture does not support NEON.
3387 set et_arm_neon_flags $flags
3396 proc check_effective_target_arm_neon_ok { } {
3397 return [check_cached_effective_target arm_neon_ok \
3398 check_effective_target_arm_neon_ok_nocache]
3401 proc check_effective_target_arm_crc_ok_nocache { } {
3402 global et_arm_crc_flags
3403 set et_arm_crc_flags "-march=armv8-a+crc"
3404 return [check_no_compiler_messages_nocache arm_crc_ok object {
3405 #if !defined (__ARM_FEATURE_CRC32)
3408 } "$et_arm_crc_flags"]
3411 proc check_effective_target_arm_crc_ok { } {
3412 return [check_cached_effective_target arm_crc_ok \
3413 check_effective_target_arm_crc_ok_nocache]
3416 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
3417 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3418 # incompatible with these options. Also set et_arm_neon_fp16_flags to
3419 # the best options to add.
3421 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
3422 global et_arm_neon_fp16_flags
3423 global et_arm_neon_flags
3424 set et_arm_neon_fp16_flags ""
3425 if { [check_effective_target_arm32]
3426 && [check_effective_target_arm_neon_ok] } {
3427 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3428 "-mfpu=neon-fp16 -mfloat-abi=softfp"
3429 "-mfp16-format=ieee"
3430 "-mfloat-abi=softfp -mfp16-format=ieee"
3431 "-mfpu=neon-fp16 -mfp16-format=ieee"
3432 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
3433 if { [check_no_compiler_messages_nocache arm_neon_fp16_ok object {
3434 #include "arm_neon.h"
3436 foo (float32x4_t arg)
3438 return vcvt_f16_f32 (arg);
3440 } "$et_arm_neon_flags $flags"] } {
3441 set et_arm_neon_fp16_flags [concat $et_arm_neon_flags $flags]
3450 proc check_effective_target_arm_neon_fp16_ok { } {
3451 return [check_cached_effective_target arm_neon_fp16_ok \
3452 check_effective_target_arm_neon_fp16_ok_nocache]
3455 proc check_effective_target_arm_neon_fp16_hw { } {
3456 if {! [check_effective_target_arm_neon_fp16_ok] } {
3459 global et_arm_neon_fp16_flags
3460 check_runtime_nocache arm_neon_fp16_hw {
3462 main (int argc, char **argv)
3464 asm ("vcvt.f32.f16 q1, d0");
3467 } $et_arm_neon_fp16_flags
3470 proc add_options_for_arm_neon_fp16 { flags } {
3471 if { ! [check_effective_target_arm_neon_fp16_ok] } {
3474 global et_arm_neon_fp16_flags
3475 return "$flags $et_arm_neon_fp16_flags"
3478 # Return 1 if this is an ARM target supporting the FP16 alternative
3479 # format. Some multilibs may be incompatible with the options needed. Also
3480 # set et_arm_neon_fp16_flags to the best options to add.
3482 proc check_effective_target_arm_fp16_alternative_ok_nocache { } {
3483 global et_arm_neon_fp16_flags
3484 set et_arm_neon_fp16_flags ""
3485 if { [check_effective_target_arm32] } {
3486 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3487 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3488 if { [check_no_compiler_messages_nocache \
3489 arm_fp16_alternative_ok object {
3490 #if !defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3491 #error __ARM_FP16_FORMAT_ALTERNATIVE not defined
3493 } "$flags -mfp16-format=alternative"] } {
3494 set et_arm_neon_fp16_flags "$flags -mfp16-format=alternative"
3503 proc check_effective_target_arm_fp16_alternative_ok { } {
3504 return [check_cached_effective_target arm_fp16_alternative_ok \
3505 check_effective_target_arm_fp16_alternative_ok_nocache]
3508 # Return 1 if this is an ARM target supports specifying the FP16 none
3509 # format. Some multilibs may be incompatible with the options needed.
3511 proc check_effective_target_arm_fp16_none_ok_nocache { } {
3512 if { [check_effective_target_arm32] } {
3513 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3514 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3515 if { [check_no_compiler_messages_nocache \
3516 arm_fp16_none_ok object {
3517 #if defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3518 #error __ARM_FP16_FORMAT_ALTERNATIVE defined
3520 #if defined (__ARM_FP16_FORMAT_IEEE)
3521 #error __ARM_FP16_FORMAT_IEEE defined
3523 } "$flags -mfp16-format=none"] } {
3532 proc check_effective_target_arm_fp16_none_ok { } {
3533 return [check_cached_effective_target arm_fp16_none_ok \
3534 check_effective_target_arm_fp16_none_ok_nocache]
3537 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
3538 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3539 # incompatible with these options. Also set et_arm_v8_neon_flags to the
3540 # best options to add.
3542 proc check_effective_target_arm_v8_neon_ok_nocache { } {
3543 global et_arm_v8_neon_flags
3544 set et_arm_v8_neon_flags ""
3545 if { [check_effective_target_arm32] } {
3546 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3547 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
3549 #error not armv8 or later
3551 #include "arm_neon.h"
3555 __asm__ volatile ("vrintn.f32 q0, q0");
3557 } "$flags -march=armv8-a"] } {
3558 set et_arm_v8_neon_flags $flags
3567 proc check_effective_target_arm_v8_neon_ok { } {
3568 return [check_cached_effective_target arm_v8_neon_ok \
3569 check_effective_target_arm_v8_neon_ok_nocache]
3572 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
3573 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3574 # incompatible with these options. Also set et_arm_neonv2_flags to the
3575 # best options to add.
3577 proc check_effective_target_arm_neonv2_ok_nocache { } {
3578 global et_arm_neonv2_flags
3579 global et_arm_neon_flags
3580 set et_arm_neonv2_flags ""
3581 if { [check_effective_target_arm32]
3582 && [check_effective_target_arm_neon_ok] } {
3583 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
3584 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
3585 #include "arm_neon.h"
3587 foo (float32x2_t a, float32x2_t b, float32x2_t c)
3589 return vfma_f32 (a, b, c);
3591 } "$et_arm_neon_flags $flags"] } {
3592 set et_arm_neonv2_flags [concat $et_arm_neon_flags $flags]
3601 proc check_effective_target_arm_neonv2_ok { } {
3602 return [check_cached_effective_target arm_neonv2_ok \
3603 check_effective_target_arm_neonv2_ok_nocache]
3606 # Add the options needed for VFP FP16 support. We need either
3607 # -mfloat-abi=softfp or -mfloat-abi=hard. If one is already specified by
3608 # the multilib, use it.
3610 proc add_options_for_arm_fp16 { flags } {
3611 if { ! [check_effective_target_arm_fp16_ok] } {
3614 global et_arm_fp16_flags
3615 return "$flags $et_arm_fp16_flags"
3618 # Add the options needed to enable support for IEEE format
3619 # half-precision support. This is valid for ARM targets.
3621 proc add_options_for_arm_fp16_ieee { flags } {
3622 if { ! [check_effective_target_arm_fp16_ok] } {
3625 global et_arm_fp16_flags
3626 return "$flags $et_arm_fp16_flags -mfp16-format=ieee"
3629 # Add the options needed to enable support for ARM Alternative format
3630 # half-precision support. This is valid for ARM targets.
3632 proc add_options_for_arm_fp16_alternative { flags } {
3633 if { ! [check_effective_target_arm_fp16_ok] } {
3636 global et_arm_fp16_flags
3637 return "$flags $et_arm_fp16_flags -mfp16-format=alternative"
3640 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
3641 # Skip multilibs that are incompatible with these options and set
3642 # et_arm_fp16_flags to the best options to add. This test is valid for
3645 proc check_effective_target_arm_fp16_ok_nocache { } {
3646 global et_arm_fp16_flags
3647 set et_arm_fp16_flags ""
3648 if { ! [check_effective_target_arm32] } {
3652 [list "" { *-*-* } { "-mfpu=*" } \
3653 { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" \
3654 "-mfpu=*fpv[1-9][0-9]*" "-mfpu=*fp-armv8*" } ]] {
3655 # Multilib flags would override -mfpu.
3658 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
3659 # Must generate floating-point instructions.
3662 if [check_effective_target_arm_hf_eabi] {
3663 # Use existing float-abi and force an fpu which supports fp16
3664 set et_arm_fp16_flags "-mfpu=vfpv4"
3667 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
3668 # The existing -mfpu value is OK; use it, but add softfp.
3669 set et_arm_fp16_flags "-mfloat-abi=softfp"
3672 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
3673 # macro to check for this support.
3674 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
3675 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
3678 set et_arm_fp16_flags "$flags"
3685 proc check_effective_target_arm_fp16_ok { } {
3686 return [check_cached_effective_target arm_fp16_ok \
3687 check_effective_target_arm_fp16_ok_nocache]
3690 # Return 1 if the target supports executing VFP FP16 instructions, 0
3691 # otherwise. This test is valid for ARM only.
3693 proc check_effective_target_arm_fp16_hw { } {
3694 if {! [check_effective_target_arm_fp16_ok] } {
3697 global et_arm_fp16_flags
3698 check_runtime_nocache arm_fp16_hw {
3700 main (int argc, char **argv)
3704 asm ("vcvtb.f32.f16 %0, %1"
3705 : "=w" (r) : "w" (a)
3706 : /* No clobbers. */);
3707 return (r == 1.0) ? 0 : 1;
3709 } "$et_arm_fp16_flags -mfp16-format=ieee"
3712 # Creates a series of routines that return 1 if the given architecture
3713 # can be selected and a routine to give the flags to select that architecture
3714 # Note: Extra flags may be added to disable options from newer compilers
3715 # (Thumb in particular - but others may be added in the future).
3716 # -march=armv7ve is special and is handled explicitly after this loop because
3717 # it needs more than one predefine check to identify.
3718 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
3719 # /* { dg-add-options arm_arch_v5 } */
3720 # /* { dg-require-effective-target arm_arch_v5_multilib } */
3721 foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__
3722 v4t "-march=armv4t" __ARM_ARCH_4T__
3723 v5 "-march=armv5 -marm" __ARM_ARCH_5__
3724 v5t "-march=armv5t" __ARM_ARCH_5T__
3725 v5te "-march=armv5te" __ARM_ARCH_5TE__
3726 v6 "-march=armv6" __ARM_ARCH_6__
3727 v6k "-march=armv6k" __ARM_ARCH_6K__
3728 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
3729 v6z "-march=armv6z" __ARM_ARCH_6Z__
3730 v6m "-march=armv6-m -mthumb" __ARM_ARCH_6M__
3731 v7a "-march=armv7-a" __ARM_ARCH_7A__
3732 v7r "-march=armv7-r" __ARM_ARCH_7R__
3733 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
3734 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
3735 v8a "-march=armv8-a" __ARM_ARCH_8A__
3736 v8_1a "-march=armv8.1a" __ARM_ARCH_8A__
3737 v8_2a "-march=armv8.2a" __ARM_ARCH_8A__
3738 v8m_base "-march=armv8-m.base -mthumb" __ARM_ARCH_8M_BASE__
3739 v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__ } {
3740 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
3741 proc check_effective_target_arm_arch_FUNC_ok { } {
3742 if { [ string match "*-marm*" "FLAG" ] &&
3743 ![check_effective_target_arm_arm_ok] } {
3746 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
3753 proc add_options_for_arm_arch_FUNC { flags } {
3754 return "$flags FLAG"
3757 proc check_effective_target_arm_arch_FUNC_multilib { } {
3758 return [check_runtime arm_arch_FUNC_multilib {
3764 } [add_options_for_arm_arch_FUNC ""]]
3769 # Same functions as above but for -march=armv7ve. To uniquely identify
3770 # -march=armv7ve we need to check for __ARM_ARCH_7A__ as well as
3771 # __ARM_FEATURE_IDIV otherwise it aliases with armv7-a.
3773 proc check_effective_target_arm_arch_v7ve_ok { } {
3774 if { [ string match "*-marm*" "-march=armv7ve" ] &&
3775 ![check_effective_target_arm_arm_ok] } {
3778 return [check_no_compiler_messages arm_arch_v7ve_ok assembly {
3779 #if !defined (__ARM_ARCH_7A__) || !defined (__ARM_FEATURE_IDIV)
3782 } "-march=armv7ve" ]
3785 proc add_options_for_arm_arch_v7ve { flags } {
3786 return "$flags -march=armv7ve"
3789 # Return 1 if this is an ARM target where -marm causes ARM to be
3792 proc check_effective_target_arm_arm_ok { } {
3793 return [check_no_compiler_messages arm_arm_ok assembly {
3794 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
3795 #error !__arm__ || __thumb__ || __thumb2__
3801 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
3804 proc check_effective_target_arm_thumb1_ok { } {
3805 return [check_no_compiler_messages arm_thumb1_ok assembly {
3806 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3807 #error !__arm__ || !__thumb__ || __thumb2__
3809 int foo (int i) { return i; }
3813 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
3816 proc check_effective_target_arm_thumb2_ok { } {
3817 return [check_no_compiler_messages arm_thumb2_ok assembly {
3818 #if !defined(__thumb2__)
3821 int foo (int i) { return i; }
3825 # Return 1 if this is an ARM target where Thumb-1 is used without options
3826 # added by the test.
3828 proc check_effective_target_arm_thumb1 { } {
3829 return [check_no_compiler_messages arm_thumb1 assembly {
3830 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3831 #error !__arm__ || !__thumb__ || __thumb2__
3837 # Return 1 if this is an ARM target where Thumb-2 is used without options
3838 # added by the test.
3840 proc check_effective_target_arm_thumb2 { } {
3841 return [check_no_compiler_messages arm_thumb2 assembly {
3842 #if !defined(__thumb2__)
3849 # Return 1 if this is an ARM target where conditional execution is available.
3851 proc check_effective_target_arm_cond_exec { } {
3852 return [check_no_compiler_messages arm_cond_exec assembly {
3853 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
3860 # Return 1 if this is an ARM cortex-M profile cpu
3862 proc check_effective_target_arm_cortex_m { } {
3863 if { ![istarget arm*-*-*] } {
3866 return [check_no_compiler_messages arm_cortex_m assembly {
3867 #if defined(__ARM_ARCH_ISA_ARM)
3868 #error __ARM_ARCH_ISA_ARM is defined
3874 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
3875 # used and MOVT/MOVW instructions to be available.
3877 proc check_effective_target_arm_thumb1_movt_ok {} {
3878 if [check_effective_target_arm_thumb1_ok] {
3879 return [check_no_compiler_messages arm_movt object {
3883 asm ("movt r0, #42");
3891 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
3892 # used and CBZ and CBNZ instructions are available.
3894 proc check_effective_target_arm_thumb1_cbz_ok {} {
3895 if [check_effective_target_arm_thumb1_ok] {
3896 return [check_no_compiler_messages arm_movt object {
3900 asm ("cbz r0, 2f\n2:");
3908 # Return 1 if this compilation turns on string_ops_prefer_neon on.
3910 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
3911 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
3912 int foo (void) { return 0; }
3913 } "-O2 -mprint-tune-info" ]
3916 # Return 1 if the target supports executing NEON instructions, 0
3917 # otherwise. Cache the result.
3919 proc check_effective_target_arm_neon_hw { } {
3920 return [check_runtime arm_neon_hw_available {
3924 long long a = 0, b = 1;
3925 asm ("vorr %P0, %P1, %P2"
3927 : "0" (a), "w" (b));
3930 } [add_options_for_arm_neon ""]]
3933 proc check_effective_target_arm_neonv2_hw { } {
3934 return [check_runtime arm_neon_hwv2_available {
3935 #include "arm_neon.h"
3939 float32x2_t a, b, c;
3940 asm ("vfma.f32 %P0, %P1, %P2"
3942 : "w" (b), "w" (c));
3945 } [add_options_for_arm_neonv2 ""]]
3948 # Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
3949 # otherwise. The test is valid for AArch64 and ARM. Record the command
3950 # line options needed.
3952 proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
3953 global et_arm_v8_1a_neon_flags
3954 set et_arm_v8_1a_neon_flags ""
3956 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
3960 # Iterate through sets of options to find the compiler flags that
3961 # need to be added to the -march option. Start with the empty set
3962 # since AArch64 only needs the -march setting.
3963 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
3964 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3965 if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object {
3966 #if !defined (__ARM_FEATURE_QRDMX)
3967 #error "__ARM_FEATURE_QRDMX not defined"
3969 } "$flags -march=armv8.1-a"] } {
3970 set et_arm_v8_1a_neon_flags "$flags -march=armv8.1-a"
3978 proc check_effective_target_arm_v8_1a_neon_ok { } {
3979 return [check_cached_effective_target arm_v8_1a_neon_ok \
3980 check_effective_target_arm_v8_1a_neon_ok_nocache]
3983 # Return 1 if the target supports ARMv8.2 scalar FP16 arithmetic
3984 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
3985 # Record the command line options needed.
3987 proc check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache { } {
3988 global et_arm_v8_2a_fp16_scalar_flags
3989 set et_arm_v8_2a_fp16_scalar_flags ""
3991 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
3995 # Iterate through sets of options to find the compiler flags that
3996 # need to be added to the -march option.
3997 foreach flags {"" "-mfpu=fp-armv8" "-mfloat-abi=softfp" \
3998 "-mfpu=fp-armv8 -mfloat-abi=softfp"} {
3999 if { [check_no_compiler_messages_nocache \
4000 arm_v8_2a_fp16_scalar_ok object {
4001 #if !defined (__ARM_FEATURE_FP16_SCALAR_ARITHMETIC)
4002 #error "__ARM_FEATURE_FP16_SCALAR_ARITHMETIC not defined"
4004 } "$flags -march=armv8.2-a+fp16"] } {
4005 set et_arm_v8_2a_fp16_scalar_flags "$flags -march=armv8.2-a+fp16"
4013 proc check_effective_target_arm_v8_2a_fp16_scalar_ok { } {
4014 return [check_cached_effective_target arm_v8_2a_fp16_scalar_ok \
4015 check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache]
4018 # Return 1 if the target supports ARMv8.2 Adv.SIMD FP16 arithmetic
4019 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4020 # Record the command line options needed.
4022 proc check_effective_target_arm_v8_2a_fp16_neon_ok_nocache { } {
4023 global et_arm_v8_2a_fp16_neon_flags
4024 set et_arm_v8_2a_fp16_neon_flags ""
4026 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4030 # Iterate through sets of options to find the compiler flags that
4031 # need to be added to the -march option.
4032 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4033 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4034 if { [check_no_compiler_messages_nocache \
4035 arm_v8_2a_fp16_neon_ok object {
4036 #if !defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
4037 #error "__ARM_FEATURE_FP16_VECTOR_ARITHMETIC not defined"
4039 } "$flags -march=armv8.2-a+fp16"] } {
4040 set et_arm_v8_2a_fp16_neon_flags "$flags -march=armv8.2-a+fp16"
4048 proc check_effective_target_arm_v8_2a_fp16_neon_ok { } {
4049 return [check_cached_effective_target arm_v8_2a_fp16_neon_ok \
4050 check_effective_target_arm_v8_2a_fp16_neon_ok_nocache]
4053 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
4056 proc check_effective_target_arm_v8_neon_hw { } {
4057 return [check_runtime arm_v8_neon_hw_available {
4058 #include "arm_neon.h"
4062 float32x2_t a = { 1.0f, 2.0f };
4063 #ifdef __ARM_ARCH_ISA_A64
4064 asm ("frinta %0.2s, %1.2s"
4068 asm ("vrinta.f32 %P0, %P1"
4072 return a[0] == 2.0f;
4074 } [add_options_for_arm_v8_neon ""]]
4077 # Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
4078 # otherwise. The test is valid for AArch64 and ARM.
4080 proc check_effective_target_arm_v8_1a_neon_hw { } {
4081 if { ![check_effective_target_arm_v8_1a_neon_ok] } {
4084 return [check_runtime arm_v8_1a_neon_hw_available {
4088 #ifdef __ARM_ARCH_ISA_A64
4089 __Int32x2_t a = {0, 1};
4090 __Int32x2_t b = {0, 2};
4093 asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
4096 : /* No clobbers. */);
4100 __simd64_int32_t a = {0, 1};
4101 __simd64_int32_t b = {0, 2};
4102 __simd64_int32_t result;
4104 asm ("vqrdmlah.s32 %P0, %P1, %P2"
4107 : /* No clobbers. */);
4112 } [add_options_for_arm_v8_1a_neon ""]]
4115 # Return 1 if the target supports executing floating point instructions from
4116 # ARMv8.2 with the FP16 extension, 0 otherwise. The test is valid for ARM and
4119 proc check_effective_target_arm_v8_2a_fp16_scalar_hw { } {
4120 if { ![check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
4123 return [check_runtime arm_v8_2a_fp16_scalar_hw_available {
4130 #ifdef __ARM_ARCH_ISA_A64
4132 asm ("fabs %h0, %h1"
4135 : /* No clobbers. */);
4139 asm ("vabs.f16 %0, %1"
4142 : /* No clobbers. */);
4146 return (result == 1.0) ? 0 : 1;
4148 } [add_options_for_arm_v8_2a_fp16_scalar ""]]
4151 # Return 1 if the target supports executing Adv.SIMD instructions from ARMv8.2
4152 # with the FP16 extension, 0 otherwise. The test is valid for ARM and for
4155 proc check_effective_target_arm_v8_2a_fp16_neon_hw { } {
4156 if { ![check_effective_target_arm_v8_2a_fp16_neon_ok] } {
4159 return [check_runtime arm_v8_2a_fp16_neon_hw_available {
4163 #ifdef __ARM_ARCH_ISA_A64
4165 __Float16x4_t a = {1.0, -1.0, 1.0, -1.0};
4166 __Float16x4_t result;
4168 asm ("fabs %0.4h, %1.4h"
4171 : /* No clobbers. */);
4175 __simd64_float16_t a = {1.0, -1.0, 1.0, -1.0};
4176 __simd64_float16_t result;
4178 asm ("vabs.f16 %P0, %P1"
4181 : /* No clobbers. */);
4185 return (result[0] == 1.0) ? 0 : 1;
4187 } [add_options_for_arm_v8_2a_fp16_neon ""]]
4190 # Return 1 if this is a ARM target with NEON enabled.
4192 proc check_effective_target_arm_neon { } {
4193 if { [check_effective_target_arm32] } {
4194 return [check_no_compiler_messages arm_neon object {
4195 #ifndef __ARM_NEON__
4206 proc check_effective_target_arm_neonv2 { } {
4207 if { [check_effective_target_arm32] } {
4208 return [check_no_compiler_messages arm_neon object {
4209 #ifndef __ARM_NEON__
4212 #ifndef __ARM_FEATURE_FMA
4224 # Return 1 if this is an ARM target with load acquire and store release
4225 # instructions for 8-, 16- and 32-bit types.
4227 proc check_effective_target_arm_acq_rel { } {
4228 return [check_no_compiler_messages arm_acq_rel object {
4230 load_acquire_store_release (void)
4232 asm ("lda r0, [r1]\n\t"
4238 : : : "r0", "memory");
4243 # Add the options needed for MIPS Paired-Single.
4245 proc add_options_for_mpaired_single { flags } {
4246 if { ! [check_effective_target_mpaired_single] } {
4249 return "$flags -mpaired-single"
4252 # Add the options needed for MIPS SIMD Architecture.
4254 proc add_options_for_mips_msa { flags } {
4255 if { ! [check_effective_target_mips_msa] } {
4258 return "$flags -mmsa"
4261 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
4262 # the Loongson vector modes.
4264 proc check_effective_target_mips_loongson { } {
4265 return [check_no_compiler_messages loongson assembly {
4266 #if !defined(__mips_loongson_vector_rev)
4267 #error !__mips_loongson_vector_rev
4272 # Return 1 if this is a MIPS target that supports the legacy NAN.
4274 proc check_effective_target_mips_nanlegacy { } {
4275 return [check_no_compiler_messages nanlegacy assembly {
4277 int main () { return 0; }
4281 # Return 1 if an MSA program can be compiled to object
4283 proc check_effective_target_mips_msa { } {
4284 if ![check_effective_target_nomips16] {
4287 return [check_no_compiler_messages msa object {
4288 #if !defined(__mips_msa)
4289 #error "MSA NOT AVAIL"
4291 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
4292 #error "MSA NOT AVAIL FOR ISA REV < 2"
4294 #if !defined(__mips_hard_float)
4295 #error "MSA HARD_FLOAT REQUIRED"
4297 #if __mips_fpr != 64
4298 #error "MSA 64-bit FPR REQUIRED"
4304 v8i16 v = __builtin_msa_ldi_h (1);
4312 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
4315 proc check_effective_target_arm_eabi { } {
4316 return [check_no_compiler_messages arm_eabi object {
4317 #ifndef __ARM_EABI__
4325 # Return 1 if this is an ARM target that adheres to the hard-float variant of
4326 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
4328 proc check_effective_target_arm_hf_eabi { } {
4329 return [check_no_compiler_messages arm_hf_eabi object {
4330 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
4331 #error not hard-float EABI
4338 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
4339 # Some multilibs may be incompatible with this option.
4341 proc check_effective_target_arm_iwmmxt_ok { } {
4342 if { [check_effective_target_arm32] } {
4343 return [check_no_compiler_messages arm_iwmmxt_ok object {
4351 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
4352 # for an ARM target.
4353 proc check_effective_target_arm_prefer_ldrd_strd { } {
4354 if { ![check_effective_target_arm32] } {
4358 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
4359 void foo (void) { __asm__ ("" ::: "r4", "r5"); }
4363 # Return 1 if this is a PowerPC target supporting -meabi.
4365 proc check_effective_target_powerpc_eabi_ok { } {
4366 if { [istarget powerpc*-*-*] } {
4367 return [check_no_compiler_messages powerpc_eabi_ok object {
4375 # Return 1 if this is a PowerPC target with floating-point registers.
4377 proc check_effective_target_powerpc_fprs { } {
4378 if { [istarget powerpc*-*-*]
4379 || [istarget rs6000-*-*] } {
4380 return [check_no_compiler_messages powerpc_fprs object {
4392 # Return 1 if this is a PowerPC target with hardware double-precision
4395 proc check_effective_target_powerpc_hard_double { } {
4396 if { [istarget powerpc*-*-*]
4397 || [istarget rs6000-*-*] } {
4398 return [check_no_compiler_messages powerpc_hard_double object {
4410 # Return 1 if this is a PowerPC target supporting -maltivec.
4412 proc check_effective_target_powerpc_altivec_ok { } {
4413 if { ([istarget powerpc*-*-*]
4414 && ![istarget powerpc-*-linux*paired*])
4415 || [istarget rs6000-*-*] } {
4416 # AltiVec is not supported on AIX before 5.3.
4417 if { [istarget powerpc*-*-aix4*]
4418 || [istarget powerpc*-*-aix5.1*]
4419 || [istarget powerpc*-*-aix5.2*] } {
4422 return [check_no_compiler_messages powerpc_altivec_ok object {
4430 # Return 1 if this is a PowerPC target supporting -mpower8-vector
4432 proc check_effective_target_powerpc_p8vector_ok { } {
4433 if { ([istarget powerpc*-*-*]
4434 && ![istarget powerpc-*-linux*paired*])
4435 || [istarget rs6000-*-*] } {
4436 # AltiVec is not supported on AIX before 5.3.
4437 if { [istarget powerpc*-*-aix4*]
4438 || [istarget powerpc*-*-aix5.1*]
4439 || [istarget powerpc*-*-aix5.2*] } {
4442 return [check_no_compiler_messages powerpc_p8vector_ok object {
4445 asm volatile ("xxlorc vs0,vs0,vs0");
4447 asm volatile ("xxlorc 0,0,0");
4451 } "-mpower8-vector"]
4457 # Return 1 if this is a PowerPC target supporting -mpower9-vector
4459 proc check_effective_target_powerpc_p9vector_ok { } {
4460 if { ([istarget powerpc*-*-*]
4461 && ![istarget powerpc-*-linux*paired*])
4462 || [istarget rs6000-*-*] } {
4463 # AltiVec is not supported on AIX before 5.3.
4464 if { [istarget powerpc*-*-aix4*]
4465 || [istarget powerpc*-*-aix5.1*]
4466 || [istarget powerpc*-*-aix5.2*] } {
4469 return [check_no_compiler_messages powerpc_p9vector_ok object {
4472 vector double v = (vector double) { 0.0, 0.0 };
4473 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
4476 } "-mpower9-vector"]
4482 # Return 1 if this is a PowerPC target supporting -mmodulo
4484 proc check_effective_target_powerpc_p9modulo_ok { } {
4485 if { ([istarget powerpc*-*-*]
4486 && ![istarget powerpc-*-linux*paired*])
4487 || [istarget rs6000-*-*] } {
4488 # AltiVec is not supported on AIX before 5.3.
4489 if { [istarget powerpc*-*-aix4*]
4490 || [istarget powerpc*-*-aix5.1*]
4491 || [istarget powerpc*-*-aix5.2*] } {
4494 return [check_no_compiler_messages powerpc_p9modulo_ok object {
4496 int i = 5, j = 3, r = -1;
4497 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
4506 # Return 1 if this is a PowerPC target supporting -mfloat128 via either
4507 # software emulation on power7/power8 systems or hardware support on power9.
4509 proc check_effective_target_powerpc_float128_sw_ok { } {
4510 if { ([istarget powerpc*-*-*]
4511 && ![istarget powerpc-*-linux*paired*])
4512 || [istarget rs6000-*-*] } {
4513 # AltiVec is not supported on AIX before 5.3.
4514 if { [istarget powerpc*-*-aix4*]
4515 || [istarget powerpc*-*-aix5.1*]
4516 || [istarget powerpc*-*-aix5.2*] } {
4519 return [check_no_compiler_messages powerpc_float128_sw_ok object {
4520 volatile __float128 x = 1.0q;
4521 volatile __float128 y = 2.0q;
4523 __float128 z = x + y;
4526 } "-mfloat128 -mvsx"]
4532 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
4533 # support on power9.
4535 proc check_effective_target_powerpc_float128_hw_ok { } {
4536 if { ([istarget powerpc*-*-*]
4537 && ![istarget powerpc-*-linux*paired*])
4538 || [istarget rs6000-*-*] } {
4539 # AltiVec is not supported on AIX before 5.3.
4540 if { [istarget powerpc*-*-aix4*]
4541 || [istarget powerpc*-*-aix5.1*]
4542 || [istarget powerpc*-*-aix5.2*] } {
4545 return [check_no_compiler_messages powerpc_float128_hw_ok object {
4546 volatile __float128 x = 1.0q;
4547 volatile __float128 y = 2.0q;
4550 __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
4553 } "-mfloat128-hardware"]
4559 # Return 1 if this is a PowerPC target supporting -mvsx
4561 proc check_effective_target_powerpc_vsx_ok { } {
4562 if { ([istarget powerpc*-*-*]
4563 && ![istarget powerpc-*-linux*paired*])
4564 || [istarget rs6000-*-*] } {
4565 # VSX is not supported on AIX before 7.1.
4566 if { [istarget powerpc*-*-aix4*]
4567 || [istarget powerpc*-*-aix5*]
4568 || [istarget powerpc*-*-aix6*] } {
4571 return [check_no_compiler_messages powerpc_vsx_ok object {
4574 asm volatile ("xxlor vs0,vs0,vs0");
4576 asm volatile ("xxlor 0,0,0");
4586 # Return 1 if this is a PowerPC target supporting -mhtm
4588 proc check_effective_target_powerpc_htm_ok { } {
4589 if { ([istarget powerpc*-*-*]
4590 && ![istarget powerpc-*-linux*paired*])
4591 || [istarget rs6000-*-*] } {
4592 # HTM is not supported on AIX yet.
4593 if { [istarget powerpc*-*-aix*] } {
4596 return [check_no_compiler_messages powerpc_htm_ok object {
4598 asm volatile ("tbegin. 0");
4607 # Return 1 if the target supports executing HTM hardware instructions,
4608 # 0 otherwise. Cache the result.
4610 proc check_htm_hw_available { } {
4611 return [check_cached_effective_target htm_hw_available {
4612 # For now, disable on Darwin
4613 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
4616 check_runtime_nocache htm_hw_available {
4626 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
4628 proc check_effective_target_powerpc_ppu_ok { } {
4629 if [check_effective_target_powerpc_altivec_ok] {
4630 return [check_no_compiler_messages cell_asm_available object {
4633 asm volatile ("lvlx v0,v0,v0");
4635 asm volatile ("lvlx 0,0,0");
4645 # Return 1 if this is a PowerPC target that supports SPU.
4647 proc check_effective_target_powerpc_spu { } {
4648 if { [istarget powerpc*-*-linux*] } {
4649 return [check_effective_target_powerpc_altivec_ok]
4655 # Return 1 if this is a PowerPC SPE target. The check includes options
4656 # specified by dg-options for this test, so don't cache the result.
4658 proc check_effective_target_powerpc_spe_nocache { } {
4659 if { [istarget powerpc*-*-*] } {
4660 return [check_no_compiler_messages_nocache powerpc_spe object {
4666 } [current_compiler_flags]]
4672 # Return 1 if this is a PowerPC target with SPE enabled.
4674 proc check_effective_target_powerpc_spe { } {
4675 if { [istarget powerpc*-*-*] } {
4676 return [check_no_compiler_messages powerpc_spe object {
4688 # Return 1 if this is a PowerPC target with Altivec enabled.
4690 proc check_effective_target_powerpc_altivec { } {
4691 if { [istarget powerpc*-*-*] } {
4692 return [check_no_compiler_messages powerpc_altivec object {
4704 # Return 1 if this is a PowerPC 405 target. The check includes options
4705 # specified by dg-options for this test, so don't cache the result.
4707 proc check_effective_target_powerpc_405_nocache { } {
4708 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
4709 return [check_no_compiler_messages_nocache powerpc_405 object {
4715 } [current_compiler_flags]]
4721 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
4723 proc check_effective_target_powerpc_elfv2 { } {
4724 if { [istarget powerpc*-*-*] } {
4725 return [check_no_compiler_messages powerpc_elfv2 object {
4727 #error not ELF v2 ABI
4737 # Return 1 if this is a SPU target with a toolchain that
4738 # supports automatic overlay generation.
4740 proc check_effective_target_spu_auto_overlay { } {
4741 if { [istarget spu*-*-elf*] } {
4742 return [check_no_compiler_messages spu_auto_overlay executable {
4744 } "-Wl,--auto-overlay" ]
4750 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
4751 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
4752 # test environment appears to run executables on such a simulator.
4754 proc check_effective_target_ultrasparc_hw { } {
4755 return [check_runtime ultrasparc_hw {
4756 int main() { return 0; }
4757 } "-mcpu=ultrasparc"]
4760 # Return 1 if the test environment supports executing UltraSPARC VIS2
4761 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
4763 proc check_effective_target_ultrasparc_vis2_hw { } {
4764 return [check_runtime ultrasparc_vis2_hw {
4765 int main() { __asm__(".word 0x81b00320"); return 0; }
4766 } "-mcpu=ultrasparc3"]
4769 # Return 1 if the test environment supports executing UltraSPARC VIS3
4770 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
4772 proc check_effective_target_ultrasparc_vis3_hw { } {
4773 return [check_runtime ultrasparc_vis3_hw {
4774 int main() { __asm__(".word 0x81b00220"); return 0; }
4778 # Return 1 if this is a SPARC-V9 target.
4780 proc check_effective_target_sparc_v9 { } {
4781 if { [istarget sparc*-*-*] } {
4782 return [check_no_compiler_messages sparc_v9 object {
4784 asm volatile ("return %i7+8");
4793 # Return 1 if this is a SPARC target with VIS enabled.
4795 proc check_effective_target_sparc_vis { } {
4796 if { [istarget sparc*-*-*] } {
4797 return [check_no_compiler_messages sparc_vis object {
4809 # Return 1 if the target supports hardware vector shift operation.
4811 proc check_effective_target_vect_shift { } {
4812 global et_vect_shift_saved
4815 if [info exists et_vect_shift_saved($et_index)] {
4816 verbose "check_effective_target_vect_shift: using cached result" 2
4818 set et_vect_shift_saved($et_index) 0
4819 if { ([istarget powerpc*-*-*]
4820 && ![istarget powerpc-*-linux*paired*])
4821 || [istarget ia64-*-*]
4822 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4823 || [istarget aarch64*-*-*]
4824 || [check_effective_target_arm32]
4825 || ([istarget mips*-*-*]
4826 && ([et-is-effective-target mips_msa]
4827 || [et-is-effective-target mips_loongson])) } {
4828 set et_vect_shift_saved($et_index) 1
4832 verbose "check_effective_target_vect_shift:\
4833 returning $et_vect_shift_saved($et_index)" 2
4834 return $et_vect_shift_saved($et_index)
4837 proc check_effective_target_whole_vector_shift { } {
4838 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4839 || [istarget ia64-*-*]
4840 || [istarget aarch64*-*-*]
4841 || [istarget powerpc64*-*-*]
4842 || ([check_effective_target_arm32]
4843 && [check_effective_target_arm_little_endian])
4844 || ([istarget mips*-*-*]
4845 && [et-is-effective-target mips_loongson]) } {
4851 verbose "check_effective_target_vect_long: returning $answer" 2
4855 # Return 1 if the target supports vector bswap operations.
4857 proc check_effective_target_vect_bswap { } {
4858 global et_vect_bswap_saved
4861 if [info exists et_vect_bswap_saved($et_index)] {
4862 verbose "check_effective_target_vect_bswap: using cached result" 2
4864 set et_vect_bswap_saved($et_index) 0
4865 if { [istarget aarch64*-*-*]
4866 || ([istarget arm*-*-*]
4867 && [check_effective_target_arm_neon])
4869 set et_vect_bswap_saved($et_index) 1
4873 verbose "check_effective_target_vect_bswap:\
4874 returning $et_vect_bswap_saved($et_index)" 2
4875 return $et_vect_bswap_saved($et_index)
4878 # Return 1 if the target supports hardware vector shift operation for char.
4880 proc check_effective_target_vect_shift_char { } {
4881 global et_vect_shift_char_saved
4884 if [info exists et_vect_shift_char_saved($et_index)] {
4885 verbose "check_effective_target_vect_shift_char: using cached result" 2
4887 set et_vect_shift_char_saved($et_index) 0
4888 if { ([istarget powerpc*-*-*]
4889 && ![istarget powerpc-*-linux*paired*])
4890 || [check_effective_target_arm32]
4891 || ([istarget mips*-*-*]
4892 && [et-is-effective-target mips_msa]) } {
4893 set et_vect_shift_char_saved($et_index) 1
4897 verbose "check_effective_target_vect_shift_char:\
4898 returning $et_vect_shift_char_saved($et_index)" 2
4899 return $et_vect_shift_char_saved($et_index)
4902 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
4904 # This can change for different subtargets so do not cache the result.
4906 proc check_effective_target_vect_long { } {
4907 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4908 || (([istarget powerpc*-*-*]
4909 && ![istarget powerpc-*-linux*paired*])
4910 && [check_effective_target_ilp32])
4911 || [check_effective_target_arm32]
4912 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
4913 || [istarget aarch64*-*-*]
4914 || ([istarget mips*-*-*]
4915 && [et-is-effective-target mips_msa]) } {
4921 verbose "check_effective_target_vect_long: returning $answer" 2
4925 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
4927 # This won't change for different subtargets so cache the result.
4929 proc check_effective_target_vect_float { } {
4930 global et_vect_float_saved
4933 if [info exists et_vect_float_saved($et_index)] {
4934 verbose "check_effective_target_vect_float: using cached result" 2
4936 set et_vect_float_saved($et_index) 0
4937 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4938 || [istarget powerpc*-*-*]
4939 || [istarget spu-*-*]
4940 || [istarget mips-sde-elf]
4941 || [istarget mipsisa64*-*-*]
4942 || [istarget ia64-*-*]
4943 || [istarget aarch64*-*-*]
4944 || ([istarget mips*-*-*]
4945 && [et-is-effective-target mips_msa])
4946 || [check_effective_target_arm32] } {
4947 set et_vect_float_saved($et_index) 1
4951 verbose "check_effective_target_vect_float:\
4952 returning $et_vect_float_saved($et_index)" 2
4953 return $et_vect_float_saved($et_index)
4956 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
4958 # This won't change for different subtargets so cache the result.
4960 proc check_effective_target_vect_double { } {
4961 global et_vect_double_saved
4964 if [info exists et_vect_double_saved($et_index)] {
4965 verbose "check_effective_target_vect_double: using cached result" 2
4967 set et_vect_double_saved($et_index) 0
4968 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
4969 && [check_no_compiler_messages vect_double assembly {
4970 #ifdef __tune_atom__
4971 # error No double vectorizer support.
4974 || [istarget aarch64*-*-*]
4975 || [istarget spu-*-*]
4976 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
4977 || ([istarget mips*-*-*]
4978 && [et-is-effective-target mips_msa]) } {
4979 set et_vect_double_saved($et_index) 1
4983 verbose "check_effective_target_vect_double:\
4984 returning $et_vect_double_saved($et_index)" 2
4985 return $et_vect_double_saved($et_index)
4988 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
4990 # This won't change for different subtargets so cache the result.
4992 proc check_effective_target_vect_long_long { } {
4993 global et_vect_long_long_saved
4996 if [info exists et_vect_long_long_saved($et_index)] {
4997 verbose "check_effective_target_vect_long_long: using cached result" 2
4999 set et_vect_long_long_saved($et_index) 0
5000 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5001 || ([istarget mips*-*-*]
5002 && [et-is-effective-target mips_msa]) } {
5003 set et_vect_long_long_saved($et_index) 1
5007 verbose "check_effective_target_vect_long_long:\
5008 returning $et_vect_long_long_saved($et_index)" 2
5009 return $et_vect_long_long_saved($et_index)
5013 # Return 1 if the target plus current options does not support a vector
5014 # max instruction on "int", 0 otherwise.
5016 # This won't change for different subtargets so cache the result.
5018 proc check_effective_target_vect_no_int_min_max { } {
5019 global et_vect_no_int_min_max_saved
5022 if [info exists et_vect_no_int_min_max_saved($et_index)] {
5023 verbose "check_effective_target_vect_no_int_min_max:\
5024 using cached result" 2
5026 set et_vect_no_int_min_max_saved($et_index) 0
5027 if { [istarget sparc*-*-*]
5028 || [istarget spu-*-*]
5029 || [istarget alpha*-*-*]
5030 || ([istarget mips*-*-*]
5031 && [et-is-effective-target mips_loongson]) } {
5032 set et_vect_no_int_min_max_saved($et_index) 1
5035 verbose "check_effective_target_vect_no_int_min_max:\
5036 returning $et_vect_no_int_min_max_saved($et_index)" 2
5037 return $et_vect_no_int_min_max_saved($et_index)
5040 # Return 1 if the target plus current options does not support a vector
5041 # add instruction on "int", 0 otherwise.
5043 # This won't change for different subtargets so cache the result.
5045 proc check_effective_target_vect_no_int_add { } {
5046 global et_vect_no_int_add_saved
5049 if [info exists et_vect_no_int_add_saved($et_index)] {
5050 verbose "check_effective_target_vect_no_int_add: using cached result" 2
5052 set et_vect_no_int_add_saved($et_index) 0
5053 # Alpha only supports vector add on V8QI and V4HI.
5054 if { [istarget alpha*-*-*] } {
5055 set et_vect_no_int_add_saved($et_index) 1
5058 verbose "check_effective_target_vect_no_int_add:\
5059 returning $et_vect_no_int_add_saved($et_index)" 2
5060 return $et_vect_no_int_add_saved($et_index)
5063 # Return 1 if the target plus current options does not support vector
5064 # bitwise instructions, 0 otherwise.
5066 # This won't change for different subtargets so cache the result.
5068 proc check_effective_target_vect_no_bitwise { } {
5069 global et_vect_no_bitwise_saved
5072 if [info exists et_vect_no_bitwise_saved($et_index)] {
5073 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
5075 set et_vect_no_bitwise_saved($et_index) 0
5077 verbose "check_effective_target_vect_no_bitwise:\
5078 returning $et_vect_no_bitwise_saved($et_index)" 2
5079 return $et_vect_no_bitwise_saved($et_index)
5082 # Return 1 if the target plus current options supports vector permutation,
5085 # This won't change for different subtargets so cache the result.
5087 proc check_effective_target_vect_perm { } {
5088 global et_vect_perm_saved
5091 if [info exists et_vect_perm_saved($et_index)] {
5092 verbose "check_effective_target_vect_perm: using cached result" 2
5094 set et_vect_perm_saved($et_index) 0
5095 if { [is-effective-target arm_neon_ok]
5096 || [istarget aarch64*-*-*]
5097 || [istarget powerpc*-*-*]
5098 || [istarget spu-*-*]
5099 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5100 || ([istarget mips*-*-*]
5101 && ([et-is-effective-target mpaired_single]
5102 || [et-is-effective-target mips_msa])) } {
5103 set et_vect_perm_saved($et_index) 1
5106 verbose "check_effective_target_vect_perm:\
5107 returning $et_vect_perm_saved($et_index)" 2
5108 return $et_vect_perm_saved($et_index)
5111 # Return 1 if the target plus current options supports vector permutation
5112 # on byte-sized elements, 0 otherwise.
5114 # This won't change for different subtargets so cache the result.
5116 proc check_effective_target_vect_perm_byte { } {
5117 global et_vect_perm_byte_saved
5120 if [info exists et_vect_perm_byte_saved($et_index)] {
5121 verbose "check_effective_target_vect_perm_byte: using cached result" 2
5123 set et_vect_perm_byte_saved($et_index) 0
5124 if { ([is-effective-target arm_neon_ok]
5125 && [is-effective-target arm_little_endian])
5126 || ([istarget aarch64*-*-*]
5127 && [is-effective-target aarch64_little_endian])
5128 || [istarget powerpc*-*-*]
5129 || [istarget spu-*-*]
5130 || ([istarget mips-*.*]
5131 && [et-is-effective-target mips_msa]) } {
5132 set et_vect_perm_byte_saved($et_index) 1
5135 verbose "check_effective_target_vect_perm_byte:\
5136 returning $et_vect_perm_byte_saved($et_index)" 2
5137 return $et_vect_perm_byte_saved($et_index)
5140 # Return 1 if the target plus current options supports vector permutation
5141 # on short-sized elements, 0 otherwise.
5143 # This won't change for different subtargets so cache the result.
5145 proc check_effective_target_vect_perm_short { } {
5146 global et_vect_perm_short_saved
5149 if [info exists et_vect_perm_short_saved($et_index)] {
5150 verbose "check_effective_target_vect_perm_short: using cached result" 2
5152 set et_vect_perm_short_saved($et_index) 0
5153 if { ([is-effective-target arm_neon_ok]
5154 && [is-effective-target arm_little_endian])
5155 || ([istarget aarch64*-*-*]
5156 && [is-effective-target aarch64_little_endian])
5157 || [istarget powerpc*-*-*]
5158 || [istarget spu-*-*]
5159 || ([istarget mips*-*-*]
5160 && [et-is-effective-target mips_msa]) } {
5161 set et_vect_perm_short_saved($et_index) 1
5164 verbose "check_effective_target_vect_perm_short:\
5165 returning $et_vect_perm_short_saved($et_index)" 2
5166 return $et_vect_perm_short_saved($et_index)
5169 # Return 1 if the target plus current options supports a vector
5170 # widening summation of *short* args into *int* result, 0 otherwise.
5172 # This won't change for different subtargets so cache the result.
5174 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
5175 global et_vect_widen_sum_hi_to_si_pattern_saved
5178 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved($et_index)] {
5179 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5180 using cached result" 2
5182 set et_vect_widen_sum_hi_to_si_pattern_saved($et_index) 0
5183 if { [istarget powerpc*-*-*]
5184 || [istarget aarch64*-*-*]
5185 || ([istarget arm*-*-*] &&
5186 [check_effective_target_arm_neon_ok])
5187 || [istarget ia64-*-*] } {
5188 set et_vect_widen_sum_hi_to_si_pattern_saved($et_index) 1
5191 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5192 returning $et_vect_widen_sum_hi_to_si_pattern_saved($et_index)" 2
5193 return $et_vect_widen_sum_hi_to_si_pattern_saved($et_index)
5196 # Return 1 if the target plus current options supports a vector
5197 # widening summation of *short* args into *int* result, 0 otherwise.
5198 # A target can also support this widening summation if it can support
5199 # promotion (unpacking) from shorts to ints.
5201 # This won't change for different subtargets so cache the result.
5203 proc check_effective_target_vect_widen_sum_hi_to_si { } {
5204 global et_vect_widen_sum_hi_to_si_saved
5207 if [info exists et_vect_widen_sum_hi_to_si_saved($et_index)] {
5208 verbose "check_effective_target_vect_widen_sum_hi_to_si:\
5209 using cached result" 2
5211 set et_vect_widen_sum_hi_to_si_saved($et_index) \
5212 [check_effective_target_vect_unpack]
5213 if { [istarget powerpc*-*-*]
5214 || [istarget ia64-*-*] } {
5215 set et_vect_widen_sum_hi_to_si_saved($et_index) 1
5218 verbose "check_effective_target_vect_widen_sum_hi_to_si:\
5219 returning $et_vect_widen_sum_hi_to_si_saved($et_index)" 2
5220 return $et_vect_widen_sum_hi_to_si_saved($et_index)
5223 # Return 1 if the target plus current options supports a vector
5224 # widening summation of *char* args into *short* result, 0 otherwise.
5225 # A target can also support this widening summation if it can support
5226 # promotion (unpacking) from chars to shorts.
5228 # This won't change for different subtargets so cache the result.
5230 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
5231 global et_vect_widen_sum_qi_to_hi_saved
5234 if [info exists et_vect_widen_sum_qi_to_hi_saved($et_index)] {
5235 verbose "check_effective_target_vect_widen_sum_qi_to_hi:\
5236 using cached result" 2
5238 set et_vect_widen_sum_qi_to_hi_saved($et_index) 0
5239 if { [check_effective_target_vect_unpack]
5240 || [check_effective_target_arm_neon_ok]
5241 || [istarget ia64-*-*] } {
5242 set et_vect_widen_sum_qi_to_hi_saved($et_index) 1
5245 verbose "check_effective_target_vect_widen_sum_qi_to_hi:\
5246 returning $et_vect_widen_sum_qi_to_hi_saved($et_index)" 2
5247 return $et_vect_widen_sum_qi_to_hi_saved($et_index)
5250 # Return 1 if the target plus current options supports a vector
5251 # widening summation of *char* args into *int* result, 0 otherwise.
5253 # This won't change for different subtargets so cache the result.
5255 proc check_effective_target_vect_widen_sum_qi_to_si { } {
5256 global et_vect_widen_sum_qi_to_si_saved
5259 if [info exists et_vect_widen_sum_qi_to_si_saved($et_index)] {
5260 verbose "check_effective_target_vect_widen_sum_qi_to_si:\
5261 using cached result" 2
5263 set et_vect_widen_sum_qi_to_si_saved($et_index) 0
5264 if { [istarget powerpc*-*-*] } {
5265 set et_vect_widen_sum_qi_to_si_saved($et_index) 1
5268 verbose "check_effective_target_vect_widen_sum_qi_to_si:\
5269 returning $et_vect_widen_sum_qi_to_si_saved($et_index)" 2
5270 return $et_vect_widen_sum_qi_to_si_saved($et_index)
5273 # Return 1 if the target plus current options supports a vector
5274 # widening multiplication of *char* args into *short* result, 0 otherwise.
5275 # A target can also support this widening multplication if it can support
5276 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
5277 # multiplication of shorts).
5279 # This won't change for different subtargets so cache the result.
5282 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
5283 global et_vect_widen_mult_qi_to_hi_saved
5286 if [info exists et_vect_widen_mult_qi_to_hi_saved($et_index)] {
5287 verbose "check_effective_target_vect_widen_mult_qi_to_hi:\
5288 using cached result" 2
5290 if { [check_effective_target_vect_unpack]
5291 && [check_effective_target_vect_short_mult] } {
5292 set et_vect_widen_mult_qi_to_hi_saved($et_index) 1
5294 set et_vect_widen_mult_qi_to_hi_saved($et_index) 0
5296 if { [istarget powerpc*-*-*]
5297 || [istarget aarch64*-*-*]
5298 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
5299 set et_vect_widen_mult_qi_to_hi_saved($et_index) 1
5302 verbose "check_effective_target_vect_widen_mult_qi_to_hi:\
5303 returning $et_vect_widen_mult_qi_to_hi_saved($et_index)" 2
5304 return $et_vect_widen_mult_qi_to_hi_saved($et_index)
5307 # Return 1 if the target plus current options supports a vector
5308 # widening multiplication of *short* args into *int* result, 0 otherwise.
5309 # A target can also support this widening multplication if it can support
5310 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
5311 # multiplication of ints).
5313 # This won't change for different subtargets so cache the result.
5316 proc check_effective_target_vect_widen_mult_hi_to_si { } {
5317 global et_vect_widen_mult_hi_to_si_saved
5320 if [info exists et_vect_widen_mult_hi_to_si_saved($et_index)] {
5321 verbose "check_effective_target_vect_widen_mult_hi_to_si:\
5322 using cached result" 2
5324 if { [check_effective_target_vect_unpack]
5325 && [check_effective_target_vect_int_mult] } {
5326 set et_vect_widen_mult_hi_to_si_saved($et_index) 1
5328 set et_vect_widen_mult_hi_to_si_saved($et_index) 0
5330 if { [istarget powerpc*-*-*]
5331 || [istarget spu-*-*]
5332 || [istarget ia64-*-*]
5333 || [istarget aarch64*-*-*]
5334 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5335 || ([istarget arm*-*-*]
5336 && [check_effective_target_arm_neon_ok]) } {
5337 set et_vect_widen_mult_hi_to_si_saved($et_index) 1
5340 verbose "check_effective_target_vect_widen_mult_hi_to_si:\
5341 returning $et_vect_widen_mult_hi_to_si_saved($et_index)" 2
5342 return $et_vect_widen_mult_hi_to_si_saved($et_index)
5345 # Return 1 if the target plus current options supports a vector
5346 # widening multiplication of *char* args into *short* result, 0 otherwise.
5348 # This won't change for different subtargets so cache the result.
5350 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
5351 global et_vect_widen_mult_qi_to_hi_pattern_saved
5354 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)] {
5355 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
5356 using cached result" 2
5358 set et_vect_widen_mult_qi_to_hi_pattern_saved($et_index) 0
5359 if { [istarget powerpc*-*-*]
5360 || ([istarget arm*-*-*]
5361 && [check_effective_target_arm_neon_ok]
5362 && [check_effective_target_arm_little_endian]) } {
5363 set et_vect_widen_mult_qi_to_hi_pattern_saved($et_index) 1
5366 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
5367 returning $et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)" 2
5368 return $et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)
5371 # Return 1 if the target plus current options supports a vector
5372 # widening multiplication of *short* args into *int* result, 0 otherwise.
5374 # This won't change for different subtargets so cache the result.
5376 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
5377 global et_vect_widen_mult_hi_to_si_pattern_saved
5380 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved($et_index)] {
5381 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern:\
5382 using cached result" 2
5384 set et_vect_widen_mult_hi_to_si_pattern_saved($et_index) 0
5385 if { [istarget powerpc*-*-*]
5386 || [istarget spu-*-*]
5387 || [istarget ia64-*-*]
5388 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5389 || ([istarget arm*-*-*]
5390 && [check_effective_target_arm_neon_ok]
5391 && [check_effective_target_arm_little_endian]) } {
5392 set et_vect_widen_mult_hi_to_si_pattern_saved($et_index) 1
5395 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern:\
5396 returning $et_vect_widen_mult_hi_to_si_pattern_saved($et_index)" 2
5397 return $et_vect_widen_mult_hi_to_si_pattern_saved($et_index)
5400 # Return 1 if the target plus current options supports a vector
5401 # widening multiplication of *int* args into *long* result, 0 otherwise.
5403 # This won't change for different subtargets so cache the result.
5405 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
5406 global et_vect_widen_mult_si_to_di_pattern_saved
5409 if [info exists et_vect_widen_mult_si_to_di_pattern_saved($et_index)] {
5410 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern:\
5411 using cached result" 2
5413 set et_vect_widen_mult_si_to_di_pattern_saved($et_index) 0
5414 if {[istarget ia64-*-*]
5415 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
5416 set et_vect_widen_mult_si_to_di_pattern_saved($et_index) 1
5419 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern:\
5420 returning $et_vect_widen_mult_si_to_di_pattern_saved($et_index)" 2
5421 return $et_vect_widen_mult_si_to_di_pattern_saved($et_index)
5424 # Return 1 if the target plus current options supports a vector
5425 # widening shift, 0 otherwise.
5427 # This won't change for different subtargets so cache the result.
5429 proc check_effective_target_vect_widen_shift { } {
5430 global et_vect_widen_shift_saved
5433 if [info exists et_vect_shift_saved($et_index)] {
5434 verbose "check_effective_target_vect_widen_shift: using cached result" 2
5436 set et_vect_widen_shift_saved($et_index) 0
5437 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
5438 set et_vect_widen_shift_saved($et_index) 1
5441 verbose "check_effective_target_vect_widen_shift:\
5442 returning $et_vect_widen_shift_saved($et_index)" 2
5443 return $et_vect_widen_shift_saved($et_index)
5446 # Return 1 if the target plus current options supports a vector
5447 # dot-product of signed chars, 0 otherwise.
5449 # This won't change for different subtargets so cache the result.
5451 proc check_effective_target_vect_sdot_qi { } {
5452 global et_vect_sdot_qi_saved
5455 if [info exists et_vect_sdot_qi_saved($et_index)] {
5456 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
5458 set et_vect_sdot_qi_saved($et_index) 0
5459 if { [istarget ia64-*-*]
5460 || ([istarget mips*-*-*]
5461 && [et-is-effective-target mips_msa]) } {
5462 set et_vect_udot_qi_saved 1
5465 verbose "check_effective_target_vect_sdot_qi:\
5466 returning $et_vect_sdot_qi_saved($et_index)" 2
5467 return $et_vect_sdot_qi_saved($et_index)
5470 # Return 1 if the target plus current options supports a vector
5471 # dot-product of unsigned chars, 0 otherwise.
5473 # This won't change for different subtargets so cache the result.
5475 proc check_effective_target_vect_udot_qi { } {
5476 global et_vect_udot_qi_saved
5479 if [info exists et_vect_udot_qi_saved($et_index)] {
5480 verbose "check_effective_target_vect_udot_qi: using cached result" 2
5482 set et_vect_udot_qi_saved($et_index) 0
5483 if { [istarget powerpc*-*-*]
5484 || [istarget ia64-*-*]
5485 || ([istarget mips*-*-*]
5486 && [et-is-effective-target mips_msa]) } {
5487 set et_vect_udot_qi_saved($et_index) 1
5490 verbose "check_effective_target_vect_udot_qi:\
5491 returning $et_vect_udot_qi_saved($et_index)" 2
5492 return $et_vect_udot_qi_saved($et_index)
5495 # Return 1 if the target plus current options supports a vector
5496 # dot-product of signed shorts, 0 otherwise.
5498 # This won't change for different subtargets so cache the result.
5500 proc check_effective_target_vect_sdot_hi { } {
5501 global et_vect_sdot_hi_saved
5504 if [info exists et_vect_sdot_hi_saved($et_index)] {
5505 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
5507 set et_vect_sdot_hi_saved($et_index) 0
5508 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5509 || [istarget ia64-*-*]
5510 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5511 || ([istarget mips*-*-*]
5512 && [et-is-effective-target mips_msa]) } {
5513 set et_vect_sdot_hi_saved($et_index) 1
5516 verbose "check_effective_target_vect_sdot_hi:\
5517 returning $et_vect_sdot_hi_saved($et_index)" 2
5518 return $et_vect_sdot_hi_saved($et_index)
5521 # Return 1 if the target plus current options supports a vector
5522 # dot-product of unsigned shorts, 0 otherwise.
5524 # This won't change for different subtargets so cache the result.
5526 proc check_effective_target_vect_udot_hi { } {
5527 global et_vect_udot_hi_saved
5530 if [info exists et_vect_udot_hi_saved($et_index)] {
5531 verbose "check_effective_target_vect_udot_hi: using cached result" 2
5533 set et_vect_udot_hi_saved($et_index) 0
5534 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5535 || ([istarget mips*-*-*]
5536 && [et-is-effective-target mips_msa]) } {
5537 set et_vect_udot_hi_saved($et_index) 1
5540 verbose "check_effective_target_vect_udot_hi:\
5541 returning $et_vect_udot_hi_saved($et_index)" 2
5542 return $et_vect_udot_hi_saved($et_index)
5545 # Return 1 if the target plus current options supports a vector
5546 # sad operation of unsigned chars, 0 otherwise.
5548 # This won't change for different subtargets so cache the result.
5550 proc check_effective_target_vect_usad_char { } {
5551 global et_vect_usad_char_saved
5554 if [info exists et_vect_usad_char_saved($et_index)] {
5555 verbose "check_effective_target_vect_usad_char: using cached result" 2
5557 set et_vect_usad_char_saved($et_index) 0
5558 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
5559 set et_vect_usad_char_saved($et_index) 1
5562 verbose "check_effective_target_vect_usad_char:\
5563 returning $et_vect_usad_char_saved($et_index)" 2
5564 return $et_vect_usad_char_saved($et_index)
5567 # Return 1 if the target plus current options supports a vector
5568 # demotion (packing) of shorts (to chars) and ints (to shorts)
5569 # using modulo arithmetic, 0 otherwise.
5571 # This won't change for different subtargets so cache the result.
5573 proc check_effective_target_vect_pack_trunc { } {
5574 global et_vect_pack_trunc_saved
5577 if [info exists et_vect_pack_trunc_saved($et_index)] {
5578 verbose "check_effective_target_vect_pack_trunc: using cached result" 2
5580 set et_vect_pack_trunc_saved($et_index) 0
5581 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5582 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5583 || [istarget aarch64*-*-*]
5584 || [istarget spu-*-*]
5585 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
5586 && [check_effective_target_arm_little_endian])
5587 || ([istarget mips*-*-*]
5588 && [et-is-effective-target mips_msa]) } {
5589 set et_vect_pack_trunc_saved($et_index) 1
5592 verbose "check_effective_target_vect_pack_trunc:\
5593 returning $et_vect_pack_trunc_saved($et_index)" 2
5594 return $et_vect_pack_trunc_saved($et_index)
5597 # Return 1 if the target plus current options supports a vector
5598 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
5600 # This won't change for different subtargets so cache the result.
5602 proc check_effective_target_vect_unpack { } {
5603 global et_vect_unpack_saved
5606 if [info exists et_vect_unpack_saved($et_index)] {
5607 verbose "check_effective_target_vect_unpack: using cached result" 2
5609 set et_vect_unpack_saved($et_index) 0
5610 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
5611 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5612 || [istarget spu-*-*]
5613 || [istarget ia64-*-*]
5614 || [istarget aarch64*-*-*]
5615 || ([istarget mips*-*-*]
5616 && [et-is-effective-target mips_msa])
5617 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
5618 && [check_effective_target_arm_little_endian]) } {
5619 set et_vect_unpack_saved($et_index) 1
5622 verbose "check_effective_target_vect_unpack:\
5623 returning $et_vect_unpack_saved($et_index)" 2
5624 return $et_vect_unpack_saved($et_index)
5627 # Return 1 if the target plus current options does not guarantee
5628 # that its STACK_BOUNDARY is >= the reguired vector alignment.
5630 # This won't change for different subtargets so cache the result.
5632 proc check_effective_target_unaligned_stack { } {
5633 global et_unaligned_stack_saved
5635 if [info exists et_unaligned_stack_saved] {
5636 verbose "check_effective_target_unaligned_stack: using cached result" 2
5638 set et_unaligned_stack_saved 0
5640 verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
5641 return $et_unaligned_stack_saved
5644 # Return 1 if the target plus current options does not support a vector
5645 # alignment mechanism, 0 otherwise.
5647 # This won't change for different subtargets so cache the result.
5649 proc check_effective_target_vect_no_align { } {
5650 global et_vect_no_align_saved
5653 if [info exists et_vect_no_align_saved($et_index)] {
5654 verbose "check_effective_target_vect_no_align: using cached result" 2
5656 set et_vect_no_align_saved($et_index) 0
5657 if { [istarget mipsisa64*-*-*]
5658 || [istarget mips-sde-elf]
5659 || [istarget sparc*-*-*]
5660 || [istarget ia64-*-*]
5661 || [check_effective_target_arm_vect_no_misalign]
5662 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
5663 || ([istarget mips*-*-*]
5664 && [et-is-effective-target mips_loongson]) } {
5665 set et_vect_no_align_saved($et_index) 1
5668 verbose "check_effective_target_vect_no_align:\
5669 returning $et_vect_no_align_saved($et_index)" 2
5670 return $et_vect_no_align_saved($et_index)
5673 # Return 1 if the target supports a vector misalign access, 0 otherwise.
5675 # This won't change for different subtargets so cache the result.
5677 proc check_effective_target_vect_hw_misalign { } {
5678 global et_vect_hw_misalign_saved
5681 if [info exists et_vect_hw_misalign_saved($et_index)] {
5682 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
5684 set et_vect_hw_misalign_saved($et_index) 0
5685 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5686 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
5687 || [istarget aarch64*-*-*]
5688 || ([istarget mips*-*-*] && [et-is-effective-target mips_msa]) } {
5689 set et_vect_hw_misalign_saved($et_index) 1
5692 verbose "check_effective_target_vect_hw_misalign:\
5693 returning $et_vect_hw_misalign_saved($et_index)" 2
5694 return $et_vect_hw_misalign_saved($et_index)
5698 # Return 1 if arrays are aligned to the vector alignment
5699 # boundary, 0 otherwise.
5701 proc check_effective_target_vect_aligned_arrays { } {
5702 set et_vect_aligned_arrays 0
5703 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
5704 && !([is-effective-target ia32]
5705 || ([check_avx_available] && ![check_prefer_avx128])))
5706 || [istarget spu-*-*] } {
5707 set et_vect_aligned_arrays 1
5710 verbose "check_effective_target_vect_aligned_arrays:\
5711 returning $et_vect_aligned_arrays" 2
5712 return $et_vect_aligned_arrays
5715 # Return 1 if types of size 32 bit or less are naturally aligned
5716 # (aligned to their type-size), 0 otherwise.
5718 # This won't change for different subtargets so cache the result.
5720 proc check_effective_target_natural_alignment_32 { } {
5721 global et_natural_alignment_32
5723 if [info exists et_natural_alignment_32_saved] {
5724 verbose "check_effective_target_natural_alignment_32: using cached result" 2
5726 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
5727 set et_natural_alignment_32_saved 1
5728 if { ([istarget *-*-darwin*] && [is-effective-target lp64])
5729 || [istarget avr-*-*] } {
5730 set et_natural_alignment_32_saved 0
5733 verbose "check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
5734 return $et_natural_alignment_32_saved
5737 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
5738 # type-size), 0 otherwise.
5740 # This won't change for different subtargets so cache the result.
5742 proc check_effective_target_natural_alignment_64 { } {
5743 global et_natural_alignment_64
5745 if [info exists et_natural_alignment_64_saved] {
5746 verbose "check_effective_target_natural_alignment_64: using cached result" 2
5748 set et_natural_alignment_64_saved 0
5749 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
5750 || [istarget spu-*-*] } {
5751 set et_natural_alignment_64_saved 1
5754 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
5755 return $et_natural_alignment_64_saved
5758 # Return 1 if all vector types are naturally aligned (aligned to their
5759 # type-size), 0 otherwise.
5761 proc check_effective_target_vect_natural_alignment { } {
5762 set et_vect_natural_alignment 1
5763 if { [check_effective_target_arm_eabi]
5764 || [istarget nvptx-*-*]
5765 || [istarget s390*-*-*] } {
5766 set et_vect_natural_alignment 0
5768 verbose "check_effective_target_vect_natural_alignment:\
5769 returning $et_vect_natural_alignment" 2
5770 return $et_vect_natural_alignment
5773 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
5775 proc check_effective_target_vector_alignment_reachable { } {
5776 set et_vector_alignment_reachable 0
5777 if { [check_effective_target_vect_aligned_arrays]
5778 || [check_effective_target_natural_alignment_32] } {
5779 set et_vector_alignment_reachable 1
5781 verbose "check_effective_target_vector_alignment_reachable:\
5782 returning $et_vector_alignment_reachable" 2
5783 return $et_vector_alignment_reachable
5786 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
5788 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
5789 set et_vector_alignment_reachable_for_64bit 0
5790 if { [check_effective_target_vect_aligned_arrays]
5791 || [check_effective_target_natural_alignment_64] } {
5792 set et_vector_alignment_reachable_for_64bit 1
5794 verbose "check_effective_target_vector_alignment_reachable_for_64bit:\
5795 returning $et_vector_alignment_reachable_for_64bit" 2
5796 return $et_vector_alignment_reachable_for_64bit
5799 # Return 1 if the target only requires element alignment for vector accesses
5801 proc check_effective_target_vect_element_align { } {
5802 global et_vect_element_align
5805 if [info exists et_vect_element_align($et_index)] {
5806 verbose "check_effective_target_vect_element_align:\
5807 using cached result" 2
5809 set et_vect_element_align($et_index) 0
5810 if { ([istarget arm*-*-*]
5811 && ![check_effective_target_arm_vect_no_misalign])
5812 || [check_effective_target_vect_hw_misalign] } {
5813 set et_vect_element_align($et_index) 1
5817 verbose "check_effective_target_vect_element_align:\
5818 returning $et_vect_element_align($et_index)" 2
5819 return $et_vect_element_align($et_index)
5822 # Return 1 if the target supports vector LOAD_LANES operations, 0 otherwise.
5824 proc check_effective_target_vect_load_lanes { } {
5825 global et_vect_load_lanes
5827 if [info exists et_vect_load_lanes] {
5828 verbose "check_effective_target_vect_load_lanes: using cached result" 2
5830 set et_vect_load_lanes 0
5831 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])
5832 || [istarget aarch64*-*-*] } {
5833 set et_vect_load_lanes 1
5837 verbose "check_effective_target_vect_load_lanes: returning $et_vect_load_lanes" 2
5838 return $et_vect_load_lanes
5841 # Return 1 if the target supports vector conditional operations, 0 otherwise.
5843 proc check_effective_target_vect_condition { } {
5844 global et_vect_cond_saved
5847 if [info exists et_vect_cond_saved($et_index)] {
5848 verbose "check_effective_target_vect_cond: using cached result" 2
5850 set et_vect_cond_saved($et_index) 0
5851 if { [istarget aarch64*-*-*]
5852 || [istarget powerpc*-*-*]
5853 || [istarget ia64-*-*]
5854 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5855 || [istarget spu-*-*]
5856 || ([istarget mips*-*-*]
5857 && [et-is-effective-target mips_msa])
5858 || ([istarget arm*-*-*]
5859 && [check_effective_target_arm_neon_ok]) } {
5860 set et_vect_cond_saved($et_index) 1
5864 verbose "check_effective_target_vect_cond:\
5865 returning $et_vect_cond_saved($et_index)" 2
5866 return $et_vect_cond_saved($et_index)
5869 # Return 1 if the target supports vector conditional operations where
5870 # the comparison has different type from the lhs, 0 otherwise.
5872 proc check_effective_target_vect_cond_mixed { } {
5873 global et_vect_cond_mixed_saved
5876 if [info exists et_vect_cond_mixed_saved($et_index)] {
5877 verbose "check_effective_target_vect_cond_mixed: using cached result" 2
5879 set et_vect_cond_mixed_saved($et_index) 0
5880 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5881 || [istarget aarch64*-*-*]
5882 || [istarget powerpc*-*-*]
5883 || ([istarget mips*-*-*]
5884 && [et-is-effective-target mips_msa]) } {
5885 set et_vect_cond_mixed_saved($et_index) 1
5889 verbose "check_effective_target_vect_cond_mixed:\
5890 returning $et_vect_cond_mixed_saved($et_index)" 2
5891 return $et_vect_cond_mixed_saved($et_index)
5894 # Return 1 if the target supports vector char multiplication, 0 otherwise.
5896 proc check_effective_target_vect_char_mult { } {
5897 global et_vect_char_mult_saved
5900 if [info exists et_vect_char_mult_saved($et_index)] {
5901 verbose "check_effective_target_vect_char_mult: using cached result" 2
5903 set et_vect_char_mult_saved($et_index) 0
5904 if { [istarget aarch64*-*-*]
5905 || [istarget ia64-*-*]
5906 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5907 || [check_effective_target_arm32]
5908 || [check_effective_target_powerpc_altivec]
5909 || ([istarget mips*-*-*]
5910 && [et-is-effective-target mips_msa]) } {
5911 set et_vect_char_mult_saved($et_index) 1
5915 verbose "check_effective_target_vect_char_mult:\
5916 returning $et_vect_char_mult_saved($et_index)" 2
5917 return $et_vect_char_mult_saved($et_index)
5920 # Return 1 if the target supports vector short multiplication, 0 otherwise.
5922 proc check_effective_target_vect_short_mult { } {
5923 global et_vect_short_mult_saved
5926 if [info exists et_vect_short_mult_saved($et_index)] {
5927 verbose "check_effective_target_vect_short_mult: using cached result" 2
5929 set et_vect_short_mult_saved($et_index) 0
5930 if { [istarget ia64-*-*]
5931 || [istarget spu-*-*]
5932 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5933 || [istarget powerpc*-*-*]
5934 || [istarget aarch64*-*-*]
5935 || [check_effective_target_arm32]
5936 || ([istarget mips*-*-*]
5937 && ([et-is-effective-target mips_msa]
5938 || [et-is-effective-target mips_loongson])) } {
5939 set et_vect_short_mult_saved($et_index) 1
5943 verbose "check_effective_target_vect_short_mult:\
5944 returning $et_vect_short_mult_saved($et_index)" 2
5945 return $et_vect_short_mult_saved($et_index)
5948 # Return 1 if the target supports vector int multiplication, 0 otherwise.
5950 proc check_effective_target_vect_int_mult { } {
5951 global et_vect_int_mult_saved
5954 if [info exists et_vect_int_mult_saved($et_index)] {
5955 verbose "check_effective_target_vect_int_mult: using cached result" 2
5957 set et_vect_int_mult_saved($et_index) 0
5958 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5959 || [istarget spu-*-*]
5960 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5961 || [istarget ia64-*-*]
5962 || [istarget aarch64*-*-*]
5963 || ([istarget mips*-*-*]
5964 && [et-is-effective-target mips_msa])
5965 || [check_effective_target_arm32] } {
5966 set et_vect_int_mult_saved($et_index) 1
5970 verbose "check_effective_target_vect_int_mult:\
5971 returning $et_vect_int_mult_saved($et_index)" 2
5972 return $et_vect_int_mult_saved($et_index)
5975 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
5977 proc check_effective_target_vect_extract_even_odd { } {
5978 global et_vect_extract_even_odd_saved
5981 if [info exists et_vect_extract_even_odd_saved($et_index)] {
5982 verbose "check_effective_target_vect_extract_even_odd:\
5983 using cached result" 2
5985 set et_vect_extract_even_odd_saved($et_index) 0
5986 if { [istarget aarch64*-*-*]
5987 || [istarget powerpc*-*-*]
5988 || [is-effective-target arm_neon_ok]
5989 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5990 || [istarget ia64-*-*]
5991 || [istarget spu-*-*]
5992 || ([istarget mips*-*-*]
5993 && ([et-is-effective-target mips_msa]
5994 || [et-is-effective-target mpaired_single])) } {
5995 set et_vect_extract_even_odd_saved($et_index) 1
5999 verbose "check_effective_target_vect_extract_even_odd:\
6000 returning $et_vect_extract_even_odd_saved($et_index)" 2
6001 return $et_vect_extract_even_odd_saved($et_index)
6004 # Return 1 if the target supports vector interleaving, 0 otherwise.
6006 proc check_effective_target_vect_interleave { } {
6007 global et_vect_interleave_saved
6010 if [info exists et_vect_interleave_saved($et_index)] {
6011 verbose "check_effective_target_vect_interleave: using cached result" 2
6013 set et_vect_interleave_saved($et_index) 0
6014 if { [istarget aarch64*-*-*]
6015 || [istarget powerpc*-*-*]
6016 || [is-effective-target arm_neon_ok]
6017 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6018 || [istarget ia64-*-*]
6019 || [istarget spu-*-*]
6020 || ([istarget mips*-*-*]
6021 && ([et-is-effective-target mpaired_single]
6022 || [et-is-effective-target mips_msa])) } {
6023 set et_vect_interleave_saved($et_index) 1
6027 verbose "check_effective_target_vect_interleave:\
6028 returning $et_vect_interleave_saved($et_index)" 2
6029 return $et_vect_interleave_saved($et_index)
6032 foreach N {2 3 4 8} {
6033 eval [string map [list N $N] {
6034 # Return 1 if the target supports 2-vector interleaving
6035 proc check_effective_target_vect_stridedN { } {
6036 global et_vect_stridedN_saved
6039 if [info exists et_vect_stridedN_saved($et_index)] {
6040 verbose "check_effective_target_vect_stridedN:\
6041 using cached result" 2
6043 set et_vect_stridedN_saved($et_index) 0
6045 && [check_effective_target_vect_interleave]
6046 && [check_effective_target_vect_extract_even_odd] } {
6047 set et_vect_stridedN_saved($et_index) 1
6049 if { ([istarget arm*-*-*]
6050 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
6051 set et_vect_stridedN_saved($et_index) 1
6055 verbose "check_effective_target_vect_stridedN:\
6056 returning $et_vect_stridedN_saved($et_index)" 2
6057 return $et_vect_stridedN_saved($et_index)
6062 # Return 1 if the target supports multiple vector sizes
6064 proc check_effective_target_vect_multiple_sizes { } {
6065 global et_vect_multiple_sizes_saved
6068 set et_vect_multiple_sizes_saved($et_index) 0
6069 if { [istarget aarch64*-*-*]
6070 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])
6071 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
6072 && ([check_avx_available] && ![check_prefer_avx128])) } {
6073 set et_vect_multiple_sizes_saved($et_index) 1
6076 verbose "check_effective_target_vect_multiple_sizes:\
6077 returning $et_vect_multiple_sizes_saved($et_index)" 2
6078 return $et_vect_multiple_sizes_saved($et_index)
6081 # Return 1 if the target supports vectors of 64 bits.
6083 proc check_effective_target_vect64 { } {
6084 global et_vect64_saved
6087 if [info exists et_vect64_saved($et_index)] {
6088 verbose "check_effective_target_vect64: using cached result" 2
6090 set et_vect64_saved($et_index) 0
6091 if { ([istarget arm*-*-*]
6092 && [check_effective_target_arm_neon_ok]
6093 && [check_effective_target_arm_little_endian])
6094 || [istarget aarch64*-*-*]
6095 || [istarget sparc*-*-*] } {
6096 set et_vect64_saved($et_index) 1
6100 verbose "check_effective_target_vect64:\
6101 returning $et_vect64_saved($et_index)" 2
6102 return $et_vect64_saved($et_index)
6105 # Return 1 if the target supports vector copysignf calls.
6107 proc check_effective_target_vect_call_copysignf { } {
6108 global et_vect_call_copysignf_saved
6111 if [info exists et_vect_call_copysignf_saved($et_index)] {
6112 verbose "check_effective_target_vect_call_copysignf:\
6113 using cached result" 2
6115 set et_vect_call_copysignf_saved($et_index) 0
6116 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6117 || [istarget powerpc*-*-*] } {
6118 set et_vect_call_copysignf_saved($et_index) 1
6122 verbose "check_effective_target_vect_call_copysignf:\
6123 returning $et_vect_call_copysignf_saved($et_index)" 2
6124 return $et_vect_call_copysignf_saved($et_index)
6127 # Return 1 if the target supports hardware square root instructions.
6129 proc check_effective_target_sqrt_insn { } {
6130 global et_sqrt_insn_saved
6132 if [info exists et_sqrt_insn_saved] {
6133 verbose "check_effective_target_hw_sqrt: using cached result" 2
6135 set et_sqrt_insn_saved 0
6136 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6137 || [istarget powerpc*-*-*]
6138 || [istarget aarch64*-*-*]
6139 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok]) } {
6140 set et_sqrt_insn_saved 1
6144 verbose "check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2
6145 return $et_sqrt_insn_saved
6148 # Return 1 if the target supports vector sqrtf calls.
6150 proc check_effective_target_vect_call_sqrtf { } {
6151 global et_vect_call_sqrtf_saved
6154 if [info exists et_vect_call_sqrtf_saved($et_index)] {
6155 verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
6157 set et_vect_call_sqrtf_saved($et_index) 0
6158 if { [istarget aarch64*-*-*]
6159 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6160 || ([istarget powerpc*-*-*] && [check_vsx_hw_available]) } {
6161 set et_vect_call_sqrtf_saved($et_index) 1
6165 verbose "check_effective_target_vect_call_sqrtf:\
6166 returning $et_vect_call_sqrtf_saved($et_index)" 2
6167 return $et_vect_call_sqrtf_saved($et_index)
6170 # Return 1 if the target supports vector lrint calls.
6172 proc check_effective_target_vect_call_lrint { } {
6173 set et_vect_call_lrint 0
6174 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6175 && [check_effective_target_ilp32]) } {
6176 set et_vect_call_lrint 1
6179 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
6180 return $et_vect_call_lrint
6183 # Return 1 if the target supports vector btrunc calls.
6185 proc check_effective_target_vect_call_btrunc { } {
6186 global et_vect_call_btrunc_saved
6189 if [info exists et_vect_call_btrunc_saved($et_index)] {
6190 verbose "check_effective_target_vect_call_btrunc:\
6191 using cached result" 2
6193 set et_vect_call_btrunc_saved($et_index) 0
6194 if { [istarget aarch64*-*-*] } {
6195 set et_vect_call_btrunc_saved($et_index) 1
6199 verbose "check_effective_target_vect_call_btrunc:\
6200 returning $et_vect_call_btrunc_saved($et_index)" 2
6201 return $et_vect_call_btrunc_saved($et_index)
6204 # Return 1 if the target supports vector btruncf calls.
6206 proc check_effective_target_vect_call_btruncf { } {
6207 global et_vect_call_btruncf_saved
6210 if [info exists et_vect_call_btruncf_saved($et_index)] {
6211 verbose "check_effective_target_vect_call_btruncf:\
6212 using cached result" 2
6214 set et_vect_call_btruncf_saved($et_index) 0
6215 if { [istarget aarch64*-*-*] } {
6216 set et_vect_call_btruncf_saved($et_index) 1
6220 verbose "check_effective_target_vect_call_btruncf:\
6221 returning $et_vect_call_btruncf_saved($et_index)" 2
6222 return $et_vect_call_btruncf_saved($et_index)
6225 # Return 1 if the target supports vector ceil calls.
6227 proc check_effective_target_vect_call_ceil { } {
6228 global et_vect_call_ceil_saved
6231 if [info exists et_vect_call_ceil_saved($et_index)] {
6232 verbose "check_effective_target_vect_call_ceil: using cached result" 2
6234 set et_vect_call_ceil_saved($et_index) 0
6235 if { [istarget aarch64*-*-*] } {
6236 set et_vect_call_ceil_saved($et_index) 1
6240 verbose "check_effective_target_vect_call_ceil:\
6241 returning $et_vect_call_ceil_saved($et_index)" 2
6242 return $et_vect_call_ceil_saved($et_index)
6245 # Return 1 if the target supports vector ceilf calls.
6247 proc check_effective_target_vect_call_ceilf { } {
6248 global et_vect_call_ceilf_saved
6251 if [info exists et_vect_call_ceilf_saved($et_index)] {
6252 verbose "check_effective_target_vect_call_ceilf: using cached result" 2
6254 set et_vect_call_ceilf_saved($et_index) 0
6255 if { [istarget aarch64*-*-*] } {
6256 set et_vect_call_ceilf_saved($et_index) 1
6260 verbose "check_effective_target_vect_call_ceilf:\
6261 returning $et_vect_call_ceilf_saved($et_index)" 2
6262 return $et_vect_call_ceilf_saved($et_index)
6265 # Return 1 if the target supports vector floor calls.
6267 proc check_effective_target_vect_call_floor { } {
6268 global et_vect_call_floor_saved
6271 if [info exists et_vect_call_floor_saved($et_index)] {
6272 verbose "check_effective_target_vect_call_floor: using cached result" 2
6274 set et_vect_call_floor_saved($et_index) 0
6275 if { [istarget aarch64*-*-*] } {
6276 set et_vect_call_floor_saved($et_index) 1
6280 verbose "check_effective_target_vect_call_floor:\
6281 returning $et_vect_call_floor_saved($et_index)" 2
6282 return $et_vect_call_floor_saved($et_index)
6285 # Return 1 if the target supports vector floorf calls.
6287 proc check_effective_target_vect_call_floorf { } {
6288 global et_vect_call_floorf_saved
6291 if [info exists et_vect_call_floorf_saved($et_index)] {
6292 verbose "check_effective_target_vect_call_floorf: using cached result" 2
6294 set et_vect_call_floorf_saved($et_index) 0
6295 if { [istarget aarch64*-*-*] } {
6296 set et_vect_call_floorf_saved($et_index) 1
6300 verbose "check_effective_target_vect_call_floorf:\
6301 returning $et_vect_call_floorf_saved($et_index)" 2
6302 return $et_vect_call_floorf_saved($et_index)
6305 # Return 1 if the target supports vector lceil calls.
6307 proc check_effective_target_vect_call_lceil { } {
6308 global et_vect_call_lceil_saved
6311 if [info exists et_vect_call_lceil_saved($et_index)] {
6312 verbose "check_effective_target_vect_call_lceil: using cached result" 2
6314 set et_vect_call_lceil_saved($et_index) 0
6315 if { [istarget aarch64*-*-*] } {
6316 set et_vect_call_lceil_saved($et_index) 1
6320 verbose "check_effective_target_vect_call_lceil:\
6321 returning $et_vect_call_lceil_saved($et_index)" 2
6322 return $et_vect_call_lceil_saved($et_index)
6325 # Return 1 if the target supports vector lfloor calls.
6327 proc check_effective_target_vect_call_lfloor { } {
6328 global et_vect_call_lfloor_saved
6331 if [info exists et_vect_call_lfloor_saved($et_index)] {
6332 verbose "check_effective_target_vect_call_lfloor: using cached result" 2
6334 set et_vect_call_lfloor_saved($et_index) 0
6335 if { [istarget aarch64*-*-*] } {
6336 set et_vect_call_lfloor_saved($et_index) 1
6340 verbose "check_effective_target_vect_call_lfloor:\
6341 returning $et_vect_call_lfloor_saved($et_index)" 2
6342 return $et_vect_call_lfloor_saved($et_index)
6345 # Return 1 if the target supports vector nearbyint calls.
6347 proc check_effective_target_vect_call_nearbyint { } {
6348 global et_vect_call_nearbyint_saved
6351 if [info exists et_vect_call_nearbyint_saved($et_index)] {
6352 verbose "check_effective_target_vect_call_nearbyint: using cached result" 2
6354 set et_vect_call_nearbyint_saved($et_index) 0
6355 if { [istarget aarch64*-*-*] } {
6356 set et_vect_call_nearbyint_saved($et_index) 1
6360 verbose "check_effective_target_vect_call_nearbyint:\
6361 returning $et_vect_call_nearbyint_saved($et_index)" 2
6362 return $et_vect_call_nearbyint_saved($et_index)
6365 # Return 1 if the target supports vector nearbyintf calls.
6367 proc check_effective_target_vect_call_nearbyintf { } {
6368 global et_vect_call_nearbyintf_saved
6371 if [info exists et_vect_call_nearbyintf_saved($et_index)] {
6372 verbose "check_effective_target_vect_call_nearbyintf:\
6373 using cached result" 2
6375 set et_vect_call_nearbyintf_saved($et_index) 0
6376 if { [istarget aarch64*-*-*] } {
6377 set et_vect_call_nearbyintf_saved($et_index) 1
6381 verbose "check_effective_target_vect_call_nearbyintf:\
6382 returning $et_vect_call_nearbyintf_saved($et_index)" 2
6383 return $et_vect_call_nearbyintf_saved($et_index)
6386 # Return 1 if the target supports vector round calls.
6388 proc check_effective_target_vect_call_round { } {
6389 global et_vect_call_round_saved
6392 if [info exists et_vect_call_round_saved($et_index)] {
6393 verbose "check_effective_target_vect_call_round: using cached result" 2
6395 set et_vect_call_round_saved($et_index) 0
6396 if { [istarget aarch64*-*-*] } {
6397 set et_vect_call_round_saved($et_index) 1
6401 verbose "check_effective_target_vect_call_round:\
6402 returning $et_vect_call_round_saved($et_index)" 2
6403 return $et_vect_call_round_saved($et_index)
6406 # Return 1 if the target supports vector roundf calls.
6408 proc check_effective_target_vect_call_roundf { } {
6409 global et_vect_call_roundf_saved
6412 if [info exists et_vect_call_roundf_saved($et_index)] {
6413 verbose "check_effective_target_vect_call_roundf: using cached result" 2
6415 set et_vect_call_roundf_saved($et_index) 0
6416 if { [istarget aarch64*-*-*] } {
6417 set et_vect_call_roundf_saved($et_index) 1
6421 verbose "check_effective_target_vect_call_roundf:\
6422 returning $et_vect_call_roundf_saved($et_index)" 2
6423 return $et_vect_call_roundf_saved($et_index)
6426 # Return 1 if the target supports section-anchors
6428 proc check_effective_target_section_anchors { } {
6429 global et_section_anchors_saved
6431 if [info exists et_section_anchors_saved] {
6432 verbose "check_effective_target_section_anchors: using cached result" 2
6434 set et_section_anchors_saved 0
6435 if { [istarget powerpc*-*-*]
6436 || [istarget arm*-*-*]
6437 || [istarget aarch64*-*-*] } {
6438 set et_section_anchors_saved 1
6442 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
6443 return $et_section_anchors_saved
6446 # Return 1 if the target supports atomic operations on "int_128" values.
6448 proc check_effective_target_sync_int_128 { } {
6449 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6450 && ![is-effective-target ia32])
6451 || [istarget spu-*-*] } {
6458 # Return 1 if the target supports atomic operations on "int_128" values
6459 # and can execute them.
6461 proc check_effective_target_sync_int_128_runtime { } {
6462 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6463 && ![is-effective-target ia32]
6464 && [check_cached_effective_target sync_int_128_available {
6465 check_runtime_nocache sync_int_128_available {
6469 unsigned int eax, ebx, ecx, edx;
6470 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
6471 return !(ecx & bit_CMPXCHG16B);
6476 || [istarget spu-*-*] } {
6483 # Return 1 if the target supports atomic operations on "long long".
6485 # Note: 32bit x86 targets require -march=pentium in dg-options.
6486 # Note: 32bit s390 targets require -mzarch in dg-options.
6488 proc check_effective_target_sync_long_long { } {
6489 if { [istarget i?86-*-*] || [istarget x86_64-*-*])
6490 || [istarget aarch64*-*-*]
6491 || [istarget arm*-*-*]
6492 || [istarget alpha*-*-*]
6493 || ([istarget sparc*-*-*] && [check_effective_target_lp64])
6494 || [istarget s390*-*-*]
6495 || [istarget spu-*-*] } {
6502 # Return 1 if the target supports atomic operations on "long long"
6503 # and can execute them.
6505 # Note: 32bit x86 targets require -march=pentium in dg-options.
6507 proc check_effective_target_sync_long_long_runtime { } {
6508 if { (([istarget x86_64-*-*] || [istarget i?86-*-*])
6509 && [check_cached_effective_target sync_long_long_available {
6510 check_runtime_nocache sync_long_long_available {
6514 unsigned int eax, ebx, ecx, edx;
6515 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
6516 return !(edx & bit_CMPXCHG8B);
6521 || [istarget aarch64*-*-*]
6522 || ([istarget arm*-*-linux-*]
6523 && [check_runtime sync_longlong_runtime {
6529 if (sizeof (long long) != 8)
6532 /* Just check for native;
6533 checking for kernel fallback is tricky. */
6534 asm volatile ("ldrexd r0,r1, [%0]"
6535 : : "r" (&l1) : "r0", "r1");
6539 || [istarget alpha*-*-*]
6540 || ([istarget sparc*-*-*]
6541 && [check_effective_target_lp64]
6542 && [check_effective_target_ultrasparc_hw])
6543 || [istarget spu-*-*]
6544 || ([istarget powerpc*-*-*] && [check_effective_target_lp64]) } {
6551 # Return 1 if the target supports byte swap instructions.
6553 proc check_effective_target_bswap { } {
6554 global et_bswap_saved
6556 if [info exists et_bswap_saved] {
6557 verbose "check_effective_target_bswap: using cached result" 2
6559 set et_bswap_saved 0
6560 if { [istarget aarch64*-*-*]
6561 || [istarget alpha*-*-*]
6562 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6563 || [istarget m68k-*-*]
6564 || [istarget powerpc*-*-*]
6565 || [istarget rs6000-*-*]
6566 || [istarget s390*-*-*]
6567 || ([istarget arm*-*-*]
6568 && [check_no_compiler_messages_nocache arm_v6_or_later object {
6570 #error not armv6 or later
6574 set et_bswap_saved 1
6578 verbose "check_effective_target_bswap: returning $et_bswap_saved" 2
6579 return $et_bswap_saved
6582 # Return 1 if the target supports 16-bit byte swap instructions.
6584 proc check_effective_target_bswap16 { } {
6585 global et_bswap16_saved
6587 if [info exists et_bswap16_saved] {
6588 verbose "check_effective_target_bswap16: using cached result" 2
6590 set et_bswap16_saved 0
6591 if { [is-effective-target bswap]
6592 && ![istarget alpha*-*-*]
6593 && !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
6594 set et_bswap16_saved 1
6598 verbose "check_effective_target_bswap16: returning $et_bswap16_saved" 2
6599 return $et_bswap16_saved
6602 # Return 1 if the target supports 32-bit byte swap instructions.
6604 proc check_effective_target_bswap32 { } {
6605 global et_bswap32_saved
6607 if [info exists et_bswap32_saved] {
6608 verbose "check_effective_target_bswap32: using cached result" 2
6610 set et_bswap32_saved 0
6611 if { [is-effective-target bswap] } {
6612 set et_bswap32_saved 1
6616 verbose "check_effective_target_bswap32: returning $et_bswap32_saved" 2
6617 return $et_bswap32_saved
6620 # Return 1 if the target supports 64-bit byte swap instructions.
6622 # Note: 32bit s390 targets require -mzarch in dg-options.
6624 proc check_effective_target_bswap64 { } {
6625 global et_bswap64_saved
6627 # expand_unop can expand 64-bit byte swap on 32-bit targets
6628 if { [is-effective-target bswap] && [is-effective-target int32plus] } {
6634 # Return 1 if the target supports atomic operations on "int" and "long".
6636 proc check_effective_target_sync_int_long { } {
6637 global et_sync_int_long_saved
6639 if [info exists et_sync_int_long_saved] {
6640 verbose "check_effective_target_sync_int_long: using cached result" 2
6642 set et_sync_int_long_saved 0
6643 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
6644 # load-reserved/store-conditional instructions.
6645 if { [istarget ia64-*-*]
6646 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6647 || [istarget aarch64*-*-*]
6648 || [istarget alpha*-*-*]
6649 || [istarget arm*-*-linux-*]
6650 || ([istarget arm*-*-*]
6651 && [check_effective_target_arm_acq_rel])
6652 || [istarget bfin*-*linux*]
6653 || [istarget hppa*-*linux*]
6654 || [istarget s390*-*-*]
6655 || [istarget powerpc*-*-*]
6656 || [istarget crisv32-*-*] || [istarget cris-*-*]
6657 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
6658 || [istarget spu-*-*]
6659 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
6660 || [check_effective_target_mips_llsc] } {
6661 set et_sync_int_long_saved 1
6665 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
6666 return $et_sync_int_long_saved
6669 # Return 1 if the target supports atomic operations on "char" and "short".
6671 proc check_effective_target_sync_char_short { } {
6672 global et_sync_char_short_saved
6674 if [info exists et_sync_char_short_saved] {
6675 verbose "check_effective_target_sync_char_short: using cached result" 2
6677 set et_sync_char_short_saved 0
6678 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
6679 # load-reserved/store-conditional instructions.
6680 if { [istarget aarch64*-*-*]
6681 || [istarget ia64-*-*]
6682 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6683 || [istarget alpha*-*-*]
6684 || [istarget arm*-*-linux-*]
6685 || ([istarget arm*-*-*]
6686 && [check_effective_target_arm_acq_rel])
6687 || [istarget hppa*-*linux*]
6688 || [istarget s390*-*-*]
6689 || [istarget powerpc*-*-*]
6690 || [istarget crisv32-*-*] || [istarget cris-*-*]
6691 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
6692 || [istarget spu-*-*]
6693 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
6694 || [check_effective_target_mips_llsc] } {
6695 set et_sync_char_short_saved 1
6699 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
6700 return $et_sync_char_short_saved
6703 # Return 1 if the target uses a ColdFire FPU.
6705 proc check_effective_target_coldfire_fpu { } {
6706 return [check_no_compiler_messages coldfire_fpu assembly {
6713 # Return true if this is a uClibc target.
6715 proc check_effective_target_uclibc {} {
6716 return [check_no_compiler_messages uclibc object {
6717 #include <features.h>
6718 #if !defined (__UCLIBC__)
6724 # Return true if this is a uclibc target and if the uclibc feature
6725 # described by __$feature__ is not present.
6727 proc check_missing_uclibc_feature {feature} {
6728 return [check_no_compiler_messages $feature object "
6729 #include <features.h>
6730 #if !defined (__UCLIBC) || defined (__${feature}__)
6736 # Return true if this is a Newlib target.
6738 proc check_effective_target_newlib {} {
6739 return [check_no_compiler_messages newlib object {
6744 # Return true if this is NOT a Bionic target.
6746 proc check_effective_target_non_bionic {} {
6747 return [check_no_compiler_messages non_bionic object {
6749 #if defined (__BIONIC__)
6755 # Return true if this target has error.h header.
6757 proc check_effective_target_error_h {} {
6758 return [check_no_compiler_messages error_h object {
6763 # Return true if this target has tgmath.h header.
6765 proc check_effective_target_tgmath_h {} {
6766 return [check_no_compiler_messages tgmath_h object {
6771 # Return true if target's libc supports complex functions.
6773 proc check_effective_target_libc_has_complex_functions {} {
6774 return [check_no_compiler_messages libc_has_complex_functions object {
6775 #include <complex.h>
6780 # (a) an error of a few ULP is expected in string to floating-point
6781 # conversion functions; and
6782 # (b) overflow is not always detected correctly by those functions.
6784 proc check_effective_target_lax_strtofp {} {
6785 # By default, assume that all uClibc targets suffer from this.
6786 return [check_effective_target_uclibc]
6789 # Return 1 if this is a target for which wcsftime is a dummy
6790 # function that always returns 0.
6792 proc check_effective_target_dummy_wcsftime {} {
6793 # By default, assume that all uClibc targets suffer from this.
6794 return [check_effective_target_uclibc]
6797 # Return 1 if constructors with initialization priority arguments are
6798 # supposed on this target.
6800 proc check_effective_target_init_priority {} {
6801 return [check_no_compiler_messages init_priority assembly "
6802 void f() __attribute__((constructor (1000)));
6807 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
6808 # This can be used with any check_* proc that takes no argument and
6809 # returns only 1 or 0. It could be used with check_* procs that take
6810 # arguments with keywords that pass particular arguments.
6812 proc is-effective-target { arg } {
6815 if { ![info exists et_index] } {
6816 # Initialize the effective target index that is used in some
6817 # check_effective_target_* procs.
6820 if { [info procs check_effective_target_${arg}] != [list] } {
6821 set selected [check_effective_target_${arg}]
6824 "vmx_hw" { set selected [check_vmx_hw_available] }
6825 "vsx_hw" { set selected [check_vsx_hw_available] }
6826 "p8vector_hw" { set selected [check_p8vector_hw_available] }
6827 "p9vector_hw" { set selected [check_p9vector_hw_available] }
6828 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
6829 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
6830 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
6831 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
6832 "dfp_hw" { set selected [check_dfp_hw_available] }
6833 "htm_hw" { set selected [check_htm_hw_available] }
6834 "named_sections" { set selected [check_named_sections_available] }
6835 "gc_sections" { set selected [check_gc_sections_available] }
6836 "cxa_atexit" { set selected [check_cxa_atexit_available] }
6837 default { error "unknown effective target keyword `$arg'" }
6840 verbose "is-effective-target: $arg $selected" 2
6844 # Return 1 if the argument is an effective-target keyword, 0 otherwise.
6846 proc is-effective-target-keyword { arg } {
6847 if { [info procs check_effective_target_${arg}] != [list] } {
6850 # These have different names for their check_* procs.
6852 "vmx_hw" { return 1 }
6853 "vsx_hw" { return 1 }
6854 "p8vector_hw" { return 1 }
6855 "p9vector_hw" { return 1 }
6856 "p9modulo_hw" { return 1 }
6857 "ppc_float128_sw" { return 1 }
6858 "ppc_float128_hw" { return 1 }
6859 "ppc_recip_hw" { return 1 }
6860 "dfp_hw" { return 1 }
6861 "htm_hw" { return 1 }
6862 "named_sections" { return 1 }
6863 "gc_sections" { return 1 }
6864 "cxa_atexit" { return 1 }
6865 default { return 0 }
6870 # Execute tests for all targets in EFFECTIVE_TARGETS list. Set et_index to
6871 # indicate what target is currently being processed. This is for
6872 # the vectorizer tests, e.g. vect_int, to keep track what target supports
6875 proc et-dg-runtest { runtest testcases flags default-extra-flags } {
6876 global dg-do-what-default
6877 global EFFECTIVE_TARGETS
6880 if { [llength $EFFECTIVE_TARGETS] > 0 } {
6881 foreach target $EFFECTIVE_TARGETS {
6882 set target_flags $flags
6883 set dg-do-what-default compile
6884 set et_index [lsearch -exact $EFFECTIVE_TARGETS $target]
6885 if { [info procs add_options_for_${target}] != [list] } {
6886 set target_flags [add_options_for_${target} "$flags"]
6888 if { [info procs check_effective_target_${target}_runtime]
6889 != [list] && [check_effective_target_${target}_runtime] } {
6890 set dg-do-what-default run
6892 $runtest $testcases $target_flags ${default-extra-flags}
6896 $runtest $testcases $flags ${default-extra-flags}
6900 # Return 1 if a target matches the target in EFFECTIVE_TARGETS at index
6901 # et_index, 0 otherwise.
6903 proc et-is-effective-target { target } {
6904 global EFFECTIVE_TARGETS
6907 if { [llength $EFFECTIVE_TARGETS] > $et_index
6908 && [lindex $EFFECTIVE_TARGETS $et_index] == $target } {
6914 # Return 1 if target default to short enums
6916 proc check_effective_target_short_enums { } {
6917 return [check_no_compiler_messages short_enums assembly {
6919 int s[sizeof (enum foo) == 1 ? 1 : -1];
6923 # Return 1 if target supports merging string constants at link time.
6925 proc check_effective_target_string_merging { } {
6926 return [check_no_messages_and_pattern string_merging \
6927 "rodata\\.str" assembly {
6928 const char *var = "String";
6932 # Return 1 if target has the basic signed and unsigned types in
6933 # <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
6934 # working <stdint.h> for all targets.
6936 proc check_effective_target_stdint_types { } {
6937 return [check_no_compiler_messages stdint_types assembly {
6939 int8_t a; int16_t b; int32_t c; int64_t d;
6940 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
6944 # Return 1 if target has the basic signed and unsigned types in
6945 # <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
6946 # these types agree with those in the header, as some systems have
6947 # only <inttypes.h>.
6949 proc check_effective_target_inttypes_types { } {
6950 return [check_no_compiler_messages inttypes_types assembly {
6951 #include <inttypes.h>
6952 int8_t a; int16_t b; int32_t c; int64_t d;
6953 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
6957 # Return 1 if programs are intended to be run on a simulator
6958 # (i.e. slowly) rather than hardware (i.e. fast).
6960 proc check_effective_target_simulator { } {
6962 # All "src/sim" simulators set this one.
6963 if [board_info target exists is_simulator] {
6964 return [board_info target is_simulator]
6967 # The "sid" simulators don't set that one, but at least they set
6969 if [board_info target exists slow_simulator] {
6970 return [board_info target slow_simulator]
6976 # Return 1 if programs are intended to be run on hardware rather than
6979 proc check_effective_target_hw { } {
6981 # All "src/sim" simulators set this one.
6982 if [board_info target exists is_simulator] {
6983 if [board_info target is_simulator] {
6990 # The "sid" simulators don't set that one, but at least they set
6992 if [board_info target exists slow_simulator] {
6993 if [board_info target slow_simulator] {
7003 # Return 1 if the target is a VxWorks kernel.
7005 proc check_effective_target_vxworks_kernel { } {
7006 return [check_no_compiler_messages vxworks_kernel assembly {
7007 #if !defined __vxworks || defined __RTP__
7013 # Return 1 if the target is a VxWorks RTP.
7015 proc check_effective_target_vxworks_rtp { } {
7016 return [check_no_compiler_messages vxworks_rtp assembly {
7017 #if !defined __vxworks || !defined __RTP__
7023 # Return 1 if the target is expected to provide wide character support.
7025 proc check_effective_target_wchar { } {
7026 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
7029 return [check_no_compiler_messages wchar assembly {
7034 # Return 1 if the target has <pthread.h>.
7036 proc check_effective_target_pthread_h { } {
7037 return [check_no_compiler_messages pthread_h assembly {
7038 #include <pthread.h>
7042 # Return 1 if the target can truncate a file from a file-descriptor,
7043 # as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
7044 # chsize. We test for a trivially functional truncation; no stubs.
7045 # As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
7046 # different function to be used.
7048 proc check_effective_target_fd_truncate { } {
7050 #define _FILE_OFFSET_BITS 64
7057 FILE *f = fopen ("tst.tmp", "wb");
7059 const char t[] = "test writing more than ten characters";
7063 write (fd, t, sizeof (t) - 1);
7065 if (ftruncate (fd, 10) != 0)
7074 f = fopen ("tst.tmp", "rb");
7075 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
7083 if { [check_runtime ftruncate $prog] } {
7087 regsub "ftruncate" $prog "chsize" prog
7088 return [check_runtime chsize $prog]
7091 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
7093 proc add_options_for_c99_runtime { flags } {
7094 if { [istarget *-*-solaris2*] } {
7095 return "$flags -std=c99"
7097 if { [istarget powerpc-*-darwin*] } {
7098 return "$flags -mmacosx-version-min=10.3"
7103 # Add to FLAGS all the target-specific flags needed to enable
7104 # full IEEE compliance mode.
7106 proc add_options_for_ieee { flags } {
7107 if { [istarget alpha*-*-*]
7108 || [istarget sh*-*-*] } {
7109 return "$flags -mieee"
7111 if { [istarget rx-*-*] } {
7112 return "$flags -mnofpu"
7117 if {![info exists flags_to_postpone]} {
7118 set flags_to_postpone ""
7121 # Add to FLAGS the flags needed to enable functions to bind locally
7122 # when using pic/PIC passes in the testsuite.
7123 proc add_options_for_bind_pic_locally { flags } {
7124 global flags_to_postpone
7126 # Instead of returning 'flags' with the -fPIE or -fpie appended, we save it
7127 # in 'flags_to_postpone' and append it later in gcc_target_compile procedure in
7128 # order to make sure that the multilib_flags doesn't override this.
7130 if {[check_no_compiler_messages using_pic2 assembly {
7135 set flags_to_postpone "-fPIE"
7138 if {[check_no_compiler_messages using_pic1 assembly {
7143 set flags_to_postpone "-fpie"
7149 # Add to FLAGS the flags needed to enable 64-bit vectors.
7151 proc add_options_for_double_vectors { flags } {
7152 if [is-effective-target arm_neon_ok] {
7153 return "$flags -mvectorize-with-neon-double"
7159 # Return 1 if the target provides a full C99 runtime.
7161 proc check_effective_target_c99_runtime { } {
7162 return [check_cached_effective_target c99_runtime {
7165 set file [open "$srcdir/gcc.dg/builtins-config.h"]
7166 set contents [read $file]
7169 #ifndef HAVE_C99_RUNTIME
7170 #error !HAVE_C99_RUNTIME
7173 check_no_compiler_messages_nocache c99_runtime assembly \
7174 $contents [add_options_for_c99_runtime ""]
7178 # Return 1 if target wchar_t is at least 4 bytes.
7180 proc check_effective_target_4byte_wchar_t { } {
7181 return [check_no_compiler_messages 4byte_wchar_t object {
7182 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
7186 # Return 1 if the target supports automatic stack alignment.
7188 proc check_effective_target_automatic_stack_alignment { } {
7189 # Ordinarily x86 supports automatic stack alignment ...
7190 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
7191 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
7192 # ... except Win64 SEH doesn't. Succeed for Win32 though.
7193 return [check_effective_target_ilp32];
7200 # Return true if we are compiling for AVX target.
7202 proc check_avx_available { } {
7203 if { [check_no_compiler_messages avx_available assembly {
7213 # Return true if 32- and 16-bytes vectors are available.
7215 proc check_effective_target_vect_sizes_32B_16B { } {
7216 if { [check_avx_available] && ![check_prefer_avx128] } {
7223 # Return true if 128-bits vectors are preferred even if 256-bits vectors
7226 proc check_prefer_avx128 { } {
7227 if ![check_avx_available] {
7230 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
7231 float a[1024],b[1024],c[1024];
7232 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
7233 } "-O2 -ftree-vectorize"]
7237 # Return 1 if avx512f instructions can be compiled.
7239 proc check_effective_target_avx512f { } {
7240 return [check_no_compiler_messages avx512f object {
7241 typedef double __m512d __attribute__ ((__vector_size__ (64)));
7243 __m512d _mm512_add (__m512d a)
7245 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
7250 # Return 1 if avx instructions can be compiled.
7252 proc check_effective_target_avx { } {
7253 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
7256 return [check_no_compiler_messages avx object {
7257 void _mm256_zeroall (void)
7259 __builtin_ia32_vzeroall ();
7264 # Return 1 if avx2 instructions can be compiled.
7265 proc check_effective_target_avx2 { } {
7266 return [check_no_compiler_messages avx2 object {
7267 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
7269 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
7271 return __builtin_ia32_andnotsi256 (__X, __Y);
7276 # Return 1 if sse instructions can be compiled.
7277 proc check_effective_target_sse { } {
7278 return [check_no_compiler_messages sse object {
7281 __builtin_ia32_stmxcsr ();
7287 # Return 1 if sse2 instructions can be compiled.
7288 proc check_effective_target_sse2 { } {
7289 return [check_no_compiler_messages sse2 object {
7290 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7292 __m128i _mm_srli_si128 (__m128i __A, int __N)
7294 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
7299 # Return 1 if sse4.1 instructions can be compiled.
7300 proc check_effective_target_sse4 { } {
7301 return [check_no_compiler_messages sse4.1 object {
7302 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7303 typedef int __v4si __attribute__ ((__vector_size__ (16)));
7305 __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
7307 return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
7313 # Return 1 if F16C instructions can be compiled.
7315 proc check_effective_target_f16c { } {
7316 return [check_no_compiler_messages f16c object {
7317 #include "immintrin.h"
7319 foo (unsigned short val)
7321 return _cvtsh_ss (val);
7326 # Return 1 if C wchar_t type is compatible with char16_t.
7328 proc check_effective_target_wchar_t_char16_t_compatible { } {
7329 return [check_no_compiler_messages wchar_t_char16_t object {
7331 __CHAR16_TYPE__ *p16 = &wc;
7332 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
7336 # Return 1 if C wchar_t type is compatible with char32_t.
7338 proc check_effective_target_wchar_t_char32_t_compatible { } {
7339 return [check_no_compiler_messages wchar_t_char32_t object {
7341 __CHAR32_TYPE__ *p32 = &wc;
7342 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
7346 # Return 1 if pow10 function exists.
7348 proc check_effective_target_pow10 { } {
7349 return [check_runtime pow10 {
7359 # Return 1 if issignaling function exists.
7360 proc check_effective_target_issignaling {} {
7361 return [check_runtime issignaling {
7366 return issignaling (0.0);
7371 # Return 1 if current options generate DFP instructions, 0 otherwise.
7372 proc check_effective_target_hard_dfp {} {
7373 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
7374 typedef float d64 __attribute__((mode(DD)));
7376 void foo (void) { z = x + y; }
7380 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
7381 # for strchr etc. functions.
7383 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
7384 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
7387 #if !defined(__cplusplus) \
7388 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
7389 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
7390 ISO C++ correct string.h and wchar.h protos not supported.
7397 # Return 1 if GNU as is used.
7399 proc check_effective_target_gas { } {
7400 global use_gas_saved
7403 if {![info exists use_gas_saved]} {
7404 # Check if the as used by gcc is GNU as.
7405 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
7406 # Provide /dev/null as input, otherwise gas times out reading from
7408 set status [remote_exec host "$gcc_as" "-v /dev/null"]
7409 set as_output [lindex $status 1]
7410 if { [ string first "GNU" $as_output ] >= 0 } {
7416 return $use_gas_saved
7419 # Return 1 if GNU ld is used.
7421 proc check_effective_target_gld { } {
7422 global use_gld_saved
7425 if {![info exists use_gld_saved]} {
7426 # Check if the ld used by gcc is GNU ld.
7427 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
7428 set status [remote_exec host "$gcc_ld" "--version"]
7429 set ld_output [lindex $status 1]
7430 if { [ string first "GNU" $ld_output ] >= 0 } {
7436 return $use_gld_saved
7439 # Return 1 if the compiler has been configure with link-time optimization
7442 proc check_effective_target_lto { } {
7443 if { [istarget nvptx-*-*] } {
7446 return [check_no_compiler_messages lto object {
7451 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
7453 proc check_effective_target_maybe_x32 { } {
7454 return [check_no_compiler_messages maybe_x32 object {
7456 } "-mx32 -maddress-mode=short"]
7459 # Return 1 if this target supports the -fsplit-stack option, 0
7462 proc check_effective_target_split_stack {} {
7463 return [check_no_compiler_messages split_stack object {
7468 # Return 1 if this target supports the -masm=intel option, 0
7471 proc check_effective_target_masm_intel {} {
7472 return [check_no_compiler_messages masm_intel object {
7473 extern void abort (void);
7477 # Return 1 if the language for the compiler under test is C.
7479 proc check_effective_target_c { } {
7481 if [string match $tool "gcc"] {
7487 # Return 1 if the language for the compiler under test is C++.
7489 proc check_effective_target_c++ { } {
7491 if { [string match $tool "g++"] || [string match $tool "libstdc++"] } {
7497 set cxx_default "c++14"
7498 # Check whether the current active language standard supports the features
7499 # of C++11/C++14 by checking for the presence of one of the -std flags.
7500 # This assumes that the default for the compiler is $cxx_default, and that
7501 # there will never be multiple -std= arguments on the command line.
7502 proc check_effective_target_c++11_only { } {
7504 if ![check_effective_target_c++] {
7507 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
7510 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
7515 proc check_effective_target_c++11 { } {
7516 if [check_effective_target_c++11_only] {
7519 return [check_effective_target_c++14]
7521 proc check_effective_target_c++11_down { } {
7522 if ![check_effective_target_c++] {
7525 return [expr ![check_effective_target_c++14] ]
7528 proc check_effective_target_c++14_only { } {
7530 if ![check_effective_target_c++] {
7533 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
7536 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
7542 proc check_effective_target_c++14 { } {
7543 if [check_effective_target_c++14_only] {
7546 return [check_effective_target_c++1z]
7548 proc check_effective_target_c++14_down { } {
7549 if ![check_effective_target_c++] {
7552 return [expr ![check_effective_target_c++1z] ]
7555 proc check_effective_target_c++98_only { } {
7557 if ![check_effective_target_c++] {
7560 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
7563 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
7569 proc check_effective_target_c++1z_only { } {
7571 if ![check_effective_target_c++] {
7574 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
7577 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
7582 proc check_effective_target_c++1z { } {
7583 return [check_effective_target_c++1z_only]
7586 # Check for C++ Concepts TS support, i.e. -fconcepts flag.
7587 proc check_effective_target_concepts { } {
7588 return [check-flags { "" { } { -fconcepts } }]
7591 # Return 1 if expensive testcases should be run.
7593 proc check_effective_target_run_expensive_tests { } {
7594 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
7600 # Returns 1 if "mempcpy" is available on the target system.
7602 proc check_effective_target_mempcpy {} {
7603 return [check_function_available "mempcpy"]
7606 # Returns 1 if "stpcpy" is available on the target system.
7608 proc check_effective_target_stpcpy {} {
7609 return [check_function_available "stpcpy"]
7612 # Check whether the vectorizer tests are supported by the target and
7613 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
7614 # If a port wants to execute the tests more than once it should append
7615 # the supported target to EFFECTIVE_TARGETS instead, and the compile flags
7616 # will be added by a call to add_options_for_<target>.
7617 # Set dg-do-what-default to either compile or run, depending on target
7618 # capabilities. Do not set this if the supported target is appended to
7619 # EFFECTIVE_TARGETS. Flags and this variable will be set by et-dg-runtest
7620 # automatically. Return the number of effective targets if vectorizer tests
7621 # are supported, 0 otherwise.
7623 proc check_vect_support_and_set_flags { } {
7624 global DEFAULT_VECTCFLAGS
7625 global dg-do-what-default
7626 global EFFECTIVE_TARGETS
7628 if [istarget powerpc-*paired*] {
7629 lappend DEFAULT_VECTCFLAGS "-mpaired"
7630 if [check_750cl_hw_available] {
7631 set dg-do-what-default run
7633 set dg-do-what-default compile
7635 } elseif [istarget powerpc*-*-*] {
7636 # Skip targets not supporting -maltivec.
7637 if ![is-effective-target powerpc_altivec_ok] {
7641 lappend DEFAULT_VECTCFLAGS "-maltivec"
7642 if [check_p9vector_hw_available] {
7643 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
7644 } elseif [check_p8vector_hw_available] {
7645 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
7646 } elseif [check_vsx_hw_available] {
7647 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
7650 if [check_vmx_hw_available] {
7651 set dg-do-what-default run
7653 if [is-effective-target ilp32] {
7654 # Specify a cpu that supports VMX for compile-only tests.
7655 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
7657 set dg-do-what-default compile
7659 } elseif { [istarget spu-*-*] } {
7660 set dg-do-what-default run
7661 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
7662 lappend DEFAULT_VECTCFLAGS "-msse2"
7663 if { [check_effective_target_sse2_runtime] } {
7664 set dg-do-what-default run
7666 set dg-do-what-default compile
7668 } elseif { [istarget mips*-*-*]
7669 && [check_effective_target_nomips16] } {
7670 if { [check_effective_target_mpaired_single] } {
7671 lappend EFFECTIVE_TARGETS mpaired_single
7673 if { [check_effective_target_mips_loongson] } {
7674 lappend EFFECTIVE_TARGETS mips_loongson
7676 if { [check_effective_target_mips_msa] } {
7677 lappend EFFECTIVE_TARGETS mips_msa
7679 return [llength $EFFECTIVE_TARGETS]
7680 } elseif [istarget sparc*-*-*] {
7681 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
7682 if [check_effective_target_ultrasparc_hw] {
7683 set dg-do-what-default run
7685 set dg-do-what-default compile
7687 } elseif [istarget alpha*-*-*] {
7688 # Alpha's vectorization capabilities are extremely limited.
7689 # It's more effort than its worth disabling all of the tests
7690 # that it cannot pass. But if you actually want to see what
7691 # does work, command out the return.
7694 lappend DEFAULT_VECTCFLAGS "-mmax"
7695 if [check_alpha_max_hw_available] {
7696 set dg-do-what-default run
7698 set dg-do-what-default compile
7700 } elseif [istarget ia64-*-*] {
7701 set dg-do-what-default run
7702 } elseif [is-effective-target arm_neon_ok] {
7703 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
7704 # NEON does not support denormals, so is not used for vectorization by
7705 # default to avoid loss of precision. We must pass -ffast-math to test
7706 # vectorization of float operations.
7707 lappend DEFAULT_VECTCFLAGS "-ffast-math"
7708 if [is-effective-target arm_neon_hw] {
7709 set dg-do-what-default run
7711 set dg-do-what-default compile
7713 } elseif [istarget "aarch64*-*-*"] {
7714 set dg-do-what-default run
7722 # Return 1 if the target does *not* require strict alignment.
7724 proc check_effective_target_non_strict_align {} {
7726 # On ARM, the default is to use STRICT_ALIGNMENT, but there
7727 # are interfaces defined for misaligned access and thus
7728 # depending on the architecture levels unaligned access is
7730 if [istarget "arm*-*-*"] {
7731 return [check_effective_target_arm_unaligned]
7734 return [check_no_compiler_messages non_strict_align assembly {
7736 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
7738 void foo(void) { z = (c *) y; }
7742 # Return 1 if the target has <ucontext.h>.
7744 proc check_effective_target_ucontext_h { } {
7745 return [check_no_compiler_messages ucontext_h assembly {
7746 #include <ucontext.h>
7750 proc check_effective_target_aarch64_tiny { } {
7751 if { [istarget aarch64*-*-*] } {
7752 return [check_no_compiler_messages aarch64_tiny object {
7753 #ifdef __AARCH64_CMODEL_TINY__
7756 #error target not AArch64 tiny code model
7764 # Create functions to check that the AArch64 assembler supports the
7765 # various architecture extensions via the .arch_extension pseudo-op.
7767 foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse"} {
7768 eval [string map [list FUNC $aarch64_ext] {
7769 proc check_effective_target_aarch64_asm_FUNC_ok { } {
7770 if { [istarget aarch64*-*-*] } {
7771 return [check_no_compiler_messages aarch64_FUNC_assembler object {
7772 __asm__ (".arch_extension FUNC");
7773 } "-march=armv8-a+FUNC"]
7781 proc check_effective_target_aarch64_small { } {
7782 if { [istarget aarch64*-*-*] } {
7783 return [check_no_compiler_messages aarch64_small object {
7784 #ifdef __AARCH64_CMODEL_SMALL__
7787 #error target not AArch64 small code model
7795 proc check_effective_target_aarch64_large { } {
7796 if { [istarget aarch64*-*-*] } {
7797 return [check_no_compiler_messages aarch64_large object {
7798 #ifdef __AARCH64_CMODEL_LARGE__
7801 #error target not AArch64 large code model
7810 # Return 1 if this is a reduced AVR Tiny core. Such cores have different
7811 # register set, instruction set, addressing capabilities and ABI.
7813 proc check_effective_target_avr_tiny { } {
7814 if { [istarget avr*-*-*] } {
7815 return [check_no_compiler_messages avr_tiny object {
7819 #error target not a reduced AVR Tiny core
7827 # Return 1 if <fenv.h> is available with all the standard IEEE
7828 # exceptions and floating-point exceptions are raised by arithmetic
7829 # operations. (If the target requires special options for "inexact"
7830 # exceptions, those need to be specified in the testcases.)
7832 proc check_effective_target_fenv_exceptions {} {
7833 return [check_runtime fenv_exceptions {
7836 #ifndef FE_DIVBYZERO
7837 # error Missing FE_DIVBYZERO
7840 # error Missing FE_INEXACT
7843 # error Missing FE_INVALID
7846 # error Missing FE_OVERFLOW
7848 #ifndef FE_UNDERFLOW
7849 # error Missing FE_UNDERFLOW
7851 volatile float a = 0.0f, r;
7856 if (fetestexcept (FE_INVALID))
7861 } [add_options_for_ieee "-std=gnu99"]]
7864 proc check_effective_target_tiny {} {
7865 global et_target_tiny_saved
7867 if [info exists et_target_tiny_saved] {
7868 verbose "check_effective_target_tiny: using cached result" 2
7870 set et_target_tiny_saved 0
7871 if { [istarget aarch64*-*-*]
7872 && [check_effective_target_aarch64_tiny] } {
7873 set et_target_tiny_saved 1
7875 if { [istarget avr-*-*]
7876 && [check_effective_target_avr_tiny] } {
7877 set et_target_tiny_saved 1
7881 return $et_target_tiny_saved
7884 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
7886 proc check_effective_target_logical_op_short_circuit {} {
7887 if { [istarget mips*-*-*]
7888 || [istarget arc*-*-*]
7889 || [istarget avr*-*-*]
7890 || [istarget crisv32-*-*] || [istarget cris-*-*]
7891 || [istarget mmix-*-*]
7892 || [istarget s390*-*-*]
7893 || [istarget powerpc*-*-*]
7894 || [istarget nios2*-*-*]
7895 || [istarget visium-*-*]
7896 || [check_effective_target_arm_cortex_m] } {
7902 # Record that dg-final test TEST requires convential compilation.
7904 proc force_conventional_output_for { test } {
7905 if { [info proc $test] == "" } {
7906 perror "$test does not exist"
7909 proc ${test}_required_options {} {
7910 global gcc_force_conventional_output
7911 return $gcc_force_conventional_output
7915 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
7916 # otherwise. Cache the result.
7918 proc check_effective_target_pie_copyreloc { } {
7919 global pie_copyreloc_available_saved
7921 global GCC_UNDER_TEST
7923 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
7927 # Need auto-host.h to check linker support.
7928 if { ![file exists ../../auto-host.h ] } {
7932 if [info exists pie_copyreloc_available_saved] {
7933 verbose "check_effective_target_pie_copyreloc returning saved $pie_copyreloc_available_saved" 2
7935 # Set up and compile to see if linker supports PIE with copy
7936 # reloc. Include the current process ID in the file names to
7937 # prevent conflicts with invocations for multiple testsuites.
7942 set f [open $src "w"]
7943 puts $f "#include \"../../auto-host.h\""
7944 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
7945 puts $f "# error Linker does not support PIE with copy reloc."
7949 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
7950 set lines [${tool}_target_compile $src $obj object ""]
7955 if [string match "" $lines] then {
7956 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
7957 set pie_copyreloc_available_saved 1
7959 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
7960 set pie_copyreloc_available_saved 0
7964 return $pie_copyreloc_available_saved
7967 # Return 1 if the x86 target supports R_386_GOT32X relocation, 0
7968 # otherwise. Cache the result.
7970 proc check_effective_target_got32x_reloc { } {
7971 global got32x_reloc_available_saved
7973 global GCC_UNDER_TEST
7975 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
7979 # Need auto-host.h to check linker support.
7980 if { ![file exists ../../auto-host.h ] } {
7984 if [info exists got32x_reloc_available_saved] {
7985 verbose "check_effective_target_got32x_reloc returning saved $got32x_reloc_available_saved" 2
7987 # Include the current process ID in the file names to prevent
7988 # conflicts with invocations for multiple testsuites.
7990 set src got32x[pid].c
7991 set obj got32x[pid].o
7993 set f [open $src "w"]
7994 puts $f "#include \"../../auto-host.h\""
7995 puts $f "#if HAVE_AS_IX86_GOT32X == 0"
7996 puts $f "# error Assembler does not support R_386_GOT32X."
8000 verbose "check_effective_target_got32x_reloc compiling testfile $src" 2
8001 set lines [${tool}_target_compile $src $obj object ""]
8006 if [string match "" $lines] then {
8007 verbose "check_effective_target_got32x_reloc testfile compilation passed" 2
8008 set got32x_reloc_available_saved 1
8010 verbose "check_effective_target_got32x_reloc testfile compilation failed" 2
8011 set got32x_reloc_available_saved 0
8015 return $got32x_reloc_available_saved
8018 # Return 1 if the x86 target supports calling ___tls_get_addr via GOT,
8019 # 0 otherwise. Cache the result.
8021 proc check_effective_target_tls_get_addr_via_got { } {
8022 global tls_get_addr_via_got_available_saved
8024 global GCC_UNDER_TEST
8026 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8030 # Need auto-host.h to check linker support.
8031 if { ![file exists ../../auto-host.h ] } {
8035 if [info exists tls_get_addr_via_got_available_saved] {
8036 verbose "check_effective_target_tls_get_addr_via_got returning saved $tls_get_addr_via_got_available_saved" 2
8038 # Include the current process ID in the file names to prevent
8039 # conflicts with invocations for multiple testsuites.
8041 set src tls_get_addr_via_got[pid].c
8042 set obj tls_get_addr_via_got[pid].o
8044 set f [open $src "w"]
8045 puts $f "#include \"../../auto-host.h\""
8046 puts $f "#if HAVE_AS_IX86_TLS_GET_ADDR_GOT == 0"
8047 puts $f "# error Assembler/linker do not support calling ___tls_get_addr via GOT."
8051 verbose "check_effective_target_tls_get_addr_via_got compiling testfile $src" 2
8052 set lines [${tool}_target_compile $src $obj object ""]
8057 if [string match "" $lines] then {
8058 verbose "check_effective_target_tls_get_addr_via_got testfile compilation passed" 2
8059 set tls_get_addr_via_got_available_saved 1
8061 verbose "check_effective_target_tls_get_addr_via_got testfile compilation failed" 2
8062 set tls_get_addr_via_got_available_saved 0
8066 return $tls_get_addr_via_got_available_saved
8069 # Return 1 if the target uses comdat groups.
8071 proc check_effective_target_comdat_group {} {
8072 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat" assembly {
8074 inline int foo () { return 1; }
8079 # Return 1 if target supports __builtin_eh_return
8080 proc check_effective_target_builtin_eh_return { } {
8081 return [check_no_compiler_messages builtin_eh_return object {
8082 void test (long l, void *p)
8084 __builtin_eh_return (l, p);
8089 # Return 1 if the target supports max reduction for vectors.
8091 proc check_effective_target_vect_max_reduc { } {
8092 if { [istarget aarch64*-*-*] || [istarget arm*-*-*] } {
8098 # Return 1 if there is an nvptx offload compiler.
8100 proc check_effective_target_offload_nvptx { } {
8101 return [check_no_compiler_messages offload_nvptx object {
8102 int main () {return 0;}
8103 } "-foffload=nvptx-none" ]
8106 # Return 1 if the compiler has been configured with hsa offloading.
8108 proc check_effective_target_offload_hsa { } {
8109 return [check_no_compiler_messages offload_hsa assembly {
8110 int main () {return 0;}
8114 # Return 1 if the target support -fprofile-update=atomic
8115 proc check_effective_target_profile_update_atomic {} {
8116 return [check_no_compiler_messages profile_update_atomic assembly {
8117 int main (void) { return 0; }
8118 } "-fprofile-update=atomic -fprofile-generate"]
8121 #For versions of ARM architectures that have hardware div insn,
8122 #disable the divmod transform
8124 proc check_effective_target_arm_divmod_simode { } {
8125 return [check_no_compiler_messages arm_divmod assembly {
8126 #ifdef __ARM_ARCH_EXT_IDIV__
8133 # Return 1 if target supports divmod hardware insn or divmod libcall.
8135 proc check_effective_target_divmod { } {
8136 #TODO: Add checks for all targets that have either hardware divmod insn
8137 # or define libfunc for divmod.
8138 if { [istarget arm*-*-*]
8139 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
8145 # Return 1 if target supports divmod for SImode. The reason for
8146 # separating this from check_effective_target_divmod is that
8147 # some versions of ARM architecture define div instruction
8148 # only for simode, and for these archs, we do not want to enable
8149 # divmod transform for simode.
8151 proc check_effective_target_divmod_simode { } {
8152 if { [istarget arm*-*-*] } {
8153 return [check_effective_target_arm_divmod_simode]
8156 return [check_effective_target_divmod]
8159 # Return 1 if store merging optimization is applicable for target.
8160 # Store merging is not profitable for targets like the avr which
8161 # can load/store only one byte at a time. Use int size as a proxy
8162 # for the number of bytes the target can write, and skip for targets
8163 # with a smallish (< 32) size.
8165 proc check_effective_target_store_merge { } {
8166 if { [is-effective-target non_strict_align ] && [is-effective-target int32plus] } {