1 # Copyright (C) 1999-2016 Free Software Foundation, Inc.
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC; see the file COPYING3. If not see
15 # <http://www.gnu.org/licenses/>.
17 # Please email any bugs, comments, and/or additions to this file to:
18 # gcc-patches@gcc.gnu.org
20 # This file defines procs for determining features supported by the target.
22 # Try to compile the code given by CONTENTS into an output file of
23 # type TYPE, where TYPE is as for target_compile. Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the name of the output file.
27 # BASENAME is a prefix to use for source and output files.
28 # If ARGS is not empty, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise, code should contain:
34 # "! Fortran" for Fortran code,
36 # "// ObjC++" for ObjC++
38 # If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
39 # allow for ObjC/ObjC++ specific flags.
40 proc check_compile {basename type contents args} {
42 verbose "check_compile tool: $tool for $basename"
44 # Save additional_sources to avoid compiling testsuite's sources
45 # against check_compile's source.
46 global additional_sources
47 if [info exists additional_sources] {
48 set tmp_additional_sources "$additional_sources"
49 set additional_sources ""
52 if { [llength $args] > 0 } {
53 set options [list "additional_flags=[lindex $args 0]"]
57 switch -glob -- $contents {
58 "*! Fortran*" { set src ${basename}[pid].f90 }
59 "*// C++*" { set src ${basename}[pid].cc }
60 "*// ObjC++*" { set src ${basename}[pid].mm }
61 "*/* ObjC*" { set src ${basename}[pid].m }
62 "*// Go*" { set src ${basename}[pid].go }
65 "objc" { set src ${basename}[pid].m }
66 "obj-c++" { set src ${basename}[pid].mm }
67 default { set src ${basename}[pid].c }
72 set compile_type $type
74 assembly { set output ${basename}[pid].s }
75 object { set output ${basename}[pid].o }
76 executable { set output ${basename}[pid].exe }
78 set output ${basename}[pid].s
79 lappend options "additional_flags=-fdump-$type"
80 set compile_type assembly
86 set lines [${tool}_target_compile $src $output $compile_type "$options"]
89 set scan_output $output
90 # Don't try folding this into the switch above; calling "glob" before the
91 # file is created won't work.
92 if [regexp "rtl-(.*)" $type dummy rtl_type] {
93 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
97 # Restore additional_sources.
98 if [info exists additional_sources] {
99 set additional_sources "$tmp_additional_sources"
102 return [list $lines $scan_output]
105 proc current_target_name { } {
107 if [info exists target_info(target,name)] {
108 set answer $target_info(target,name)
115 # Implement an effective-target check for property PROP by invoking
116 # the Tcl command ARGS and seeing if it returns true.
118 proc check_cached_effective_target { prop args } {
122 set target [current_target_name]
123 if {![info exists et_cache($prop,target)]
124 || $et_cache($prop,target) != $target} {
125 verbose "check_cached_effective_target $prop: checking $target" 2
126 set et_cache($prop,target) $target
127 set et_cache($prop,value) [uplevel eval $args]
128 if {![info exists et_prop_list]
129 || [lsearch $et_prop_list $prop] < 0} {
130 lappend et_prop_list $prop
132 verbose "check_cached_effective_target cached list is now: $et_prop_list" 2
134 set value $et_cache($prop,value)
135 verbose "check_cached_effective_target $prop: returning $value for $target" 2
139 # Clear effective-target cache. This is useful after testing
140 # effective-target features and overriding TEST_ALWAYS_FLAGS and/or
142 # If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS then they should
143 # do a clear_effective_target_cache at the end as the target cache can
144 # make decisions based upon the flags, and those decisions need to be
145 # redone when the flags change. An example of this is the
146 # asan_init/asan_finish pair.
148 proc clear_effective_target_cache { } {
152 if {[info exists et_prop_list]} {
153 verbose "clear_effective_target_cache: $et_prop_list" 2
154 foreach prop $et_prop_list {
155 unset et_cache($prop,value)
156 unset et_cache($prop,target)
162 # Like check_compile, but delete the output file and return true if the
163 # compiler printed no messages.
164 proc check_no_compiler_messages_nocache {args} {
165 set result [eval check_compile $args]
166 set lines [lindex $result 0]
167 set output [lindex $result 1]
168 remote_file build delete $output
169 return [string match "" $lines]
172 # Like check_no_compiler_messages_nocache, but cache the result.
173 # PROP is the property we're checking, and doubles as a prefix for
174 # temporary filenames.
175 proc check_no_compiler_messages {prop args} {
176 return [check_cached_effective_target $prop {
177 eval [list check_no_compiler_messages_nocache $prop] $args
181 # Like check_compile, but return true if the compiler printed no
182 # messages and if the contents of the output file satisfy PATTERN.
183 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
184 # don't match regular expression REGEXP, otherwise they satisfy it
185 # if they do match regular expression PATTERN. (PATTERN can start
186 # with something like "[!]" if the regular expression needs to match
187 # "!" as the first character.)
189 # Delete the output file before returning. The other arguments are
190 # as for check_compile.
191 proc check_no_messages_and_pattern_nocache {basename pattern args} {
194 set result [eval [list check_compile $basename] $args]
195 set lines [lindex $result 0]
196 set output [lindex $result 1]
199 if { [string match "" $lines] } {
200 set chan [open "$output"]
201 set invert [regexp {^!(.*)} $pattern dummy pattern]
202 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
206 remote_file build delete $output
210 # Like check_no_messages_and_pattern_nocache, but cache the result.
211 # PROP is the property we're checking, and doubles as a prefix for
212 # temporary filenames.
213 proc check_no_messages_and_pattern {prop pattern args} {
214 return [check_cached_effective_target $prop {
215 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
219 # Try to compile and run an executable from code CONTENTS. Return true
220 # if the compiler reports no messages and if execution "passes" in the
221 # usual DejaGNU sense. The arguments are as for check_compile, with
222 # TYPE implicitly being "executable".
223 proc check_runtime_nocache {basename contents args} {
226 set result [eval [list check_compile $basename executable $contents] $args]
227 set lines [lindex $result 0]
228 set output [lindex $result 1]
231 if { [string match "" $lines] } {
232 # No error messages, everything is OK.
233 set result [remote_load target "./$output" "" ""]
234 set status [lindex $result 0]
235 verbose "check_runtime_nocache $basename: status is <$status>" 2
236 if { $status == "pass" } {
240 remote_file build delete $output
244 # Like check_runtime_nocache, but cache the result. PROP is the
245 # property we're checking, and doubles as a prefix for temporary
247 proc check_runtime {prop args} {
250 return [check_cached_effective_target $prop {
251 eval [list check_runtime_nocache $prop] $args
255 ###############################
256 # proc check_weak_available { }
257 ###############################
259 # weak symbols are only supported in some configs/object formats
260 # this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
262 proc check_weak_available { } {
265 # All mips targets should support it
267 if { [ string first "mips" $target_cpu ] >= 0 } {
271 # All AIX targets should support it
273 if { [istarget *-*-aix*] } {
277 # All solaris2 targets should support it
279 if { [istarget *-*-solaris2*] } {
283 # Windows targets Cygwin and MingW32 support it
285 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
289 # HP-UX 10.X doesn't support it
291 if { [istarget hppa*-*-hpux10*] } {
295 # nvptx (nearly) supports it
297 if { [istarget nvptx-*-*] } {
301 # ELF and ECOFF support it. a.out does with gas/gld but may also with
302 # other linkers, so we should try it
304 set objformat [gcc_target_object_format]
312 unknown { return -1 }
317 ###############################
318 # proc check_weak_override_available { }
319 ###############################
321 # Like check_weak_available, but return 0 if weak symbol definitions
322 # cannot be overridden.
324 proc check_weak_override_available { } {
325 if { [istarget *-*-mingw*] } {
328 return [check_weak_available]
331 ###############################
332 # proc check_visibility_available { what_kind }
333 ###############################
335 # The visibility attribute is only support in some object formats
336 # This proc returns 1 if it is supported, 0 if not.
337 # The argument is the kind of visibility, default/protected/hidden/internal.
339 proc check_visibility_available { what_kind } {
340 if [string match "" $what_kind] { set what_kind "hidden" }
342 return [check_no_compiler_messages visibility_available_$what_kind object "
343 void f() __attribute__((visibility(\"$what_kind\")));
348 ###############################
349 # proc check_alias_available { }
350 ###############################
352 # Determine if the target toolchain supports the alias attribute.
354 # Returns 2 if the target supports aliases. Returns 1 if the target
355 # only supports weak aliased. Returns 0 if the target does not
356 # support aliases at all. Returns -1 if support for aliases could not
359 proc check_alias_available { } {
360 global alias_available_saved
363 if [info exists alias_available_saved] {
364 verbose "check_alias_available returning saved $alias_available_saved" 2
368 verbose "check_alias_available compiling testfile $src" 2
369 set f [open $src "w"]
370 # Compile a small test program. The definition of "g" is
371 # necessary to keep the Solaris assembler from complaining
373 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
374 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
376 set lines [${tool}_target_compile $src $obj object ""]
378 remote_file build delete $obj
380 if [string match "" $lines] then {
381 # No error messages, everything is OK.
382 set alias_available_saved 2
384 if [regexp "alias definitions not supported" $lines] {
385 verbose "check_alias_available target does not support aliases" 2
387 set objformat [gcc_target_object_format]
389 if { $objformat == "elf" } {
390 verbose "check_alias_available but target uses ELF format, so it ought to" 2
391 set alias_available_saved -1
393 set alias_available_saved 0
396 if [regexp "only weak aliases are supported" $lines] {
397 verbose "check_alias_available target supports only weak aliases" 2
398 set alias_available_saved 1
400 set alias_available_saved -1
405 verbose "check_alias_available returning $alias_available_saved" 2
408 return $alias_available_saved
411 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
413 proc check_effective_target_alias { } {
414 if { [check_alias_available] < 2 } {
421 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
423 proc check_ifunc_available { } {
424 return [check_no_compiler_messages ifunc_available object {
429 void f() __attribute__((ifunc("g")));
433 # Returns true if --gc-sections is supported on the target.
435 proc check_gc_sections_available { } {
436 global gc_sections_available_saved
439 if {![info exists gc_sections_available_saved]} {
440 # Some targets don't support gc-sections despite whatever's
441 # advertised by ld's options.
442 if { [istarget alpha*-*-*]
443 || [istarget ia64-*-*] } {
444 set gc_sections_available_saved 0
448 # elf2flt uses -q (--emit-relocs), which is incompatible with
450 if { [board_info target exists ldflags]
451 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
452 set gc_sections_available_saved 0
456 # VxWorks kernel modules are relocatable objects linked with -r,
457 # while RTP executables are linked with -q (--emit-relocs).
458 # Both of these options are incompatible with --gc-sections.
459 if { [istarget *-*-vxworks*] } {
460 set gc_sections_available_saved 0
464 # Check if the ld used by gcc supports --gc-sections.
465 set gcc_spec [${tool}_target_compile "-dumpspecs" "" "none" ""]
466 regsub ".*\n\\*linker:\[ \t\]*\n(\[^ \t\n\]*).*" "$gcc_spec" {\1} linker
467 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=$linker" "" "none" ""] 0]
468 set ld_output [remote_exec host "$gcc_ld" "--help"]
469 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
470 set gc_sections_available_saved 1
472 set gc_sections_available_saved 0
475 return $gc_sections_available_saved
478 # Return 1 if according to target_info struct and explicit target list
479 # target is supposed to support trampolines.
481 proc check_effective_target_trampolines { } {
482 if [target_info exists no_trampolines] {
485 if { [istarget avr-*-*]
486 || [istarget msp430-*-*]
487 || [istarget nvptx-*-*]
488 || [istarget hppa2.0w-hp-hpux11.23]
489 || [istarget hppa64-hp-hpux11.23] } {
495 # Return 1 if according to target_info struct and explicit target list
496 # target disables -fdelete-null-pointer-checks. Targets should return 0
497 # if they simply default to -fno-delete-null-pointer-checks but obey
498 # -fdelete-null-pointer-checks when passed explicitly (and tests that
499 # depend on this option should do that).
501 proc check_effective_target_keeps_null_pointer_checks { } {
502 if [target_info exists keeps_null_pointer_checks] {
505 if { [istarget avr-*-*] } {
511 # Return true if profiling is supported on the target.
513 proc check_profiling_available { test_what } {
514 global profiling_available_saved
516 verbose "Profiling argument is <$test_what>" 1
518 # These conditions depend on the argument so examine them before
519 # looking at the cache variable.
521 # Tree profiling requires TLS runtime support.
522 if { $test_what == "-fprofile-generate" } {
523 if { ![check_effective_target_tls_runtime] } {
528 # Support for -p on solaris2 relies on mcrt1.o which comes with the
529 # vendor compiler. We cannot reliably predict the directory where the
530 # vendor compiler (and thus mcrt1.o) is installed so we can't
531 # necessarily find mcrt1.o even if we have it.
532 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
536 # We don't yet support profiling for MIPS16.
537 if { [istarget mips*-*-*]
538 && ![check_effective_target_nomips16]
539 && ($test_what == "-p" || $test_what == "-pg") } {
543 # MinGW does not support -p.
544 if { [istarget *-*-mingw*] && $test_what == "-p" } {
548 # cygwin does not support -p.
549 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
553 # uClibc does not have gcrt1.o.
554 if { [check_effective_target_uclibc]
555 && ($test_what == "-p" || $test_what == "-pg") } {
559 # Now examine the cache variable.
560 if {![info exists profiling_available_saved]} {
561 # Some targets don't have any implementation of __bb_init_func or are
562 # missing other needed machinery.
563 if {[istarget aarch64*-*-elf]
564 || [istarget am3*-*-linux*]
565 || [istarget arm*-*-eabi*]
566 || [istarget arm*-*-elf]
567 || [istarget arm*-*-symbianelf*]
568 || [istarget avr-*-*]
569 || [istarget bfin-*-*]
570 || [istarget cris-*-*]
571 || [istarget crisv32-*-*]
572 || [istarget fido-*-elf]
573 || [istarget h8300-*-*]
574 || [istarget lm32-*-*]
575 || [istarget m32c-*-elf]
576 || [istarget m68k-*-elf]
577 || [istarget m68k-*-uclinux*]
578 || [istarget mep-*-elf]
579 || [istarget mips*-*-elf*]
580 || [istarget mmix-*-*]
581 || [istarget mn10300-*-elf*]
582 || [istarget moxie-*-elf*]
583 || [istarget msp430-*-*]
584 || [istarget nds32*-*-elf]
585 || [istarget nios2-*-elf]
586 || [istarget nvptx-*-*]
587 || [istarget powerpc-*-eabi*]
588 || [istarget powerpc-*-elf]
590 || [istarget tic6x-*-elf]
591 || [istarget visium-*-*]
592 || [istarget xstormy16-*]
593 || [istarget xtensa*-*-elf]
594 || [istarget *-*-rtems*]
595 || [istarget *-*-vxworks*] } {
596 set profiling_available_saved 0
598 set profiling_available_saved 1
602 # -pg link test result can't be cached since it may change between
604 set profiling_working $profiling_available_saved
605 if { $profiling_available_saved == 1
606 && ![check_no_compiler_messages_nocache profiling executable {
607 int main() { return 0; } } "-pg"] } {
608 set profiling_working 0
611 return $profiling_working
614 # Check to see if a target is "freestanding". This is as per the definition
615 # in Section 4 of C99 standard. Effectively, it is a target which supports no
616 # extra headers or libraries other than what is considered essential.
617 proc check_effective_target_freestanding { } {
618 if { [istarget nvptx-*-*] } {
624 # Return 1 if target has packed layout of structure members by
625 # default, 0 otherwise. Note that this is slightly different than
626 # whether the target has "natural alignment": both attributes may be
629 proc check_effective_target_default_packed { } {
630 return [check_no_compiler_messages default_packed assembly {
631 struct x { char a; long b; } c;
632 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
636 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
637 # documentation, where the test also comes from.
639 proc check_effective_target_pcc_bitfield_type_matters { } {
640 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
641 # bitfields, but let's stick to the example code from the docs.
642 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
643 struct foo1 { char x; char :0; char y; };
644 struct foo2 { char x; int :0; char y; };
645 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
649 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
651 proc add_options_for_tls { flags } {
652 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
653 # libthread, so always pass -pthread for native TLS. Same for AIX.
654 # Need to duplicate native TLS check from
655 # check_effective_target_tls_native to avoid recursion.
656 if { ([istarget powerpc-ibm-aix*]) &&
657 [check_no_messages_and_pattern tls_native "!emutls" assembly {
659 int f (void) { return i; }
660 void g (int j) { i = j; }
662 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
667 # Return 1 if indirect jumps are supported, 0 otherwise.
669 proc check_effective_target_indirect_jumps {} {
670 if { [istarget nvptx-*-*] } {
676 # Return 1 if nonlocal goto is supported, 0 otherwise.
678 proc check_effective_target_nonlocal_goto {} {
679 if { [istarget nvptx-*-*] } {
685 # Return 1 if global constructors are supported, 0 otherwise.
687 proc check_effective_target_global_constructor {} {
688 if { [istarget nvptx-*-*] } {
694 # Return 1 if taking label values is supported, 0 otherwise.
696 proc check_effective_target_label_values {} {
697 if { [istarget nvptx-*-*] } {
700 return [check_no_compiler_messages label_values assembly {
701 #ifdef NO_LABEL_VALUES
707 # Return 1 if builtin_return_address and builtin_frame_address are
708 # supported, 0 otherwise.
710 proc check_effective_target_return_address {} {
711 if { [istarget nvptx-*-*] } {
717 # Return 1 if the assembler does not verify function types against
718 # calls, 0 otherwise. Such verification will typically show up problems
719 # with K&R C function declarations.
721 proc check_effective_target_untyped_assembly {} {
722 if { [istarget nvptx-*-*] } {
728 # Return 1 if alloca is supported, 0 otherwise.
730 proc check_effective_target_alloca {} {
731 if { [istarget nvptx-*-*] } {
737 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
739 proc check_effective_target_tls {} {
740 return [check_no_compiler_messages tls assembly {
742 int f (void) { return i; }
743 void g (int j) { i = j; }
747 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
749 proc check_effective_target_tls_native {} {
750 # VxWorks uses emulated TLS machinery, but with non-standard helper
751 # functions, so we fail to automatically detect it.
752 if { [istarget *-*-vxworks*] } {
756 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
758 int f (void) { return i; }
759 void g (int j) { i = j; }
763 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
765 proc check_effective_target_tls_emulated {} {
766 # VxWorks uses emulated TLS machinery, but with non-standard helper
767 # functions, so we fail to automatically detect it.
768 if { [istarget *-*-vxworks*] } {
772 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
774 int f (void) { return i; }
775 void g (int j) { i = j; }
779 # Return 1 if TLS executables can run correctly, 0 otherwise.
781 proc check_effective_target_tls_runtime {} {
782 # The runtime does not have TLS support, but just
783 # running the test below is insufficient to show this.
784 if { [istarget msp430-*-*] || [istarget visium-*-*] } {
787 return [check_runtime tls_runtime {
788 __thread int thr = 0;
789 int main (void) { return thr; }
790 } [add_options_for_tls ""]]
793 # Return 1 if atomic compare-and-swap is supported on 'int'
795 proc check_effective_target_cas_char {} {
796 return [check_no_compiler_messages cas_char assembly {
797 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
803 proc check_effective_target_cas_int {} {
804 return [check_no_compiler_messages cas_int assembly {
805 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
807 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
815 # Return 1 if -ffunction-sections is supported, 0 otherwise.
817 proc check_effective_target_function_sections {} {
818 # Darwin has its own scheme and silently accepts -ffunction-sections.
819 if { [istarget *-*-darwin*] } {
823 return [check_no_compiler_messages functionsections assembly {
825 } "-ffunction-sections"]
828 # Return 1 if instruction scheduling is available, 0 otherwise.
830 proc check_effective_target_scheduling {} {
831 return [check_no_compiler_messages scheduling object {
833 } "-fschedule-insns"]
836 # Return 1 if trapping arithmetic is available, 0 otherwise.
838 proc check_effective_target_trapping {} {
839 return [check_no_compiler_messages trapping object {
840 int add (int a, int b) { return a + b; }
844 # Return 1 if compilation with -fgraphite is error-free for trivial
847 proc check_effective_target_fgraphite {} {
848 return [check_no_compiler_messages fgraphite object {
853 # Return 1 if compilation with -fopenacc is error-free for trivial
856 proc check_effective_target_fopenacc {} {
857 # nvptx can be built with the device-side bits of openacc, but it
858 # does not make sense to test it as an openacc host.
859 if [istarget nvptx-*-*] { return 0 }
861 return [check_no_compiler_messages fopenacc object {
866 # Return 1 if compilation with -fopenmp is error-free for trivial
869 proc check_effective_target_fopenmp {} {
870 # nvptx can be built with the device-side bits of libgomp, but it
871 # does not make sense to test it as an openmp host.
872 if [istarget nvptx-*-*] { return 0 }
874 return [check_no_compiler_messages fopenmp object {
879 # Return 1 if compilation with -fgnu-tm is error-free for trivial
882 proc check_effective_target_fgnu_tm {} {
883 return [check_no_compiler_messages fgnu_tm object {
888 # Return 1 if the target supports mmap, 0 otherwise.
890 proc check_effective_target_mmap {} {
891 return [check_function_available "mmap"]
894 # Return 1 if the target supports dlopen, 0 otherwise.
895 proc check_effective_target_dlopen {} {
896 return [check_no_compiler_messages dlopen executable {
898 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
899 } [add_options_for_dlopen ""]]
902 proc add_options_for_dlopen { flags } {
906 # Return 1 if the target supports clone, 0 otherwise.
907 proc check_effective_target_clone {} {
908 return [check_function_available "clone"]
911 # Return 1 if the target supports setrlimit, 0 otherwise.
912 proc check_effective_target_setrlimit {} {
913 # Darwin has non-posix compliant RLIMIT_AS
914 if { [istarget *-*-darwin*] } {
917 return [check_function_available "setrlimit"]
920 # Return 1 if the target supports swapcontext, 0 otherwise.
921 proc check_effective_target_swapcontext {} {
922 return [check_no_compiler_messages swapcontext executable {
923 #include <ucontext.h>
926 ucontext_t orig_context,child_context;
927 if (swapcontext(&child_context, &orig_context) < 0) { }
932 # Return 1 if compilation with -pthread is error-free for trivial
935 proc check_effective_target_pthread {} {
936 return [check_no_compiler_messages pthread object {
941 # Return 1 if compilation with -gstabs is error-free for trivial
944 proc check_effective_target_stabs {} {
945 return [check_no_compiler_messages stabs object {
950 # Return 1 if compilation with -mpe-aligned-commons is error-free
951 # for trivial code, 0 otherwise.
953 proc check_effective_target_pe_aligned_commons {} {
954 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
955 return [check_no_compiler_messages pe_aligned_commons object {
957 } "-mpe-aligned-commons"]
962 # Return 1 if the target supports -static
963 proc check_effective_target_static {} {
964 return [check_no_compiler_messages static executable {
965 int main (void) { return 0; }
969 # Return 1 if the target supports -fstack-protector
970 proc check_effective_target_fstack_protector {} {
971 return [check_runtime fstack_protector {
972 int main (void) { return 0; }
973 } "-fstack-protector"]
976 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
977 # for trivial code, 0 otherwise.
979 proc check_effective_target_freorder {} {
980 return [check_no_compiler_messages freorder object {
982 } "-freorder-blocks-and-partition"]
985 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
986 # emitted, 0 otherwise. Whether a shared library can actually be built is
987 # out of scope for this test.
989 proc check_effective_target_fpic { } {
990 # Note that M68K has a multilib that supports -fpic but not
991 # -fPIC, so we need to check both. We test with a program that
992 # requires GOT references.
993 foreach arg {fpic fPIC} {
994 if [check_no_compiler_messages $arg object {
995 extern int foo (void); extern int bar;
996 int baz (void) { return foo () + bar; }
1004 # On AArch64, if -fpic is not supported, then we will fall back to -fPIC
1005 # silently. So, we can't rely on above "check_effective_target_fpic" as it
1006 # assumes compiler will give warning if -fpic not supported. Here we check
1007 # whether binutils supports those new -fpic relocation modifiers, and assume
1008 # -fpic is supported if there is binutils support. GCC configuration will
1009 # enable -fpic for AArch64 in this case.
1011 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1012 # memory model -fpic relocation types.
1014 proc check_effective_target_aarch64_small_fpic { } {
1015 if { [istarget aarch64*-*-*] } {
1016 return [check_no_compiler_messages aarch64_small_fpic object {
1017 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1024 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1025 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1026 # in binutils since 2015-03-04 as PR gas/17843.
1028 # This test directive make sure binutils support all features needed by TLS LE
1029 # under -mtls-size=32 on AArch64.
1031 proc check_effective_target_aarch64_tlsle32 { } {
1032 if { [istarget aarch64*-*-*] } {
1033 return [check_no_compiler_messages aarch64_tlsle32 object {
1034 void foo (void) { asm ("movk x1,#:tprel_g0_nc:t1"); }
1041 # Return 1 if -shared is supported, as in no warnings or errors
1042 # emitted, 0 otherwise.
1044 proc check_effective_target_shared { } {
1045 # Note that M68K has a multilib that supports -fpic but not
1046 # -fPIC, so we need to check both. We test with a program that
1047 # requires GOT references.
1048 return [check_no_compiler_messages shared executable {
1049 extern int foo (void); extern int bar;
1050 int baz (void) { return foo () + bar; }
1054 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
1056 proc check_effective_target_pie { } {
1057 if { [istarget *-*-darwin\[912\]*]
1058 || [istarget *-*-dragonfly*]
1059 || [istarget *-*-freebsd*]
1060 || [istarget *-*-linux*]
1061 || [istarget *-*-gnu*] } {
1064 if { [istarget *-*-solaris2.1\[1-9\]*] } {
1065 # Full PIE support was added in Solaris 11.x and Solaris 12, but gcc
1066 # errors out if missing, so check for that.
1067 return [check_no_compiler_messages pie executable {
1068 int main (void) { return 0; }
1074 # Return true if the target supports -mpaired-single (as used on MIPS).
1076 proc check_effective_target_mpaired_single { } {
1077 return [check_no_compiler_messages mpaired_single object {
1079 } "-mpaired-single"]
1082 # Return true if the target has access to FPU instructions.
1084 proc check_effective_target_hard_float { } {
1085 if { [istarget mips*-*-*] } {
1086 return [check_no_compiler_messages hard_float assembly {
1087 #if (defined __mips_soft_float || defined __mips16)
1088 #error __mips_soft_float || __mips16
1093 # This proc is actually checking the availabilty of FPU
1094 # support for doubles, so on the RX we must fail if the
1095 # 64-bit double multilib has been selected.
1096 if { [istarget rx-*-*] } {
1098 # return [check_no_compiler_messages hard_float assembly {
1099 #if defined __RX_64_BIT_DOUBLES__
1100 #error __RX_64_BIT_DOUBLES__
1105 # The generic test equates hard_float with "no call for adding doubles".
1106 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
1107 double a (double b, double c) { return b + c; }
1111 # Return true if the target is a 64-bit MIPS target.
1113 proc check_effective_target_mips64 { } {
1114 return [check_no_compiler_messages mips64 assembly {
1121 # Return true if the target is a MIPS target that does not produce
1124 proc check_effective_target_nomips16 { } {
1125 return [check_no_compiler_messages nomips16 object {
1129 /* A cheap way of testing for -mflip-mips16. */
1130 void foo (void) { asm ("addiu $20,$20,1"); }
1131 void bar (void) { asm ("addiu $20,$20,1"); }
1136 # Add the options needed for MIPS16 function attributes. At the moment,
1137 # we don't support MIPS16 PIC.
1139 proc add_options_for_mips16_attribute { flags } {
1140 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1143 # Return true if we can force a mode that allows MIPS16 code generation.
1144 # We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
1147 proc check_effective_target_mips16_attribute { } {
1148 return [check_no_compiler_messages mips16_attribute assembly {
1152 #if defined __mips_hard_float \
1153 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
1154 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
1155 #error __mips_hard_float && (!_ABIO32 || !_ABIO64)
1157 } [add_options_for_mips16_attribute ""]]
1160 # Return 1 if the target supports long double larger than double when
1161 # using the new ABI, 0 otherwise.
1163 proc check_effective_target_mips_newabi_large_long_double { } {
1164 return [check_no_compiler_messages mips_newabi_large_long_double object {
1165 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1169 # Return true if the target is a MIPS target that has access
1170 # to the LL and SC instructions.
1172 proc check_effective_target_mips_llsc { } {
1173 if { ![istarget mips*-*-*] } {
1176 # Assume that these instructions are always implemented for
1177 # non-elf* targets, via emulation if necessary.
1178 if { ![istarget *-*-elf*] } {
1181 # Otherwise assume LL/SC support for everything but MIPS I.
1182 return [check_no_compiler_messages mips_llsc assembly {
1189 # Return true if the target is a MIPS target that uses in-place relocations.
1191 proc check_effective_target_mips_rel { } {
1192 if { ![istarget mips*-*-*] } {
1195 return [check_no_compiler_messages mips_rel object {
1196 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
1197 || (defined _ABI64 && _MIPS_SIM == _ABI64)
1198 #error _ABIN32 && (_ABIN32 || _ABI64)
1203 # Return true if the target is a MIPS target that uses the EABI.
1205 proc check_effective_target_mips_eabi { } {
1206 if { ![istarget mips*-*-*] } {
1209 return [check_no_compiler_messages mips_eabi object {
1216 # Return 1 if the current multilib does not generate PIC by default.
1218 proc check_effective_target_nonpic { } {
1219 return [check_no_compiler_messages nonpic assembly {
1226 # Return 1 if the current multilib generates PIE by default.
1228 proc check_effective_target_pie_enabled { } {
1229 return [check_no_compiler_messages pie_enabled assembly {
1236 # Return 1 if the target generates -fstack-protector by default.
1238 proc check_effective_target_fstack_protector_enabled {} {
1239 return [ check_no_compiler_messages fstack_protector_enabled assembly {
1240 #if !defined(__SSP__) && !defined(__SSP_ALL__) && \
1241 !defined(__SSP_STRONG__) && !defined(__SSP_EXPICIT__)
1247 # Return 1 if the target does not use a status wrapper.
1249 proc check_effective_target_unwrapped { } {
1250 if { [target_info needs_status_wrapper] != "" \
1251 && [target_info needs_status_wrapper] != "0" } {
1257 # Return true if iconv is supported on the target. In particular IBM1047.
1259 proc check_iconv_available { test_what } {
1262 # If the tool configuration file has not set libiconv, try "-liconv"
1263 if { ![info exists libiconv] } {
1264 set libiconv "-liconv"
1266 set test_what [lindex $test_what 1]
1267 return [check_runtime_nocache $test_what [subst {
1273 cd = iconv_open ("$test_what", "UTF-8");
1274 if (cd == (iconv_t) -1)
1281 # Return true if Cilk Library is supported on the target.
1282 proc check_effective_target_cilkplus_runtime { } {
1283 return [ check_no_compiler_messages_nocache cilkplus_runtime executable {
1287 int __cilkrts_set_param (const char *, const char *);
1289 int x = __cilkrts_set_param ("nworkers", "0");
1292 } "-fcilkplus -lcilkrts" ]
1295 # Return true if the atomic library is supported on the target.
1296 proc check_effective_target_libatomic_available { } {
1297 return [check_no_compiler_messages libatomic_available executable {
1298 int main (void) { return 0; }
1302 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1304 proc check_ascii_locale_available { } {
1308 # Return true if named sections are supported on this target.
1310 proc check_named_sections_available { } {
1311 return [check_no_compiler_messages named_sections assembly {
1312 int __attribute__ ((section("whatever"))) foo;
1316 # Return true if the "naked" function attribute is supported on this target.
1318 proc check_effective_target_naked_functions { } {
1319 return [check_no_compiler_messages naked_functions assembly {
1320 void f() __attribute__((naked));
1324 # Return 1 if the target supports Fortran real kinds larger than real(8),
1327 # When the target name changes, replace the cached result.
1329 proc check_effective_target_fortran_large_real { } {
1330 return [check_no_compiler_messages fortran_large_real executable {
1332 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1339 # Return 1 if the target supports Fortran real kind real(16),
1340 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1341 # this checks for Real(16) only; the other returned real(10) if
1342 # both real(10) and real(16) are available.
1344 # When the target name changes, replace the cached result.
1346 proc check_effective_target_fortran_real_16 { } {
1347 return [check_no_compiler_messages fortran_real_16 executable {
1356 # Return 1 if the target supports Fortran's IEEE modules,
1359 # When the target name changes, replace the cached result.
1361 proc check_effective_target_fortran_ieee { flags } {
1362 return [check_no_compiler_messages fortran_ieee executable {
1364 use, intrinsic :: ieee_features
1370 # Return 1 if the target supports SQRT for the largest floating-point
1371 # type. (Some targets lack the libm support for this FP type.)
1372 # On most targets, this check effectively checks either whether sqrtl is
1373 # available or on __float128 systems whether libquadmath is installed,
1374 # which provides sqrtq.
1376 # When the target name changes, replace the cached result.
1378 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1379 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1381 use iso_fortran_env, only: real_kinds
1382 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1383 real(kind=maxFP), volatile :: x
1391 # Return 1 if the target supports Fortran integer kinds larger than
1392 # integer(8), 0 otherwise.
1394 # When the target name changes, replace the cached result.
1396 proc check_effective_target_fortran_large_int { } {
1397 return [check_no_compiler_messages fortran_large_int executable {
1399 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1400 integer(kind=k) :: i
1405 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1407 # When the target name changes, replace the cached result.
1409 proc check_effective_target_fortran_integer_16 { } {
1410 return [check_no_compiler_messages fortran_integer_16 executable {
1417 # Return 1 if we can statically link libgfortran, 0 otherwise.
1419 # When the target name changes, replace the cached result.
1421 proc check_effective_target_static_libgfortran { } {
1422 return [check_no_compiler_messages static_libgfortran executable {
1429 # Return 1 if cilk-plus is supported by the target, 0 otherwise.
1431 proc check_effective_target_cilkplus { } {
1432 # Skip cilk-plus tests on int16 and size16 targets for now.
1433 # The cilk-plus tests are not generic enough to cover these
1434 # cases and would throw hundreds of FAILs.
1435 if { [check_effective_target_int16]
1436 || ![check_effective_target_size32plus] } {
1440 # Skip AVR, its RAM is too small and too many tests would fail.
1441 if { [istarget avr-*-*] } {
1445 if { ! [check_effective_target_pthread] } {
1452 proc check_linker_plugin_available { } {
1453 return [check_no_compiler_messages_nocache linker_plugin executable {
1454 int main() { return 0; }
1455 } "-flto -fuse-linker-plugin"]
1458 # Return 1 if the target supports executing 750CL paired-single instructions, 0
1459 # otherwise. Cache the result.
1461 proc check_750cl_hw_available { } {
1462 return [check_cached_effective_target 750cl_hw_available {
1463 # If this is not the right target then we can skip the test.
1464 if { ![istarget powerpc-*paired*] } {
1467 check_runtime_nocache 750cl_hw_available {
1471 asm volatile ("ps_mul v0,v0,v0");
1473 asm volatile ("ps_mul 0,0,0");
1482 # Return 1 if the target OS supports running SSE executables, 0
1483 # otherwise. Cache the result.
1485 proc check_sse_os_support_available { } {
1486 return [check_cached_effective_target sse_os_support_available {
1487 # If this is not the right target then we can skip the test.
1488 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1490 } elseif { [istarget i?86-*-solaris2*] } {
1491 # The Solaris 2 kernel doesn't save and restore SSE registers
1492 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1493 check_runtime_nocache sse_os_support_available {
1496 asm volatile ("movaps %xmm0,%xmm0");
1506 # Return 1 if the target OS supports running AVX executables, 0
1507 # otherwise. Cache the result.
1509 proc check_avx_os_support_available { } {
1510 return [check_cached_effective_target avx_os_support_available {
1511 # If this is not the right target then we can skip the test.
1512 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1515 # Check that OS has AVX and SSE saving enabled.
1516 check_runtime_nocache avx_os_support_available {
1519 unsigned int eax, edx;
1521 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1522 return (eax & 6) != 6;
1529 # Return 1 if the target supports executing SSE instructions, 0
1530 # otherwise. Cache the result.
1532 proc check_sse_hw_available { } {
1533 return [check_cached_effective_target sse_hw_available {
1534 # If this is not the right target then we can skip the test.
1535 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1538 check_runtime_nocache sse_hw_available {
1542 unsigned int eax, ebx, ecx, edx;
1543 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1544 return !(edx & bit_SSE);
1552 # Return 1 if the target supports executing SSE2 instructions, 0
1553 # otherwise. Cache the result.
1555 proc check_sse2_hw_available { } {
1556 return [check_cached_effective_target sse2_hw_available {
1557 # If this is not the right target then we can skip the test.
1558 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1561 check_runtime_nocache sse2_hw_available {
1565 unsigned int eax, ebx, ecx, edx;
1566 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1567 return !(edx & bit_SSE2);
1575 # Return 1 if the target supports executing AVX instructions, 0
1576 # otherwise. Cache the result.
1578 proc check_avx_hw_available { } {
1579 return [check_cached_effective_target avx_hw_available {
1580 # If this is not the right target then we can skip the test.
1581 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1584 check_runtime_nocache avx_hw_available {
1588 unsigned int eax, ebx, ecx, edx;
1589 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1590 return ((ecx & (bit_AVX | bit_OSXSAVE))
1591 != (bit_AVX | bit_OSXSAVE));
1599 # Return 1 if the target supports running SSE executables, 0 otherwise.
1601 proc check_effective_target_sse_runtime { } {
1602 if { [check_effective_target_sse]
1603 && [check_sse_hw_available]
1604 && [check_sse_os_support_available] } {
1610 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1612 proc check_effective_target_sse2_runtime { } {
1613 if { [check_effective_target_sse2]
1614 && [check_sse2_hw_available]
1615 && [check_sse_os_support_available] } {
1621 # Return 1 if the target supports running AVX executables, 0 otherwise.
1623 proc check_effective_target_avx_runtime { } {
1624 if { [check_effective_target_avx]
1625 && [check_avx_hw_available]
1626 && [check_avx_os_support_available] } {
1632 # Return 1 if we are compiling for 64-bit PowerPC but we do not use direct
1633 # move instructions for moves from GPR to FPR.
1635 proc check_effective_target_powerpc64_no_dm { } {
1636 # The "mulld" checks if we are generating PowerPC64 code. The "lfd"
1637 # checks if we do not use direct moves, but use the old-fashioned
1638 # slower move-via-the-stack.
1639 return [check_no_messages_and_pattern powerpc64_no_dm \
1640 {\mmulld\M.*\mlfd} assembly {
1641 double f(long long x) { return x*x; }
1645 # Return 1 if the target supports executing power8 vector instructions, 0
1646 # otherwise. Cache the result.
1648 proc check_p8vector_hw_available { } {
1649 return [check_cached_effective_target p8vector_hw_available {
1650 # Some simulators are known to not support VSX/power8 instructions.
1651 # For now, disable on Darwin
1652 if { [istarget powerpc-*-eabi]
1653 || [istarget powerpc*-*-eabispe]
1654 || [istarget *-*-darwin*]} {
1657 set options "-mpower8-vector"
1658 check_runtime_nocache p8vector_hw_available {
1662 asm volatile ("xxlorc vs0,vs0,vs0");
1664 asm volatile ("xxlorc 0,0,0");
1673 # Return 1 if the target supports executing power9 vector instructions, 0
1674 # otherwise. Cache the result.
1676 proc check_p9vector_hw_available { } {
1677 return [check_cached_effective_target p9vector_hw_available {
1678 # Some simulators are known to not support VSX/power8/power9
1679 # instructions. For now, disable on Darwin.
1680 if { [istarget powerpc-*-eabi]
1681 || [istarget powerpc*-*-eabispe]
1682 || [istarget *-*-darwin*]} {
1685 set options "-mpower9-vector"
1686 check_runtime_nocache p9vector_hw_available {
1690 vector double v = (vector double) { 0.0, 0.0 };
1691 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
1699 # Return 1 if the target supports executing power9 modulo instructions, 0
1700 # otherwise. Cache the result.
1702 proc check_p9modulo_hw_available { } {
1703 return [check_cached_effective_target p9modulo_hw_available {
1704 # Some simulators are known to not support VSX/power8/power9
1705 # instructions. For now, disable on Darwin.
1706 if { [istarget powerpc-*-eabi]
1707 || [istarget powerpc*-*-eabispe]
1708 || [istarget *-*-darwin*]} {
1711 set options "-mmodulo"
1712 check_runtime_nocache p9modulo_hw_available {
1715 int i = 5, j = 3, r = -1;
1716 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
1724 # Return 1 if the target supports executing __float128 on PowerPC via software
1725 # emulation, 0 otherwise. Cache the result.
1727 proc check_ppc_float128_sw_available { } {
1728 return [check_cached_effective_target ppc_float128_sw_available {
1729 # Some simulators are known to not support VSX/power8/power9
1730 # instructions. For now, disable on Darwin.
1731 if { [istarget powerpc-*-eabi]
1732 || [istarget powerpc*-*-eabispe]
1733 || [istarget *-*-darwin*]} {
1736 set options "-mfloat128 -mvsx"
1737 check_runtime_nocache ppc_float128_sw_available {
1738 volatile __float128 x = 1.0q;
1739 volatile __float128 y = 2.0q;
1742 __float128 z = x + y;
1750 # Return 1 if the target supports executing __float128 on PowerPC via power9
1751 # hardware instructions, 0 otherwise. Cache the result.
1753 proc check_ppc_float128_hw_available { } {
1754 return [check_cached_effective_target ppc_float128_hw_available {
1755 # Some simulators are known to not support VSX/power8/power9
1756 # instructions. For now, disable on Darwin.
1757 if { [istarget powerpc-*-eabi]
1758 || [istarget powerpc*-*-eabispe]
1759 || [istarget *-*-darwin*]} {
1762 set options "-mfloat128 -mvsx -mfloat128-hardware -mpower9-vector"
1763 check_runtime_nocache ppc_float128_hw_available {
1764 volatile __float128 x = 1.0q;
1765 volatile __float128 y = 2.0q;
1768 __float128 z = x + y;
1769 __float128 w = -1.0q;
1771 __asm__ ("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
1772 return ((z != 3.0q) || (z != w);
1779 # Return 1 if the target supports executing VSX instructions, 0
1780 # otherwise. Cache the result.
1782 proc check_vsx_hw_available { } {
1783 return [check_cached_effective_target vsx_hw_available {
1784 # Some simulators are known to not support VSX instructions.
1785 # For now, disable on Darwin
1786 if { [istarget powerpc-*-eabi]
1787 || [istarget powerpc*-*-eabispe]
1788 || [istarget *-*-darwin*]} {
1792 check_runtime_nocache vsx_hw_available {
1796 asm volatile ("xxlor vs0,vs0,vs0");
1798 asm volatile ("xxlor 0,0,0");
1807 # Return 1 if the target supports executing AltiVec instructions, 0
1808 # otherwise. Cache the result.
1810 proc check_vmx_hw_available { } {
1811 return [check_cached_effective_target vmx_hw_available {
1812 # Some simulators are known to not support VMX instructions.
1813 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
1816 # Most targets don't require special flags for this test case, but
1817 # Darwin does. Just to be sure, make sure VSX is not enabled for
1818 # the altivec tests.
1819 if { [istarget *-*-darwin*]
1820 || [istarget *-*-aix*] } {
1821 set options "-maltivec -mno-vsx"
1823 set options "-mno-vsx"
1825 check_runtime_nocache vmx_hw_available {
1829 asm volatile ("vor v0,v0,v0");
1831 asm volatile ("vor 0,0,0");
1840 proc check_ppc_recip_hw_available { } {
1841 return [check_cached_effective_target ppc_recip_hw_available {
1842 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
1843 # For now, disable on Darwin
1844 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1847 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
1848 check_runtime_nocache ppc_recip_hw_available {
1849 volatile double d_recip, d_rsqrt, d_four = 4.0;
1850 volatile float f_recip, f_rsqrt, f_four = 4.0f;
1853 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
1854 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
1855 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
1856 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
1864 # Return 1 if the target supports executing AltiVec and Cell PPU
1865 # instructions, 0 otherwise. Cache the result.
1867 proc check_effective_target_cell_hw { } {
1868 return [check_cached_effective_target cell_hw_available {
1869 # Some simulators are known to not support VMX and PPU instructions.
1870 if { [istarget powerpc-*-eabi*] } {
1873 # Most targets don't require special flags for this test
1874 # case, but Darwin and AIX do.
1875 if { [istarget *-*-darwin*]
1876 || [istarget *-*-aix*] } {
1877 set options "-maltivec -mcpu=cell"
1879 set options "-mcpu=cell"
1881 check_runtime_nocache cell_hw_available {
1885 asm volatile ("vor v0,v0,v0");
1886 asm volatile ("lvlx v0,r0,r0");
1888 asm volatile ("vor 0,0,0");
1889 asm volatile ("lvlx 0,0,0");
1898 # Return 1 if the target supports executing 64-bit instructions, 0
1899 # otherwise. Cache the result.
1901 proc check_effective_target_powerpc64 { } {
1902 global powerpc64_available_saved
1905 if [info exists powerpc64_available_saved] {
1906 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
1908 set powerpc64_available_saved 0
1910 # Some simulators are known to not support powerpc64 instructions.
1911 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
1912 verbose "check_effective_target_powerpc64 returning 0" 2
1913 return $powerpc64_available_saved
1916 # Set up, compile, and execute a test program containing a 64-bit
1917 # instruction. Include the current process ID in the file
1918 # names to prevent conflicts with invocations for multiple
1923 set f [open $src "w"]
1924 puts $f "int main() {"
1925 puts $f "#ifdef __MACH__"
1926 puts $f " asm volatile (\"extsw r0,r0\");"
1928 puts $f " asm volatile (\"extsw 0,0\");"
1930 puts $f " return 0; }"
1933 set opts "additional_flags=-mcpu=G5"
1935 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
1936 set lines [${tool}_target_compile $src $exe executable "$opts"]
1939 if [string match "" $lines] then {
1940 # No error message, compilation succeeded.
1941 set result [${tool}_load "./$exe" "" ""]
1942 set status [lindex $result 0]
1943 remote_file build delete $exe
1944 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
1946 if { $status == "pass" } then {
1947 set powerpc64_available_saved 1
1950 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
1954 return $powerpc64_available_saved
1957 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
1958 # complex float arguments. This affects gfortran tests that call cabsf
1959 # in libm built by an earlier compiler. Return 1 if libm uses the same
1960 # argument passing as the compiler under test, 0 otherwise.
1962 # When the target name changes, replace the cached result.
1964 proc check_effective_target_broken_cplxf_arg { } {
1965 return [check_cached_effective_target broken_cplxf_arg {
1966 # Skip the work for targets known not to be affected.
1967 if { ![istarget powerpc64-*-linux*] } {
1969 } elseif { ![is-effective-target lp64] } {
1972 check_runtime_nocache broken_cplxf_arg {
1973 #include <complex.h>
1974 extern void abort (void);
1975 float fabsf (float);
1976 float cabsf (_Complex float);
1983 if (fabsf (f - 5.0) > 0.0001)
1992 # Return 1 is this is a TI C6X target supporting C67X instructions
1993 proc check_effective_target_ti_c67x { } {
1994 return [check_no_compiler_messages ti_c67x assembly {
1995 #if !defined(_TMS320C6700)
1996 #error !_TMS320C6700
2001 # Return 1 is this is a TI C6X target supporting C64X+ instructions
2002 proc check_effective_target_ti_c64xp { } {
2003 return [check_no_compiler_messages ti_c64xp assembly {
2004 #if !defined(_TMS320C6400_PLUS)
2005 #error !_TMS320C6400_PLUS
2011 proc check_alpha_max_hw_available { } {
2012 return [check_runtime alpha_max_hw_available {
2013 int main() { return __builtin_alpha_amask(1<<8) != 0; }
2017 # Returns true iff the FUNCTION is available on the target system.
2018 # (This is essentially a Tcl implementation of Autoconf's
2021 proc check_function_available { function } {
2022 return [check_no_compiler_messages ${function}_available \
2028 int main () { $function (); }
2032 # Returns true iff "fork" is available on the target system.
2034 proc check_fork_available {} {
2035 return [check_function_available "fork"]
2038 # Returns true iff "mkfifo" is available on the target system.
2040 proc check_mkfifo_available {} {
2041 if { [istarget *-*-cygwin*] } {
2042 # Cygwin has mkfifo, but support is incomplete.
2046 return [check_function_available "mkfifo"]
2049 # Returns true iff "__cxa_atexit" is used on the target system.
2051 proc check_cxa_atexit_available { } {
2052 return [check_cached_effective_target cxa_atexit_available {
2053 if { [istarget hppa*-*-hpux10*] } {
2054 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
2056 } elseif { [istarget *-*-vxworks] } {
2057 # vxworks doesn't have __cxa_atexit but subsequent test passes.
2060 check_runtime_nocache cxa_atexit_available {
2063 static unsigned int count;
2080 Y() { f(); count = 2; }
2089 int main() { return 0; }
2095 proc check_effective_target_objc2 { } {
2096 return [check_no_compiler_messages objc2 object {
2105 proc check_effective_target_next_runtime { } {
2106 return [check_no_compiler_messages objc2 object {
2107 #ifdef __NEXT_RUNTIME__
2110 #error !__NEXT_RUNTIME__
2115 # Return 1 if we're generating 32-bit code using default options, 0
2118 proc check_effective_target_ilp32 { } {
2119 return [check_no_compiler_messages ilp32 object {
2120 int dummy[sizeof (int) == 4
2121 && sizeof (void *) == 4
2122 && sizeof (long) == 4 ? 1 : -1];
2126 # Return 1 if we're generating ia32 code using default options, 0
2129 proc check_effective_target_ia32 { } {
2130 return [check_no_compiler_messages ia32 object {
2131 int dummy[sizeof (int) == 4
2132 && sizeof (void *) == 4
2133 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
2137 # Return 1 if we're generating x32 code using default options, 0
2140 proc check_effective_target_x32 { } {
2141 return [check_no_compiler_messages x32 object {
2142 int dummy[sizeof (int) == 4
2143 && sizeof (void *) == 4
2144 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
2148 # Return 1 if we're generating 32-bit integers using default
2149 # options, 0 otherwise.
2151 proc check_effective_target_int32 { } {
2152 return [check_no_compiler_messages int32 object {
2153 int dummy[sizeof (int) == 4 ? 1 : -1];
2157 # Return 1 if we're generating 32-bit or larger integers using default
2158 # options, 0 otherwise.
2160 proc check_effective_target_int32plus { } {
2161 return [check_no_compiler_messages int32plus object {
2162 int dummy[sizeof (int) >= 4 ? 1 : -1];
2166 # Return 1 if we're generating 32-bit or larger pointers using default
2167 # options, 0 otherwise.
2169 proc check_effective_target_ptr32plus { } {
2170 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
2171 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
2172 # cannot really hold a 32-bit address, so we always return false here.
2173 if { [istarget msp430-*-*] } {
2177 return [check_no_compiler_messages ptr32plus object {
2178 int dummy[sizeof (void *) >= 4 ? 1 : -1];
2182 # Return 1 if we support 32-bit or larger array and structure sizes
2183 # using default options, 0 otherwise. Avoid false positive on
2184 # targets with 20 or 24 bit address spaces.
2186 proc check_effective_target_size32plus { } {
2187 return [check_no_compiler_messages size32plus object {
2188 char dummy[16777217L];
2192 # Returns 1 if we're generating 16-bit or smaller integers with the
2193 # default options, 0 otherwise.
2195 proc check_effective_target_int16 { } {
2196 return [check_no_compiler_messages int16 object {
2197 int dummy[sizeof (int) < 4 ? 1 : -1];
2201 # Return 1 if we're generating 64-bit code using default options, 0
2204 proc check_effective_target_lp64 { } {
2205 return [check_no_compiler_messages lp64 object {
2206 int dummy[sizeof (int) == 4
2207 && sizeof (void *) == 8
2208 && sizeof (long) == 8 ? 1 : -1];
2212 # Return 1 if we're generating 64-bit code using default llp64 options,
2215 proc check_effective_target_llp64 { } {
2216 return [check_no_compiler_messages llp64 object {
2217 int dummy[sizeof (int) == 4
2218 && sizeof (void *) == 8
2219 && sizeof (long long) == 8
2220 && sizeof (long) == 4 ? 1 : -1];
2224 # Return 1 if long and int have different sizes,
2227 proc check_effective_target_long_neq_int { } {
2228 return [check_no_compiler_messages long_ne_int object {
2229 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2233 # Return 1 if the target supports long double larger than double,
2236 proc check_effective_target_large_long_double { } {
2237 return [check_no_compiler_messages large_long_double object {
2238 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2242 # Return 1 if the target supports double larger than float,
2245 proc check_effective_target_large_double { } {
2246 return [check_no_compiler_messages large_double object {
2247 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2251 # Return 1 if the target supports long double of 128 bits,
2254 proc check_effective_target_longdouble128 { } {
2255 return [check_no_compiler_messages longdouble128 object {
2256 int dummy[sizeof(long double) == 16 ? 1 : -1];
2260 # Return 1 if the target supports double of 64 bits,
2263 proc check_effective_target_double64 { } {
2264 return [check_no_compiler_messages double64 object {
2265 int dummy[sizeof(double) == 8 ? 1 : -1];
2269 # Return 1 if the target supports double of at least 64 bits,
2272 proc check_effective_target_double64plus { } {
2273 return [check_no_compiler_messages double64plus object {
2274 int dummy[sizeof(double) >= 8 ? 1 : -1];
2278 # Return 1 if the target supports 'w' suffix on floating constant
2281 proc check_effective_target_has_w_floating_suffix { } {
2283 if [check_effective_target_c++] {
2284 append opts "-std=gnu++03"
2286 return [check_no_compiler_messages w_fp_suffix object {
2291 # Return 1 if the target supports 'q' suffix on floating constant
2294 proc check_effective_target_has_q_floating_suffix { } {
2296 if [check_effective_target_c++] {
2297 append opts "-std=gnu++03"
2299 return [check_no_compiler_messages q_fp_suffix object {
2303 # Return 1 if the target supports compiling fixed-point,
2306 proc check_effective_target_fixed_point { } {
2307 return [check_no_compiler_messages fixed_point object {
2308 _Sat _Fract x; _Sat _Accum y;
2312 # Return 1 if the target supports compiling decimal floating point,
2315 proc check_effective_target_dfp_nocache { } {
2316 verbose "check_effective_target_dfp_nocache: compiling source" 2
2317 set ret [check_no_compiler_messages_nocache dfp object {
2318 float x __attribute__((mode(DD)));
2320 verbose "check_effective_target_dfp_nocache: returning $ret" 2
2324 proc check_effective_target_dfprt_nocache { } {
2325 return [check_runtime_nocache dfprt {
2326 typedef float d64 __attribute__((mode(DD)));
2327 d64 x = 1.2df, y = 2.3dd, z;
2328 int main () { z = x + y; return 0; }
2332 # Return 1 if the target supports compiling Decimal Floating Point,
2335 # This won't change for different subtargets so cache the result.
2337 proc check_effective_target_dfp { } {
2338 return [check_cached_effective_target dfp {
2339 check_effective_target_dfp_nocache
2343 # Return 1 if the target supports linking and executing Decimal Floating
2344 # Point, 0 otherwise.
2346 # This won't change for different subtargets so cache the result.
2348 proc check_effective_target_dfprt { } {
2349 return [check_cached_effective_target dfprt {
2350 check_effective_target_dfprt_nocache
2354 # Return 1 if the target supports executing DFP hardware instructions,
2355 # 0 otherwise. Cache the result.
2357 proc check_dfp_hw_available { } {
2358 return [check_cached_effective_target dfp_hw_available {
2359 # For now, disable on Darwin
2360 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2363 check_runtime_nocache dfp_hw_available {
2364 volatile _Decimal64 r;
2365 volatile _Decimal64 a = 4.0DD;
2366 volatile _Decimal64 b = 2.0DD;
2369 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2370 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2371 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2372 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2375 } "-mcpu=power6 -mhard-float"
2380 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2382 proc check_effective_target_ucn_nocache { } {
2383 # -std=c99 is only valid for C
2384 if [check_effective_target_c] {
2385 set ucnopts "-std=c99"
2389 verbose "check_effective_target_ucn_nocache: compiling source" 2
2390 set ret [check_no_compiler_messages_nocache ucn object {
2393 verbose "check_effective_target_ucn_nocache: returning $ret" 2
2397 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2399 # This won't change for different subtargets, so cache the result.
2401 proc check_effective_target_ucn { } {
2402 return [check_cached_effective_target ucn {
2403 check_effective_target_ucn_nocache
2407 # Return 1 if the target needs a command line argument to enable a SIMD
2410 proc check_effective_target_vect_cmdline_needed { } {
2411 global et_vect_cmdline_needed_saved
2412 global et_vect_cmdline_needed_target_name
2414 if { ![info exists et_vect_cmdline_needed_target_name] } {
2415 set et_vect_cmdline_needed_target_name ""
2418 # If the target has changed since we set the cached value, clear it.
2419 set current_target [current_target_name]
2420 if { $current_target != $et_vect_cmdline_needed_target_name } {
2421 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
2422 set et_vect_cmdline_needed_target_name $current_target
2423 if { [info exists et_vect_cmdline_needed_saved] } {
2424 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
2425 unset et_vect_cmdline_needed_saved
2429 if [info exists et_vect_cmdline_needed_saved] {
2430 verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
2432 set et_vect_cmdline_needed_saved 1
2433 if { [istarget alpha*-*-*]
2434 || [istarget ia64-*-*]
2435 || (([istarget x86_64-*-*] || [istarget i?86-*-*])
2436 && ([check_effective_target_x32]
2437 || [check_effective_target_lp64]))
2438 || ([istarget powerpc*-*-*]
2439 && ([check_effective_target_powerpc_spe]
2440 || [check_effective_target_powerpc_altivec]))
2441 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
2442 || [istarget spu-*-*]
2443 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
2444 || [istarget aarch64*-*-*] } {
2445 set et_vect_cmdline_needed_saved 0
2449 verbose "check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
2450 return $et_vect_cmdline_needed_saved
2453 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
2455 # This won't change for different subtargets so cache the result.
2457 proc check_effective_target_vect_int { } {
2458 global et_vect_int_saved
2460 if [info exists et_vect_int_saved] {
2461 verbose "check_effective_target_vect_int: using cached result" 2
2463 set et_vect_int_saved 0
2464 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2465 || ([istarget powerpc*-*-*]
2466 && ![istarget powerpc-*-linux*paired*])
2467 || [istarget spu-*-*]
2468 || [istarget sparc*-*-*]
2469 || [istarget alpha*-*-*]
2470 || [istarget ia64-*-*]
2471 || [istarget aarch64*-*-*]
2472 || [check_effective_target_arm32]
2473 || ([istarget mips*-*-*]
2474 && [check_effective_target_mips_loongson]) } {
2475 set et_vect_int_saved 1
2479 verbose "check_effective_target_vect_int: returning $et_vect_int_saved" 2
2480 return $et_vect_int_saved
2483 # Return 1 if the target supports signed int->float conversion
2486 proc check_effective_target_vect_intfloat_cvt { } {
2487 global et_vect_intfloat_cvt_saved
2489 if [info exists et_vect_intfloat_cvt_saved] {
2490 verbose "check_effective_target_vect_intfloat_cvt: using cached result" 2
2492 set et_vect_intfloat_cvt_saved 0
2493 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2494 || ([istarget powerpc*-*-*]
2495 && ![istarget powerpc-*-linux*paired*])
2496 || ([istarget arm*-*-*]
2497 && [check_effective_target_arm_neon_ok])} {
2498 set et_vect_intfloat_cvt_saved 1
2502 verbose "check_effective_target_vect_intfloat_cvt: returning $et_vect_intfloat_cvt_saved" 2
2503 return $et_vect_intfloat_cvt_saved
2506 #Return 1 if we're supporting __int128 for target, 0 otherwise.
2508 proc check_effective_target_int128 { } {
2509 return [check_no_compiler_messages int128 object {
2511 #ifndef __SIZEOF_INT128__
2520 # Return 1 if the target supports unsigned int->float conversion
2523 proc check_effective_target_vect_uintfloat_cvt { } {
2524 global et_vect_uintfloat_cvt_saved
2526 if [info exists et_vect_uintfloat_cvt_saved] {
2527 verbose "check_effective_target_vect_uintfloat_cvt: using cached result" 2
2529 set et_vect_uintfloat_cvt_saved 0
2530 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2531 || ([istarget powerpc*-*-*]
2532 && ![istarget powerpc-*-linux*paired*])
2533 || [istarget aarch64*-*-*]
2534 || ([istarget arm*-*-*]
2535 && [check_effective_target_arm_neon_ok])} {
2536 set et_vect_uintfloat_cvt_saved 1
2540 verbose "check_effective_target_vect_uintfloat_cvt: returning $et_vect_uintfloat_cvt_saved" 2
2541 return $et_vect_uintfloat_cvt_saved
2545 # Return 1 if the target supports signed float->int conversion
2548 proc check_effective_target_vect_floatint_cvt { } {
2549 global et_vect_floatint_cvt_saved
2551 if [info exists et_vect_floatint_cvt_saved] {
2552 verbose "check_effective_target_vect_floatint_cvt: using cached result" 2
2554 set et_vect_floatint_cvt_saved 0
2555 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2556 || ([istarget powerpc*-*-*]
2557 && ![istarget powerpc-*-linux*paired*])
2558 || ([istarget arm*-*-*]
2559 && [check_effective_target_arm_neon_ok])} {
2560 set et_vect_floatint_cvt_saved 1
2564 verbose "check_effective_target_vect_floatint_cvt: returning $et_vect_floatint_cvt_saved" 2
2565 return $et_vect_floatint_cvt_saved
2568 # Return 1 if the target supports unsigned float->int conversion
2571 proc check_effective_target_vect_floatuint_cvt { } {
2572 global et_vect_floatuint_cvt_saved
2574 if [info exists et_vect_floatuint_cvt_saved] {
2575 verbose "check_effective_target_vect_floatuint_cvt: using cached result" 2
2577 set et_vect_floatuint_cvt_saved 0
2578 if { ([istarget powerpc*-*-*]
2579 && ![istarget powerpc-*-linux*paired*])
2580 || ([istarget arm*-*-*]
2581 && [check_effective_target_arm_neon_ok])} {
2582 set et_vect_floatuint_cvt_saved 1
2586 verbose "check_effective_target_vect_floatuint_cvt: returning $et_vect_floatuint_cvt_saved" 2
2587 return $et_vect_floatuint_cvt_saved
2590 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
2592 # This won't change for different subtargets so cache the result.
2594 proc check_effective_target_vect_simd_clones { } {
2595 global et_vect_simd_clones_saved
2597 if [info exists et_vect_simd_clones_saved] {
2598 verbose "check_effective_target_vect_simd_clones: using cached result" 2
2600 set et_vect_simd_clones_saved 0
2601 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2602 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx and
2603 # avx2 clone. Only the right clone for the specified arch will be
2604 # chosen, but still we need to at least be able to assemble
2606 if { [check_effective_target_avx512f] } {
2607 set et_vect_simd_clones_saved 1
2612 verbose "check_effective_target_vect_simd_clones: returning $et_vect_simd_clones_saved" 2
2613 return $et_vect_simd_clones_saved
2616 # Return 1 if this is a AArch64 target supporting big endian
2617 proc check_effective_target_aarch64_big_endian { } {
2618 return [check_no_compiler_messages aarch64_big_endian assembly {
2619 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
2620 #error !__aarch64__ || !__AARCH64EB__
2625 # Return 1 if this is a AArch64 target supporting little endian
2626 proc check_effective_target_aarch64_little_endian { } {
2627 if { ![istarget aarch64*-*-*] } {
2631 return [check_no_compiler_messages aarch64_little_endian assembly {
2632 #if !defined(__aarch64__) || defined(__AARCH64EB__)
2638 # Return 1 if this is a compiler supporting ARC atomic operations
2639 proc check_effective_target_arc_atomic { } {
2640 return [check_no_compiler_messages arc_atomic assembly {
2641 #if !defined(__ARC_ATOMIC__)
2647 # Return 1 if this is an arm target using 32-bit instructions
2648 proc check_effective_target_arm32 { } {
2649 if { ![istarget arm*-*-*] } {
2653 return [check_no_compiler_messages arm32 assembly {
2654 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
2655 #error !__arm || __thumb__ && !__thumb2__
2660 # Return 1 if this is an arm target not using Thumb
2661 proc check_effective_target_arm_nothumb { } {
2662 if { ![istarget arm*-*-*] } {
2666 return [check_no_compiler_messages arm_nothumb assembly {
2667 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
2668 #error !__arm__ || __thumb || __thumb2__
2673 # Return 1 if this is a little-endian ARM target
2674 proc check_effective_target_arm_little_endian { } {
2675 if { ![istarget arm*-*-*] } {
2679 return [check_no_compiler_messages arm_little_endian assembly {
2680 #if !defined(__arm__) || !defined(__ARMEL__)
2681 #error !__arm__ || !__ARMEL__
2686 # Return 1 if this is an ARM target that only supports aligned vector accesses
2687 proc check_effective_target_arm_vect_no_misalign { } {
2688 if { ![istarget arm*-*-*] } {
2692 return [check_no_compiler_messages arm_vect_no_misalign assembly {
2693 #if !defined(__arm__) \
2694 || (defined(__ARM_FEATURE_UNALIGNED) \
2695 && defined(__ARMEL__))
2696 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
2702 # Return 1 if this is an ARM target supporting -mfpu=vfp
2703 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
2706 proc check_effective_target_arm_vfp_ok { } {
2707 if { [check_effective_target_arm32] } {
2708 return [check_no_compiler_messages arm_vfp_ok object {
2710 } "-mfpu=vfp -mfloat-abi=softfp"]
2716 # Return 1 if this is an ARM target supporting -mfpu=vfp3
2717 # -mfloat-abi=softfp.
2719 proc check_effective_target_arm_vfp3_ok { } {
2720 if { [check_effective_target_arm32] } {
2721 return [check_no_compiler_messages arm_vfp3_ok object {
2723 } "-mfpu=vfp3 -mfloat-abi=softfp"]
2729 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
2730 # -mfloat-abi=softfp.
2731 proc check_effective_target_arm_v8_vfp_ok {} {
2732 if { [check_effective_target_arm32] } {
2733 return [check_no_compiler_messages arm_v8_vfp_ok object {
2736 __asm__ volatile ("vrinta.f32.f32 s0, s0");
2739 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
2745 # Return 1 if this is an ARM target supporting -mfpu=vfp
2746 # -mfloat-abi=hard. Some multilibs may be incompatible with these
2749 proc check_effective_target_arm_hard_vfp_ok { } {
2750 if { [check_effective_target_arm32]
2751 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
2752 return [check_no_compiler_messages arm_hard_vfp_ok executable {
2753 int main() { return 0;}
2754 } "-mfpu=vfp -mfloat-abi=hard"]
2760 # Return 1 if this is an ARM target defining __ARM_FP. We may need
2761 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2762 # incompatible with these options. Also set et_arm_fp_flags to the
2763 # best options to add.
2765 proc check_effective_target_arm_fp_ok_nocache { } {
2766 global et_arm_fp_flags
2767 set et_arm_fp_flags ""
2768 if { [check_effective_target_arm32] } {
2769 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
2770 if { [check_no_compiler_messages_nocache arm_fp_ok object {
2772 #error __ARM_FP not defined
2775 set et_arm_fp_flags $flags
2784 proc check_effective_target_arm_fp_ok { } {
2785 return [check_cached_effective_target arm_fp_ok \
2786 check_effective_target_arm_fp_ok_nocache]
2789 # Add the options needed to define __ARM_FP. We need either
2790 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
2791 # specified by the multilib, use it.
2793 proc add_options_for_arm_fp { flags } {
2794 if { ! [check_effective_target_arm_fp_ok] } {
2797 global et_arm_fp_flags
2798 return "$flags $et_arm_fp_flags"
2801 # Return 1 if this is an ARM target that supports DSP multiply with
2802 # current multilib flags.
2804 proc check_effective_target_arm_dsp { } {
2805 return [check_no_compiler_messages arm_dsp assembly {
2806 #ifndef __ARM_FEATURE_DSP
2813 # Return 1 if this is an ARM target that supports unaligned word/halfword
2814 # load/store instructions.
2816 proc check_effective_target_arm_unaligned { } {
2817 return [check_no_compiler_messages arm_unaligned assembly {
2818 #ifndef __ARM_FEATURE_UNALIGNED
2819 #error no unaligned support
2825 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2826 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2827 # incompatible with these options. Also set et_arm_crypto_flags to the
2828 # best options to add.
2830 proc check_effective_target_arm_crypto_ok_nocache { } {
2831 global et_arm_crypto_flags
2832 set et_arm_crypto_flags ""
2833 if { [check_effective_target_arm_v8_neon_ok] } {
2834 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
2835 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
2836 #include "arm_neon.h"
2838 foo (uint8x16_t a, uint8x16_t b)
2840 return vaeseq_u8 (a, b);
2843 set et_arm_crypto_flags $flags
2852 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2854 proc check_effective_target_arm_crypto_ok { } {
2855 return [check_cached_effective_target arm_crypto_ok \
2856 check_effective_target_arm_crypto_ok_nocache]
2859 # Add options for crypto extensions.
2860 proc add_options_for_arm_crypto { flags } {
2861 if { ! [check_effective_target_arm_crypto_ok] } {
2864 global et_arm_crypto_flags
2865 return "$flags $et_arm_crypto_flags"
2868 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2869 # or -mfloat-abi=hard, but if one is already specified by the
2870 # multilib, use it. Similarly, if a -mfpu option already enables
2871 # NEON, do not add -mfpu=neon.
2873 proc add_options_for_arm_neon { flags } {
2874 if { ! [check_effective_target_arm_neon_ok] } {
2877 global et_arm_neon_flags
2878 return "$flags $et_arm_neon_flags"
2881 proc add_options_for_arm_v8_vfp { flags } {
2882 if { ! [check_effective_target_arm_v8_vfp_ok] } {
2885 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
2888 proc add_options_for_arm_v8_neon { flags } {
2889 if { ! [check_effective_target_arm_v8_neon_ok] } {
2892 global et_arm_v8_neon_flags
2893 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
2896 # Add the options needed for ARMv8.1 Adv.SIMD. Also adds the ARMv8 NEON
2897 # options for AArch64 and for ARM.
2899 proc add_options_for_arm_v8_1a_neon { flags } {
2900 if { ! [check_effective_target_arm_v8_1a_neon_ok] } {
2903 global et_arm_v8_1a_neon_flags
2904 return "$flags $et_arm_v8_1a_neon_flags -march=armv8.1-a"
2907 proc add_options_for_arm_crc { flags } {
2908 if { ! [check_effective_target_arm_crc_ok] } {
2911 global et_arm_crc_flags
2912 return "$flags $et_arm_crc_flags"
2915 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2916 # or -mfloat-abi=hard, but if one is already specified by the
2917 # multilib, use it. Similarly, if a -mfpu option already enables
2918 # NEON, do not add -mfpu=neon.
2920 proc add_options_for_arm_neonv2 { flags } {
2921 if { ! [check_effective_target_arm_neonv2_ok] } {
2924 global et_arm_neonv2_flags
2925 return "$flags $et_arm_neonv2_flags"
2928 # Add the options needed for vfp3.
2929 proc add_options_for_arm_vfp3 { flags } {
2930 if { ! [check_effective_target_arm_vfp3_ok] } {
2933 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
2936 # Return 1 if this is an ARM target supporting -mfpu=neon
2937 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2938 # incompatible with these options. Also set et_arm_neon_flags to the
2939 # best options to add.
2941 proc check_effective_target_arm_neon_ok_nocache { } {
2942 global et_arm_neon_flags
2943 set et_arm_neon_flags ""
2944 if { [check_effective_target_arm32] } {
2945 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a"} {
2946 if { [check_no_compiler_messages_nocache arm_neon_ok object {
2948 #ifndef __ARM_NEON__
2951 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
2952 configured for -mcpu=arm926ej-s, for example. */
2953 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
2954 #error Architecture does not support NEON.
2957 set et_arm_neon_flags $flags
2966 proc check_effective_target_arm_neon_ok { } {
2967 return [check_cached_effective_target arm_neon_ok \
2968 check_effective_target_arm_neon_ok_nocache]
2971 proc check_effective_target_arm_crc_ok_nocache { } {
2972 global et_arm_crc_flags
2973 set et_arm_crc_flags "-march=armv8-a+crc"
2974 return [check_no_compiler_messages_nocache arm_crc_ok object {
2975 #if !defined (__ARM_FEATURE_CRC32)
2978 } "$et_arm_crc_flags"]
2981 proc check_effective_target_arm_crc_ok { } {
2982 return [check_cached_effective_target arm_crc_ok \
2983 check_effective_target_arm_crc_ok_nocache]
2986 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
2987 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2988 # incompatible with these options. Also set et_arm_neon_fp16_flags to
2989 # the best options to add.
2991 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
2992 global et_arm_neon_fp16_flags
2993 set et_arm_neon_fp16_flags ""
2994 if { [check_effective_target_arm32] } {
2995 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
2996 "-mfpu=neon-fp16 -mfloat-abi=softfp"
2997 "-mfp16-format=ieee"
2998 "-mfloat-abi=softfp -mfp16-format=ieee"
2999 "-mfpu=neon-fp16 -mfp16-format=ieee"
3000 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
3001 if { [check_no_compiler_messages_nocache arm_neon_fp_16_ok object {
3002 #include "arm_neon.h"
3004 foo (float32x4_t arg)
3006 return vcvt_f16_f32 (arg);
3009 set et_arm_neon_fp16_flags $flags
3018 proc check_effective_target_arm_neon_fp16_ok { } {
3019 return [check_cached_effective_target arm_neon_fp16_ok \
3020 check_effective_target_arm_neon_fp16_ok_nocache]
3023 proc check_effective_target_arm_neon_fp16_hw { } {
3024 if {! [check_effective_target_arm_neon_fp16_ok] } {
3027 global et_arm_neon_fp16_flags
3028 check_runtime_nocache arm_neon_fp16_hw {
3030 main (int argc, char **argv)
3032 asm ("vcvt.f32.f16 q1, d0");
3035 } $et_arm_neon_fp16_flags
3038 proc add_options_for_arm_neon_fp16 { flags } {
3039 if { ! [check_effective_target_arm_neon_fp16_ok] } {
3042 global et_arm_neon_fp16_flags
3043 return "$flags $et_arm_neon_fp16_flags"
3046 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
3047 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3048 # incompatible with these options. Also set et_arm_v8_neon_flags to the
3049 # best options to add.
3051 proc check_effective_target_arm_v8_neon_ok_nocache { } {
3052 global et_arm_v8_neon_flags
3053 set et_arm_v8_neon_flags ""
3054 if { [check_effective_target_arm32] } {
3055 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3056 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
3058 #error not armv8 or later
3060 #include "arm_neon.h"
3064 __asm__ volatile ("vrintn.f32 q0, q0");
3066 } "$flags -march=armv8-a"] } {
3067 set et_arm_v8_neon_flags $flags
3076 proc check_effective_target_arm_v8_neon_ok { } {
3077 return [check_cached_effective_target arm_v8_neon_ok \
3078 check_effective_target_arm_v8_neon_ok_nocache]
3081 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
3082 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3083 # incompatible with these options. Also set et_arm_neonv2_flags to the
3084 # best options to add.
3086 proc check_effective_target_arm_neonv2_ok_nocache { } {
3087 global et_arm_neonv2_flags
3088 set et_arm_neonv2_flags ""
3089 if { [check_effective_target_arm32] } {
3090 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
3091 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
3092 #include "arm_neon.h"
3094 foo (float32x2_t a, float32x2_t b, float32x2_t c)
3096 return vfma_f32 (a, b, c);
3099 set et_arm_neonv2_flags $flags
3108 proc check_effective_target_arm_neonv2_ok { } {
3109 return [check_cached_effective_target arm_neonv2_ok \
3110 check_effective_target_arm_neonv2_ok_nocache]
3113 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3114 # or -mfloat-abi=hard, but if one is already specified by the
3117 proc add_options_for_arm_fp16 { flags } {
3118 if { ! [check_effective_target_arm_fp16_ok] } {
3121 global et_arm_fp16_flags
3122 return "$flags $et_arm_fp16_flags"
3125 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
3126 # Skip multilibs that are incompatible with these options and set
3127 # et_arm_fp16_flags to the best options to add.
3129 proc check_effective_target_arm_fp16_ok_nocache { } {
3130 global et_arm_fp16_flags
3131 set et_arm_fp16_flags ""
3132 if { ! [check_effective_target_arm32] } {
3135 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" "-mfpu=*fpv[1-9][0-9]*" } ]] {
3136 # Multilib flags would override -mfpu.
3139 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
3140 # Must generate floating-point instructions.
3143 if [check_effective_target_arm_hf_eabi] {
3144 # Use existing float-abi and force an fpu which supports fp16
3145 set et_arm_fp16_flags "-mfpu=vfpv4"
3148 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
3149 # The existing -mfpu value is OK; use it, but add softfp.
3150 set et_arm_fp16_flags "-mfloat-abi=softfp"
3153 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
3154 # macro to check for this support.
3155 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
3156 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
3159 set et_arm_fp16_flags "$flags"
3166 proc check_effective_target_arm_fp16_ok { } {
3167 return [check_cached_effective_target arm_fp16_ok \
3168 check_effective_target_arm_fp16_ok_nocache]
3171 # Creates a series of routines that return 1 if the given architecture
3172 # can be selected and a routine to give the flags to select that architecture
3173 # Note: Extra flags may be added to disable options from newer compilers
3174 # (Thumb in particular - but others may be added in the future).
3175 # -march=armv7ve is special and is handled explicitly after this loop because
3176 # it needs more than one predefine check to identify.
3177 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
3178 # /* { dg-add-options arm_arch_v5 } */
3179 # /* { dg-require-effective-target arm_arch_v5_multilib } */
3180 foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__
3181 v4t "-march=armv4t" __ARM_ARCH_4T__
3182 v5 "-march=armv5 -marm" __ARM_ARCH_5__
3183 v5t "-march=armv5t" __ARM_ARCH_5T__
3184 v5te "-march=armv5te" __ARM_ARCH_5TE__
3185 v6 "-march=armv6" __ARM_ARCH_6__
3186 v6k "-march=armv6k" __ARM_ARCH_6K__
3187 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
3188 v6z "-march=armv6z" __ARM_ARCH_6Z__
3189 v6m "-march=armv6-m -mthumb" __ARM_ARCH_6M__
3190 v7a "-march=armv7-a" __ARM_ARCH_7A__
3191 v7r "-march=armv7-r" __ARM_ARCH_7R__
3192 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
3193 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
3194 v8a "-march=armv8-a" __ARM_ARCH_8A__
3195 v8_1a "-march=armv8.1a" __ARM_ARCH_8A__ } {
3196 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
3197 proc check_effective_target_arm_arch_FUNC_ok { } {
3198 if { [ string match "*-marm*" "FLAG" ] &&
3199 ![check_effective_target_arm_arm_ok] } {
3202 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
3209 proc add_options_for_arm_arch_FUNC { flags } {
3210 return "$flags FLAG"
3213 proc check_effective_target_arm_arch_FUNC_multilib { } {
3214 return [check_runtime arm_arch_FUNC_multilib {
3220 } [add_options_for_arm_arch_FUNC ""]]
3225 # Same functions as above but for -march=armv7ve. To uniquely identify
3226 # -march=armv7ve we need to check for __ARM_ARCH_7A__ as well as
3227 # __ARM_FEATURE_IDIV otherwise it aliases with armv7-a.
3229 proc check_effective_target_arm_arch_v7ve_ok { } {
3230 if { [ string match "*-marm*" "-march=armv7ve" ] &&
3231 ![check_effective_target_arm_arm_ok] } {
3234 return [check_no_compiler_messages arm_arch_v7ve_ok assembly {
3235 #if !defined (__ARM_ARCH_7A__) || !defined (__ARM_FEATURE_IDIV)
3238 } "-march=armv7ve" ]
3241 proc add_options_for_arm_arch_v7ve { flags } {
3242 return "$flags -march=armv7ve"
3245 # Return 1 if this is an ARM target where -marm causes ARM to be
3248 proc check_effective_target_arm_arm_ok { } {
3249 return [check_no_compiler_messages arm_arm_ok assembly {
3250 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
3251 #error !__arm__ || __thumb__ || __thumb2__
3257 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
3260 proc check_effective_target_arm_thumb1_ok { } {
3261 return [check_no_compiler_messages arm_thumb1_ok assembly {
3262 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3263 #error !__arm__ || !__thumb__ || __thumb2__
3265 int foo (int i) { return i; }
3269 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
3272 proc check_effective_target_arm_thumb2_ok { } {
3273 return [check_no_compiler_messages arm_thumb2_ok assembly {
3274 #if !defined(__thumb2__)
3277 int foo (int i) { return i; }
3281 # Return 1 if this is an ARM target where Thumb-1 is used without options
3282 # added by the test.
3284 proc check_effective_target_arm_thumb1 { } {
3285 return [check_no_compiler_messages arm_thumb1 assembly {
3286 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3287 #error !__arm__ || !__thumb__ || __thumb2__
3293 # Return 1 if this is an ARM target where Thumb-2 is used without options
3294 # added by the test.
3296 proc check_effective_target_arm_thumb2 { } {
3297 return [check_no_compiler_messages arm_thumb2 assembly {
3298 #if !defined(__thumb2__)
3305 # Return 1 if this is an ARM target where conditional execution is available.
3307 proc check_effective_target_arm_cond_exec { } {
3308 return [check_no_compiler_messages arm_cond_exec assembly {
3309 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
3316 # Return 1 if this is an ARM cortex-M profile cpu
3318 proc check_effective_target_arm_cortex_m { } {
3319 if { ![istarget arm*-*-*] } {
3322 return [check_no_compiler_messages arm_cortex_m assembly {
3323 #if !defined(__ARM_ARCH_7M__) \
3324 && !defined (__ARM_ARCH_7EM__) \
3325 && !defined (__ARM_ARCH_6M__)
3326 #error !__ARM_ARCH_7M__ && !__ARM_ARCH_7EM__ && !__ARM_ARCH_6M__
3332 # Return 1 if this compilation turns on string_ops_prefer_neon on.
3334 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
3335 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
3336 int foo (void) { return 0; }
3337 } "-O2 -mprint-tune-info" ]
3340 # Return 1 if the target supports executing NEON instructions, 0
3341 # otherwise. Cache the result.
3343 proc check_effective_target_arm_neon_hw { } {
3344 return [check_runtime arm_neon_hw_available {
3348 long long a = 0, b = 1;
3349 asm ("vorr %P0, %P1, %P2"
3351 : "0" (a), "w" (b));
3354 } [add_options_for_arm_neon ""]]
3357 proc check_effective_target_arm_neonv2_hw { } {
3358 return [check_runtime arm_neon_hwv2_available {
3359 #include "arm_neon.h"
3363 float32x2_t a, b, c;
3364 asm ("vfma.f32 %P0, %P1, %P2"
3366 : "w" (b), "w" (c));
3369 } [add_options_for_arm_neonv2 ""]]
3372 # Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
3373 # otherwise. The test is valid for AArch64 and ARM. Record the command
3374 # line options needed.
3376 proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
3377 global et_arm_v8_1a_neon_flags
3378 set et_arm_v8_1a_neon_flags ""
3380 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
3384 # Iterate through sets of options to find the compiler flags that
3385 # need to be added to the -march option. Start with the empty set
3386 # since AArch64 only needs the -march setting.
3387 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
3388 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3389 if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object {
3390 #if !defined (__ARM_FEATURE_QRDMX)
3391 #error "__ARM_FEATURE_QRDMX not defined"
3393 } "$flags -march=armv8.1-a"] } {
3394 set et_arm_v8_1a_neon_flags "$flags -march=armv8.1-a"
3402 proc check_effective_target_arm_v8_1a_neon_ok { } {
3403 return [check_cached_effective_target arm_v8_1a_neon_ok \
3404 check_effective_target_arm_v8_1a_neon_ok_nocache]
3407 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
3410 proc check_effective_target_arm_v8_neon_hw { } {
3411 return [check_runtime arm_v8_neon_hw_available {
3412 #include "arm_neon.h"
3417 asm ("vrinta.f32 %P0, %P1"
3422 } [add_options_for_arm_v8_neon ""]]
3425 # Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
3426 # otherwise. The test is valid for AArch64 and ARM.
3428 proc check_effective_target_arm_v8_1a_neon_hw { } {
3429 if { ![check_effective_target_arm_v8_1a_neon_ok] } {
3432 return [check_runtime arm_v8_1a_neon_hw_available {
3436 #ifdef __ARM_ARCH_ISA_A64
3437 __Int32x2_t a = {0, 1};
3438 __Int32x2_t b = {0, 2};
3441 asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
3444 : /* No clobbers. */);
3448 __simd64_int32_t a = {0, 1};
3449 __simd64_int32_t b = {0, 2};
3450 __simd64_int32_t result;
3452 asm ("vqrdmlah.s32 %P0, %P1, %P2"
3455 : /* No clobbers. */);
3460 } [add_options_for_arm_v8_1a_neon ""]]
3463 # Return 1 if this is a ARM target with NEON enabled.
3465 proc check_effective_target_arm_neon { } {
3466 if { [check_effective_target_arm32] } {
3467 return [check_no_compiler_messages arm_neon object {
3468 #ifndef __ARM_NEON__
3479 proc check_effective_target_arm_neonv2 { } {
3480 if { [check_effective_target_arm32] } {
3481 return [check_no_compiler_messages arm_neon object {
3482 #ifndef __ARM_NEON__
3485 #ifndef __ARM_FEATURE_FMA
3497 # Return 1 if this is an ARM target with load acquire and store release
3498 # instructions for 8-, 16- and 32-bit types.
3500 proc check_effective_target_arm_acq_rel { } {
3501 return [check_no_compiler_messages arm_acq_rel object {
3503 load_acquire_store_release (void)
3505 asm ("lda r0, [r1]\n\t"
3511 : : : "r0", "memory");
3516 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
3517 # the Loongson vector modes.
3519 proc check_effective_target_mips_loongson { } {
3520 return [check_no_compiler_messages loongson assembly {
3521 #if !defined(__mips_loongson_vector_rev)
3522 #error !__mips_loongson_vector_rev
3527 # Return 1 if this is a MIPS target that supports the legacy NAN.
3529 proc check_effective_target_mips_nanlegacy { } {
3530 return [check_no_compiler_messages nanlegacy assembly {
3532 int main () { return 0; }
3536 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
3539 proc check_effective_target_arm_eabi { } {
3540 return [check_no_compiler_messages arm_eabi object {
3541 #ifndef __ARM_EABI__
3549 # Return 1 if this is an ARM target that adheres to the hard-float variant of
3550 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
3552 proc check_effective_target_arm_hf_eabi { } {
3553 return [check_no_compiler_messages arm_hf_eabi object {
3554 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
3555 #error not hard-float EABI
3562 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
3563 # Some multilibs may be incompatible with this option.
3565 proc check_effective_target_arm_iwmmxt_ok { } {
3566 if { [check_effective_target_arm32] } {
3567 return [check_no_compiler_messages arm_iwmmxt_ok object {
3575 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
3576 # for an ARM target.
3577 proc check_effective_target_arm_prefer_ldrd_strd { } {
3578 if { ![check_effective_target_arm32] } {
3582 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
3583 void foo (int *p) { p[0] = 1; p[1] = 0;}
3587 # Return 1 if this is a PowerPC target supporting -meabi.
3589 proc check_effective_target_powerpc_eabi_ok { } {
3590 if { [istarget powerpc*-*-*] } {
3591 return [check_no_compiler_messages powerpc_eabi_ok object {
3599 # Return 1 if this is a PowerPC target with floating-point registers.
3601 proc check_effective_target_powerpc_fprs { } {
3602 if { [istarget powerpc*-*-*]
3603 || [istarget rs6000-*-*] } {
3604 return [check_no_compiler_messages powerpc_fprs object {
3616 # Return 1 if this is a PowerPC target with hardware double-precision
3619 proc check_effective_target_powerpc_hard_double { } {
3620 if { [istarget powerpc*-*-*]
3621 || [istarget rs6000-*-*] } {
3622 return [check_no_compiler_messages powerpc_hard_double object {
3634 # Return 1 if this is a PowerPC target supporting -maltivec.
3636 proc check_effective_target_powerpc_altivec_ok { } {
3637 if { ([istarget powerpc*-*-*]
3638 && ![istarget powerpc-*-linux*paired*])
3639 || [istarget rs6000-*-*] } {
3640 # AltiVec is not supported on AIX before 5.3.
3641 if { [istarget powerpc*-*-aix4*]
3642 || [istarget powerpc*-*-aix5.1*]
3643 || [istarget powerpc*-*-aix5.2*] } {
3646 return [check_no_compiler_messages powerpc_altivec_ok object {
3654 # Return 1 if this is a PowerPC target supporting -mpower8-vector
3656 proc check_effective_target_powerpc_p8vector_ok { } {
3657 if { ([istarget powerpc*-*-*]
3658 && ![istarget powerpc-*-linux*paired*])
3659 || [istarget rs6000-*-*] } {
3660 # AltiVec is not supported on AIX before 5.3.
3661 if { [istarget powerpc*-*-aix4*]
3662 || [istarget powerpc*-*-aix5.1*]
3663 || [istarget powerpc*-*-aix5.2*] } {
3666 return [check_no_compiler_messages powerpc_p8vector_ok object {
3669 asm volatile ("xxlorc vs0,vs0,vs0");
3671 asm volatile ("xxlorc 0,0,0");
3675 } "-mpower8-vector"]
3681 # Return 1 if this is a PowerPC target supporting -mpower9-vector
3683 proc check_effective_target_powerpc_p9vector_ok { } {
3684 if { ([istarget powerpc*-*-*]
3685 && ![istarget powerpc-*-linux*paired*])
3686 || [istarget rs6000-*-*] } {
3687 # AltiVec is not supported on AIX before 5.3.
3688 if { [istarget powerpc*-*-aix4*]
3689 || [istarget powerpc*-*-aix5.1*]
3690 || [istarget powerpc*-*-aix5.2*] } {
3693 return [check_no_compiler_messages powerpc_p9vector_ok object {
3696 vector double v = (vector double) { 0.0, 0.0 };
3697 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
3700 } "-mpower9-vector"]
3706 # Return 1 if this is a PowerPC target supporting -mmodulo
3708 proc check_effective_target_powerpc_p9modulo_ok { } {
3709 if { ([istarget powerpc*-*-*]
3710 && ![istarget powerpc-*-linux*paired*])
3711 || [istarget rs6000-*-*] } {
3712 # AltiVec is not supported on AIX before 5.3.
3713 if { [istarget powerpc*-*-aix4*]
3714 || [istarget powerpc*-*-aix5.1*]
3715 || [istarget powerpc*-*-aix5.2*] } {
3718 return [check_no_compiler_messages powerpc_p9modulo_ok object {
3720 int i = 5, j = 3, r = -1;
3721 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
3730 # Return 1 if this is a PowerPC target supporting -mfloat128 via either
3731 # software emulation on power7/power8 systems or hardware support on power9.
3733 proc check_effective_target_powerpc_float128_sw_ok { } {
3734 if { ([istarget powerpc*-*-*]
3735 && ![istarget powerpc-*-linux*paired*])
3736 || [istarget rs6000-*-*] } {
3737 # AltiVec is not supported on AIX before 5.3.
3738 if { [istarget powerpc*-*-aix4*]
3739 || [istarget powerpc*-*-aix5.1*]
3740 || [istarget powerpc*-*-aix5.2*] } {
3743 return [check_no_compiler_messages powerpc_float128_sw_ok object {
3744 volatile __float128 x = 1.0q;
3745 volatile __float128 y = 2.0q;
3747 __float128 z = x + y;
3750 } "-mfloat128 -mvsx"]
3756 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
3757 # support on power9.
3759 proc check_effective_target_powerpc_float128_hw_ok { } {
3760 if { ([istarget powerpc*-*-*]
3761 && ![istarget powerpc-*-linux*paired*])
3762 || [istarget rs6000-*-*] } {
3763 # AltiVec is not supported on AIX before 5.3.
3764 if { [istarget powerpc*-*-aix4*]
3765 || [istarget powerpc*-*-aix5.1*]
3766 || [istarget powerpc*-*-aix5.2*] } {
3769 return [check_no_compiler_messages powerpc_float128_hw_ok object {
3770 volatile __float128 x = 1.0q;
3771 volatile __float128 y = 2.0q;
3774 __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
3777 } "-mfloat128-hardware"]
3783 # Return 1 if this is a PowerPC target supporting -mvsx
3785 proc check_effective_target_powerpc_vsx_ok { } {
3786 if { ([istarget powerpc*-*-*]
3787 && ![istarget powerpc-*-linux*paired*])
3788 || [istarget rs6000-*-*] } {
3789 # VSX is not supported on AIX before 7.1.
3790 if { [istarget powerpc*-*-aix4*]
3791 || [istarget powerpc*-*-aix5*]
3792 || [istarget powerpc*-*-aix6*] } {
3795 return [check_no_compiler_messages powerpc_vsx_ok object {
3798 asm volatile ("xxlor vs0,vs0,vs0");
3800 asm volatile ("xxlor 0,0,0");
3810 # Return 1 if this is a PowerPC target supporting -mhtm
3812 proc check_effective_target_powerpc_htm_ok { } {
3813 if { ([istarget powerpc*-*-*]
3814 && ![istarget powerpc-*-linux*paired*])
3815 || [istarget rs6000-*-*] } {
3816 # HTM is not supported on AIX yet.
3817 if { [istarget powerpc*-*-aix*] } {
3820 return [check_no_compiler_messages powerpc_htm_ok object {
3822 asm volatile ("tbegin. 0");
3831 # Return 1 if the target supports executing HTM hardware instructions,
3832 # 0 otherwise. Cache the result.
3834 proc check_htm_hw_available { } {
3835 return [check_cached_effective_target htm_hw_available {
3836 # For now, disable on Darwin
3837 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
3840 check_runtime_nocache htm_hw_available {
3850 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
3852 proc check_effective_target_powerpc_ppu_ok { } {
3853 if [check_effective_target_powerpc_altivec_ok] {
3854 return [check_no_compiler_messages cell_asm_available object {
3857 asm volatile ("lvlx v0,v0,v0");
3859 asm volatile ("lvlx 0,0,0");
3869 # Return 1 if this is a PowerPC target that supports SPU.
3871 proc check_effective_target_powerpc_spu { } {
3872 if { [istarget powerpc*-*-linux*] } {
3873 return [check_effective_target_powerpc_altivec_ok]
3879 # Return 1 if this is a PowerPC SPE target. The check includes options
3880 # specified by dg-options for this test, so don't cache the result.
3882 proc check_effective_target_powerpc_spe_nocache { } {
3883 if { [istarget powerpc*-*-*] } {
3884 return [check_no_compiler_messages_nocache powerpc_spe object {
3890 } [current_compiler_flags]]
3896 # Return 1 if this is a PowerPC target with SPE enabled.
3898 proc check_effective_target_powerpc_spe { } {
3899 if { [istarget powerpc*-*-*] } {
3900 return [check_no_compiler_messages powerpc_spe object {
3912 # Return 1 if this is a PowerPC target with Altivec enabled.
3914 proc check_effective_target_powerpc_altivec { } {
3915 if { [istarget powerpc*-*-*] } {
3916 return [check_no_compiler_messages powerpc_altivec object {
3928 # Return 1 if this is a PowerPC 405 target. The check includes options
3929 # specified by dg-options for this test, so don't cache the result.
3931 proc check_effective_target_powerpc_405_nocache { } {
3932 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
3933 return [check_no_compiler_messages_nocache powerpc_405 object {
3939 } [current_compiler_flags]]
3945 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
3947 proc check_effective_target_powerpc_elfv2 { } {
3948 if { [istarget powerpc*-*-*] } {
3949 return [check_no_compiler_messages powerpc_elfv2 object {
3951 #error not ELF v2 ABI
3961 # Return 1 if this is a SPU target with a toolchain that
3962 # supports automatic overlay generation.
3964 proc check_effective_target_spu_auto_overlay { } {
3965 if { [istarget spu*-*-elf*] } {
3966 return [check_no_compiler_messages spu_auto_overlay executable {
3968 } "-Wl,--auto-overlay" ]
3974 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
3975 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
3976 # test environment appears to run executables on such a simulator.
3978 proc check_effective_target_ultrasparc_hw { } {
3979 return [check_runtime ultrasparc_hw {
3980 int main() { return 0; }
3981 } "-mcpu=ultrasparc"]
3984 # Return 1 if the test environment supports executing UltraSPARC VIS2
3985 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
3987 proc check_effective_target_ultrasparc_vis2_hw { } {
3988 return [check_runtime ultrasparc_vis2_hw {
3989 int main() { __asm__(".word 0x81b00320"); return 0; }
3990 } "-mcpu=ultrasparc3"]
3993 # Return 1 if the test environment supports executing UltraSPARC VIS3
3994 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
3996 proc check_effective_target_ultrasparc_vis3_hw { } {
3997 return [check_runtime ultrasparc_vis3_hw {
3998 int main() { __asm__(".word 0x81b00220"); return 0; }
4002 # Return 1 if this is a SPARC-V9 target.
4004 proc check_effective_target_sparc_v9 { } {
4005 if { [istarget sparc*-*-*] } {
4006 return [check_no_compiler_messages sparc_v9 object {
4008 asm volatile ("return %i7+8");
4017 # Return 1 if this is a SPARC target with VIS enabled.
4019 proc check_effective_target_sparc_vis { } {
4020 if { [istarget sparc*-*-*] } {
4021 return [check_no_compiler_messages sparc_vis object {
4033 # Return 1 if the target supports hardware vector shift operation.
4035 proc check_effective_target_vect_shift { } {
4036 global et_vect_shift_saved
4038 if [info exists et_vect_shift_saved] {
4039 verbose "check_effective_target_vect_shift: using cached result" 2
4041 set et_vect_shift_saved 0
4042 if { ([istarget powerpc*-*-*]
4043 && ![istarget powerpc-*-linux*paired*])
4044 || [istarget ia64-*-*]
4045 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4046 || [istarget aarch64*-*-*]
4047 || [check_effective_target_arm32]
4048 || ([istarget mips*-*-*]
4049 && [check_effective_target_mips_loongson]) } {
4050 set et_vect_shift_saved 1
4054 verbose "check_effective_target_vect_shift: returning $et_vect_shift_saved" 2
4055 return $et_vect_shift_saved
4058 proc check_effective_target_whole_vector_shift { } {
4059 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4060 || [istarget ia64-*-*]
4061 || [istarget aarch64*-*-*]
4062 || [istarget powerpc64*-*-*]
4063 || ([check_effective_target_arm32]
4064 && [check_effective_target_arm_little_endian])
4065 || ([istarget mips*-*-*]
4066 && [check_effective_target_mips_loongson]) } {
4072 verbose "check_effective_target_vect_long: returning $answer" 2
4076 # Return 1 if the target supports vector bswap operations.
4078 proc check_effective_target_vect_bswap { } {
4079 global et_vect_bswap_saved
4081 if [info exists et_vect_bswap_saved] {
4082 verbose "check_effective_target_vect_bswap: using cached result" 2
4084 set et_vect_bswap_saved 0
4085 if { [istarget aarch64*-*-*]
4086 || ([istarget arm*-*-*]
4087 && [check_effective_target_arm_neon])
4089 set et_vect_bswap_saved 1
4093 verbose "check_effective_target_vect_bswap: returning $et_vect_bswap_saved" 2
4094 return $et_vect_bswap_saved
4097 # Return 1 if the target supports hardware vector shift operation for char.
4099 proc check_effective_target_vect_shift_char { } {
4100 global et_vect_shift_char_saved
4102 if [info exists et_vect_shift_char_saved] {
4103 verbose "check_effective_target_vect_shift_char: using cached result" 2
4105 set et_vect_shift_char_saved 0
4106 if { ([istarget powerpc*-*-*]
4107 && ![istarget powerpc-*-linux*paired*])
4108 || [check_effective_target_arm32] } {
4109 set et_vect_shift_char_saved 1
4113 verbose "check_effective_target_vect_shift_char: returning $et_vect_shift_char_saved" 2
4114 return $et_vect_shift_char_saved
4117 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
4119 # This can change for different subtargets so do not cache the result.
4121 proc check_effective_target_vect_long { } {
4122 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4123 || (([istarget powerpc*-*-*]
4124 && ![istarget powerpc-*-linux*paired*])
4125 && [check_effective_target_ilp32])
4126 || [check_effective_target_arm32]
4127 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
4128 || [istarget aarch64*-*-*] } {
4134 verbose "check_effective_target_vect_long: returning $answer" 2
4138 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
4140 # This won't change for different subtargets so cache the result.
4142 proc check_effective_target_vect_float { } {
4143 global et_vect_float_saved
4145 if [info exists et_vect_float_saved] {
4146 verbose "check_effective_target_vect_float: using cached result" 2
4148 set et_vect_float_saved 0
4149 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4150 || [istarget powerpc*-*-*]
4151 || [istarget spu-*-*]
4152 || [istarget mips-sde-elf]
4153 || [istarget mipsisa64*-*-*]
4154 || [istarget ia64-*-*]
4155 || [istarget aarch64*-*-*]
4156 || [check_effective_target_arm32] } {
4157 set et_vect_float_saved 1
4161 verbose "check_effective_target_vect_float: returning $et_vect_float_saved" 2
4162 return $et_vect_float_saved
4165 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
4167 # This won't change for different subtargets so cache the result.
4169 proc check_effective_target_vect_double { } {
4170 global et_vect_double_saved
4172 if [info exists et_vect_double_saved] {
4173 verbose "check_effective_target_vect_double: using cached result" 2
4175 set et_vect_double_saved 0
4176 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4177 || [istarget aarch64*-*-*] } {
4178 if { [check_no_compiler_messages vect_double assembly {
4179 #ifdef __tune_atom__
4180 # error No double vectorizer support.
4183 set et_vect_double_saved 1
4185 set et_vect_double_saved 0
4187 } elseif { [istarget spu-*-*] } {
4188 set et_vect_double_saved 1
4189 } elseif { [istarget powerpc*-*-*] && [check_vsx_hw_available] } {
4190 set et_vect_double_saved 1
4194 verbose "check_effective_target_vect_double: returning $et_vect_double_saved" 2
4195 return $et_vect_double_saved
4198 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
4200 # This won't change for different subtargets so cache the result.
4202 proc check_effective_target_vect_long_long { } {
4203 global et_vect_long_long_saved
4205 if [info exists et_vect_long_long_saved] {
4206 verbose "check_effective_target_vect_long_long: using cached result" 2
4208 set et_vect_long_long_saved 0
4209 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4210 set et_vect_long_long_saved 1
4214 verbose "check_effective_target_vect_long_long: returning $et_vect_long_long_saved" 2
4215 return $et_vect_long_long_saved
4219 # Return 1 if the target plus current options does not support a vector
4220 # max instruction on "int", 0 otherwise.
4222 # This won't change for different subtargets so cache the result.
4224 proc check_effective_target_vect_no_int_min_max { } {
4225 global et_vect_no_int_min_max_saved
4227 if [info exists et_vect_no_int_min_max_saved] {
4228 verbose "check_effective_target_vect_no_int_min_max: using cached result" 2
4230 set et_vect_no_int_min_max_saved 0
4231 if { [istarget sparc*-*-*]
4232 || [istarget spu-*-*]
4233 || [istarget alpha*-*-*]
4234 || ([istarget mips*-*-*]
4235 && [check_effective_target_mips_loongson]) } {
4236 set et_vect_no_int_min_max_saved 1
4239 verbose "check_effective_target_vect_no_int_min_max: returning $et_vect_no_int_min_max_saved" 2
4240 return $et_vect_no_int_min_max_saved
4243 # Return 1 if the target plus current options does not support a vector
4244 # add instruction on "int", 0 otherwise.
4246 # This won't change for different subtargets so cache the result.
4248 proc check_effective_target_vect_no_int_add { } {
4249 global et_vect_no_int_add_saved
4251 if [info exists et_vect_no_int_add_saved] {
4252 verbose "check_effective_target_vect_no_int_add: using cached result" 2
4254 set et_vect_no_int_add_saved 0
4255 # Alpha only supports vector add on V8QI and V4HI.
4256 if { [istarget alpha*-*-*] } {
4257 set et_vect_no_int_add_saved 1
4260 verbose "check_effective_target_vect_no_int_add: returning $et_vect_no_int_add_saved" 2
4261 return $et_vect_no_int_add_saved
4264 # Return 1 if the target plus current options does not support vector
4265 # bitwise instructions, 0 otherwise.
4267 # This won't change for different subtargets so cache the result.
4269 proc check_effective_target_vect_no_bitwise { } {
4270 global et_vect_no_bitwise_saved
4272 if [info exists et_vect_no_bitwise_saved] {
4273 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
4275 set et_vect_no_bitwise_saved 0
4277 verbose "check_effective_target_vect_no_bitwise: returning $et_vect_no_bitwise_saved" 2
4278 return $et_vect_no_bitwise_saved
4281 # Return 1 if the target plus current options supports vector permutation,
4284 # This won't change for different subtargets so cache the result.
4286 proc check_effective_target_vect_perm { } {
4289 if [info exists et_vect_perm_saved] {
4290 verbose "check_effective_target_vect_perm: using cached result" 2
4292 set et_vect_perm_saved 0
4293 if { [is-effective-target arm_neon_ok]
4294 || [istarget aarch64*-*-*]
4295 || [istarget powerpc*-*-*]
4296 || [istarget spu-*-*]
4297 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4298 || ([istarget mips*-*-*]
4299 && [check_effective_target_mpaired_single]) } {
4300 set et_vect_perm_saved 1
4303 verbose "check_effective_target_vect_perm: returning $et_vect_perm_saved" 2
4304 return $et_vect_perm_saved
4307 # Return 1 if the target plus current options supports vector permutation
4308 # on byte-sized elements, 0 otherwise.
4310 # This won't change for different subtargets so cache the result.
4312 proc check_effective_target_vect_perm_byte { } {
4313 global et_vect_perm_byte
4315 if [info exists et_vect_perm_byte_saved] {
4316 verbose "check_effective_target_vect_perm_byte: using cached result" 2
4318 set et_vect_perm_byte_saved 0
4319 if { ([is-effective-target arm_neon_ok]
4320 && [is-effective-target arm_little_endian])
4321 || ([istarget aarch64*-*-*]
4322 && [is-effective-target aarch64_little_endian])
4323 || [istarget powerpc*-*-*]
4324 || [istarget spu-*-*] } {
4325 set et_vect_perm_byte_saved 1
4328 verbose "check_effective_target_vect_perm_byte: returning $et_vect_perm_byte_saved" 2
4329 return $et_vect_perm_byte_saved
4332 # Return 1 if the target plus current options supports vector permutation
4333 # on short-sized elements, 0 otherwise.
4335 # This won't change for different subtargets so cache the result.
4337 proc check_effective_target_vect_perm_short { } {
4338 global et_vect_perm_short
4340 if [info exists et_vect_perm_short_saved] {
4341 verbose "check_effective_target_vect_perm_short: using cached result" 2
4343 set et_vect_perm_short_saved 0
4344 if { ([is-effective-target arm_neon_ok]
4345 && [is-effective-target arm_little_endian])
4346 || ([istarget aarch64*-*-*]
4347 && [is-effective-target aarch64_little_endian])
4348 || [istarget powerpc*-*-*]
4349 || [istarget spu-*-*] } {
4350 set et_vect_perm_short_saved 1
4353 verbose "check_effective_target_vect_perm_short: returning $et_vect_perm_short_saved" 2
4354 return $et_vect_perm_short_saved
4357 # Return 1 if the target plus current options supports a vector
4358 # widening summation of *short* args into *int* result, 0 otherwise.
4360 # This won't change for different subtargets so cache the result.
4362 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
4363 global et_vect_widen_sum_hi_to_si_pattern
4365 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved] {
4366 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: using cached result" 2
4368 set et_vect_widen_sum_hi_to_si_pattern_saved 0
4369 if { [istarget powerpc*-*-*]
4370 || [istarget aarch64*-*-*]
4371 || ([istarget arm*-*-*] &&
4372 [check_effective_target_arm_neon_ok])
4373 || [istarget ia64-*-*] } {
4374 set et_vect_widen_sum_hi_to_si_pattern_saved 1
4377 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: returning $et_vect_widen_sum_hi_to_si_pattern_saved" 2
4378 return $et_vect_widen_sum_hi_to_si_pattern_saved
4381 # Return 1 if the target plus current options supports a vector
4382 # widening summation of *short* args into *int* result, 0 otherwise.
4383 # A target can also support this widening summation if it can support
4384 # promotion (unpacking) from shorts to ints.
4386 # This won't change for different subtargets so cache the result.
4388 proc check_effective_target_vect_widen_sum_hi_to_si { } {
4389 global et_vect_widen_sum_hi_to_si
4391 if [info exists et_vect_widen_sum_hi_to_si_saved] {
4392 verbose "check_effective_target_vect_widen_sum_hi_to_si: using cached result" 2
4394 set et_vect_widen_sum_hi_to_si_saved [check_effective_target_vect_unpack]
4395 if { [istarget powerpc*-*-*]
4396 || [istarget ia64-*-*] } {
4397 set et_vect_widen_sum_hi_to_si_saved 1
4400 verbose "check_effective_target_vect_widen_sum_hi_to_si: returning $et_vect_widen_sum_hi_to_si_saved" 2
4401 return $et_vect_widen_sum_hi_to_si_saved
4404 # Return 1 if the target plus current options supports a vector
4405 # widening summation of *char* args into *short* result, 0 otherwise.
4406 # A target can also support this widening summation if it can support
4407 # promotion (unpacking) from chars to shorts.
4409 # This won't change for different subtargets so cache the result.
4411 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
4412 global et_vect_widen_sum_qi_to_hi
4414 if [info exists et_vect_widen_sum_qi_to_hi_saved] {
4415 verbose "check_effective_target_vect_widen_sum_qi_to_hi: using cached result" 2
4417 set et_vect_widen_sum_qi_to_hi_saved 0
4418 if { [check_effective_target_vect_unpack]
4419 || [check_effective_target_arm_neon_ok]
4420 || [istarget ia64-*-*] } {
4421 set et_vect_widen_sum_qi_to_hi_saved 1
4424 verbose "check_effective_target_vect_widen_sum_qi_to_hi: returning $et_vect_widen_sum_qi_to_hi_saved" 2
4425 return $et_vect_widen_sum_qi_to_hi_saved
4428 # Return 1 if the target plus current options supports a vector
4429 # widening summation of *char* args into *int* result, 0 otherwise.
4431 # This won't change for different subtargets so cache the result.
4433 proc check_effective_target_vect_widen_sum_qi_to_si { } {
4434 global et_vect_widen_sum_qi_to_si
4436 if [info exists et_vect_widen_sum_qi_to_si_saved] {
4437 verbose "check_effective_target_vect_widen_sum_qi_to_si: using cached result" 2
4439 set et_vect_widen_sum_qi_to_si_saved 0
4440 if { [istarget powerpc*-*-*] } {
4441 set et_vect_widen_sum_qi_to_si_saved 1
4444 verbose "check_effective_target_vect_widen_sum_qi_to_si: returning $et_vect_widen_sum_qi_to_si_saved" 2
4445 return $et_vect_widen_sum_qi_to_si_saved
4448 # Return 1 if the target plus current options supports a vector
4449 # widening multiplication of *char* args into *short* result, 0 otherwise.
4450 # A target can also support this widening multplication if it can support
4451 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
4452 # multiplication of shorts).
4454 # This won't change for different subtargets so cache the result.
4457 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
4458 global et_vect_widen_mult_qi_to_hi
4460 if [info exists et_vect_widen_mult_qi_to_hi_saved] {
4461 verbose "check_effective_target_vect_widen_mult_qi_to_hi: using cached result" 2
4463 if { [check_effective_target_vect_unpack]
4464 && [check_effective_target_vect_short_mult] } {
4465 set et_vect_widen_mult_qi_to_hi_saved 1
4467 set et_vect_widen_mult_qi_to_hi_saved 0
4469 if { [istarget powerpc*-*-*]
4470 || [istarget aarch64*-*-*]
4471 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4472 set et_vect_widen_mult_qi_to_hi_saved 1
4475 verbose "check_effective_target_vect_widen_mult_qi_to_hi: returning $et_vect_widen_mult_qi_to_hi_saved" 2
4476 return $et_vect_widen_mult_qi_to_hi_saved
4479 # Return 1 if the target plus current options supports a vector
4480 # widening multiplication of *short* args into *int* result, 0 otherwise.
4481 # A target can also support this widening multplication if it can support
4482 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
4483 # multiplication of ints).
4485 # This won't change for different subtargets so cache the result.
4488 proc check_effective_target_vect_widen_mult_hi_to_si { } {
4489 global et_vect_widen_mult_hi_to_si
4491 if [info exists et_vect_widen_mult_hi_to_si_saved] {
4492 verbose "check_effective_target_vect_widen_mult_hi_to_si: using cached result" 2
4494 if { [check_effective_target_vect_unpack]
4495 && [check_effective_target_vect_int_mult] } {
4496 set et_vect_widen_mult_hi_to_si_saved 1
4498 set et_vect_widen_mult_hi_to_si_saved 0
4500 if { [istarget powerpc*-*-*]
4501 || [istarget spu-*-*]
4502 || [istarget ia64-*-*]
4503 || [istarget aarch64*-*-*]
4504 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4505 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4506 set et_vect_widen_mult_hi_to_si_saved 1
4509 verbose "check_effective_target_vect_widen_mult_hi_to_si: returning $et_vect_widen_mult_hi_to_si_saved" 2
4510 return $et_vect_widen_mult_hi_to_si_saved
4513 # Return 1 if the target plus current options supports a vector
4514 # widening multiplication of *char* args into *short* result, 0 otherwise.
4516 # This won't change for different subtargets so cache the result.
4518 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
4519 global et_vect_widen_mult_qi_to_hi_pattern
4521 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved] {
4522 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: using cached result" 2
4524 set et_vect_widen_mult_qi_to_hi_pattern_saved 0
4525 if { [istarget powerpc*-*-*]
4526 || ([istarget arm*-*-*]
4527 && [check_effective_target_arm_neon_ok]
4528 && [check_effective_target_arm_little_endian]) } {
4529 set et_vect_widen_mult_qi_to_hi_pattern_saved 1
4532 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: returning $et_vect_widen_mult_qi_to_hi_pattern_saved" 2
4533 return $et_vect_widen_mult_qi_to_hi_pattern_saved
4536 # Return 1 if the target plus current options supports a vector
4537 # widening multiplication of *short* args into *int* result, 0 otherwise.
4539 # This won't change for different subtargets so cache the result.
4541 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
4542 global et_vect_widen_mult_hi_to_si_pattern
4544 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved] {
4545 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: using cached result" 2
4547 set et_vect_widen_mult_hi_to_si_pattern_saved 0
4548 if { [istarget powerpc*-*-*]
4549 || [istarget spu-*-*]
4550 || [istarget ia64-*-*]
4551 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4552 || ([istarget arm*-*-*]
4553 && [check_effective_target_arm_neon_ok]
4554 && [check_effective_target_arm_little_endian]) } {
4555 set et_vect_widen_mult_hi_to_si_pattern_saved 1
4558 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: returning $et_vect_widen_mult_hi_to_si_pattern_saved" 2
4559 return $et_vect_widen_mult_hi_to_si_pattern_saved
4562 # Return 1 if the target plus current options supports a vector
4563 # widening multiplication of *int* args into *long* result, 0 otherwise.
4565 # This won't change for different subtargets so cache the result.
4567 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
4568 global et_vect_widen_mult_si_to_di_pattern
4570 if [info exists et_vect_widen_mult_si_to_di_pattern_saved] {
4571 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: using cached result" 2
4573 set et_vect_widen_mult_si_to_di_pattern_saved 0
4574 if {[istarget ia64-*-*]
4575 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4576 set et_vect_widen_mult_si_to_di_pattern_saved 1
4579 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: returning $et_vect_widen_mult_si_to_di_pattern_saved" 2
4580 return $et_vect_widen_mult_si_to_di_pattern_saved
4583 # Return 1 if the target plus current options supports a vector
4584 # widening shift, 0 otherwise.
4586 # This won't change for different subtargets so cache the result.
4588 proc check_effective_target_vect_widen_shift { } {
4589 global et_vect_widen_shift_saved
4591 if [info exists et_vect_shift_saved] {
4592 verbose "check_effective_target_vect_widen_shift: using cached result" 2
4594 set et_vect_widen_shift_saved 0
4595 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4596 set et_vect_widen_shift_saved 1
4599 verbose "check_effective_target_vect_widen_shift: returning $et_vect_widen_shift_saved" 2
4600 return $et_vect_widen_shift_saved
4603 # Return 1 if the target plus current options supports a vector
4604 # dot-product of signed chars, 0 otherwise.
4606 # This won't change for different subtargets so cache the result.
4608 proc check_effective_target_vect_sdot_qi { } {
4609 global et_vect_sdot_qi
4611 if [info exists et_vect_sdot_qi_saved] {
4612 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
4614 set et_vect_sdot_qi_saved 0
4615 if { [istarget ia64-*-*] } {
4616 set et_vect_udot_qi_saved 1
4619 verbose "check_effective_target_vect_sdot_qi: returning $et_vect_sdot_qi_saved" 2
4620 return $et_vect_sdot_qi_saved
4623 # Return 1 if the target plus current options supports a vector
4624 # dot-product of unsigned chars, 0 otherwise.
4626 # This won't change for different subtargets so cache the result.
4628 proc check_effective_target_vect_udot_qi { } {
4629 global et_vect_udot_qi
4631 if [info exists et_vect_udot_qi_saved] {
4632 verbose "check_effective_target_vect_udot_qi: using cached result" 2
4634 set et_vect_udot_qi_saved 0
4635 if { [istarget powerpc*-*-*]
4636 || [istarget ia64-*-*] } {
4637 set et_vect_udot_qi_saved 1
4640 verbose "check_effective_target_vect_udot_qi: returning $et_vect_udot_qi_saved" 2
4641 return $et_vect_udot_qi_saved
4644 # Return 1 if the target plus current options supports a vector
4645 # dot-product of signed shorts, 0 otherwise.
4647 # This won't change for different subtargets so cache the result.
4649 proc check_effective_target_vect_sdot_hi { } {
4650 global et_vect_sdot_hi
4652 if [info exists et_vect_sdot_hi_saved] {
4653 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
4655 set et_vect_sdot_hi_saved 0
4656 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4657 || [istarget ia64-*-*]
4658 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4659 set et_vect_sdot_hi_saved 1
4662 verbose "check_effective_target_vect_sdot_hi: returning $et_vect_sdot_hi_saved" 2
4663 return $et_vect_sdot_hi_saved
4666 # Return 1 if the target plus current options supports a vector
4667 # dot-product of unsigned shorts, 0 otherwise.
4669 # This won't change for different subtargets so cache the result.
4671 proc check_effective_target_vect_udot_hi { } {
4672 global et_vect_udot_hi
4674 if [info exists et_vect_udot_hi_saved] {
4675 verbose "check_effective_target_vect_udot_hi: using cached result" 2
4677 set et_vect_udot_hi_saved 0
4678 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) } {
4679 set et_vect_udot_hi_saved 1
4682 verbose "check_effective_target_vect_udot_hi: returning $et_vect_udot_hi_saved" 2
4683 return $et_vect_udot_hi_saved
4686 # Return 1 if the target plus current options supports a vector
4687 # sad operation of unsigned chars, 0 otherwise.
4689 # This won't change for different subtargets so cache the result.
4691 proc check_effective_target_vect_usad_char { } {
4692 global et_vect_usad_char
4694 if [info exists et_vect_usad_char_saved] {
4695 verbose "check_effective_target_vect_usad_char: using cached result" 2
4697 set et_vect_usad_char_saved 0
4698 if { ([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
4699 set et_vect_usad_char_saved 1
4702 verbose "check_effective_target_vect_usad_char: returning $et_vect_usad_char_saved" 2
4703 return $et_vect_usad_char_saved
4706 # Return 1 if the target plus current options supports a vector
4707 # demotion (packing) of shorts (to chars) and ints (to shorts)
4708 # using modulo arithmetic, 0 otherwise.
4710 # This won't change for different subtargets so cache the result.
4712 proc check_effective_target_vect_pack_trunc { } {
4713 global et_vect_pack_trunc
4715 if [info exists et_vect_pack_trunc_saved] {
4716 verbose "check_effective_target_vect_pack_trunc: using cached result" 2
4718 set et_vect_pack_trunc_saved 0
4719 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4720 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4721 || [istarget aarch64*-*-*]
4722 || [istarget spu-*-*]
4723 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4724 && [check_effective_target_arm_little_endian]) } {
4725 set et_vect_pack_trunc_saved 1
4728 verbose "check_effective_target_vect_pack_trunc: returning $et_vect_pack_trunc_saved" 2
4729 return $et_vect_pack_trunc_saved
4732 # Return 1 if the target plus current options supports a vector
4733 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
4735 # This won't change for different subtargets so cache the result.
4737 proc check_effective_target_vect_unpack { } {
4738 global et_vect_unpack
4740 if [info exists et_vect_unpack_saved] {
4741 verbose "check_effective_target_vect_unpack: using cached result" 2
4743 set et_vect_unpack_saved 0
4744 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
4745 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4746 || [istarget spu-*-*]
4747 || [istarget ia64-*-*]
4748 || [istarget aarch64*-*-*]
4749 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4750 && [check_effective_target_arm_little_endian]) } {
4751 set et_vect_unpack_saved 1
4754 verbose "check_effective_target_vect_unpack: returning $et_vect_unpack_saved" 2
4755 return $et_vect_unpack_saved
4758 # Return 1 if the target plus current options does not guarantee
4759 # that its STACK_BOUNDARY is >= the reguired vector alignment.
4761 # This won't change for different subtargets so cache the result.
4763 proc check_effective_target_unaligned_stack { } {
4764 global et_unaligned_stack_saved
4766 if [info exists et_unaligned_stack_saved] {
4767 verbose "check_effective_target_unaligned_stack: using cached result" 2
4769 set et_unaligned_stack_saved 0
4771 verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
4772 return $et_unaligned_stack_saved
4775 # Return 1 if the target plus current options does not support a vector
4776 # alignment mechanism, 0 otherwise.
4778 # This won't change for different subtargets so cache the result.
4780 proc check_effective_target_vect_no_align { } {
4781 global et_vect_no_align_saved
4783 if [info exists et_vect_no_align_saved] {
4784 verbose "check_effective_target_vect_no_align: using cached result" 2
4786 set et_vect_no_align_saved 0
4787 if { [istarget mipsisa64*-*-*]
4788 || [istarget mips-sde-elf]
4789 || [istarget sparc*-*-*]
4790 || [istarget ia64-*-*]
4791 || [check_effective_target_arm_vect_no_misalign]
4792 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
4793 || ([istarget mips*-*-*]
4794 && [check_effective_target_mips_loongson]) } {
4795 set et_vect_no_align_saved 1
4798 verbose "check_effective_target_vect_no_align: returning $et_vect_no_align_saved" 2
4799 return $et_vect_no_align_saved
4802 # Return 1 if the target supports a vector misalign access, 0 otherwise.
4804 # This won't change for different subtargets so cache the result.
4806 proc check_effective_target_vect_hw_misalign { } {
4807 global et_vect_hw_misalign_saved
4809 if [info exists et_vect_hw_misalign_saved] {
4810 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
4812 set et_vect_hw_misalign_saved 0
4813 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4814 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
4815 || [istarget aarch64*-*-*] } {
4816 set et_vect_hw_misalign_saved 1
4819 verbose "check_effective_target_vect_hw_misalign: returning $et_vect_hw_misalign_saved" 2
4820 return $et_vect_hw_misalign_saved
4824 # Return 1 if arrays are aligned to the vector alignment
4825 # boundary, 0 otherwise.
4827 # This won't change for different subtargets so cache the result.
4829 proc check_effective_target_vect_aligned_arrays { } {
4830 global et_vect_aligned_arrays
4832 if [info exists et_vect_aligned_arrays_saved] {
4833 verbose "check_effective_target_vect_aligned_arrays: using cached result" 2
4835 set et_vect_aligned_arrays_saved 0
4836 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
4837 if { ([is-effective-target lp64]
4838 && ( ![check_avx_available]
4839 || [check_prefer_avx128])) } {
4840 set et_vect_aligned_arrays_saved 1
4843 if [istarget spu-*-*] {
4844 set et_vect_aligned_arrays_saved 1
4847 verbose "check_effective_target_vect_aligned_arrays: returning $et_vect_aligned_arrays_saved" 2
4848 return $et_vect_aligned_arrays_saved
4851 # Return 1 if types of size 32 bit or less are naturally aligned
4852 # (aligned to their type-size), 0 otherwise.
4854 # This won't change for different subtargets so cache the result.
4856 proc check_effective_target_natural_alignment_32 { } {
4857 global et_natural_alignment_32
4859 if [info exists et_natural_alignment_32_saved] {
4860 verbose "check_effective_target_natural_alignment_32: using cached result" 2
4862 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
4863 set et_natural_alignment_32_saved 1
4864 if { ([istarget *-*-darwin*] && [is-effective-target lp64]) } {
4865 set et_natural_alignment_32_saved 0
4868 verbose "check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
4869 return $et_natural_alignment_32_saved
4872 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
4873 # type-size), 0 otherwise.
4875 # This won't change for different subtargets so cache the result.
4877 proc check_effective_target_natural_alignment_64 { } {
4878 global et_natural_alignment_64
4880 if [info exists et_natural_alignment_64_saved] {
4881 verbose "check_effective_target_natural_alignment_64: using cached result" 2
4883 set et_natural_alignment_64_saved 0
4884 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
4885 || [istarget spu-*-*] } {
4886 set et_natural_alignment_64_saved 1
4889 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
4890 return $et_natural_alignment_64_saved
4893 # Return 1 if all vector types are naturally aligned (aligned to their
4894 # type-size), 0 otherwise.
4896 # This won't change for different subtargets so cache the result.
4898 proc check_effective_target_vect_natural_alignment { } {
4899 global et_vect_natural_alignment
4901 if [info exists et_vect_natural_alignment_saved] {
4902 verbose "check_effective_target_vect_natural_alignment: using cached result" 2
4904 set et_vect_natural_alignment_saved 1
4905 if { [check_effective_target_arm_eabi]
4906 || [istarget nvptx-*-*]
4907 || [istarget s390*-*-*] } {
4908 set et_vect_natural_alignment_saved 0
4911 verbose "check_effective_target_vect_natural_alignment: returning $et_vect_natural_alignment_saved" 2
4912 return $et_vect_natural_alignment_saved
4915 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
4917 # This won't change for different subtargets so cache the result.
4919 proc check_effective_target_vector_alignment_reachable { } {
4920 global et_vector_alignment_reachable
4922 if [info exists et_vector_alignment_reachable_saved] {
4923 verbose "check_effective_target_vector_alignment_reachable: using cached result" 2
4925 if { [check_effective_target_vect_aligned_arrays]
4926 || [check_effective_target_natural_alignment_32] } {
4927 set et_vector_alignment_reachable_saved 1
4929 set et_vector_alignment_reachable_saved 0
4932 verbose "check_effective_target_vector_alignment_reachable: returning $et_vector_alignment_reachable_saved" 2
4933 return $et_vector_alignment_reachable_saved
4936 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
4938 # This won't change for different subtargets so cache the result.
4940 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
4941 global et_vector_alignment_reachable_for_64bit
4943 if [info exists et_vector_alignment_reachable_for_64bit_saved] {
4944 verbose "check_effective_target_vector_alignment_reachable_for_64bit: using cached result" 2
4946 if { [check_effective_target_vect_aligned_arrays]
4947 || [check_effective_target_natural_alignment_64] } {
4948 set et_vector_alignment_reachable_for_64bit_saved 1
4950 set et_vector_alignment_reachable_for_64bit_saved 0
4953 verbose "check_effective_target_vector_alignment_reachable_for_64bit: returning $et_vector_alignment_reachable_for_64bit_saved" 2
4954 return $et_vector_alignment_reachable_for_64bit_saved
4957 # Return 1 if the target only requires element alignment for vector accesses
4959 proc check_effective_target_vect_element_align { } {
4960 global et_vect_element_align
4962 if [info exists et_vect_element_align] {
4963 verbose "check_effective_target_vect_element_align: using cached result" 2
4965 set et_vect_element_align 0
4966 if { ([istarget arm*-*-*]
4967 && ![check_effective_target_arm_vect_no_misalign])
4968 || [check_effective_target_vect_hw_misalign] } {
4969 set et_vect_element_align 1
4973 verbose "check_effective_target_vect_element_align: returning $et_vect_element_align" 2
4974 return $et_vect_element_align
4977 # Return 1 if the target supports vector LOAD_LANES operations, 0 otherwise.
4979 proc check_effective_target_vect_load_lanes { } {
4980 global et_vect_load_lanes
4982 if [info exists et_vect_load_lanes] {
4983 verbose "check_effective_target_vect_load_lanes: using cached result" 2
4985 set et_vect_load_lanes 0
4986 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])
4987 || [istarget aarch64*-*-*] } {
4988 set et_vect_load_lanes 1
4992 verbose "check_effective_target_vect_load_lanes: returning $et_vect_load_lanes" 2
4993 return $et_vect_load_lanes
4996 # Return 1 if the target supports vector conditional operations, 0 otherwise.
4998 proc check_effective_target_vect_condition { } {
4999 global et_vect_cond_saved
5001 if [info exists et_vect_cond_saved] {
5002 verbose "check_effective_target_vect_cond: using cached result" 2
5004 set et_vect_cond_saved 0
5005 if { [istarget aarch64*-*-*]
5006 || [istarget powerpc*-*-*]
5007 || [istarget ia64-*-*]
5008 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5009 || [istarget spu-*-*]
5010 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
5011 set et_vect_cond_saved 1
5015 verbose "check_effective_target_vect_cond: returning $et_vect_cond_saved" 2
5016 return $et_vect_cond_saved
5019 # Return 1 if the target supports vector conditional operations where
5020 # the comparison has different type from the lhs, 0 otherwise.
5022 proc check_effective_target_vect_cond_mixed { } {
5023 global et_vect_cond_mixed_saved
5025 if [info exists et_vect_cond_mixed_saved] {
5026 verbose "check_effective_target_vect_cond_mixed: using cached result" 2
5028 set et_vect_cond_mixed_saved 0
5029 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5030 || [istarget powerpc*-*-*] } {
5031 set et_vect_cond_mixed_saved 1
5035 verbose "check_effective_target_vect_cond_mixed: returning $et_vect_cond_mixed_saved" 2
5036 return $et_vect_cond_mixed_saved
5039 # Return 1 if the target supports vector char multiplication, 0 otherwise.
5041 proc check_effective_target_vect_char_mult { } {
5042 global et_vect_char_mult_saved
5044 if [info exists et_vect_char_mult_saved] {
5045 verbose "check_effective_target_vect_char_mult: using cached result" 2
5047 set et_vect_char_mult_saved 0
5048 if { [istarget aarch64*-*-*]
5049 || [istarget ia64-*-*]
5050 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5051 || [check_effective_target_arm32]
5052 || [check_effective_target_powerpc_altivec] } {
5053 set et_vect_char_mult_saved 1
5057 verbose "check_effective_target_vect_char_mult: returning $et_vect_char_mult_saved" 2
5058 return $et_vect_char_mult_saved
5061 # Return 1 if the target supports vector short multiplication, 0 otherwise.
5063 proc check_effective_target_vect_short_mult { } {
5064 global et_vect_short_mult_saved
5066 if [info exists et_vect_short_mult_saved] {
5067 verbose "check_effective_target_vect_short_mult: using cached result" 2
5069 set et_vect_short_mult_saved 0
5070 if { [istarget ia64-*-*]
5071 || [istarget spu-*-*]
5072 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5073 || [istarget powerpc*-*-*]
5074 || [istarget aarch64*-*-*]
5075 || [check_effective_target_arm32]
5076 || ([istarget mips*-*-*]
5077 && [check_effective_target_mips_loongson]) } {
5078 set et_vect_short_mult_saved 1
5082 verbose "check_effective_target_vect_short_mult: returning $et_vect_short_mult_saved" 2
5083 return $et_vect_short_mult_saved
5086 # Return 1 if the target supports vector int multiplication, 0 otherwise.
5088 proc check_effective_target_vect_int_mult { } {
5089 global et_vect_int_mult_saved
5091 if [info exists et_vect_int_mult_saved] {
5092 verbose "check_effective_target_vect_int_mult: using cached result" 2
5094 set et_vect_int_mult_saved 0
5095 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5096 || [istarget spu-*-*]
5097 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5098 || [istarget ia64-*-*]
5099 || [istarget aarch64*-*-*]
5100 || [check_effective_target_arm32] } {
5101 set et_vect_int_mult_saved 1
5105 verbose "check_effective_target_vect_int_mult: returning $et_vect_int_mult_saved" 2
5106 return $et_vect_int_mult_saved
5109 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
5111 proc check_effective_target_vect_extract_even_odd { } {
5112 global et_vect_extract_even_odd_saved
5114 if [info exists et_vect_extract_even_odd_saved] {
5115 verbose "check_effective_target_vect_extract_even_odd: using cached result" 2
5117 set et_vect_extract_even_odd_saved 0
5118 if { [istarget aarch64*-*-*]
5119 || [istarget powerpc*-*-*]
5120 || [is-effective-target arm_neon_ok]
5121 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5122 || [istarget ia64-*-*]
5123 || [istarget spu-*-*]
5124 || ([istarget mips*-*-*]
5125 && [check_effective_target_mpaired_single]) } {
5126 set et_vect_extract_even_odd_saved 1
5130 verbose "check_effective_target_vect_extract_even_odd: returning $et_vect_extract_even_odd_saved" 2
5131 return $et_vect_extract_even_odd_saved
5134 # Return 1 if the target supports vector interleaving, 0 otherwise.
5136 proc check_effective_target_vect_interleave { } {
5137 global et_vect_interleave_saved
5139 if [info exists et_vect_interleave_saved] {
5140 verbose "check_effective_target_vect_interleave: using cached result" 2
5142 set et_vect_interleave_saved 0
5143 if { [istarget aarch64*-*-*]
5144 || [istarget powerpc*-*-*]
5145 || [is-effective-target arm_neon_ok]
5146 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5147 || [istarget ia64-*-*]
5148 || [istarget spu-*-*]
5149 || ([istarget mips*-*-*]
5150 && [check_effective_target_mpaired_single]) } {
5151 set et_vect_interleave_saved 1
5155 verbose "check_effective_target_vect_interleave: returning $et_vect_interleave_saved" 2
5156 return $et_vect_interleave_saved
5159 foreach N {2 3 4 8} {
5160 eval [string map [list N $N] {
5161 # Return 1 if the target supports 2-vector interleaving
5162 proc check_effective_target_vect_stridedN { } {
5163 global et_vect_stridedN_saved
5165 if [info exists et_vect_stridedN_saved] {
5166 verbose "check_effective_target_vect_stridedN: using cached result" 2
5168 set et_vect_stridedN_saved 0
5170 && [check_effective_target_vect_interleave]
5171 && [check_effective_target_vect_extract_even_odd] } {
5172 set et_vect_stridedN_saved 1
5174 if { ([istarget arm*-*-*]
5175 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
5176 set et_vect_stridedN_saved 1
5180 verbose "check_effective_target_vect_stridedN: returning $et_vect_stridedN_saved" 2
5181 return $et_vect_stridedN_saved
5186 # Return 1 if the target supports multiple vector sizes
5188 proc check_effective_target_vect_multiple_sizes { } {
5189 global et_vect_multiple_sizes_saved
5191 set et_vect_multiple_sizes_saved 0
5192 if { ([istarget aarch64*-*-*]
5193 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])) } {
5194 set et_vect_multiple_sizes_saved 1
5196 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
5197 if { ([check_avx_available] && ![check_prefer_avx128]) } {
5198 set et_vect_multiple_sizes_saved 1
5202 verbose "check_effective_target_vect_multiple_sizes: returning $et_vect_multiple_sizes_saved" 2
5203 return $et_vect_multiple_sizes_saved
5206 # Return 1 if the target supports vectors of 64 bits.
5208 proc check_effective_target_vect64 { } {
5209 global et_vect64_saved
5211 if [info exists et_vect64_saved] {
5212 verbose "check_effective_target_vect64: using cached result" 2
5214 set et_vect64_saved 0
5215 if { ([istarget arm*-*-*]
5216 && [check_effective_target_arm_neon_ok]
5217 && [check_effective_target_arm_little_endian])
5218 || [istarget aarch64*-*-*]
5219 || [istarget sparc*-*-*] } {
5220 set et_vect64_saved 1
5224 verbose "check_effective_target_vect64: returning $et_vect64_saved" 2
5225 return $et_vect64_saved
5228 # Return 1 if the target supports vector copysignf calls.
5230 proc check_effective_target_vect_call_copysignf { } {
5231 global et_vect_call_copysignf_saved
5233 if [info exists et_vect_call_copysignf_saved] {
5234 verbose "check_effective_target_vect_call_copysignf: using cached result" 2
5236 set et_vect_call_copysignf_saved 0
5237 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5238 || [istarget powerpc*-*-*] } {
5239 set et_vect_call_copysignf_saved 1
5243 verbose "check_effective_target_vect_call_copysignf: returning $et_vect_call_copysignf_saved" 2
5244 return $et_vect_call_copysignf_saved
5247 # Return 1 if the target supports hardware square root instructions.
5249 proc check_effective_target_sqrt_insn { } {
5250 global et_sqrt_insn_saved
5252 if [info exists et_sqrt_insn_saved] {
5253 verbose "check_effective_target_hw_sqrt: using cached result" 2
5255 set et_sqrt_insn_saved 0
5256 if { [istarget x86_64-*-*]
5257 || [istarget powerpc*-*-*]
5258 || [istarget aarch64*-*-*]
5259 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok]) } {
5260 set et_sqrt_insn_saved 1
5264 verbose "check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2
5265 return $et_sqrt_insn_saved
5268 # Return 1 if the target supports vector sqrtf calls.
5270 proc check_effective_target_vect_call_sqrtf { } {
5271 global et_vect_call_sqrtf_saved
5273 if [info exists et_vect_call_sqrtf_saved] {
5274 verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
5276 set et_vect_call_sqrtf_saved 0
5277 if { [istarget aarch64*-*-*]
5278 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5279 || ([istarget powerpc*-*-*] && [check_vsx_hw_available]) } {
5280 set et_vect_call_sqrtf_saved 1
5284 verbose "check_effective_target_vect_call_sqrtf: returning $et_vect_call_sqrtf_saved" 2
5285 return $et_vect_call_sqrtf_saved
5288 # Return 1 if the target supports vector lrint calls.
5290 proc check_effective_target_vect_call_lrint { } {
5291 set et_vect_call_lrint 0
5292 if { ([istarget i?86-*-*] || [istarget x86_64-*-*])
5293 && [check_effective_target_ilp32] } {
5294 set et_vect_call_lrint 1
5297 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
5298 return $et_vect_call_lrint
5301 # Return 1 if the target supports vector btrunc calls.
5303 proc check_effective_target_vect_call_btrunc { } {
5304 global et_vect_call_btrunc_saved
5306 if [info exists et_vect_call_btrunc_saved] {
5307 verbose "check_effective_target_vect_call_btrunc: using cached result" 2
5309 set et_vect_call_btrunc_saved 0
5310 if { [istarget aarch64*-*-*] } {
5311 set et_vect_call_btrunc_saved 1
5315 verbose "check_effective_target_vect_call_btrunc: returning $et_vect_call_btrunc_saved" 2
5316 return $et_vect_call_btrunc_saved
5319 # Return 1 if the target supports vector btruncf calls.
5321 proc check_effective_target_vect_call_btruncf { } {
5322 global et_vect_call_btruncf_saved
5324 if [info exists et_vect_call_btruncf_saved] {
5325 verbose "check_effective_target_vect_call_btruncf: using cached result" 2
5327 set et_vect_call_btruncf_saved 0
5328 if { [istarget aarch64*-*-*] } {
5329 set et_vect_call_btruncf_saved 1
5333 verbose "check_effective_target_vect_call_btruncf: returning $et_vect_call_btruncf_saved" 2
5334 return $et_vect_call_btruncf_saved
5337 # Return 1 if the target supports vector ceil calls.
5339 proc check_effective_target_vect_call_ceil { } {
5340 global et_vect_call_ceil_saved
5342 if [info exists et_vect_call_ceil_saved] {
5343 verbose "check_effective_target_vect_call_ceil: using cached result" 2
5345 set et_vect_call_ceil_saved 0
5346 if { [istarget aarch64*-*-*] } {
5347 set et_vect_call_ceil_saved 1
5351 verbose "check_effective_target_vect_call_ceil: returning $et_vect_call_ceil_saved" 2
5352 return $et_vect_call_ceil_saved
5355 # Return 1 if the target supports vector ceilf calls.
5357 proc check_effective_target_vect_call_ceilf { } {
5358 global et_vect_call_ceilf_saved
5360 if [info exists et_vect_call_ceilf_saved] {
5361 verbose "check_effective_target_vect_call_ceilf: using cached result" 2
5363 set et_vect_call_ceilf_saved 0
5364 if { [istarget aarch64*-*-*] } {
5365 set et_vect_call_ceilf_saved 1
5369 verbose "check_effective_target_vect_call_ceilf: returning $et_vect_call_ceilf_saved" 2
5370 return $et_vect_call_ceilf_saved
5373 # Return 1 if the target supports vector floor calls.
5375 proc check_effective_target_vect_call_floor { } {
5376 global et_vect_call_floor_saved
5378 if [info exists et_vect_call_floor_saved] {
5379 verbose "check_effective_target_vect_call_floor: using cached result" 2
5381 set et_vect_call_floor_saved 0
5382 if { [istarget aarch64*-*-*] } {
5383 set et_vect_call_floor_saved 1
5387 verbose "check_effective_target_vect_call_floor: returning $et_vect_call_floor_saved" 2
5388 return $et_vect_call_floor_saved
5391 # Return 1 if the target supports vector floorf calls.
5393 proc check_effective_target_vect_call_floorf { } {
5394 global et_vect_call_floorf_saved
5396 if [info exists et_vect_call_floorf_saved] {
5397 verbose "check_effective_target_vect_call_floorf: using cached result" 2
5399 set et_vect_call_floorf_saved 0
5400 if { [istarget aarch64*-*-*] } {
5401 set et_vect_call_floorf_saved 1
5405 verbose "check_effective_target_vect_call_floorf: returning $et_vect_call_floorf_saved" 2
5406 return $et_vect_call_floorf_saved
5409 # Return 1 if the target supports vector lceil calls.
5411 proc check_effective_target_vect_call_lceil { } {
5412 global et_vect_call_lceil_saved
5414 if [info exists et_vect_call_lceil_saved] {
5415 verbose "check_effective_target_vect_call_lceil: using cached result" 2
5417 set et_vect_call_lceil_saved 0
5418 if { [istarget aarch64*-*-*] } {
5419 set et_vect_call_lceil_saved 1
5423 verbose "check_effective_target_vect_call_lceil: returning $et_vect_call_lceil_saved" 2
5424 return $et_vect_call_lceil_saved
5427 # Return 1 if the target supports vector lfloor calls.
5429 proc check_effective_target_vect_call_lfloor { } {
5430 global et_vect_call_lfloor_saved
5432 if [info exists et_vect_call_lfloor_saved] {
5433 verbose "check_effective_target_vect_call_lfloor: using cached result" 2
5435 set et_vect_call_lfloor_saved 0
5436 if { [istarget aarch64*-*-*] } {
5437 set et_vect_call_lfloor_saved 1
5441 verbose "check_effective_target_vect_call_lfloor: returning $et_vect_call_lfloor_saved" 2
5442 return $et_vect_call_lfloor_saved
5445 # Return 1 if the target supports vector nearbyint calls.
5447 proc check_effective_target_vect_call_nearbyint { } {
5448 global et_vect_call_nearbyint_saved
5450 if [info exists et_vect_call_nearbyint_saved] {
5451 verbose "check_effective_target_vect_call_nearbyint: using cached result" 2
5453 set et_vect_call_nearbyint_saved 0
5454 if { [istarget aarch64*-*-*] } {
5455 set et_vect_call_nearbyint_saved 1
5459 verbose "check_effective_target_vect_call_nearbyint: returning $et_vect_call_nearbyint_saved" 2
5460 return $et_vect_call_nearbyint_saved
5463 # Return 1 if the target supports vector nearbyintf calls.
5465 proc check_effective_target_vect_call_nearbyintf { } {
5466 global et_vect_call_nearbyintf_saved
5468 if [info exists et_vect_call_nearbyintf_saved] {
5469 verbose "check_effective_target_vect_call_nearbyintf: using cached result" 2
5471 set et_vect_call_nearbyintf_saved 0
5472 if { [istarget aarch64*-*-*] } {
5473 set et_vect_call_nearbyintf_saved 1
5477 verbose "check_effective_target_vect_call_nearbyintf: returning $et_vect_call_nearbyintf_saved" 2
5478 return $et_vect_call_nearbyintf_saved
5481 # Return 1 if the target supports vector round calls.
5483 proc check_effective_target_vect_call_round { } {
5484 global et_vect_call_round_saved
5486 if [info exists et_vect_call_round_saved] {
5487 verbose "check_effective_target_vect_call_round: using cached result" 2
5489 set et_vect_call_round_saved 0
5490 if { [istarget aarch64*-*-*] } {
5491 set et_vect_call_round_saved 1
5495 verbose "check_effective_target_vect_call_round: returning $et_vect_call_round_saved" 2
5496 return $et_vect_call_round_saved
5499 # Return 1 if the target supports vector roundf calls.
5501 proc check_effective_target_vect_call_roundf { } {
5502 global et_vect_call_roundf_saved
5504 if [info exists et_vect_call_roundf_saved] {
5505 verbose "check_effective_target_vect_call_roundf: using cached result" 2
5507 set et_vect_call_roundf_saved 0
5508 if { [istarget aarch64*-*-*] } {
5509 set et_vect_call_roundf_saved 1
5513 verbose "check_effective_target_vect_call_roundf: returning $et_vect_call_roundf_saved" 2
5514 return $et_vect_call_roundf_saved
5517 # Return 1 if the target supports section-anchors
5519 proc check_effective_target_section_anchors { } {
5520 global et_section_anchors_saved
5522 if [info exists et_section_anchors_saved] {
5523 verbose "check_effective_target_section_anchors: using cached result" 2
5525 set et_section_anchors_saved 0
5526 if { [istarget powerpc*-*-*]
5527 || [istarget arm*-*-*]
5528 || [istarget aarch64*-*-*] } {
5529 set et_section_anchors_saved 1
5533 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
5534 return $et_section_anchors_saved
5537 # Return 1 if the target supports atomic operations on "int_128" values.
5539 proc check_effective_target_sync_int_128 { } {
5540 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
5541 && ![is-effective-target ia32] } {
5543 } elseif { [istarget spu-*-*] } {
5550 # Return 1 if the target supports atomic operations on "int_128" values
5551 # and can execute them.
5553 proc check_effective_target_sync_int_128_runtime { } {
5554 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
5555 && ![is-effective-target ia32] } {
5556 return [check_cached_effective_target sync_int_128_available {
5557 check_runtime_nocache sync_int_128_available {
5561 unsigned int eax, ebx, ecx, edx;
5562 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
5563 return !(ecx & bit_CMPXCHG16B);
5568 } elseif { [istarget spu-*-*] } {
5575 # Return 1 if the target supports atomic operations on "long long".
5577 # Note: 32bit x86 targets require -march=pentium in dg-options.
5578 # Note: 32bit s390 targets require -mzarch in dg-options.
5580 proc check_effective_target_sync_long_long { } {
5581 if { [istarget x86_64-*-*] || [istarget i?86-*-*])
5582 || [istarget aarch64*-*-*]
5583 || [istarget arm*-*-*]
5584 || [istarget alpha*-*-*]
5585 || ([istarget sparc*-*-*] && [check_effective_target_lp64])
5586 || [istarget s390*-*-*]
5587 || [istarget spu-*-*] } {
5594 # Return 1 if the target supports atomic operations on "long long"
5595 # and can execute them.
5597 # Note: 32bit x86 targets require -march=pentium in dg-options.
5599 proc check_effective_target_sync_long_long_runtime { } {
5600 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
5601 return [check_cached_effective_target sync_long_long_available {
5602 check_runtime_nocache sync_long_long_available {
5606 unsigned int eax, ebx, ecx, edx;
5607 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
5608 return !(edx & bit_CMPXCHG8B);
5613 } elseif { [istarget aarch64*-*-*] } {
5615 } elseif { [istarget arm*-*-linux-*] } {
5616 return [check_runtime sync_longlong_runtime {
5622 if (sizeof (long long) != 8)
5625 /* Just check for native; checking for kernel fallback is tricky. */
5626 asm volatile ("ldrexd r0,r1, [%0]" : : "r" (&l1) : "r0", "r1");
5631 } elseif { [istarget alpha*-*-*] } {
5633 } elseif { ([istarget sparc*-*-*]
5634 && [check_effective_target_lp64]
5635 && [check_effective_target_ultrasparc_hw]) } {
5637 } elseif { [istarget spu-*-*] } {
5639 } elseif { [istarget powerpc*-*-*] && [check_effective_target_lp64] } {
5646 # Return 1 if the target supports byte swap instructions.
5648 proc check_effective_target_bswap { } {
5649 global et_bswap_saved
5651 if [info exists et_bswap_saved] {
5652 verbose "check_effective_target_bswap: using cached result" 2
5654 set et_bswap_saved 0
5655 if { [istarget aarch64*-*-*]
5656 || [istarget alpha*-*-*]
5657 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5658 || [istarget m68k-*-*]
5659 || [istarget powerpc*-*-*]
5660 || [istarget rs6000-*-*]
5661 || [istarget s390*-*-*] } {
5662 set et_bswap_saved 1
5664 if { [istarget arm*-*-*]
5665 && [check_no_compiler_messages_nocache arm_v6_or_later object {
5667 #error not armv6 or later
5671 set et_bswap_saved 1
5676 verbose "check_effective_target_bswap: returning $et_bswap_saved" 2
5677 return $et_bswap_saved
5680 # Return 1 if the target supports 16-bit byte swap instructions.
5682 proc check_effective_target_bswap16 { } {
5683 global et_bswap16_saved
5685 if [info exists et_bswap16_saved] {
5686 verbose "check_effective_target_bswap16: using cached result" 2
5688 set et_bswap16_saved 0
5689 if { [is-effective-target bswap]
5690 && ![istarget alpha*-*-*]
5691 && !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
5692 set et_bswap16_saved 1
5696 verbose "check_effective_target_bswap16: returning $et_bswap16_saved" 2
5697 return $et_bswap16_saved
5700 # Return 1 if the target supports 32-bit byte swap instructions.
5702 proc check_effective_target_bswap32 { } {
5703 global et_bswap32_saved
5705 if [info exists et_bswap32_saved] {
5706 verbose "check_effective_target_bswap32: using cached result" 2
5708 set et_bswap32_saved 0
5709 if { [is-effective-target bswap] } {
5710 set et_bswap32_saved 1
5714 verbose "check_effective_target_bswap32: returning $et_bswap32_saved" 2
5715 return $et_bswap32_saved
5718 # Return 1 if the target supports 64-bit byte swap instructions.
5720 # Note: 32bit s390 targets require -mzarch in dg-options.
5722 proc check_effective_target_bswap64 { } {
5723 global et_bswap64_saved
5725 # expand_unop can expand 64-bit byte swap on 32-bit targets
5726 if { [is-effective-target bswap] && [is-effective-target int32plus] } {
5732 # Return 1 if the target supports atomic operations on "int" and "long".
5734 proc check_effective_target_sync_int_long { } {
5735 global et_sync_int_long_saved
5737 if [info exists et_sync_int_long_saved] {
5738 verbose "check_effective_target_sync_int_long: using cached result" 2
5740 set et_sync_int_long_saved 0
5741 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
5742 # load-reserved/store-conditional instructions.
5743 if { [istarget ia64-*-*]
5744 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5745 || [istarget aarch64*-*-*]
5746 || [istarget alpha*-*-*]
5747 || [istarget arm*-*-linux-*]
5748 || ([istarget arm*-*-*]
5749 && [check_effective_target_arm_acq_rel])
5750 || [istarget bfin*-*linux*]
5751 || [istarget hppa*-*linux*]
5752 || [istarget s390*-*-*]
5753 || [istarget powerpc*-*-*]
5754 || [istarget crisv32-*-*] || [istarget cris-*-*]
5755 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
5756 || [istarget spu-*-*]
5757 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
5758 || [check_effective_target_mips_llsc] } {
5759 set et_sync_int_long_saved 1
5763 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
5764 return $et_sync_int_long_saved
5767 # Return 1 if the target supports atomic operations on "char" and "short".
5769 proc check_effective_target_sync_char_short { } {
5770 global et_sync_char_short_saved
5772 if [info exists et_sync_char_short_saved] {
5773 verbose "check_effective_target_sync_char_short: using cached result" 2
5775 set et_sync_char_short_saved 0
5776 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
5777 # load-reserved/store-conditional instructions.
5778 if { [istarget aarch64*-*-*]
5779 || [istarget ia64-*-*]
5780 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5781 || [istarget alpha*-*-*]
5782 || [istarget arm*-*-linux-*]
5783 || ([istarget arm*-*-*]
5784 && [check_effective_target_arm_acq_rel])
5785 || [istarget hppa*-*linux*]
5786 || [istarget s390*-*-*]
5787 || [istarget powerpc*-*-*]
5788 || [istarget crisv32-*-*] || [istarget cris-*-*]
5789 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
5790 || [istarget spu-*-*]
5791 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
5792 || [check_effective_target_mips_llsc] } {
5793 set et_sync_char_short_saved 1
5797 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
5798 return $et_sync_char_short_saved
5801 # Return 1 if the target uses a ColdFire FPU.
5803 proc check_effective_target_coldfire_fpu { } {
5804 return [check_no_compiler_messages coldfire_fpu assembly {
5811 # Return true if this is a uClibc target.
5813 proc check_effective_target_uclibc {} {
5814 return [check_no_compiler_messages uclibc object {
5815 #include <features.h>
5816 #if !defined (__UCLIBC__)
5822 # Return true if this is a uclibc target and if the uclibc feature
5823 # described by __$feature__ is not present.
5825 proc check_missing_uclibc_feature {feature} {
5826 return [check_no_compiler_messages $feature object "
5827 #include <features.h>
5828 #if !defined (__UCLIBC) || defined (__${feature}__)
5834 # Return true if this is a Newlib target.
5836 proc check_effective_target_newlib {} {
5837 return [check_no_compiler_messages newlib object {
5842 # Return true if this is NOT a Bionic target.
5844 proc check_effective_target_non_bionic {} {
5845 return [check_no_compiler_messages non_bionic object {
5847 #if defined (__BIONIC__)
5853 # Return true if this target has error.h header.
5855 proc check_effective_target_error_h {} {
5856 return [check_no_compiler_messages error_h object {
5861 # Return true if this target has tgmath.h header.
5863 proc check_effective_target_tgmath_h {} {
5864 return [check_no_compiler_messages tgmath_h object {
5869 # Return true if target's libc supports complex functions.
5871 proc check_effective_target_libc_has_complex_functions {} {
5872 return [check_no_compiler_messages libc_has_complex_functions object {
5873 #include <complex.h>
5878 # (a) an error of a few ULP is expected in string to floating-point
5879 # conversion functions; and
5880 # (b) overflow is not always detected correctly by those functions.
5882 proc check_effective_target_lax_strtofp {} {
5883 # By default, assume that all uClibc targets suffer from this.
5884 return [check_effective_target_uclibc]
5887 # Return 1 if this is a target for which wcsftime is a dummy
5888 # function that always returns 0.
5890 proc check_effective_target_dummy_wcsftime {} {
5891 # By default, assume that all uClibc targets suffer from this.
5892 return [check_effective_target_uclibc]
5895 # Return 1 if constructors with initialization priority arguments are
5896 # supposed on this target.
5898 proc check_effective_target_init_priority {} {
5899 return [check_no_compiler_messages init_priority assembly "
5900 void f() __attribute__((constructor (1000)));
5905 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
5906 # This can be used with any check_* proc that takes no argument and
5907 # returns only 1 or 0. It could be used with check_* procs that take
5908 # arguments with keywords that pass particular arguments.
5910 proc is-effective-target { arg } {
5912 if { [info procs check_effective_target_${arg}] != [list] } {
5913 set selected [check_effective_target_${arg}]
5916 "vmx_hw" { set selected [check_vmx_hw_available] }
5917 "vsx_hw" { set selected [check_vsx_hw_available] }
5918 "p8vector_hw" { set selected [check_p8vector_hw_available] }
5919 "p9vector_hw" { set selected [check_p9vector_hw_available] }
5920 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
5921 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
5922 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
5923 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
5924 "dfp_hw" { set selected [check_dfp_hw_available] }
5925 "htm_hw" { set selected [check_htm_hw_available] }
5926 "named_sections" { set selected [check_named_sections_available] }
5927 "gc_sections" { set selected [check_gc_sections_available] }
5928 "cxa_atexit" { set selected [check_cxa_atexit_available] }
5929 default { error "unknown effective target keyword `$arg'" }
5932 verbose "is-effective-target: $arg $selected" 2
5936 # Return 1 if the argument is an effective-target keyword, 0 otherwise.
5938 proc is-effective-target-keyword { arg } {
5939 if { [info procs check_effective_target_${arg}] != [list] } {
5942 # These have different names for their check_* procs.
5944 "vmx_hw" { return 1 }
5945 "vsx_hw" { return 1 }
5946 "p8vector_hw" { return 1 }
5947 "p9vector_hw" { return 1 }
5948 "p9modulo_hw" { return 1 }
5949 "ppc_float128_sw" { return 1 }
5950 "ppc_float128_hw" { return 1 }
5951 "ppc_recip_hw" { return 1 }
5952 "dfp_hw" { return 1 }
5953 "htm_hw" { return 1 }
5954 "named_sections" { return 1 }
5955 "gc_sections" { return 1 }
5956 "cxa_atexit" { return 1 }
5957 default { return 0 }
5962 # Return 1 if target default to short enums
5964 proc check_effective_target_short_enums { } {
5965 return [check_no_compiler_messages short_enums assembly {
5967 int s[sizeof (enum foo) == 1 ? 1 : -1];
5971 # Return 1 if target supports merging string constants at link time.
5973 proc check_effective_target_string_merging { } {
5974 return [check_no_messages_and_pattern string_merging \
5975 "rodata\\.str" assembly {
5976 const char *var = "String";
5980 # Return 1 if target has the basic signed and unsigned types in
5981 # <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
5982 # working <stdint.h> for all targets.
5984 proc check_effective_target_stdint_types { } {
5985 return [check_no_compiler_messages stdint_types assembly {
5987 int8_t a; int16_t b; int32_t c; int64_t d;
5988 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
5992 # Return 1 if target has the basic signed and unsigned types in
5993 # <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
5994 # these types agree with those in the header, as some systems have
5995 # only <inttypes.h>.
5997 proc check_effective_target_inttypes_types { } {
5998 return [check_no_compiler_messages inttypes_types assembly {
5999 #include <inttypes.h>
6000 int8_t a; int16_t b; int32_t c; int64_t d;
6001 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
6005 # Return 1 if programs are intended to be run on a simulator
6006 # (i.e. slowly) rather than hardware (i.e. fast).
6008 proc check_effective_target_simulator { } {
6010 # All "src/sim" simulators set this one.
6011 if [board_info target exists is_simulator] {
6012 return [board_info target is_simulator]
6015 # The "sid" simulators don't set that one, but at least they set
6017 if [board_info target exists slow_simulator] {
6018 return [board_info target slow_simulator]
6024 # Return 1 if programs are intended to be run on hardware rather than
6027 proc check_effective_target_hw { } {
6029 # All "src/sim" simulators set this one.
6030 if [board_info target exists is_simulator] {
6031 if [board_info target is_simulator] {
6038 # The "sid" simulators don't set that one, but at least they set
6040 if [board_info target exists slow_simulator] {
6041 if [board_info target slow_simulator] {
6051 # Return 1 if the target is a VxWorks kernel.
6053 proc check_effective_target_vxworks_kernel { } {
6054 return [check_no_compiler_messages vxworks_kernel assembly {
6055 #if !defined __vxworks || defined __RTP__
6061 # Return 1 if the target is a VxWorks RTP.
6063 proc check_effective_target_vxworks_rtp { } {
6064 return [check_no_compiler_messages vxworks_rtp assembly {
6065 #if !defined __vxworks || !defined __RTP__
6071 # Return 1 if the target is expected to provide wide character support.
6073 proc check_effective_target_wchar { } {
6074 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
6077 return [check_no_compiler_messages wchar assembly {
6082 # Return 1 if the target has <pthread.h>.
6084 proc check_effective_target_pthread_h { } {
6085 return [check_no_compiler_messages pthread_h assembly {
6086 #include <pthread.h>
6090 # Return 1 if the target can truncate a file from a file-descriptor,
6091 # as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
6092 # chsize. We test for a trivially functional truncation; no stubs.
6093 # As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
6094 # different function to be used.
6096 proc check_effective_target_fd_truncate { } {
6098 #define _FILE_OFFSET_BITS 64
6105 FILE *f = fopen ("tst.tmp", "wb");
6107 const char t[] = "test writing more than ten characters";
6111 write (fd, t, sizeof (t) - 1);
6113 if (ftruncate (fd, 10) != 0)
6122 f = fopen ("tst.tmp", "rb");
6123 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
6131 if { [check_runtime ftruncate $prog] } {
6135 regsub "ftruncate" $prog "chsize" prog
6136 return [check_runtime chsize $prog]
6139 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
6141 proc add_options_for_c99_runtime { flags } {
6142 if { [istarget *-*-solaris2*] } {
6143 return "$flags -std=c99"
6145 if { [istarget powerpc-*-darwin*] } {
6146 return "$flags -mmacosx-version-min=10.3"
6151 # Add to FLAGS all the target-specific flags needed to enable
6152 # full IEEE compliance mode.
6154 proc add_options_for_ieee { flags } {
6155 if { [istarget alpha*-*-*]
6156 || [istarget sh*-*-*] } {
6157 return "$flags -mieee"
6159 if { [istarget rx-*-*] } {
6160 return "$flags -mnofpu"
6165 if {![info exists flags_to_postpone]} {
6166 set flags_to_postpone ""
6169 # Add to FLAGS the flags needed to enable functions to bind locally
6170 # when using pic/PIC passes in the testsuite.
6171 proc add_options_for_bind_pic_locally { flags } {
6172 global flags_to_postpone
6174 # Instead of returning 'flags' with the -fPIE or -fpie appended, we save it
6175 # in 'flags_to_postpone' and append it later in gcc_target_compile procedure in
6176 # order to make sure that the multilib_flags doesn't override this.
6178 if {[check_no_compiler_messages using_pic2 assembly {
6183 set flags_to_postpone "-fPIE"
6186 if {[check_no_compiler_messages using_pic1 assembly {
6191 set flags_to_postpone "-fpie"
6197 # Add to FLAGS the flags needed to enable 64-bit vectors.
6199 proc add_options_for_double_vectors { flags } {
6200 if [is-effective-target arm_neon_ok] {
6201 return "$flags -mvectorize-with-neon-double"
6207 # Return 1 if the target provides a full C99 runtime.
6209 proc check_effective_target_c99_runtime { } {
6210 return [check_cached_effective_target c99_runtime {
6213 set file [open "$srcdir/gcc.dg/builtins-config.h"]
6214 set contents [read $file]
6217 #ifndef HAVE_C99_RUNTIME
6218 #error !HAVE_C99_RUNTIME
6221 check_no_compiler_messages_nocache c99_runtime assembly \
6222 $contents [add_options_for_c99_runtime ""]
6226 # Return 1 if target wchar_t is at least 4 bytes.
6228 proc check_effective_target_4byte_wchar_t { } {
6229 return [check_no_compiler_messages 4byte_wchar_t object {
6230 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
6234 # Return 1 if the target supports automatic stack alignment.
6236 proc check_effective_target_automatic_stack_alignment { } {
6237 # Ordinarily x86 supports automatic stack alignment ...
6238 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
6239 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
6240 # ... except Win64 SEH doesn't. Succeed for Win32 though.
6241 return [check_effective_target_ilp32];
6248 # Return true if we are compiling for AVX target.
6250 proc check_avx_available { } {
6251 if { [check_no_compiler_messages avx_available assembly {
6261 # Return true if 32- and 16-bytes vectors are available.
6263 proc check_effective_target_vect_sizes_32B_16B { } {
6264 if { [check_avx_available] && ![check_prefer_avx128] } {
6271 # Return true if 128-bits vectors are preferred even if 256-bits vectors
6274 proc check_prefer_avx128 { } {
6275 if ![check_avx_available] {
6278 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
6279 float a[1024],b[1024],c[1024];
6280 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
6281 } "-O2 -ftree-vectorize"]
6285 # Return 1 if avx512f instructions can be compiled.
6287 proc check_effective_target_avx512f { } {
6288 return [check_no_compiler_messages avx512f object {
6289 typedef double __m512d __attribute__ ((__vector_size__ (64)));
6291 __m512d _mm512_add (__m512d a)
6293 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
6298 # Return 1 if avx instructions can be compiled.
6300 proc check_effective_target_avx { } {
6301 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
6304 return [check_no_compiler_messages avx object {
6305 void _mm256_zeroall (void)
6307 __builtin_ia32_vzeroall ();
6312 # Return 1 if avx2 instructions can be compiled.
6313 proc check_effective_target_avx2 { } {
6314 return [check_no_compiler_messages avx2 object {
6315 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
6317 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
6319 return __builtin_ia32_andnotsi256 (__X, __Y);
6324 # Return 1 if sse instructions can be compiled.
6325 proc check_effective_target_sse { } {
6326 return [check_no_compiler_messages sse object {
6329 __builtin_ia32_stmxcsr ();
6335 # Return 1 if sse2 instructions can be compiled.
6336 proc check_effective_target_sse2 { } {
6337 return [check_no_compiler_messages sse2 object {
6338 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
6340 __m128i _mm_srli_si128 (__m128i __A, int __N)
6342 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
6347 # Return 1 if F16C instructions can be compiled.
6349 proc check_effective_target_f16c { } {
6350 return [check_no_compiler_messages f16c object {
6351 #include "immintrin.h"
6353 foo (unsigned short val)
6355 return _cvtsh_ss (val);
6360 # Return 1 if C wchar_t type is compatible with char16_t.
6362 proc check_effective_target_wchar_t_char16_t_compatible { } {
6363 return [check_no_compiler_messages wchar_t_char16_t object {
6365 __CHAR16_TYPE__ *p16 = &wc;
6366 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
6370 # Return 1 if C wchar_t type is compatible with char32_t.
6372 proc check_effective_target_wchar_t_char32_t_compatible { } {
6373 return [check_no_compiler_messages wchar_t_char32_t object {
6375 __CHAR32_TYPE__ *p32 = &wc;
6376 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
6380 # Return 1 if pow10 function exists.
6382 proc check_effective_target_pow10 { } {
6383 return [check_runtime pow10 {
6393 # Return 1 if issignaling function exists.
6394 proc check_effective_target_issignaling {} {
6395 return [check_runtime issignaling {
6400 return issignaling (0.0);
6405 # Return 1 if current options generate DFP instructions, 0 otherwise.
6406 proc check_effective_target_hard_dfp {} {
6407 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
6408 typedef float d64 __attribute__((mode(DD)));
6410 void foo (void) { z = x + y; }
6414 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
6415 # for strchr etc. functions.
6417 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
6418 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
6421 #if !defined(__cplusplus) \
6422 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
6423 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
6424 ISO C++ correct string.h and wchar.h protos not supported.
6431 # Return 1 if GNU as is used.
6433 proc check_effective_target_gas { } {
6434 global use_gas_saved
6437 if {![info exists use_gas_saved]} {
6438 # Check if the as used by gcc is GNU as.
6439 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
6440 # Provide /dev/null as input, otherwise gas times out reading from
6442 set status [remote_exec host "$gcc_as" "-v /dev/null"]
6443 set as_output [lindex $status 1]
6444 if { [ string first "GNU" $as_output ] >= 0 } {
6450 return $use_gas_saved
6453 # Return 1 if GNU ld is used.
6455 proc check_effective_target_gld { } {
6456 global use_gld_saved
6459 if {![info exists use_gld_saved]} {
6460 # Check if the ld used by gcc is GNU ld.
6461 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
6462 set status [remote_exec host "$gcc_ld" "--version"]
6463 set ld_output [lindex $status 1]
6464 if { [ string first "GNU" $ld_output ] >= 0 } {
6470 return $use_gld_saved
6473 # Return 1 if the compiler has been configure with link-time optimization
6476 proc check_effective_target_lto { } {
6477 if { [istarget nvptx-*-*] } {
6480 return [check_no_compiler_messages lto object {
6485 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
6487 proc check_effective_target_maybe_x32 { } {
6488 return [check_no_compiler_messages maybe_x32 object {
6490 } "-mx32 -maddress-mode=short"]
6493 # Return 1 if this target supports the -fsplit-stack option, 0
6496 proc check_effective_target_split_stack {} {
6497 return [check_no_compiler_messages split_stack object {
6502 # Return 1 if this target supports the -masm=intel option, 0
6505 proc check_effective_target_masm_intel {} {
6506 return [check_no_compiler_messages masm_intel object {
6507 extern void abort (void);
6511 # Return 1 if the language for the compiler under test is C.
6513 proc check_effective_target_c { } {
6515 if [string match $tool "gcc"] {
6521 # Return 1 if the language for the compiler under test is C++.
6523 proc check_effective_target_c++ { } {
6525 if [string match $tool "g++"] {
6531 set cxx_default "c++14"
6532 # Check whether the current active language standard supports the features
6533 # of C++11/C++14 by checking for the presence of one of the -std flags.
6534 # This assumes that the default for the compiler is $cxx_default, and that
6535 # there will never be multiple -std= arguments on the command line.
6536 proc check_effective_target_c++11_only { } {
6538 if ![check_effective_target_c++] {
6541 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
6544 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
6549 proc check_effective_target_c++11 { } {
6550 if [check_effective_target_c++11_only] {
6553 return [check_effective_target_c++14]
6555 proc check_effective_target_c++11_down { } {
6556 if ![check_effective_target_c++] {
6559 return [expr ![check_effective_target_c++14] ]
6562 proc check_effective_target_c++14_only { } {
6564 if ![check_effective_target_c++] {
6567 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
6570 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
6576 proc check_effective_target_c++14 { } {
6577 if [check_effective_target_c++14_only] {
6580 return [check_effective_target_c++1z]
6582 proc check_effective_target_c++14_down { } {
6583 if ![check_effective_target_c++] {
6586 return [expr ![check_effective_target_c++1z] ]
6589 proc check_effective_target_c++98_only { } {
6591 if ![check_effective_target_c++] {
6594 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
6597 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
6603 proc check_effective_target_c++1z_only { } {
6605 if ![check_effective_target_c++] {
6608 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
6611 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
6616 proc check_effective_target_c++1z { } {
6617 return [check_effective_target_c++1z_only]
6620 # Check for C++ Concepts TS support, i.e. -fconcepts flag.
6621 proc check_effective_target_concepts { } {
6622 return [check-flags { "" { } { -fconcepts } }]
6625 # Return 1 if expensive testcases should be run.
6627 proc check_effective_target_run_expensive_tests { } {
6628 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
6634 # Returns 1 if "mempcpy" is available on the target system.
6636 proc check_effective_target_mempcpy {} {
6637 return [check_function_available "mempcpy"]
6640 # Returns 1 if "stpcpy" is available on the target system.
6642 proc check_effective_target_stpcpy {} {
6643 return [check_function_available "stpcpy"]
6646 # Check whether the vectorizer tests are supported by the target and
6647 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
6648 # Set dg-do-what-default to either compile or run, depending on target
6649 # capabilities. Return 1 if vectorizer tests are supported by
6650 # target, 0 otherwise.
6652 proc check_vect_support_and_set_flags { } {
6653 global DEFAULT_VECTCFLAGS
6654 global dg-do-what-default
6656 if [istarget powerpc-*paired*] {
6657 lappend DEFAULT_VECTCFLAGS "-mpaired"
6658 if [check_750cl_hw_available] {
6659 set dg-do-what-default run
6661 set dg-do-what-default compile
6663 } elseif [istarget powerpc*-*-*] {
6664 # Skip targets not supporting -maltivec.
6665 if ![is-effective-target powerpc_altivec_ok] {
6669 lappend DEFAULT_VECTCFLAGS "-maltivec"
6670 if [check_p9vector_hw_available] {
6671 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
6672 } elseif [check_p8vector_hw_available] {
6673 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
6674 } elseif [check_vsx_hw_available] {
6675 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
6678 if [check_vmx_hw_available] {
6679 set dg-do-what-default run
6681 if [is-effective-target ilp32] {
6682 # Specify a cpu that supports VMX for compile-only tests.
6683 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
6685 set dg-do-what-default compile
6687 } elseif { [istarget spu-*-*] } {
6688 set dg-do-what-default run
6689 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
6690 lappend DEFAULT_VECTCFLAGS "-msse2"
6691 if { [check_effective_target_sse2_runtime] } {
6692 set dg-do-what-default run
6694 set dg-do-what-default compile
6696 } elseif { [istarget mips*-*-*]
6697 && ([check_effective_target_mpaired_single]
6698 || [check_effective_target_mips_loongson])
6699 && [check_effective_target_nomips16] } {
6700 if { [check_effective_target_mpaired_single] } {
6701 lappend DEFAULT_VECTCFLAGS "-mpaired-single"
6703 set dg-do-what-default run
6704 } elseif [istarget sparc*-*-*] {
6705 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
6706 if [check_effective_target_ultrasparc_hw] {
6707 set dg-do-what-default run
6709 set dg-do-what-default compile
6711 } elseif [istarget alpha*-*-*] {
6712 # Alpha's vectorization capabilities are extremely limited.
6713 # It's more effort than its worth disabling all of the tests
6714 # that it cannot pass. But if you actually want to see what
6715 # does work, command out the return.
6718 lappend DEFAULT_VECTCFLAGS "-mmax"
6719 if [check_alpha_max_hw_available] {
6720 set dg-do-what-default run
6722 set dg-do-what-default compile
6724 } elseif [istarget ia64-*-*] {
6725 set dg-do-what-default run
6726 } elseif [is-effective-target arm_neon_ok] {
6727 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
6728 # NEON does not support denormals, so is not used for vectorization by
6729 # default to avoid loss of precision. We must pass -ffast-math to test
6730 # vectorization of float operations.
6731 lappend DEFAULT_VECTCFLAGS "-ffast-math"
6732 if [is-effective-target arm_neon_hw] {
6733 set dg-do-what-default run
6735 set dg-do-what-default compile
6737 } elseif [istarget "aarch64*-*-*"] {
6738 set dg-do-what-default run
6746 # Return 1 if the target does *not* require strict alignment.
6748 proc check_effective_target_non_strict_align {} {
6750 # On ARM, the default is to use STRICT_ALIGNMENT, but there
6751 # are interfaces defined for misaligned access and thus
6752 # depending on the architecture levels unaligned access is
6754 if [istarget "arm*-*-*"] {
6755 return [check_effective_target_arm_unaligned]
6758 return [check_no_compiler_messages non_strict_align assembly {
6760 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
6762 void foo(void) { z = (c *) y; }
6766 # Return 1 if the target has <ucontext.h>.
6768 proc check_effective_target_ucontext_h { } {
6769 return [check_no_compiler_messages ucontext_h assembly {
6770 #include <ucontext.h>
6774 proc check_effective_target_aarch64_tiny { } {
6775 if { [istarget aarch64*-*-*] } {
6776 return [check_no_compiler_messages aarch64_tiny object {
6777 #ifdef __AARCH64_CMODEL_TINY__
6780 #error target not AArch64 tiny code model
6788 # Create functions to check that the AArch64 assembler supports the
6789 # various architecture extensions via the .arch_extension pseudo-op.
6791 foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse"} {
6792 eval [string map [list FUNC $aarch64_ext] {
6793 proc check_effective_target_aarch64_asm_FUNC_ok { } {
6794 if { [istarget aarch64*-*-*] } {
6795 return [check_no_compiler_messages aarch64_FUNC_assembler object {
6796 __asm__ (".arch_extension FUNC");
6797 } "-march=armv8-a+FUNC"]
6805 proc check_effective_target_aarch64_small { } {
6806 if { [istarget aarch64*-*-*] } {
6807 return [check_no_compiler_messages aarch64_small object {
6808 #ifdef __AARCH64_CMODEL_SMALL__
6811 #error target not AArch64 small code model
6819 proc check_effective_target_aarch64_large { } {
6820 if { [istarget aarch64*-*-*] } {
6821 return [check_no_compiler_messages aarch64_large object {
6822 #ifdef __AARCH64_CMODEL_LARGE__
6825 #error target not AArch64 large code model
6833 # Return 1 if <fenv.h> is available with all the standard IEEE
6834 # exceptions and floating-point exceptions are raised by arithmetic
6835 # operations. (If the target requires special options for "inexact"
6836 # exceptions, those need to be specified in the testcases.)
6838 proc check_effective_target_fenv_exceptions {} {
6839 return [check_runtime fenv_exceptions {
6842 #ifndef FE_DIVBYZERO
6843 # error Missing FE_DIVBYZERO
6846 # error Missing FE_INEXACT
6849 # error Missing FE_INVALID
6852 # error Missing FE_OVERFLOW
6854 #ifndef FE_UNDERFLOW
6855 # error Missing FE_UNDERFLOW
6857 volatile float a = 0.0f, r;
6862 if (fetestexcept (FE_INVALID))
6867 } [add_options_for_ieee "-std=gnu99"]]
6870 proc check_effective_target_tiny {} {
6871 global et_target_tiny_saved
6873 if [info exists et_target_tine_saved] {
6874 verbose "check_effective_target_tiny: using cached result" 2
6876 set et_target_tiny_saved 0
6877 if { [istarget aarch64*-*-*]
6878 && [check_effective_target_aarch64_tiny] } {
6879 set et_target_tiny_saved 1
6883 return $et_target_tiny_saved
6886 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
6888 proc check_effective_target_logical_op_short_circuit {} {
6889 if { [istarget mips*-*-*]
6890 || [istarget arc*-*-*]
6891 || [istarget avr*-*-*]
6892 || [istarget crisv32-*-*] || [istarget cris-*-*]
6893 || [istarget mmix-*-*]
6894 || [istarget s390*-*-*]
6895 || [istarget powerpc*-*-*]
6896 || [istarget nios2*-*-*]
6897 || [istarget visium-*-*]
6898 || [check_effective_target_arm_cortex_m] } {
6904 # Record that dg-final test TEST requires convential compilation.
6906 proc force_conventional_output_for { test } {
6907 if { [info proc $test] == "" } {
6908 perror "$test does not exist"
6911 proc ${test}_required_options {} {
6912 global gcc_force_conventional_output
6913 return $gcc_force_conventional_output
6917 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
6918 # otherwise. Cache the result.
6920 proc check_effective_target_pie_copyreloc { } {
6921 global pie_copyreloc_available_saved
6923 global GCC_UNDER_TEST
6925 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
6929 # Need auto-host.h to check linker support.
6930 if { ![file exists ../../auto-host.h ] } {
6934 if [info exists pie_copyreloc_available_saved] {
6935 verbose "check_effective_target_pie_copyreloc returning saved $pie_copyreloc_available_saved" 2
6937 # Set up and compile to see if linker supports PIE with copy
6938 # reloc. Include the current process ID in the file names to
6939 # prevent conflicts with invocations for multiple testsuites.
6944 set f [open $src "w"]
6945 puts $f "#include \"../../auto-host.h\""
6946 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
6947 puts $f "# error Linker does not support PIE with copy reloc."
6951 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
6952 set lines [${tool}_target_compile $src $obj object ""]
6957 if [string match "" $lines] then {
6958 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
6959 set pie_copyreloc_available_saved 1
6961 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
6962 set pie_copyreloc_available_saved 0
6966 return $pie_copyreloc_available_saved
6969 # Return 1 if the target uses comdat groups.
6971 proc check_effective_target_comdat_group {} {
6972 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat" assembly {
6974 inline int foo () { return 1; }
6979 # Return 1 if target supports __builtin_eh_return
6980 proc check_effective_target_builtin_eh_return { } {
6981 return [check_no_compiler_messages builtin_eh_return object {
6982 void test (long l, void *p)
6984 __builtin_eh_return (l, p);
6989 # Return 1 if the target supports max reduction for vectors.
6991 proc check_effective_target_vect_max_reduc { } {
6992 if { [istarget aarch64*-*-*] || [istarget arm*-*-*] } {
6998 # Return 1 if there is an nvptx offload compiler.
7000 proc check_effective_target_offload_nvptx { } {
7001 return [check_no_compiler_messages offload_nvptx object {
7002 int main () {return 0;}
7003 } "-foffload=nvptx-none" ]
7006 # Return 1 if the compiler has been configured with hsa offloading.
7008 proc check_effective_target_offload_hsa { } {
7009 return [check_no_compiler_messages offload_hsa assembly {
7010 int main () {return 0;}