1 # Copyright (C) 1999-2015 Free Software Foundation, Inc.
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC; see the file COPYING3. If not see
15 # <http://www.gnu.org/licenses/>.
17 # Please email any bugs, comments, and/or additions to this file to:
18 # gcc-patches@gcc.gnu.org
20 # This file defines procs for determining features supported by the target.
22 # Try to compile the code given by CONTENTS into an output file of
23 # type TYPE, where TYPE is as for target_compile. Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the name of the output file.
27 # BASENAME is a prefix to use for source and output files.
28 # If ARGS is not empty, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise, code should contain:
34 # "! Fortran" for Fortran code,
36 # "// ObjC++" for ObjC++
38 # If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
39 # allow for ObjC/ObjC++ specific flags.
40 proc check_compile {basename type contents args} {
42 verbose "check_compile tool: $tool for $basename"
44 # Save additional_sources to avoid compiling testsuite's sources
45 # against check_compile's source.
46 global additional_sources
47 if [info exists additional_sources] {
48 set tmp_additional_sources "$additional_sources"
49 set additional_sources ""
52 if { [llength $args] > 0 } {
53 set options [list "additional_flags=[lindex $args 0]"]
57 switch -glob -- $contents {
58 "*! Fortran*" { set src ${basename}[pid].f90 }
59 "*// C++*" { set src ${basename}[pid].cc }
60 "*// ObjC++*" { set src ${basename}[pid].mm }
61 "*/* ObjC*" { set src ${basename}[pid].m }
62 "*// Go*" { set src ${basename}[pid].go }
65 "objc" { set src ${basename}[pid].m }
66 "obj-c++" { set src ${basename}[pid].mm }
67 default { set src ${basename}[pid].c }
72 set compile_type $type
74 assembly { set output ${basename}[pid].s }
75 object { set output ${basename}[pid].o }
76 executable { set output ${basename}[pid].exe }
78 set output ${basename}[pid].s
79 lappend options "additional_flags=-fdump-$type"
80 set compile_type assembly
86 set lines [${tool}_target_compile $src $output $compile_type "$options"]
89 set scan_output $output
90 # Don't try folding this into the switch above; calling "glob" before the
91 # file is created won't work.
92 if [regexp "rtl-(.*)" $type dummy rtl_type] {
93 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
97 # Restore additional_sources.
98 if [info exists additional_sources] {
99 set additional_sources "$tmp_additional_sources"
102 return [list $lines $scan_output]
105 proc current_target_name { } {
107 if [info exists target_info(target,name)] {
108 set answer $target_info(target,name)
115 # Implement an effective-target check for property PROP by invoking
116 # the Tcl command ARGS and seeing if it returns true.
118 proc check_cached_effective_target { prop args } {
121 set target [current_target_name]
122 if {![info exists et_cache($prop,target)]
123 || $et_cache($prop,target) != $target} {
124 verbose "check_cached_effective_target $prop: checking $target" 2
125 set et_cache($prop,target) $target
126 set et_cache($prop,value) [uplevel eval $args]
128 set value $et_cache($prop,value)
129 verbose "check_cached_effective_target $prop: returning $value for $target" 2
133 # Like check_compile, but delete the output file and return true if the
134 # compiler printed no messages.
135 proc check_no_compiler_messages_nocache {args} {
136 set result [eval check_compile $args]
137 set lines [lindex $result 0]
138 set output [lindex $result 1]
139 remote_file build delete $output
140 return [string match "" $lines]
143 # Like check_no_compiler_messages_nocache, but cache the result.
144 # PROP is the property we're checking, and doubles as a prefix for
145 # temporary filenames.
146 proc check_no_compiler_messages {prop args} {
147 return [check_cached_effective_target $prop {
148 eval [list check_no_compiler_messages_nocache $prop] $args
152 # Like check_compile, but return true if the compiler printed no
153 # messages and if the contents of the output file satisfy PATTERN.
154 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
155 # don't match regular expression REGEXP, otherwise they satisfy it
156 # if they do match regular expression PATTERN. (PATTERN can start
157 # with something like "[!]" if the regular expression needs to match
158 # "!" as the first character.)
160 # Delete the output file before returning. The other arguments are
161 # as for check_compile.
162 proc check_no_messages_and_pattern_nocache {basename pattern args} {
165 set result [eval [list check_compile $basename] $args]
166 set lines [lindex $result 0]
167 set output [lindex $result 1]
170 if { [string match "" $lines] } {
171 set chan [open "$output"]
172 set invert [regexp {^!(.*)} $pattern dummy pattern]
173 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
177 remote_file build delete $output
181 # Like check_no_messages_and_pattern_nocache, but cache the result.
182 # PROP is the property we're checking, and doubles as a prefix for
183 # temporary filenames.
184 proc check_no_messages_and_pattern {prop pattern args} {
185 return [check_cached_effective_target $prop {
186 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
190 # Try to compile and run an executable from code CONTENTS. Return true
191 # if the compiler reports no messages and if execution "passes" in the
192 # usual DejaGNU sense. The arguments are as for check_compile, with
193 # TYPE implicitly being "executable".
194 proc check_runtime_nocache {basename contents args} {
197 set result [eval [list check_compile $basename executable $contents] $args]
198 set lines [lindex $result 0]
199 set output [lindex $result 1]
202 if { [string match "" $lines] } {
203 # No error messages, everything is OK.
204 set result [remote_load target "./$output" "" ""]
205 set status [lindex $result 0]
206 verbose "check_runtime_nocache $basename: status is <$status>" 2
207 if { $status == "pass" } {
211 remote_file build delete $output
215 # Like check_runtime_nocache, but cache the result. PROP is the
216 # property we're checking, and doubles as a prefix for temporary
218 proc check_runtime {prop args} {
221 return [check_cached_effective_target $prop {
222 eval [list check_runtime_nocache $prop] $args
226 ###############################
227 # proc check_weak_available { }
228 ###############################
230 # weak symbols are only supported in some configs/object formats
231 # this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
233 proc check_weak_available { } {
236 # All mips targets should support it
238 if { [ string first "mips" $target_cpu ] >= 0 } {
242 # All AIX targets should support it
244 if { [istarget *-*-aix*] } {
248 # All solaris2 targets should support it
250 if { [istarget *-*-solaris2*] } {
254 # Windows targets Cygwin and MingW32 support it
256 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
260 # HP-UX 10.X doesn't support it
262 if { [istarget hppa*-*-hpux10*] } {
266 # ELF and ECOFF support it. a.out does with gas/gld but may also with
267 # other linkers, so we should try it
269 set objformat [gcc_target_object_format]
277 unknown { return -1 }
282 ###############################
283 # proc check_weak_override_available { }
284 ###############################
286 # Like check_weak_available, but return 0 if weak symbol definitions
287 # cannot be overridden.
289 proc check_weak_override_available { } {
290 if { [istarget *-*-mingw*] } {
293 return [check_weak_available]
296 ###############################
297 # proc check_visibility_available { what_kind }
298 ###############################
300 # The visibility attribute is only support in some object formats
301 # This proc returns 1 if it is supported, 0 if not.
302 # The argument is the kind of visibility, default/protected/hidden/internal.
304 proc check_visibility_available { what_kind } {
305 if [string match "" $what_kind] { set what_kind "hidden" }
307 return [check_no_compiler_messages visibility_available_$what_kind object "
308 void f() __attribute__((visibility(\"$what_kind\")));
313 ###############################
314 # proc check_alias_available { }
315 ###############################
317 # Determine if the target toolchain supports the alias attribute.
319 # Returns 2 if the target supports aliases. Returns 1 if the target
320 # only supports weak aliased. Returns 0 if the target does not
321 # support aliases at all. Returns -1 if support for aliases could not
324 proc check_alias_available { } {
325 global alias_available_saved
328 if [info exists alias_available_saved] {
329 verbose "check_alias_available returning saved $alias_available_saved" 2
333 verbose "check_alias_available compiling testfile $src" 2
334 set f [open $src "w"]
335 # Compile a small test program. The definition of "g" is
336 # necessary to keep the Solaris assembler from complaining
338 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
339 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
341 set lines [${tool}_target_compile $src $obj object ""]
343 remote_file build delete $obj
345 if [string match "" $lines] then {
346 # No error messages, everything is OK.
347 set alias_available_saved 2
349 if [regexp "alias definitions not supported" $lines] {
350 verbose "check_alias_available target does not support aliases" 2
352 set objformat [gcc_target_object_format]
354 if { $objformat == "elf" } {
355 verbose "check_alias_available but target uses ELF format, so it ought to" 2
356 set alias_available_saved -1
358 set alias_available_saved 0
361 if [regexp "only weak aliases are supported" $lines] {
362 verbose "check_alias_available target supports only weak aliases" 2
363 set alias_available_saved 1
365 set alias_available_saved -1
370 verbose "check_alias_available returning $alias_available_saved" 2
373 return $alias_available_saved
376 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
378 proc check_effective_target_alias { } {
379 if { [check_alias_available] < 2 } {
386 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
388 proc check_ifunc_available { } {
389 return [check_no_compiler_messages ifunc_available object {
394 void f() __attribute__((ifunc("g")));
398 # Returns true if --gc-sections is supported on the target.
400 proc check_gc_sections_available { } {
401 global gc_sections_available_saved
404 if {![info exists gc_sections_available_saved]} {
405 # Some targets don't support gc-sections despite whatever's
406 # advertised by ld's options.
407 if { [istarget alpha*-*-*]
408 || [istarget ia64-*-*] } {
409 set gc_sections_available_saved 0
413 # elf2flt uses -q (--emit-relocs), which is incompatible with
415 if { [board_info target exists ldflags]
416 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
417 set gc_sections_available_saved 0
421 # VxWorks kernel modules are relocatable objects linked with -r,
422 # while RTP executables are linked with -q (--emit-relocs).
423 # Both of these options are incompatible with --gc-sections.
424 if { [istarget *-*-vxworks*] } {
425 set gc_sections_available_saved 0
429 # Check if the ld used by gcc supports --gc-sections.
430 set gcc_spec [${tool}_target_compile "-dumpspecs" "" "none" ""]
431 regsub ".*\n\\*linker:\[ \t\]*\n(\[^ \t\n\]*).*" "$gcc_spec" {\1} linker
432 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=$linker" "" "none" ""] 0]
433 set ld_output [remote_exec host "$gcc_ld" "--help"]
434 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
435 set gc_sections_available_saved 1
437 set gc_sections_available_saved 0
440 return $gc_sections_available_saved
443 # Return 1 if according to target_info struct and explicit target list
444 # target is supposed to support trampolines.
446 proc check_effective_target_trampolines { } {
447 if [target_info exists no_trampolines] {
450 if { [istarget avr-*-*]
451 || [istarget msp430-*-*]
452 || [istarget nvptx-*-*]
453 || [istarget hppa2.0w-hp-hpux11.23]
454 || [istarget hppa64-hp-hpux11.23] } {
460 # Return 1 if according to target_info struct and explicit target list
461 # target disables -fdelete-null-pointer-checks. Targets should return 0
462 # if they simply default to -fno-delete-null-pointer-checks but obey
463 # -fdelete-null-pointer-checks when passed explicitly (and tests that
464 # depend on this option should do that).
466 proc check_effective_target_keeps_null_pointer_checks { } {
467 if [target_info exists keeps_null_pointer_checks] {
470 if { [istarget avr-*-*] } {
476 # Return true if profiling is supported on the target.
478 proc check_profiling_available { test_what } {
479 global profiling_available_saved
481 verbose "Profiling argument is <$test_what>" 1
483 # These conditions depend on the argument so examine them before
484 # looking at the cache variable.
486 # Tree profiling requires TLS runtime support.
487 if { $test_what == "-fprofile-generate" } {
488 if { ![check_effective_target_tls_runtime] } {
493 # Support for -p on solaris2 relies on mcrt1.o which comes with the
494 # vendor compiler. We cannot reliably predict the directory where the
495 # vendor compiler (and thus mcrt1.o) is installed so we can't
496 # necessarily find mcrt1.o even if we have it.
497 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
501 # We don't yet support profiling for MIPS16.
502 if { [istarget mips*-*-*]
503 && ![check_effective_target_nomips16]
504 && ($test_what == "-p" || $test_what == "-pg") } {
508 # MinGW does not support -p.
509 if { [istarget *-*-mingw*] && $test_what == "-p" } {
513 # cygwin does not support -p.
514 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
518 # uClibc does not have gcrt1.o.
519 if { [check_effective_target_uclibc]
520 && ($test_what == "-p" || $test_what == "-pg") } {
524 # Now examine the cache variable.
525 if {![info exists profiling_available_saved]} {
526 # Some targets don't have any implementation of __bb_init_func or are
527 # missing other needed machinery.
528 if {[istarget aarch64*-*-elf]
529 || [istarget am3*-*-linux*]
530 || [istarget arm*-*-eabi*]
531 || [istarget arm*-*-elf]
532 || [istarget arm*-*-symbianelf*]
533 || [istarget avr-*-*]
534 || [istarget bfin-*-*]
535 || [istarget cris-*-*]
536 || [istarget crisv32-*-*]
537 || [istarget fido-*-elf]
538 || [istarget h8300-*-*]
539 || [istarget lm32-*-*]
540 || [istarget m32c-*-elf]
541 || [istarget m68k-*-elf]
542 || [istarget m68k-*-uclinux*]
543 || [istarget mep-*-elf]
544 || [istarget mips*-*-elf*]
545 || [istarget mmix-*-*]
546 || [istarget mn10300-*-elf*]
547 || [istarget moxie-*-elf*]
548 || [istarget msp430-*-*]
549 || [istarget nds32*-*-elf]
550 || [istarget nios2-*-elf]
551 || [istarget nvptx-*-*]
552 || [istarget powerpc-*-eabi*]
553 || [istarget powerpc-*-elf]
555 || [istarget tic6x-*-elf]
556 || [istarget visium-*-*]
557 || [istarget xstormy16-*]
558 || [istarget xtensa*-*-elf]
559 || [istarget *-*-rtems*]
560 || [istarget *-*-vxworks*] } {
561 set profiling_available_saved 0
563 set profiling_available_saved 1
567 # -pg link test result can't be cached since it may change between
569 set profiling_working $profiling_available_saved
570 if { $profiling_available_saved == 1
571 && ![check_no_compiler_messages_nocache profiling executable {
572 int main() { return 0; } } "-pg"] } {
573 set profiling_working 0
576 return $profiling_working
579 # Check to see if a target is "freestanding". This is as per the definition
580 # in Section 4 of C99 standard. Effectively, it is a target which supports no
581 # extra headers or libraries other than what is considered essential.
582 proc check_effective_target_freestanding { } {
583 if { [istarget nvptx-*-*] } {
589 # Return 1 if target has packed layout of structure members by
590 # default, 0 otherwise. Note that this is slightly different than
591 # whether the target has "natural alignment": both attributes may be
594 proc check_effective_target_default_packed { } {
595 return [check_no_compiler_messages default_packed assembly {
596 struct x { char a; long b; } c;
597 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
601 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
602 # documentation, where the test also comes from.
604 proc check_effective_target_pcc_bitfield_type_matters { } {
605 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
606 # bitfields, but let's stick to the example code from the docs.
607 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
608 struct foo1 { char x; char :0; char y; };
609 struct foo2 { char x; int :0; char y; };
610 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
614 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
616 proc add_options_for_tls { flags } {
617 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
618 # libthread, so always pass -pthread for native TLS. Same for AIX.
619 # Need to duplicate native TLS check from
620 # check_effective_target_tls_native to avoid recursion.
621 if { ([istarget powerpc-ibm-aix*]) &&
622 [check_no_messages_and_pattern tls_native "!emutls" assembly {
624 int f (void) { return i; }
625 void g (int j) { i = j; }
627 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
632 # Return 1 if indirect jumps are supported, 0 otherwise.
634 proc check_effective_target_indirect_jumps {} {
635 if { [istarget nvptx-*-*] } {
641 # Return 1 if nonlocal goto is supported, 0 otherwise.
643 proc check_effective_target_nonlocal_goto {} {
644 if { [istarget nvptx-*-*] } {
650 # Return 1 if global constructors are supported, 0 otherwise.
652 proc check_effective_target_global_constructor {} {
653 if { [istarget nvptx-*-*] } {
659 # Return 1 if taking label values is supported, 0 otherwise.
661 proc check_effective_target_label_values {} {
662 if { [istarget nvptx-*-*] } {
665 return [check_no_compiler_messages label_values assembly {
666 #ifdef NO_LABEL_VALUES
672 # Return 1 if builtin_return_address and builtin_frame_address are
673 # supported, 0 otherwise.
675 proc check_effective_target_return_address {} {
676 if { [istarget nvptx-*-*] } {
682 # Return 1 if the assembler does not verify function types against
683 # calls, 0 otherwise. Such verification will typically show up problems
684 # with K&R C function declarations.
686 proc check_effective_target_untyped_assembly {} {
687 if { [istarget nvptx-*-*] } {
693 # Return 1 if alloca is supported, 0 otherwise.
695 proc check_effective_target_alloca {} {
696 if { [istarget nvptx-*-*] } {
702 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
704 proc check_effective_target_tls {} {
705 return [check_no_compiler_messages tls assembly {
707 int f (void) { return i; }
708 void g (int j) { i = j; }
712 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
714 proc check_effective_target_tls_native {} {
715 # VxWorks uses emulated TLS machinery, but with non-standard helper
716 # functions, so we fail to automatically detect it.
717 if { [istarget *-*-vxworks*] } {
721 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
723 int f (void) { return i; }
724 void g (int j) { i = j; }
728 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
730 proc check_effective_target_tls_emulated {} {
731 # VxWorks uses emulated TLS machinery, but with non-standard helper
732 # functions, so we fail to automatically detect it.
733 if { [istarget *-*-vxworks*] } {
737 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
739 int f (void) { return i; }
740 void g (int j) { i = j; }
744 # Return 1 if TLS executables can run correctly, 0 otherwise.
746 proc check_effective_target_tls_runtime {} {
747 # The runtime does not have TLS support, but just
748 # running the test below is insufficient to show this.
749 if { [istarget msp430-*-*] || [istarget visium-*-*] } {
752 return [check_runtime tls_runtime {
753 __thread int thr = 0;
754 int main (void) { return thr; }
755 } [add_options_for_tls ""]]
758 # Return 1 if atomic compare-and-swap is supported on 'int'
760 proc check_effective_target_cas_char {} {
761 return [check_no_compiler_messages cas_char assembly {
762 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
768 proc check_effective_target_cas_int {} {
769 return [check_no_compiler_messages cas_int assembly {
770 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
772 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
780 # Return 1 if -ffunction-sections is supported, 0 otherwise.
782 proc check_effective_target_function_sections {} {
783 # Darwin has its own scheme and silently accepts -ffunction-sections.
784 if { [istarget *-*-darwin*] } {
788 return [check_no_compiler_messages functionsections assembly {
790 } "-ffunction-sections"]
793 # Return 1 if instruction scheduling is available, 0 otherwise.
795 proc check_effective_target_scheduling {} {
796 return [check_no_compiler_messages scheduling object {
798 } "-fschedule-insns"]
801 # Return 1 if trapping arithmetic is available, 0 otherwise.
803 proc check_effective_target_trapping {} {
804 return [check_no_compiler_messages trapping object {
805 int add (int a, int b) { return a + b; }
809 # Return 1 if compilation with -fgraphite is error-free for trivial
812 proc check_effective_target_fgraphite {} {
813 return [check_no_compiler_messages fgraphite object {
818 # Return 1 if compilation with -fopenacc is error-free for trivial
821 proc check_effective_target_fopenacc {} {
822 # nvptx can be built with the device-side bits of openacc, but it
823 # does not make sense to test it as an openacc host.
824 if [istarget nvptx-*-*] { return 0 }
826 return [check_no_compiler_messages fopenacc object {
831 # Return 1 if compilation with -fopenmp is error-free for trivial
834 proc check_effective_target_fopenmp {} {
835 # nvptx can be built with the device-side bits of libgomp, but it
836 # does not make sense to test it as an openmp host.
837 if [istarget nvptx-*-*] { return 0 }
839 return [check_no_compiler_messages fopenmp object {
844 # Return 1 if compilation with -fgnu-tm is error-free for trivial
847 proc check_effective_target_fgnu_tm {} {
848 return [check_no_compiler_messages fgnu_tm object {
853 # Return 1 if the target supports mmap, 0 otherwise.
855 proc check_effective_target_mmap {} {
856 return [check_function_available "mmap"]
859 # Return 1 if the target supports dlopen, 0 otherwise.
860 proc check_effective_target_dlopen {} {
861 return [check_no_compiler_messages dlopen executable {
863 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
864 } [add_options_for_dlopen ""]]
867 proc add_options_for_dlopen { flags } {
871 # Return 1 if the target supports clone, 0 otherwise.
872 proc check_effective_target_clone {} {
873 return [check_function_available "clone"]
876 # Return 1 if the target supports setrlimit, 0 otherwise.
877 proc check_effective_target_setrlimit {} {
878 # Darwin has non-posix compliant RLIMIT_AS
879 if { [istarget *-*-darwin*] } {
882 return [check_function_available "setrlimit"]
885 # Return 1 if the target supports swapcontext, 0 otherwise.
886 proc check_effective_target_swapcontext {} {
887 return [check_no_compiler_messages swapcontext executable {
888 #include <ucontext.h>
891 ucontext_t orig_context,child_context;
892 if (swapcontext(&child_context, &orig_context) < 0) { }
897 # Return 1 if compilation with -pthread is error-free for trivial
900 proc check_effective_target_pthread {} {
901 return [check_no_compiler_messages pthread object {
906 # Return 1 if compilation with -mpe-aligned-commons is error-free
907 # for trivial code, 0 otherwise.
909 proc check_effective_target_pe_aligned_commons {} {
910 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
911 return [check_no_compiler_messages pe_aligned_commons object {
913 } "-mpe-aligned-commons"]
918 # Return 1 if the target supports -static
919 proc check_effective_target_static {} {
920 return [check_no_compiler_messages static executable {
921 int main (void) { return 0; }
925 # Return 1 if the target supports -fstack-protector
926 proc check_effective_target_fstack_protector {} {
927 return [check_runtime fstack_protector {
928 int main (void) { return 0; }
929 } "-fstack-protector"]
932 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
933 # for trivial code, 0 otherwise.
935 proc check_effective_target_freorder {} {
936 return [check_no_compiler_messages freorder object {
938 } "-freorder-blocks-and-partition"]
941 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
942 # emitted, 0 otherwise. Whether a shared library can actually be built is
943 # out of scope for this test.
945 proc check_effective_target_fpic { } {
946 # Note that M68K has a multilib that supports -fpic but not
947 # -fPIC, so we need to check both. We test with a program that
948 # requires GOT references.
949 foreach arg {fpic fPIC} {
950 if [check_no_compiler_messages $arg object {
951 extern int foo (void); extern int bar;
952 int baz (void) { return foo () + bar; }
960 # On AArch64, if -fpic is not supported, then we will fall back to -fPIC
961 # silently. So, we can't rely on above "check_effective_target_fpic" as it
962 # assumes compiler will give warning if -fpic not supported. Here we check
963 # whether binutils supports those new -fpic relocation modifiers, and assume
964 # -fpic is supported if there is binutils support. GCC configuration will
965 # enable -fpic for AArch64 in this case.
967 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
968 # memory model -fpic relocation types.
970 proc check_effective_target_aarch64_small_fpic { } {
971 if { [istarget aarch64*-*-*] } {
972 return [check_no_compiler_messages aarch64_small_fpic object {
973 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
980 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
981 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
982 # in binutils since 2015-03-04 as PR gas/17843.
984 # This test directive make sure binutils support all features needed by TLS LE
985 # under -mtls-size=32 on AArch64.
987 proc check_effective_target_aarch64_tlsle32 { } {
988 if { [istarget aarch64*-*-*] } {
989 return [check_no_compiler_messages aarch64_tlsle32 object {
990 void foo (void) { asm ("movk x1,#:tprel_g0_nc:t1"); }
997 # Return 1 if -shared is supported, as in no warnings or errors
998 # emitted, 0 otherwise.
1000 proc check_effective_target_shared { } {
1001 # Note that M68K has a multilib that supports -fpic but not
1002 # -fPIC, so we need to check both. We test with a program that
1003 # requires GOT references.
1004 return [check_no_compiler_messages shared executable {
1005 extern int foo (void); extern int bar;
1006 int baz (void) { return foo () + bar; }
1010 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
1012 proc check_effective_target_pie { } {
1013 if { [istarget *-*-darwin\[912\]*]
1014 || [istarget *-*-dragonfly*]
1015 || [istarget *-*-freebsd*]
1016 || [istarget *-*-linux*]
1017 || [istarget *-*-gnu*] } {
1023 # Return true if the target supports -mpaired-single (as used on MIPS).
1025 proc check_effective_target_mpaired_single { } {
1026 return [check_no_compiler_messages mpaired_single object {
1028 } "-mpaired-single"]
1031 # Return true if the target has access to FPU instructions.
1033 proc check_effective_target_hard_float { } {
1034 if { [istarget mips*-*-*] } {
1035 return [check_no_compiler_messages hard_float assembly {
1036 #if (defined __mips_soft_float || defined __mips16)
1037 #error __mips_soft_float || __mips16
1042 # This proc is actually checking the availabilty of FPU
1043 # support for doubles, so on the RX we must fail if the
1044 # 64-bit double multilib has been selected.
1045 if { [istarget rx-*-*] } {
1047 # return [check_no_compiler_messages hard_float assembly {
1048 #if defined __RX_64_BIT_DOUBLES__
1049 #error __RX_64_BIT_DOUBLES__
1054 # The generic test equates hard_float with "no call for adding doubles".
1055 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
1056 double a (double b, double c) { return b + c; }
1060 # Return true if the target is a 64-bit MIPS target.
1062 proc check_effective_target_mips64 { } {
1063 return [check_no_compiler_messages mips64 assembly {
1070 # Return true if the target is a MIPS target that does not produce
1073 proc check_effective_target_nomips16 { } {
1074 return [check_no_compiler_messages nomips16 object {
1078 /* A cheap way of testing for -mflip-mips16. */
1079 void foo (void) { asm ("addiu $20,$20,1"); }
1080 void bar (void) { asm ("addiu $20,$20,1"); }
1085 # Add the options needed for MIPS16 function attributes. At the moment,
1086 # we don't support MIPS16 PIC.
1088 proc add_options_for_mips16_attribute { flags } {
1089 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1092 # Return true if we can force a mode that allows MIPS16 code generation.
1093 # We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
1096 proc check_effective_target_mips16_attribute { } {
1097 return [check_no_compiler_messages mips16_attribute assembly {
1101 #if defined __mips_hard_float \
1102 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
1103 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
1104 #error __mips_hard_float && (!_ABIO32 || !_ABIO64)
1106 } [add_options_for_mips16_attribute ""]]
1109 # Return 1 if the target supports long double larger than double when
1110 # using the new ABI, 0 otherwise.
1112 proc check_effective_target_mips_newabi_large_long_double { } {
1113 return [check_no_compiler_messages mips_newabi_large_long_double object {
1114 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1118 # Return true if the target is a MIPS target that has access
1119 # to the LL and SC instructions.
1121 proc check_effective_target_mips_llsc { } {
1122 if { ![istarget mips*-*-*] } {
1125 # Assume that these instructions are always implemented for
1126 # non-elf* targets, via emulation if necessary.
1127 if { ![istarget *-*-elf*] } {
1130 # Otherwise assume LL/SC support for everything but MIPS I.
1131 return [check_no_compiler_messages mips_llsc assembly {
1138 # Return true if the target is a MIPS target that uses in-place relocations.
1140 proc check_effective_target_mips_rel { } {
1141 if { ![istarget mips*-*-*] } {
1144 return [check_no_compiler_messages mips_rel object {
1145 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
1146 || (defined _ABI64 && _MIPS_SIM == _ABI64)
1147 #error _ABIN32 && (_ABIN32 || _ABI64)
1152 # Return true if the target is a MIPS target that uses the EABI.
1154 proc check_effective_target_mips_eabi { } {
1155 if { ![istarget mips*-*-*] } {
1158 return [check_no_compiler_messages mips_eabi object {
1165 # Return 1 if the current multilib does not generate PIC by default.
1167 proc check_effective_target_nonpic { } {
1168 return [check_no_compiler_messages nonpic assembly {
1175 # Return 1 if the current multilib generates PIE by default.
1177 proc check_effective_target_pie_enabled { } {
1178 return [check_no_compiler_messages pie_enabled assembly {
1185 # Return 1 if the target generates -fstack-protector by default.
1187 proc check_effective_target_fstack_protector_enabled {} {
1188 return [ check_no_compiler_messages fstack_protector_enabled assembly {
1189 #if !defined(__SSP__) && !defined(__SSP_ALL__) && \
1190 !defined(__SSP_STRONG__) && !defined(__SSP_EXPICIT__)
1196 # Return 1 if the target does not use a status wrapper.
1198 proc check_effective_target_unwrapped { } {
1199 if { [target_info needs_status_wrapper] != "" \
1200 && [target_info needs_status_wrapper] != "0" } {
1206 # Return true if iconv is supported on the target. In particular IBM1047.
1208 proc check_iconv_available { test_what } {
1211 # If the tool configuration file has not set libiconv, try "-liconv"
1212 if { ![info exists libiconv] } {
1213 set libiconv "-liconv"
1215 set test_what [lindex $test_what 1]
1216 return [check_runtime_nocache $test_what [subst {
1222 cd = iconv_open ("$test_what", "UTF-8");
1223 if (cd == (iconv_t) -1)
1230 # Return true if Cilk Library is supported on the target.
1231 proc check_libcilkrts_available { } {
1232 return [ check_no_compiler_messages_nocache libcilkrts_available executable {
1236 int __cilkrts_set_param (const char *, const char *);
1238 int x = __cilkrts_set_param ("nworkers", "0");
1241 } "-fcilkplus -lcilkrts" ]
1244 # Return true if the atomic library is supported on the target.
1245 proc check_effective_target_libatomic_available { } {
1246 return [check_no_compiler_messages libatomic_available executable {
1247 int main (void) { return 0; }
1251 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1253 proc check_ascii_locale_available { } {
1257 # Return true if named sections are supported on this target.
1259 proc check_named_sections_available { } {
1260 return [check_no_compiler_messages named_sections assembly {
1261 int __attribute__ ((section("whatever"))) foo;
1265 # Return true if the "naked" function attribute is supported on this target.
1267 proc check_effective_target_naked_functions { } {
1268 return [check_no_compiler_messages naked_functions assembly {
1269 void f() __attribute__((naked));
1273 # Return 1 if the target supports Fortran real kinds larger than real(8),
1276 # When the target name changes, replace the cached result.
1278 proc check_effective_target_fortran_large_real { } {
1279 return [check_no_compiler_messages fortran_large_real executable {
1281 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1288 # Return 1 if the target supports Fortran real kind real(16),
1289 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1290 # this checks for Real(16) only; the other returned real(10) if
1291 # both real(10) and real(16) are available.
1293 # When the target name changes, replace the cached result.
1295 proc check_effective_target_fortran_real_16 { } {
1296 return [check_no_compiler_messages fortran_real_16 executable {
1305 # Return 1 if the target supports Fortran's IEEE modules,
1308 # When the target name changes, replace the cached result.
1310 proc check_effective_target_fortran_ieee { flags } {
1311 return [check_no_compiler_messages fortran_ieee executable {
1313 use, intrinsic :: ieee_features
1319 # Return 1 if the target supports SQRT for the largest floating-point
1320 # type. (Some targets lack the libm support for this FP type.)
1321 # On most targets, this check effectively checks either whether sqrtl is
1322 # available or on __float128 systems whether libquadmath is installed,
1323 # which provides sqrtq.
1325 # When the target name changes, replace the cached result.
1327 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1328 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1330 use iso_fortran_env, only: real_kinds
1331 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1332 real(kind=maxFP), volatile :: x
1340 # Return 1 if the target supports Fortran integer kinds larger than
1341 # integer(8), 0 otherwise.
1343 # When the target name changes, replace the cached result.
1345 proc check_effective_target_fortran_large_int { } {
1346 return [check_no_compiler_messages fortran_large_int executable {
1348 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1349 integer(kind=k) :: i
1354 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1356 # When the target name changes, replace the cached result.
1358 proc check_effective_target_fortran_integer_16 { } {
1359 return [check_no_compiler_messages fortran_integer_16 executable {
1366 # Return 1 if we can statically link libgfortran, 0 otherwise.
1368 # When the target name changes, replace the cached result.
1370 proc check_effective_target_static_libgfortran { } {
1371 return [check_no_compiler_messages static_libgfortran executable {
1378 # Return 1 if cilk-plus is supported by the target, 0 otherwise.
1380 proc check_effective_target_cilkplus { } {
1381 # Skip cilk-plus tests on int16 and size16 targets for now.
1382 # The cilk-plus tests are not generic enough to cover these
1383 # cases and would throw hundreds of FAILs.
1384 if { [check_effective_target_int16]
1385 || ![check_effective_target_size32plus] } {
1389 # Skip AVR, its RAM is too small and too many tests would fail.
1390 if { [istarget avr-*-*] } {
1396 proc check_linker_plugin_available { } {
1397 return [check_no_compiler_messages_nocache linker_plugin executable {
1398 int main() { return 0; }
1399 } "-flto -fuse-linker-plugin"]
1402 # Return 1 if the target supports executing 750CL paired-single instructions, 0
1403 # otherwise. Cache the result.
1405 proc check_750cl_hw_available { } {
1406 return [check_cached_effective_target 750cl_hw_available {
1407 # If this is not the right target then we can skip the test.
1408 if { ![istarget powerpc-*paired*] } {
1411 check_runtime_nocache 750cl_hw_available {
1415 asm volatile ("ps_mul v0,v0,v0");
1417 asm volatile ("ps_mul 0,0,0");
1426 # Return 1 if the target OS supports running SSE executables, 0
1427 # otherwise. Cache the result.
1429 proc check_sse_os_support_available { } {
1430 return [check_cached_effective_target sse_os_support_available {
1431 # If this is not the right target then we can skip the test.
1432 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1434 } elseif { [istarget i?86-*-solaris2*] } {
1435 # The Solaris 2 kernel doesn't save and restore SSE registers
1436 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1437 check_runtime_nocache sse_os_support_available {
1440 asm volatile ("movaps %xmm0,%xmm0");
1450 # Return 1 if the target OS supports running AVX executables, 0
1451 # otherwise. Cache the result.
1453 proc check_avx_os_support_available { } {
1454 return [check_cached_effective_target avx_os_support_available {
1455 # If this is not the right target then we can skip the test.
1456 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1459 # Check that OS has AVX and SSE saving enabled.
1460 check_runtime_nocache avx_os_support_available {
1463 unsigned int eax, edx;
1465 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1466 return (eax & 6) != 6;
1473 # Return 1 if the target supports executing SSE instructions, 0
1474 # otherwise. Cache the result.
1476 proc check_sse_hw_available { } {
1477 return [check_cached_effective_target sse_hw_available {
1478 # If this is not the right target then we can skip the test.
1479 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1482 check_runtime_nocache sse_hw_available {
1486 unsigned int eax, ebx, ecx, edx;
1487 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1488 return !(edx & bit_SSE);
1496 # Return 1 if the target supports executing SSE2 instructions, 0
1497 # otherwise. Cache the result.
1499 proc check_sse2_hw_available { } {
1500 return [check_cached_effective_target sse2_hw_available {
1501 # If this is not the right target then we can skip the test.
1502 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1505 check_runtime_nocache sse2_hw_available {
1509 unsigned int eax, ebx, ecx, edx;
1510 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1511 return !(edx & bit_SSE2);
1519 # Return 1 if the target supports executing AVX instructions, 0
1520 # otherwise. Cache the result.
1522 proc check_avx_hw_available { } {
1523 return [check_cached_effective_target avx_hw_available {
1524 # If this is not the right target then we can skip the test.
1525 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1528 check_runtime_nocache avx_hw_available {
1532 unsigned int eax, ebx, ecx, edx;
1533 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1534 return ((ecx & (bit_AVX | bit_OSXSAVE))
1535 != (bit_AVX | bit_OSXSAVE));
1543 # Return 1 if the target supports running SSE executables, 0 otherwise.
1545 proc check_effective_target_sse_runtime { } {
1546 if { [check_effective_target_sse]
1547 && [check_sse_hw_available]
1548 && [check_sse_os_support_available] } {
1554 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1556 proc check_effective_target_sse2_runtime { } {
1557 if { [check_effective_target_sse2]
1558 && [check_sse2_hw_available]
1559 && [check_sse_os_support_available] } {
1565 # Return 1 if the target supports running AVX executables, 0 otherwise.
1567 proc check_effective_target_avx_runtime { } {
1568 if { [check_effective_target_avx]
1569 && [check_avx_hw_available]
1570 && [check_avx_os_support_available] } {
1576 # Return 1 if the target supports executing power8 vector instructions, 0
1577 # otherwise. Cache the result.
1579 proc check_p8vector_hw_available { } {
1580 return [check_cached_effective_target p8vector_hw_available {
1581 # Some simulators are known to not support VSX/power8 instructions.
1582 # For now, disable on Darwin
1583 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1586 set options "-mpower8-vector"
1587 check_runtime_nocache p8vector_hw_available {
1591 asm volatile ("xxlorc vs0,vs0,vs0");
1593 asm volatile ("xxlorc 0,0,0");
1602 # Return 1 if the target supports executing VSX instructions, 0
1603 # otherwise. Cache the result.
1605 proc check_vsx_hw_available { } {
1606 return [check_cached_effective_target vsx_hw_available {
1607 # Some simulators are known to not support VSX instructions.
1608 # For now, disable on Darwin
1609 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1613 check_runtime_nocache vsx_hw_available {
1617 asm volatile ("xxlor vs0,vs0,vs0");
1619 asm volatile ("xxlor 0,0,0");
1628 # Return 1 if the target supports executing AltiVec instructions, 0
1629 # otherwise. Cache the result.
1631 proc check_vmx_hw_available { } {
1632 return [check_cached_effective_target vmx_hw_available {
1633 # Some simulators are known to not support VMX instructions.
1634 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
1637 # Most targets don't require special flags for this test case, but
1638 # Darwin does. Just to be sure, make sure VSX is not enabled for
1639 # the altivec tests.
1640 if { [istarget *-*-darwin*]
1641 || [istarget *-*-aix*] } {
1642 set options "-maltivec -mno-vsx"
1644 set options "-mno-vsx"
1646 check_runtime_nocache vmx_hw_available {
1650 asm volatile ("vor v0,v0,v0");
1652 asm volatile ("vor 0,0,0");
1661 proc check_ppc_recip_hw_available { } {
1662 return [check_cached_effective_target ppc_recip_hw_available {
1663 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
1664 # For now, disable on Darwin
1665 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1668 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
1669 check_runtime_nocache ppc_recip_hw_available {
1670 volatile double d_recip, d_rsqrt, d_four = 4.0;
1671 volatile float f_recip, f_rsqrt, f_four = 4.0f;
1674 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
1675 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
1676 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
1677 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
1685 # Return 1 if the target supports executing AltiVec and Cell PPU
1686 # instructions, 0 otherwise. Cache the result.
1688 proc check_effective_target_cell_hw { } {
1689 return [check_cached_effective_target cell_hw_available {
1690 # Some simulators are known to not support VMX and PPU instructions.
1691 if { [istarget powerpc-*-eabi*] } {
1694 # Most targets don't require special flags for this test
1695 # case, but Darwin and AIX do.
1696 if { [istarget *-*-darwin*]
1697 || [istarget *-*-aix*] } {
1698 set options "-maltivec -mcpu=cell"
1700 set options "-mcpu=cell"
1702 check_runtime_nocache cell_hw_available {
1706 asm volatile ("vor v0,v0,v0");
1707 asm volatile ("lvlx v0,r0,r0");
1709 asm volatile ("vor 0,0,0");
1710 asm volatile ("lvlx 0,0,0");
1719 # Return 1 if the target supports executing 64-bit instructions, 0
1720 # otherwise. Cache the result.
1722 proc check_effective_target_powerpc64 { } {
1723 global powerpc64_available_saved
1726 if [info exists powerpc64_available_saved] {
1727 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
1729 set powerpc64_available_saved 0
1731 # Some simulators are known to not support powerpc64 instructions.
1732 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
1733 verbose "check_effective_target_powerpc64 returning 0" 2
1734 return $powerpc64_available_saved
1737 # Set up, compile, and execute a test program containing a 64-bit
1738 # instruction. Include the current process ID in the file
1739 # names to prevent conflicts with invocations for multiple
1744 set f [open $src "w"]
1745 puts $f "int main() {"
1746 puts $f "#ifdef __MACH__"
1747 puts $f " asm volatile (\"extsw r0,r0\");"
1749 puts $f " asm volatile (\"extsw 0,0\");"
1751 puts $f " return 0; }"
1754 set opts "additional_flags=-mcpu=G5"
1756 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
1757 set lines [${tool}_target_compile $src $exe executable "$opts"]
1760 if [string match "" $lines] then {
1761 # No error message, compilation succeeded.
1762 set result [${tool}_load "./$exe" "" ""]
1763 set status [lindex $result 0]
1764 remote_file build delete $exe
1765 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
1767 if { $status == "pass" } then {
1768 set powerpc64_available_saved 1
1771 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
1775 return $powerpc64_available_saved
1778 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
1779 # complex float arguments. This affects gfortran tests that call cabsf
1780 # in libm built by an earlier compiler. Return 1 if libm uses the same
1781 # argument passing as the compiler under test, 0 otherwise.
1783 # When the target name changes, replace the cached result.
1785 proc check_effective_target_broken_cplxf_arg { } {
1786 return [check_cached_effective_target broken_cplxf_arg {
1787 # Skip the work for targets known not to be affected.
1788 if { ![istarget powerpc64-*-linux*] } {
1790 } elseif { ![is-effective-target lp64] } {
1793 check_runtime_nocache broken_cplxf_arg {
1794 #include <complex.h>
1795 extern void abort (void);
1796 float fabsf (float);
1797 float cabsf (_Complex float);
1804 if (fabsf (f - 5.0) > 0.0001)
1813 # Return 1 is this is a TI C6X target supporting C67X instructions
1814 proc check_effective_target_ti_c67x { } {
1815 return [check_no_compiler_messages ti_c67x assembly {
1816 #if !defined(_TMS320C6700)
1817 #error !_TMS320C6700
1822 # Return 1 is this is a TI C6X target supporting C64X+ instructions
1823 proc check_effective_target_ti_c64xp { } {
1824 return [check_no_compiler_messages ti_c64xp assembly {
1825 #if !defined(_TMS320C6400_PLUS)
1826 #error !_TMS320C6400_PLUS
1832 proc check_alpha_max_hw_available { } {
1833 return [check_runtime alpha_max_hw_available {
1834 int main() { return __builtin_alpha_amask(1<<8) != 0; }
1838 # Returns true iff the FUNCTION is available on the target system.
1839 # (This is essentially a Tcl implementation of Autoconf's
1842 proc check_function_available { function } {
1843 return [check_no_compiler_messages ${function}_available \
1849 int main () { $function (); }
1853 # Returns true iff "fork" is available on the target system.
1855 proc check_fork_available {} {
1856 return [check_function_available "fork"]
1859 # Returns true iff "mkfifo" is available on the target system.
1861 proc check_mkfifo_available {} {
1862 if { [istarget *-*-cygwin*] } {
1863 # Cygwin has mkfifo, but support is incomplete.
1867 return [check_function_available "mkfifo"]
1870 # Returns true iff "__cxa_atexit" is used on the target system.
1872 proc check_cxa_atexit_available { } {
1873 return [check_cached_effective_target cxa_atexit_available {
1874 if { [istarget hppa*-*-hpux10*] } {
1875 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
1877 } elseif { [istarget *-*-vxworks] } {
1878 # vxworks doesn't have __cxa_atexit but subsequent test passes.
1881 check_runtime_nocache cxa_atexit_available {
1884 static unsigned int count;
1901 Y() { f(); count = 2; }
1910 int main() { return 0; }
1916 proc check_effective_target_objc2 { } {
1917 return [check_no_compiler_messages objc2 object {
1926 proc check_effective_target_next_runtime { } {
1927 return [check_no_compiler_messages objc2 object {
1928 #ifdef __NEXT_RUNTIME__
1931 #error !__NEXT_RUNTIME__
1936 # Return 1 if we're generating 32-bit code using default options, 0
1939 proc check_effective_target_ilp32 { } {
1940 return [check_no_compiler_messages ilp32 object {
1941 int dummy[sizeof (int) == 4
1942 && sizeof (void *) == 4
1943 && sizeof (long) == 4 ? 1 : -1];
1947 # Return 1 if we're generating ia32 code using default options, 0
1950 proc check_effective_target_ia32 { } {
1951 return [check_no_compiler_messages ia32 object {
1952 int dummy[sizeof (int) == 4
1953 && sizeof (void *) == 4
1954 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
1958 # Return 1 if we're generating x32 code using default options, 0
1961 proc check_effective_target_x32 { } {
1962 return [check_no_compiler_messages x32 object {
1963 int dummy[sizeof (int) == 4
1964 && sizeof (void *) == 4
1965 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
1969 # Return 1 if we're generating 32-bit integers using default
1970 # options, 0 otherwise.
1972 proc check_effective_target_int32 { } {
1973 return [check_no_compiler_messages int32 object {
1974 int dummy[sizeof (int) == 4 ? 1 : -1];
1978 # Return 1 if we're generating 32-bit or larger integers using default
1979 # options, 0 otherwise.
1981 proc check_effective_target_int32plus { } {
1982 return [check_no_compiler_messages int32plus object {
1983 int dummy[sizeof (int) >= 4 ? 1 : -1];
1987 # Return 1 if we're generating 32-bit or larger pointers using default
1988 # options, 0 otherwise.
1990 proc check_effective_target_ptr32plus { } {
1991 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
1992 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
1993 # cannot really hold a 32-bit address, so we always return false here.
1994 if { [istarget msp430-*-*] } {
1998 return [check_no_compiler_messages ptr32plus object {
1999 int dummy[sizeof (void *) >= 4 ? 1 : -1];
2003 # Return 1 if we support 32-bit or larger array and structure sizes
2004 # using default options, 0 otherwise. Avoid false positive on
2005 # targets with 20 or 24 bit address spaces.
2007 proc check_effective_target_size32plus { } {
2008 return [check_no_compiler_messages size32plus object {
2009 char dummy[16777217L];
2013 # Returns 1 if we're generating 16-bit or smaller integers with the
2014 # default options, 0 otherwise.
2016 proc check_effective_target_int16 { } {
2017 return [check_no_compiler_messages int16 object {
2018 int dummy[sizeof (int) < 4 ? 1 : -1];
2022 # Return 1 if we're generating 64-bit code using default options, 0
2025 proc check_effective_target_lp64 { } {
2026 return [check_no_compiler_messages lp64 object {
2027 int dummy[sizeof (int) == 4
2028 && sizeof (void *) == 8
2029 && sizeof (long) == 8 ? 1 : -1];
2033 # Return 1 if we're generating 64-bit code using default llp64 options,
2036 proc check_effective_target_llp64 { } {
2037 return [check_no_compiler_messages llp64 object {
2038 int dummy[sizeof (int) == 4
2039 && sizeof (void *) == 8
2040 && sizeof (long long) == 8
2041 && sizeof (long) == 4 ? 1 : -1];
2045 # Return 1 if long and int have different sizes,
2048 proc check_effective_target_long_neq_int { } {
2049 return [check_no_compiler_messages long_ne_int object {
2050 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2054 # Return 1 if the target supports long double larger than double,
2057 proc check_effective_target_large_long_double { } {
2058 return [check_no_compiler_messages large_long_double object {
2059 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2063 # Return 1 if the target supports double larger than float,
2066 proc check_effective_target_large_double { } {
2067 return [check_no_compiler_messages large_double object {
2068 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2072 # Return 1 if the target supports long double of 128 bits,
2075 proc check_effective_target_longdouble128 { } {
2076 return [check_no_compiler_messages longdouble128 object {
2077 int dummy[sizeof(long double) == 16 ? 1 : -1];
2081 # Return 1 if the target supports double of 64 bits,
2084 proc check_effective_target_double64 { } {
2085 return [check_no_compiler_messages double64 object {
2086 int dummy[sizeof(double) == 8 ? 1 : -1];
2090 # Return 1 if the target supports double of at least 64 bits,
2093 proc check_effective_target_double64plus { } {
2094 return [check_no_compiler_messages double64plus object {
2095 int dummy[sizeof(double) >= 8 ? 1 : -1];
2099 # Return 1 if the target supports 'w' suffix on floating constant
2102 proc check_effective_target_has_w_floating_suffix { } {
2104 if [check_effective_target_c++] {
2105 append opts "-std=gnu++03"
2107 return [check_no_compiler_messages w_fp_suffix object {
2112 # Return 1 if the target supports 'q' suffix on floating constant
2115 proc check_effective_target_has_q_floating_suffix { } {
2117 if [check_effective_target_c++] {
2118 append opts "-std=gnu++03"
2120 return [check_no_compiler_messages q_fp_suffix object {
2124 # Return 1 if the target supports compiling fixed-point,
2127 proc check_effective_target_fixed_point { } {
2128 return [check_no_compiler_messages fixed_point object {
2129 _Sat _Fract x; _Sat _Accum y;
2133 # Return 1 if the target supports compiling decimal floating point,
2136 proc check_effective_target_dfp_nocache { } {
2137 verbose "check_effective_target_dfp_nocache: compiling source" 2
2138 set ret [check_no_compiler_messages_nocache dfp object {
2139 float x __attribute__((mode(DD)));
2141 verbose "check_effective_target_dfp_nocache: returning $ret" 2
2145 proc check_effective_target_dfprt_nocache { } {
2146 return [check_runtime_nocache dfprt {
2147 typedef float d64 __attribute__((mode(DD)));
2148 d64 x = 1.2df, y = 2.3dd, z;
2149 int main () { z = x + y; return 0; }
2153 # Return 1 if the target supports compiling Decimal Floating Point,
2156 # This won't change for different subtargets so cache the result.
2158 proc check_effective_target_dfp { } {
2159 return [check_cached_effective_target dfp {
2160 check_effective_target_dfp_nocache
2164 # Return 1 if the target supports linking and executing Decimal Floating
2165 # Point, 0 otherwise.
2167 # This won't change for different subtargets so cache the result.
2169 proc check_effective_target_dfprt { } {
2170 return [check_cached_effective_target dfprt {
2171 check_effective_target_dfprt_nocache
2175 # Return 1 if the target supports executing DFP hardware instructions,
2176 # 0 otherwise. Cache the result.
2178 proc check_dfp_hw_available { } {
2179 return [check_cached_effective_target dfp_hw_available {
2180 # For now, disable on Darwin
2181 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2184 check_runtime_nocache dfp_hw_available {
2185 volatile _Decimal64 r;
2186 volatile _Decimal64 a = 4.0DD;
2187 volatile _Decimal64 b = 2.0DD;
2190 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2191 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2192 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2193 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2196 } "-mcpu=power6 -mhard-float"
2201 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2203 proc check_effective_target_ucn_nocache { } {
2204 # -std=c99 is only valid for C
2205 if [check_effective_target_c] {
2206 set ucnopts "-std=c99"
2210 verbose "check_effective_target_ucn_nocache: compiling source" 2
2211 set ret [check_no_compiler_messages_nocache ucn object {
2214 verbose "check_effective_target_ucn_nocache: returning $ret" 2
2218 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2220 # This won't change for different subtargets, so cache the result.
2222 proc check_effective_target_ucn { } {
2223 return [check_cached_effective_target ucn {
2224 check_effective_target_ucn_nocache
2228 # Return 1 if the target needs a command line argument to enable a SIMD
2231 proc check_effective_target_vect_cmdline_needed { } {
2232 global et_vect_cmdline_needed_saved
2233 global et_vect_cmdline_needed_target_name
2235 if { ![info exists et_vect_cmdline_needed_target_name] } {
2236 set et_vect_cmdline_needed_target_name ""
2239 # If the target has changed since we set the cached value, clear it.
2240 set current_target [current_target_name]
2241 if { $current_target != $et_vect_cmdline_needed_target_name } {
2242 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
2243 set et_vect_cmdline_needed_target_name $current_target
2244 if { [info exists et_vect_cmdline_needed_saved] } {
2245 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
2246 unset et_vect_cmdline_needed_saved
2250 if [info exists et_vect_cmdline_needed_saved] {
2251 verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
2253 set et_vect_cmdline_needed_saved 1
2254 if { [istarget alpha*-*-*]
2255 || [istarget ia64-*-*]
2256 || (([istarget x86_64-*-*] || [istarget i?86-*-*])
2257 && ([check_effective_target_x32]
2258 || [check_effective_target_lp64]))
2259 || ([istarget powerpc*-*-*]
2260 && ([check_effective_target_powerpc_spe]
2261 || [check_effective_target_powerpc_altivec]))
2262 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
2263 || [istarget spu-*-*]
2264 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
2265 || [istarget aarch64*-*-*] } {
2266 set et_vect_cmdline_needed_saved 0
2270 verbose "check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
2271 return $et_vect_cmdline_needed_saved
2274 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
2276 # This won't change for different subtargets so cache the result.
2278 proc check_effective_target_vect_int { } {
2279 global et_vect_int_saved
2281 if [info exists et_vect_int_saved] {
2282 verbose "check_effective_target_vect_int: using cached result" 2
2284 set et_vect_int_saved 0
2285 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2286 || ([istarget powerpc*-*-*]
2287 && ![istarget powerpc-*-linux*paired*])
2288 || [istarget spu-*-*]
2289 || [istarget sparc*-*-*]
2290 || [istarget alpha*-*-*]
2291 || [istarget ia64-*-*]
2292 || [istarget aarch64*-*-*]
2293 || [check_effective_target_arm32]
2294 || ([istarget mips*-*-*]
2295 && [check_effective_target_mips_loongson]) } {
2296 set et_vect_int_saved 1
2300 verbose "check_effective_target_vect_int: returning $et_vect_int_saved" 2
2301 return $et_vect_int_saved
2304 # Return 1 if the target supports signed int->float conversion
2307 proc check_effective_target_vect_intfloat_cvt { } {
2308 global et_vect_intfloat_cvt_saved
2310 if [info exists et_vect_intfloat_cvt_saved] {
2311 verbose "check_effective_target_vect_intfloat_cvt: using cached result" 2
2313 set et_vect_intfloat_cvt_saved 0
2314 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2315 || ([istarget powerpc*-*-*]
2316 && ![istarget powerpc-*-linux*paired*])
2317 || ([istarget arm*-*-*]
2318 && [check_effective_target_arm_neon_ok])} {
2319 set et_vect_intfloat_cvt_saved 1
2323 verbose "check_effective_target_vect_intfloat_cvt: returning $et_vect_intfloat_cvt_saved" 2
2324 return $et_vect_intfloat_cvt_saved
2327 #Return 1 if we're supporting __int128 for target, 0 otherwise.
2329 proc check_effective_target_int128 { } {
2330 return [check_no_compiler_messages int128 object {
2332 #ifndef __SIZEOF_INT128__
2341 # Return 1 if the target supports unsigned int->float conversion
2344 proc check_effective_target_vect_uintfloat_cvt { } {
2345 global et_vect_uintfloat_cvt_saved
2347 if [info exists et_vect_uintfloat_cvt_saved] {
2348 verbose "check_effective_target_vect_uintfloat_cvt: using cached result" 2
2350 set et_vect_uintfloat_cvt_saved 0
2351 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2352 || ([istarget powerpc*-*-*]
2353 && ![istarget powerpc-*-linux*paired*])
2354 || [istarget aarch64*-*-*]
2355 || ([istarget arm*-*-*]
2356 && [check_effective_target_arm_neon_ok])} {
2357 set et_vect_uintfloat_cvt_saved 1
2361 verbose "check_effective_target_vect_uintfloat_cvt: returning $et_vect_uintfloat_cvt_saved" 2
2362 return $et_vect_uintfloat_cvt_saved
2366 # Return 1 if the target supports signed float->int conversion
2369 proc check_effective_target_vect_floatint_cvt { } {
2370 global et_vect_floatint_cvt_saved
2372 if [info exists et_vect_floatint_cvt_saved] {
2373 verbose "check_effective_target_vect_floatint_cvt: using cached result" 2
2375 set et_vect_floatint_cvt_saved 0
2376 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2377 || ([istarget powerpc*-*-*]
2378 && ![istarget powerpc-*-linux*paired*])
2379 || ([istarget arm*-*-*]
2380 && [check_effective_target_arm_neon_ok])} {
2381 set et_vect_floatint_cvt_saved 1
2385 verbose "check_effective_target_vect_floatint_cvt: returning $et_vect_floatint_cvt_saved" 2
2386 return $et_vect_floatint_cvt_saved
2389 # Return 1 if the target supports unsigned float->int conversion
2392 proc check_effective_target_vect_floatuint_cvt { } {
2393 global et_vect_floatuint_cvt_saved
2395 if [info exists et_vect_floatuint_cvt_saved] {
2396 verbose "check_effective_target_vect_floatuint_cvt: using cached result" 2
2398 set et_vect_floatuint_cvt_saved 0
2399 if { ([istarget powerpc*-*-*]
2400 && ![istarget powerpc-*-linux*paired*])
2401 || ([istarget arm*-*-*]
2402 && [check_effective_target_arm_neon_ok])} {
2403 set et_vect_floatuint_cvt_saved 1
2407 verbose "check_effective_target_vect_floatuint_cvt: returning $et_vect_floatuint_cvt_saved" 2
2408 return $et_vect_floatuint_cvt_saved
2411 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
2413 # This won't change for different subtargets so cache the result.
2415 proc check_effective_target_vect_simd_clones { } {
2416 global et_vect_simd_clones_saved
2418 if [info exists et_vect_simd_clones_saved] {
2419 verbose "check_effective_target_vect_simd_clones: using cached result" 2
2421 set et_vect_simd_clones_saved 0
2422 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2423 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx and
2424 # avx2 clone. Only the right clone for the specified arch will be
2425 # chosen, but still we need to at least be able to assemble
2427 if { [check_effective_target_avx2] } {
2428 set et_vect_simd_clones_saved 1
2433 verbose "check_effective_target_vect_simd_clones: returning $et_vect_simd_clones_saved" 2
2434 return $et_vect_simd_clones_saved
2437 # Return 1 if this is a AArch64 target supporting big endian
2438 proc check_effective_target_aarch64_big_endian { } {
2439 return [check_no_compiler_messages aarch64_big_endian assembly {
2440 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
2441 #error !__aarch64__ || !__AARCH64EB__
2446 # Return 1 if this is a AArch64 target supporting little endian
2447 proc check_effective_target_aarch64_little_endian { } {
2448 if { ![istarget aarch64*-*-*] } {
2452 return [check_no_compiler_messages aarch64_little_endian assembly {
2453 #if !defined(__aarch64__) || defined(__AARCH64EB__)
2459 # Return 1 if this is an arm target using 32-bit instructions
2460 proc check_effective_target_arm32 { } {
2461 if { ![istarget arm*-*-*] } {
2465 return [check_no_compiler_messages arm32 assembly {
2466 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
2467 #error !__arm || __thumb__ && !__thumb2__
2472 # Return 1 if this is an arm target not using Thumb
2473 proc check_effective_target_arm_nothumb { } {
2474 if { ![istarget arm*-*-*] } {
2478 return [check_no_compiler_messages arm_nothumb assembly {
2479 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
2480 #error !__arm__ || __thumb || __thumb2__
2485 # Return 1 if this is a little-endian ARM target
2486 proc check_effective_target_arm_little_endian { } {
2487 if { ![istarget arm*-*-*] } {
2491 return [check_no_compiler_messages arm_little_endian assembly {
2492 #if !defined(__arm__) || !defined(__ARMEL__)
2493 #error !__arm__ || !__ARMEL__
2498 # Return 1 if this is an ARM target that only supports aligned vector accesses
2499 proc check_effective_target_arm_vect_no_misalign { } {
2500 if { ![istarget arm*-*-*] } {
2504 return [check_no_compiler_messages arm_vect_no_misalign assembly {
2505 #if !defined(__arm__) \
2506 || (defined(__ARM_FEATURE_UNALIGNED) \
2507 && defined(__ARMEL__))
2508 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
2514 # Return 1 if this is an ARM target supporting -mfpu=vfp
2515 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
2518 proc check_effective_target_arm_vfp_ok { } {
2519 if { [check_effective_target_arm32] } {
2520 return [check_no_compiler_messages arm_vfp_ok object {
2522 } "-mfpu=vfp -mfloat-abi=softfp"]
2528 # Return 1 if this is an ARM target supporting -mfpu=vfp3
2529 # -mfloat-abi=softfp.
2531 proc check_effective_target_arm_vfp3_ok { } {
2532 if { [check_effective_target_arm32] } {
2533 return [check_no_compiler_messages arm_vfp3_ok object {
2535 } "-mfpu=vfp3 -mfloat-abi=softfp"]
2541 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
2542 # -mfloat-abi=softfp.
2543 proc check_effective_target_arm_v8_vfp_ok {} {
2544 if { [check_effective_target_arm32] } {
2545 return [check_no_compiler_messages arm_v8_vfp_ok object {
2548 __asm__ volatile ("vrinta.f32.f32 s0, s0");
2551 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
2557 # Return 1 if this is an ARM target supporting -mfpu=vfp
2558 # -mfloat-abi=hard. Some multilibs may be incompatible with these
2561 proc check_effective_target_arm_hard_vfp_ok { } {
2562 if { [check_effective_target_arm32]
2563 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
2564 return [check_no_compiler_messages arm_hard_vfp_ok executable {
2565 int main() { return 0;}
2566 } "-mfpu=vfp -mfloat-abi=hard"]
2572 # Return 1 if this is an ARM target that supports DSP multiply with
2573 # current multilib flags.
2575 proc check_effective_target_arm_dsp { } {
2576 return [check_no_compiler_messages arm_dsp assembly {
2577 #ifndef __ARM_FEATURE_DSP
2584 # Return 1 if this is an ARM target that supports unaligned word/halfword
2585 # load/store instructions.
2587 proc check_effective_target_arm_unaligned { } {
2588 return [check_no_compiler_messages arm_unaligned assembly {
2589 #ifndef __ARM_FEATURE_UNALIGNED
2590 #error no unaligned support
2596 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2597 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2598 # incompatible with these options. Also set et_arm_crypto_flags to the
2599 # best options to add.
2601 proc check_effective_target_arm_crypto_ok_nocache { } {
2602 global et_arm_crypto_flags
2603 set et_arm_crypto_flags ""
2604 if { [check_effective_target_arm32] } {
2605 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
2606 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
2607 #include "arm_neon.h"
2609 foo (uint8x16_t a, uint8x16_t b)
2611 return vaeseq_u8 (a, b);
2614 set et_arm_crypto_flags $flags
2623 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2625 proc check_effective_target_arm_crypto_ok { } {
2626 return [check_cached_effective_target arm_crypto_ok \
2627 check_effective_target_arm_crypto_ok_nocache]
2630 # Add options for crypto extensions.
2631 proc add_options_for_arm_crypto { flags } {
2632 if { ! [check_effective_target_arm_crypto_ok] } {
2635 global et_arm_crypto_flags
2636 return "$flags $et_arm_crypto_flags"
2639 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2640 # or -mfloat-abi=hard, but if one is already specified by the
2641 # multilib, use it. Similarly, if a -mfpu option already enables
2642 # NEON, do not add -mfpu=neon.
2644 proc add_options_for_arm_neon { flags } {
2645 if { ! [check_effective_target_arm_neon_ok] } {
2648 global et_arm_neon_flags
2649 return "$flags $et_arm_neon_flags"
2652 proc add_options_for_arm_v8_vfp { flags } {
2653 if { ! [check_effective_target_arm_v8_vfp_ok] } {
2656 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
2659 proc add_options_for_arm_v8_neon { flags } {
2660 if { ! [check_effective_target_arm_v8_neon_ok] } {
2663 global et_arm_v8_neon_flags
2664 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
2667 proc add_options_for_arm_crc { flags } {
2668 if { ! [check_effective_target_arm_crc_ok] } {
2671 global et_arm_crc_flags
2672 return "$flags $et_arm_crc_flags"
2675 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2676 # or -mfloat-abi=hard, but if one is already specified by the
2677 # multilib, use it. Similarly, if a -mfpu option already enables
2678 # NEON, do not add -mfpu=neon.
2680 proc add_options_for_arm_neonv2 { flags } {
2681 if { ! [check_effective_target_arm_neonv2_ok] } {
2684 global et_arm_neonv2_flags
2685 return "$flags $et_arm_neonv2_flags"
2688 # Add the options needed for vfp3.
2689 proc add_options_for_arm_vfp3 { flags } {
2690 if { ! [check_effective_target_arm_vfp3_ok] } {
2693 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
2696 # Return 1 if this is an ARM target supporting -mfpu=neon
2697 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2698 # incompatible with these options. Also set et_arm_neon_flags to the
2699 # best options to add.
2701 proc check_effective_target_arm_neon_ok_nocache { } {
2702 global et_arm_neon_flags
2703 set et_arm_neon_flags ""
2704 if { [check_effective_target_arm32] } {
2705 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp"} {
2706 if { [check_no_compiler_messages_nocache arm_neon_ok object {
2707 #include "arm_neon.h"
2709 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
2710 configured for -mcpu=arm926ej-s, for example. */
2712 #error Architecture too old for NEON.
2715 set et_arm_neon_flags $flags
2724 proc check_effective_target_arm_neon_ok { } {
2725 return [check_cached_effective_target arm_neon_ok \
2726 check_effective_target_arm_neon_ok_nocache]
2729 proc check_effective_target_arm_crc_ok_nocache { } {
2730 global et_arm_crc_flags
2731 set et_arm_crc_flags "-march=armv8-a+crc"
2732 return [check_no_compiler_messages_nocache arm_crc_ok object {
2733 #if !defined (__ARM_FEATURE_CRC32)
2736 } "$et_arm_crc_flags"]
2739 proc check_effective_target_arm_crc_ok { } {
2740 return [check_cached_effective_target arm_crc_ok \
2741 check_effective_target_arm_crc_ok_nocache]
2744 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
2745 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2746 # incompatible with these options. Also set et_arm_neon_flags to the
2747 # best options to add.
2749 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
2750 global et_arm_neon_fp16_flags
2751 set et_arm_neon_fp16_flags ""
2752 if { [check_effective_target_arm32] } {
2753 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
2754 "-mfpu=neon-fp16 -mfloat-abi=softfp"
2755 "-mfp16-format=ieee"
2756 "-mfloat-abi=softfp -mfp16-format=ieee"
2757 "-mfpu=neon-fp16 -mfp16-format=ieee"
2758 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
2759 if { [check_no_compiler_messages_nocache arm_neon_fp_16_ok object {
2760 #include "arm_neon.h"
2762 foo (float32x4_t arg)
2764 return vcvt_f16_f32 (arg);
2767 set et_arm_neon_fp16_flags $flags
2776 proc check_effective_target_arm_neon_fp16_ok { } {
2777 return [check_cached_effective_target arm_neon_fp16_ok \
2778 check_effective_target_arm_neon_fp16_ok_nocache]
2781 proc add_options_for_arm_neon_fp16 { flags } {
2782 if { ! [check_effective_target_arm_neon_fp16_ok] } {
2785 global et_arm_neon_fp16_flags
2786 return "$flags $et_arm_neon_fp16_flags"
2789 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
2790 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2791 # incompatible with these options. Also set et_arm_v8_neon_flags to the
2792 # best options to add.
2794 proc check_effective_target_arm_v8_neon_ok_nocache { } {
2795 global et_arm_v8_neon_flags
2796 set et_arm_v8_neon_flags ""
2797 if { [check_effective_target_arm32] } {
2798 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
2799 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
2801 #error not armv8 or later
2803 #include "arm_neon.h"
2807 __asm__ volatile ("vrintn.f32 q0, q0");
2809 } "$flags -march=armv8-a"] } {
2810 set et_arm_v8_neon_flags $flags
2819 proc check_effective_target_arm_v8_neon_ok { } {
2820 return [check_cached_effective_target arm_v8_neon_ok \
2821 check_effective_target_arm_v8_neon_ok_nocache]
2824 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
2825 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2826 # incompatible with these options. Also set et_arm_neonv2_flags to the
2827 # best options to add.
2829 proc check_effective_target_arm_neonv2_ok_nocache { } {
2830 global et_arm_neonv2_flags
2831 set et_arm_neonv2_flags ""
2832 if { [check_effective_target_arm32] } {
2833 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
2834 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
2835 #include "arm_neon.h"
2837 foo (float32x2_t a, float32x2_t b, float32x2_t c)
2839 return vfma_f32 (a, b, c);
2842 set et_arm_neonv2_flags $flags
2851 proc check_effective_target_arm_neonv2_ok { } {
2852 return [check_cached_effective_target arm_neonv2_ok \
2853 check_effective_target_arm_neonv2_ok_nocache]
2856 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2857 # or -mfloat-abi=hard, but if one is already specified by the
2860 proc add_options_for_arm_fp16 { flags } {
2861 if { ! [check_effective_target_arm_fp16_ok] } {
2864 global et_arm_fp16_flags
2865 return "$flags $et_arm_fp16_flags"
2868 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
2869 # Skip multilibs that are incompatible with these options and set
2870 # et_arm_fp16_flags to the best options to add.
2872 proc check_effective_target_arm_fp16_ok_nocache { } {
2873 global et_arm_fp16_flags
2874 set et_arm_fp16_flags ""
2875 if { ! [check_effective_target_arm32] } {
2878 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" "-mfpu=*fpv[1-9][0-9]*" } ]] {
2879 # Multilib flags would override -mfpu.
2882 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
2883 # Must generate floating-point instructions.
2886 if [check_effective_target_arm_hf_eabi] {
2887 # Use existing float-abi and force an fpu which supports fp16
2888 set et_arm_fp16_flags "-mfpu=vfpv4"
2891 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
2892 # The existing -mfpu value is OK; use it, but add softfp.
2893 set et_arm_fp16_flags "-mfloat-abi=softfp"
2896 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
2897 # macro to check for this support.
2898 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
2899 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
2902 set et_arm_fp16_flags "$flags"
2909 proc check_effective_target_arm_fp16_ok { } {
2910 return [check_cached_effective_target arm_fp16_ok \
2911 check_effective_target_arm_fp16_ok_nocache]
2914 # Creates a series of routines that return 1 if the given architecture
2915 # can be selected and a routine to give the flags to select that architecture
2916 # Note: Extra flags may be added to disable options from newer compilers
2917 # (Thumb in particular - but others may be added in the future)
2918 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
2919 # /* { dg-add-options arm_arch_v5 } */
2920 # /* { dg-require-effective-target arm_arch_v5_multilib } */
2921 foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__
2922 v4t "-march=armv4t" __ARM_ARCH_4T__
2923 v5 "-march=armv5 -marm" __ARM_ARCH_5__
2924 v5t "-march=armv5t" __ARM_ARCH_5T__
2925 v5te "-march=armv5te" __ARM_ARCH_5TE__
2926 v6 "-march=armv6" __ARM_ARCH_6__
2927 v6k "-march=armv6k" __ARM_ARCH_6K__
2928 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
2929 v6z "-march=armv6z" __ARM_ARCH_6Z__
2930 v6m "-march=armv6-m -mthumb" __ARM_ARCH_6M__
2931 v7a "-march=armv7-a" __ARM_ARCH_7A__
2932 v7ve "-march=armv7ve" __ARM_ARCH_7A__
2933 v7r "-march=armv7-r" __ARM_ARCH_7R__
2934 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
2935 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
2936 v8a "-march=armv8-a" __ARM_ARCH_8A__ } {
2937 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
2938 proc check_effective_target_arm_arch_FUNC_ok { } {
2939 if { [ string match "*-marm*" "FLAG" ] &&
2940 ![check_effective_target_arm_arm_ok] } {
2943 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
2950 proc add_options_for_arm_arch_FUNC { flags } {
2951 return "$flags FLAG"
2954 proc check_effective_target_arm_arch_FUNC_multilib { } {
2955 return [check_runtime arm_arch_FUNC_multilib {
2961 } [add_options_for_arm_arch_FUNC ""]]
2966 # Return 1 if this is an ARM target where -marm causes ARM to be
2969 proc check_effective_target_arm_arm_ok { } {
2970 return [check_no_compiler_messages arm_arm_ok assembly {
2971 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
2972 #error !__arm__ || __thumb__ || __thumb2__
2978 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
2981 proc check_effective_target_arm_thumb1_ok { } {
2982 return [check_no_compiler_messages arm_thumb1_ok assembly {
2983 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
2984 #error !__arm__ || !__thumb__ || __thumb2__
2986 int foo (int i) { return i; }
2990 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
2993 proc check_effective_target_arm_thumb2_ok { } {
2994 return [check_no_compiler_messages arm_thumb2_ok assembly {
2995 #if !defined(__thumb2__)
2998 int foo (int i) { return i; }
3002 # Return 1 if this is an ARM target where Thumb-1 is used without options
3003 # added by the test.
3005 proc check_effective_target_arm_thumb1 { } {
3006 return [check_no_compiler_messages arm_thumb1 assembly {
3007 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3008 #error !__arm__ || !__thumb__ || __thumb2__
3014 # Return 1 if this is an ARM target where Thumb-2 is used without options
3015 # added by the test.
3017 proc check_effective_target_arm_thumb2 { } {
3018 return [check_no_compiler_messages arm_thumb2 assembly {
3019 #if !defined(__thumb2__)
3026 # Return 1 if this is an ARM target where conditional execution is available.
3028 proc check_effective_target_arm_cond_exec { } {
3029 return [check_no_compiler_messages arm_cond_exec assembly {
3030 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
3037 # Return 1 if this is an ARM cortex-M profile cpu
3039 proc check_effective_target_arm_cortex_m { } {
3040 if { ![istarget arm*-*-*] } {
3043 return [check_no_compiler_messages arm_cortex_m assembly {
3044 #if !defined(__ARM_ARCH_7M__) \
3045 && !defined (__ARM_ARCH_7EM__) \
3046 && !defined (__ARM_ARCH_6M__)
3047 #error !__ARM_ARCH_7M__ && !__ARM_ARCH_7EM__ && !__ARM_ARCH_6M__
3053 # Return 1 if this compilation turns on string_ops_prefer_neon on.
3055 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
3056 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
3057 int foo (void) { return 0; }
3058 } "-O2 -mprint-tune-info" ]
3061 # Return 1 if the target supports executing NEON instructions, 0
3062 # otherwise. Cache the result.
3064 proc check_effective_target_arm_neon_hw { } {
3065 return [check_runtime arm_neon_hw_available {
3069 long long a = 0, b = 1;
3070 asm ("vorr %P0, %P1, %P2"
3072 : "0" (a), "w" (b));
3075 } [add_options_for_arm_neon ""]]
3078 proc check_effective_target_arm_neonv2_hw { } {
3079 return [check_runtime arm_neon_hwv2_available {
3080 #include "arm_neon.h"
3084 float32x2_t a, b, c;
3085 asm ("vfma.f32 %P0, %P1, %P2"
3087 : "w" (b), "w" (c));
3090 } [add_options_for_arm_neonv2 ""]]
3093 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
3096 proc check_effective_target_arm_v8_neon_hw { } {
3097 return [check_runtime arm_v8_neon_hw_available {
3098 #include "arm_neon.h"
3103 asm ("vrinta.f32 %P0, %P1"
3108 } [add_options_for_arm_v8_neon ""]]
3111 # Return 1 if this is a ARM target with NEON enabled.
3113 proc check_effective_target_arm_neon { } {
3114 if { [check_effective_target_arm32] } {
3115 return [check_no_compiler_messages arm_neon object {
3116 #ifndef __ARM_NEON__
3127 proc check_effective_target_arm_neonv2 { } {
3128 if { [check_effective_target_arm32] } {
3129 return [check_no_compiler_messages arm_neon object {
3130 #ifndef __ARM_NEON__
3133 #ifndef __ARM_FEATURE_FMA
3145 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
3146 # the Loongson vector modes.
3148 proc check_effective_target_mips_loongson { } {
3149 return [check_no_compiler_messages loongson assembly {
3150 #if !defined(__mips_loongson_vector_rev)
3151 #error !__mips_loongson_vector_rev
3156 # Return 1 if this is a MIPS target that supports the legacy NAN.
3158 proc check_effective_target_mips_nanlegacy { } {
3159 return [check_no_compiler_messages nanlegacy assembly {
3161 int main () { return 0; }
3165 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
3168 proc check_effective_target_arm_eabi { } {
3169 return [check_no_compiler_messages arm_eabi object {
3170 #ifndef __ARM_EABI__
3178 # Return 1 if this is an ARM target that adheres to the hard-float variant of
3179 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
3181 proc check_effective_target_arm_hf_eabi { } {
3182 return [check_no_compiler_messages arm_hf_eabi object {
3183 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
3184 #error not hard-float EABI
3191 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
3192 # Some multilibs may be incompatible with this option.
3194 proc check_effective_target_arm_iwmmxt_ok { } {
3195 if { [check_effective_target_arm32] } {
3196 return [check_no_compiler_messages arm_iwmmxt_ok object {
3204 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
3205 # for an ARM target.
3206 proc check_effective_target_arm_prefer_ldrd_strd { } {
3207 if { ![check_effective_target_arm32] } {
3211 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
3212 void foo (int *p) { p[0] = 1; p[1] = 0;}
3216 # Return 1 if this is a PowerPC target supporting -meabi.
3218 proc check_effective_target_powerpc_eabi_ok { } {
3219 if { [istarget powerpc*-*-*] } {
3220 return [check_no_compiler_messages powerpc_eabi_ok object {
3228 # Return 1 if this is a PowerPC target with floating-point registers.
3230 proc check_effective_target_powerpc_fprs { } {
3231 if { [istarget powerpc*-*-*]
3232 || [istarget rs6000-*-*] } {
3233 return [check_no_compiler_messages powerpc_fprs object {
3245 # Return 1 if this is a PowerPC target with hardware double-precision
3248 proc check_effective_target_powerpc_hard_double { } {
3249 if { [istarget powerpc*-*-*]
3250 || [istarget rs6000-*-*] } {
3251 return [check_no_compiler_messages powerpc_hard_double object {
3263 # Return 1 if this is a PowerPC target supporting -maltivec.
3265 proc check_effective_target_powerpc_altivec_ok { } {
3266 if { ([istarget powerpc*-*-*]
3267 && ![istarget powerpc-*-linux*paired*])
3268 || [istarget rs6000-*-*] } {
3269 # AltiVec is not supported on AIX before 5.3.
3270 if { [istarget powerpc*-*-aix4*]
3271 || [istarget powerpc*-*-aix5.1*]
3272 || [istarget powerpc*-*-aix5.2*] } {
3275 return [check_no_compiler_messages powerpc_altivec_ok object {
3283 # Return 1 if this is a PowerPC target supporting -mpower8-vector
3285 proc check_effective_target_powerpc_p8vector_ok { } {
3286 if { ([istarget powerpc*-*-*]
3287 && ![istarget powerpc-*-linux*paired*])
3288 || [istarget rs6000-*-*] } {
3289 # AltiVec is not supported on AIX before 5.3.
3290 if { [istarget powerpc*-*-aix4*]
3291 || [istarget powerpc*-*-aix5.1*]
3292 || [istarget powerpc*-*-aix5.2*] } {
3295 return [check_no_compiler_messages powerpc_p8vector_ok object {
3298 asm volatile ("xxlorc vs0,vs0,vs0");
3300 asm volatile ("xxlorc 0,0,0");
3304 } "-mpower8-vector"]
3310 # Return 1 if this is a PowerPC target supporting -mvsx
3312 proc check_effective_target_powerpc_vsx_ok { } {
3313 if { ([istarget powerpc*-*-*]
3314 && ![istarget powerpc-*-linux*paired*])
3315 || [istarget rs6000-*-*] } {
3316 # VSX is not supported on AIX before 7.1.
3317 if { [istarget powerpc*-*-aix4*]
3318 || [istarget powerpc*-*-aix5*]
3319 || [istarget powerpc*-*-aix6*] } {
3322 return [check_no_compiler_messages powerpc_vsx_ok object {
3325 asm volatile ("xxlor vs0,vs0,vs0");
3327 asm volatile ("xxlor 0,0,0");
3337 # Return 1 if this is a PowerPC target supporting -mhtm
3339 proc check_effective_target_powerpc_htm_ok { } {
3340 if { ([istarget powerpc*-*-*]
3341 && ![istarget powerpc-*-linux*paired*])
3342 || [istarget rs6000-*-*] } {
3343 # HTM is not supported on AIX yet.
3344 if { [istarget powerpc*-*-aix*] } {
3347 return [check_no_compiler_messages powerpc_htm_ok object {
3349 asm volatile ("tbegin. 0");
3358 # Return 1 if the target supports executing HTM hardware instructions,
3359 # 0 otherwise. Cache the result.
3361 proc check_htm_hw_available { } {
3362 return [check_cached_effective_target htm_hw_available {
3363 # For now, disable on Darwin
3364 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
3367 check_runtime_nocache htm_hw_available {
3377 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
3379 proc check_effective_target_powerpc_ppu_ok { } {
3380 if [check_effective_target_powerpc_altivec_ok] {
3381 return [check_no_compiler_messages cell_asm_available object {
3384 asm volatile ("lvlx v0,v0,v0");
3386 asm volatile ("lvlx 0,0,0");
3396 # Return 1 if this is a PowerPC target that supports SPU.
3398 proc check_effective_target_powerpc_spu { } {
3399 if { [istarget powerpc*-*-linux*] } {
3400 return [check_effective_target_powerpc_altivec_ok]
3406 # Return 1 if this is a PowerPC SPE target. The check includes options
3407 # specified by dg-options for this test, so don't cache the result.
3409 proc check_effective_target_powerpc_spe_nocache { } {
3410 if { [istarget powerpc*-*-*] } {
3411 return [check_no_compiler_messages_nocache powerpc_spe object {
3417 } [current_compiler_flags]]
3423 # Return 1 if this is a PowerPC target with SPE enabled.
3425 proc check_effective_target_powerpc_spe { } {
3426 if { [istarget powerpc*-*-*] } {
3427 return [check_no_compiler_messages powerpc_spe object {
3439 # Return 1 if this is a PowerPC target with Altivec enabled.
3441 proc check_effective_target_powerpc_altivec { } {
3442 if { [istarget powerpc*-*-*] } {
3443 return [check_no_compiler_messages powerpc_altivec object {
3455 # Return 1 if this is a PowerPC 405 target. The check includes options
3456 # specified by dg-options for this test, so don't cache the result.
3458 proc check_effective_target_powerpc_405_nocache { } {
3459 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
3460 return [check_no_compiler_messages_nocache powerpc_405 object {
3466 } [current_compiler_flags]]
3472 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
3474 proc check_effective_target_powerpc_elfv2 { } {
3475 if { [istarget powerpc*-*-*] } {
3476 return [check_no_compiler_messages powerpc_elfv2 object {
3478 #error not ELF v2 ABI
3488 # Return 1 if this is a SPU target with a toolchain that
3489 # supports automatic overlay generation.
3491 proc check_effective_target_spu_auto_overlay { } {
3492 if { [istarget spu*-*-elf*] } {
3493 return [check_no_compiler_messages spu_auto_overlay executable {
3495 } "-Wl,--auto-overlay" ]
3501 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
3502 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
3503 # test environment appears to run executables on such a simulator.
3505 proc check_effective_target_ultrasparc_hw { } {
3506 return [check_runtime ultrasparc_hw {
3507 int main() { return 0; }
3508 } "-mcpu=ultrasparc"]
3511 # Return 1 if the test environment supports executing UltraSPARC VIS2
3512 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
3514 proc check_effective_target_ultrasparc_vis2_hw { } {
3515 return [check_runtime ultrasparc_vis2_hw {
3516 int main() { __asm__(".word 0x81b00320"); return 0; }
3517 } "-mcpu=ultrasparc3"]
3520 # Return 1 if the test environment supports executing UltraSPARC VIS3
3521 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
3523 proc check_effective_target_ultrasparc_vis3_hw { } {
3524 return [check_runtime ultrasparc_vis3_hw {
3525 int main() { __asm__(".word 0x81b00220"); return 0; }
3529 # Return 1 if this is a SPARC-V9 target.
3531 proc check_effective_target_sparc_v9 { } {
3532 if { [istarget sparc*-*-*] } {
3533 return [check_no_compiler_messages sparc_v9 object {
3535 asm volatile ("return %i7+8");
3544 # Return 1 if this is a SPARC target with VIS enabled.
3546 proc check_effective_target_sparc_vis { } {
3547 if { [istarget sparc*-*-*] } {
3548 return [check_no_compiler_messages sparc_vis object {
3560 # Return 1 if the target supports hardware vector shift operation.
3562 proc check_effective_target_vect_shift { } {
3563 global et_vect_shift_saved
3565 if [info exists et_vect_shift_saved] {
3566 verbose "check_effective_target_vect_shift: using cached result" 2
3568 set et_vect_shift_saved 0
3569 if { ([istarget powerpc*-*-*]
3570 && ![istarget powerpc-*-linux*paired*])
3571 || [istarget ia64-*-*]
3572 || [istarget i?86-*-*] || [istarget x86_64-*-*]
3573 || [istarget aarch64*-*-*]
3574 || [check_effective_target_arm32]
3575 || ([istarget mips*-*-*]
3576 && [check_effective_target_mips_loongson]) } {
3577 set et_vect_shift_saved 1
3581 verbose "check_effective_target_vect_shift: returning $et_vect_shift_saved" 2
3582 return $et_vect_shift_saved
3585 proc check_effective_target_whole_vector_shift { } {
3586 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3587 || [istarget ia64-*-*]
3588 || [istarget aarch64*-*-*]
3589 || ([check_effective_target_arm32]
3590 && [check_effective_target_arm_little_endian])
3591 || ([istarget mips*-*-*]
3592 && [check_effective_target_mips_loongson]) } {
3598 verbose "check_effective_target_vect_long: returning $answer" 2
3602 # Return 1 if the target supports vector bswap operations.
3604 proc check_effective_target_vect_bswap { } {
3605 global et_vect_bswap_saved
3607 if [info exists et_vect_bswap_saved] {
3608 verbose "check_effective_target_vect_bswap: using cached result" 2
3610 set et_vect_bswap_saved 0
3611 if { [istarget aarch64*-*-*]
3612 || ([istarget arm*-*-*]
3613 && [check_effective_target_arm_neon])
3615 set et_vect_bswap_saved 1
3619 verbose "check_effective_target_vect_bswap: returning $et_vect_bswap_saved" 2
3620 return $et_vect_bswap_saved
3623 # Return 1 if the target supports hardware vector shift operation for char.
3625 proc check_effective_target_vect_shift_char { } {
3626 global et_vect_shift_char_saved
3628 if [info exists et_vect_shift_char_saved] {
3629 verbose "check_effective_target_vect_shift_char: using cached result" 2
3631 set et_vect_shift_char_saved 0
3632 if { ([istarget powerpc*-*-*]
3633 && ![istarget powerpc-*-linux*paired*])
3634 || [check_effective_target_arm32] } {
3635 set et_vect_shift_char_saved 1
3639 verbose "check_effective_target_vect_shift_char: returning $et_vect_shift_char_saved" 2
3640 return $et_vect_shift_char_saved
3643 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
3645 # This can change for different subtargets so do not cache the result.
3647 proc check_effective_target_vect_long { } {
3648 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3649 || (([istarget powerpc*-*-*]
3650 && ![istarget powerpc-*-linux*paired*])
3651 && [check_effective_target_ilp32])
3652 || [check_effective_target_arm32]
3653 || ([istarget sparc*-*-*] && [check_effective_target_ilp32]) } {
3659 verbose "check_effective_target_vect_long: returning $answer" 2
3663 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
3665 # This won't change for different subtargets so cache the result.
3667 proc check_effective_target_vect_float { } {
3668 global et_vect_float_saved
3670 if [info exists et_vect_float_saved] {
3671 verbose "check_effective_target_vect_float: using cached result" 2
3673 set et_vect_float_saved 0
3674 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3675 || [istarget powerpc*-*-*]
3676 || [istarget spu-*-*]
3677 || [istarget mips-sde-elf]
3678 || [istarget mipsisa64*-*-*]
3679 || [istarget ia64-*-*]
3680 || [istarget aarch64*-*-*]
3681 || [check_effective_target_arm32] } {
3682 set et_vect_float_saved 1
3686 verbose "check_effective_target_vect_float: returning $et_vect_float_saved" 2
3687 return $et_vect_float_saved
3690 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
3692 # This won't change for different subtargets so cache the result.
3694 proc check_effective_target_vect_double { } {
3695 global et_vect_double_saved
3697 if [info exists et_vect_double_saved] {
3698 verbose "check_effective_target_vect_double: using cached result" 2
3700 set et_vect_double_saved 0
3701 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3702 || [istarget aarch64*-*-*] } {
3703 if { [check_no_compiler_messages vect_double assembly {
3704 #ifdef __tune_atom__
3705 # error No double vectorizer support.
3708 set et_vect_double_saved 1
3710 set et_vect_double_saved 0
3712 } elseif { [istarget spu-*-*] } {
3713 set et_vect_double_saved 1
3714 } elseif { [istarget powerpc*-*-*] && [check_vsx_hw_available] } {
3715 set et_vect_double_saved 1
3719 verbose "check_effective_target_vect_double: returning $et_vect_double_saved" 2
3720 return $et_vect_double_saved
3723 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
3725 # This won't change for different subtargets so cache the result.
3727 proc check_effective_target_vect_long_long { } {
3728 global et_vect_long_long_saved
3730 if [info exists et_vect_long_long_saved] {
3731 verbose "check_effective_target_vect_long_long: using cached result" 2
3733 set et_vect_long_long_saved 0
3734 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
3735 set et_vect_long_long_saved 1
3739 verbose "check_effective_target_vect_long_long: returning $et_vect_long_long_saved" 2
3740 return $et_vect_long_long_saved
3744 # Return 1 if the target plus current options does not support a vector
3745 # max instruction on "int", 0 otherwise.
3747 # This won't change for different subtargets so cache the result.
3749 proc check_effective_target_vect_no_int_min_max { } {
3750 global et_vect_no_int_min_max_saved
3752 if [info exists et_vect_no_int_min_max_saved] {
3753 verbose "check_effective_target_vect_no_int_min_max: using cached result" 2
3755 set et_vect_no_int_min_max_saved 0
3756 if { [istarget sparc*-*-*]
3757 || [istarget spu-*-*]
3758 || [istarget alpha*-*-*]
3759 || ([istarget mips*-*-*]
3760 && [check_effective_target_mips_loongson]) } {
3761 set et_vect_no_int_min_max_saved 1
3764 verbose "check_effective_target_vect_no_int_min_max: returning $et_vect_no_int_min_max_saved" 2
3765 return $et_vect_no_int_min_max_saved
3768 # Return 1 if the target plus current options does not support a vector
3769 # add instruction on "int", 0 otherwise.
3771 # This won't change for different subtargets so cache the result.
3773 proc check_effective_target_vect_no_int_add { } {
3774 global et_vect_no_int_add_saved
3776 if [info exists et_vect_no_int_add_saved] {
3777 verbose "check_effective_target_vect_no_int_add: using cached result" 2
3779 set et_vect_no_int_add_saved 0
3780 # Alpha only supports vector add on V8QI and V4HI.
3781 if { [istarget alpha*-*-*] } {
3782 set et_vect_no_int_add_saved 1
3785 verbose "check_effective_target_vect_no_int_add: returning $et_vect_no_int_add_saved" 2
3786 return $et_vect_no_int_add_saved
3789 # Return 1 if the target plus current options does not support vector
3790 # bitwise instructions, 0 otherwise.
3792 # This won't change for different subtargets so cache the result.
3794 proc check_effective_target_vect_no_bitwise { } {
3795 global et_vect_no_bitwise_saved
3797 if [info exists et_vect_no_bitwise_saved] {
3798 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
3800 set et_vect_no_bitwise_saved 0
3802 verbose "check_effective_target_vect_no_bitwise: returning $et_vect_no_bitwise_saved" 2
3803 return $et_vect_no_bitwise_saved
3806 # Return 1 if the target plus current options supports vector permutation,
3809 # This won't change for different subtargets so cache the result.
3811 proc check_effective_target_vect_perm { } {
3814 if [info exists et_vect_perm_saved] {
3815 verbose "check_effective_target_vect_perm: using cached result" 2
3817 set et_vect_perm_saved 0
3818 if { [is-effective-target arm_neon_ok]
3819 || [istarget aarch64*-*-*]
3820 || [istarget powerpc*-*-*]
3821 || [istarget spu-*-*]
3822 || [istarget i?86-*-*] || [istarget x86_64-*-*]
3823 || ([istarget mips*-*-*]
3824 && [check_effective_target_mpaired_single]) } {
3825 set et_vect_perm_saved 1
3828 verbose "check_effective_target_vect_perm: returning $et_vect_perm_saved" 2
3829 return $et_vect_perm_saved
3832 # Return 1 if the target plus current options supports vector permutation
3833 # on byte-sized elements, 0 otherwise.
3835 # This won't change for different subtargets so cache the result.
3837 proc check_effective_target_vect_perm_byte { } {
3838 global et_vect_perm_byte
3840 if [info exists et_vect_perm_byte_saved] {
3841 verbose "check_effective_target_vect_perm_byte: using cached result" 2
3843 set et_vect_perm_byte_saved 0
3844 if { ([is-effective-target arm_neon_ok]
3845 && [is-effective-target arm_little_endian])
3846 || ([istarget aarch64*-*-*]
3847 && [is-effective-target aarch64_little_endian])
3848 || [istarget powerpc*-*-*]
3849 || [istarget spu-*-*] } {
3850 set et_vect_perm_byte_saved 1
3853 verbose "check_effective_target_vect_perm_byte: returning $et_vect_perm_byte_saved" 2
3854 return $et_vect_perm_byte_saved
3857 # Return 1 if the target plus current options supports vector permutation
3858 # on short-sized elements, 0 otherwise.
3860 # This won't change for different subtargets so cache the result.
3862 proc check_effective_target_vect_perm_short { } {
3863 global et_vect_perm_short
3865 if [info exists et_vect_perm_short_saved] {
3866 verbose "check_effective_target_vect_perm_short: using cached result" 2
3868 set et_vect_perm_short_saved 0
3869 if { ([is-effective-target arm_neon_ok]
3870 && [is-effective-target arm_little_endian])
3871 || ([istarget aarch64*-*-*]
3872 && [is-effective-target aarch64_little_endian])
3873 || [istarget powerpc*-*-*]
3874 || [istarget spu-*-*] } {
3875 set et_vect_perm_short_saved 1
3878 verbose "check_effective_target_vect_perm_short: returning $et_vect_perm_short_saved" 2
3879 return $et_vect_perm_short_saved
3882 # Return 1 if the target plus current options supports a vector
3883 # widening summation of *short* args into *int* result, 0 otherwise.
3885 # This won't change for different subtargets so cache the result.
3887 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
3888 global et_vect_widen_sum_hi_to_si_pattern
3890 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved] {
3891 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: using cached result" 2
3893 set et_vect_widen_sum_hi_to_si_pattern_saved 0
3894 if { [istarget powerpc*-*-*]
3895 || [istarget ia64-*-*] } {
3896 set et_vect_widen_sum_hi_to_si_pattern_saved 1
3899 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: returning $et_vect_widen_sum_hi_to_si_pattern_saved" 2
3900 return $et_vect_widen_sum_hi_to_si_pattern_saved
3903 # Return 1 if the target plus current options supports a vector
3904 # widening summation of *short* args into *int* result, 0 otherwise.
3905 # A target can also support this widening summation if it can support
3906 # promotion (unpacking) from shorts to ints.
3908 # This won't change for different subtargets so cache the result.
3910 proc check_effective_target_vect_widen_sum_hi_to_si { } {
3911 global et_vect_widen_sum_hi_to_si
3913 if [info exists et_vect_widen_sum_hi_to_si_saved] {
3914 verbose "check_effective_target_vect_widen_sum_hi_to_si: using cached result" 2
3916 set et_vect_widen_sum_hi_to_si_saved [check_effective_target_vect_unpack]
3917 if { [istarget powerpc*-*-*]
3918 || [istarget ia64-*-*] } {
3919 set et_vect_widen_sum_hi_to_si_saved 1
3922 verbose "check_effective_target_vect_widen_sum_hi_to_si: returning $et_vect_widen_sum_hi_to_si_saved" 2
3923 return $et_vect_widen_sum_hi_to_si_saved
3926 # Return 1 if the target plus current options supports a vector
3927 # widening summation of *char* args into *short* result, 0 otherwise.
3928 # A target can also support this widening summation if it can support
3929 # promotion (unpacking) from chars to shorts.
3931 # This won't change for different subtargets so cache the result.
3933 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
3934 global et_vect_widen_sum_qi_to_hi
3936 if [info exists et_vect_widen_sum_qi_to_hi_saved] {
3937 verbose "check_effective_target_vect_widen_sum_qi_to_hi: using cached result" 2
3939 set et_vect_widen_sum_qi_to_hi_saved 0
3940 if { [check_effective_target_vect_unpack]
3941 || [check_effective_target_arm_neon_ok]
3942 || [istarget ia64-*-*] } {
3943 set et_vect_widen_sum_qi_to_hi_saved 1
3946 verbose "check_effective_target_vect_widen_sum_qi_to_hi: returning $et_vect_widen_sum_qi_to_hi_saved" 2
3947 return $et_vect_widen_sum_qi_to_hi_saved
3950 # Return 1 if the target plus current options supports a vector
3951 # widening summation of *char* args into *int* result, 0 otherwise.
3953 # This won't change for different subtargets so cache the result.
3955 proc check_effective_target_vect_widen_sum_qi_to_si { } {
3956 global et_vect_widen_sum_qi_to_si
3958 if [info exists et_vect_widen_sum_qi_to_si_saved] {
3959 verbose "check_effective_target_vect_widen_sum_qi_to_si: using cached result" 2
3961 set et_vect_widen_sum_qi_to_si_saved 0
3962 if { [istarget powerpc*-*-*] } {
3963 set et_vect_widen_sum_qi_to_si_saved 1
3966 verbose "check_effective_target_vect_widen_sum_qi_to_si: returning $et_vect_widen_sum_qi_to_si_saved" 2
3967 return $et_vect_widen_sum_qi_to_si_saved
3970 # Return 1 if the target plus current options supports a vector
3971 # widening multiplication of *char* args into *short* result, 0 otherwise.
3972 # A target can also support this widening multplication if it can support
3973 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
3974 # multiplication of shorts).
3976 # This won't change for different subtargets so cache the result.
3979 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
3980 global et_vect_widen_mult_qi_to_hi
3982 if [info exists et_vect_widen_mult_qi_to_hi_saved] {
3983 verbose "check_effective_target_vect_widen_mult_qi_to_hi: using cached result" 2
3985 if { [check_effective_target_vect_unpack]
3986 && [check_effective_target_vect_short_mult] } {
3987 set et_vect_widen_mult_qi_to_hi_saved 1
3989 set et_vect_widen_mult_qi_to_hi_saved 0
3991 if { [istarget powerpc*-*-*]
3992 || [istarget aarch64*-*-*]
3993 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
3994 set et_vect_widen_mult_qi_to_hi_saved 1
3997 verbose "check_effective_target_vect_widen_mult_qi_to_hi: returning $et_vect_widen_mult_qi_to_hi_saved" 2
3998 return $et_vect_widen_mult_qi_to_hi_saved
4001 # Return 1 if the target plus current options supports a vector
4002 # widening multiplication of *short* args into *int* result, 0 otherwise.
4003 # A target can also support this widening multplication if it can support
4004 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
4005 # multiplication of ints).
4007 # This won't change for different subtargets so cache the result.
4010 proc check_effective_target_vect_widen_mult_hi_to_si { } {
4011 global et_vect_widen_mult_hi_to_si
4013 if [info exists et_vect_widen_mult_hi_to_si_saved] {
4014 verbose "check_effective_target_vect_widen_mult_hi_to_si: using cached result" 2
4016 if { [check_effective_target_vect_unpack]
4017 && [check_effective_target_vect_int_mult] } {
4018 set et_vect_widen_mult_hi_to_si_saved 1
4020 set et_vect_widen_mult_hi_to_si_saved 0
4022 if { [istarget powerpc*-*-*]
4023 || [istarget spu-*-*]
4024 || [istarget ia64-*-*]
4025 || [istarget aarch64*-*-*]
4026 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4027 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4028 set et_vect_widen_mult_hi_to_si_saved 1
4031 verbose "check_effective_target_vect_widen_mult_hi_to_si: returning $et_vect_widen_mult_hi_to_si_saved" 2
4032 return $et_vect_widen_mult_hi_to_si_saved
4035 # Return 1 if the target plus current options supports a vector
4036 # widening multiplication of *char* args into *short* result, 0 otherwise.
4038 # This won't change for different subtargets so cache the result.
4040 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
4041 global et_vect_widen_mult_qi_to_hi_pattern
4043 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved] {
4044 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: using cached result" 2
4046 set et_vect_widen_mult_qi_to_hi_pattern_saved 0
4047 if { [istarget powerpc*-*-*]
4048 || ([istarget arm*-*-*]
4049 && [check_effective_target_arm_neon_ok]
4050 && [check_effective_target_arm_little_endian]) } {
4051 set et_vect_widen_mult_qi_to_hi_pattern_saved 1
4054 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: returning $et_vect_widen_mult_qi_to_hi_pattern_saved" 2
4055 return $et_vect_widen_mult_qi_to_hi_pattern_saved
4058 # Return 1 if the target plus current options supports a vector
4059 # widening multiplication of *short* args into *int* result, 0 otherwise.
4061 # This won't change for different subtargets so cache the result.
4063 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
4064 global et_vect_widen_mult_hi_to_si_pattern
4066 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved] {
4067 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: using cached result" 2
4069 set et_vect_widen_mult_hi_to_si_pattern_saved 0
4070 if { [istarget powerpc*-*-*]
4071 || [istarget spu-*-*]
4072 || [istarget ia64-*-*]
4073 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4074 || ([istarget arm*-*-*]
4075 && [check_effective_target_arm_neon_ok]
4076 && [check_effective_target_arm_little_endian]) } {
4077 set et_vect_widen_mult_hi_to_si_pattern_saved 1
4080 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: returning $et_vect_widen_mult_hi_to_si_pattern_saved" 2
4081 return $et_vect_widen_mult_hi_to_si_pattern_saved
4084 # Return 1 if the target plus current options supports a vector
4085 # widening multiplication of *int* args into *long* result, 0 otherwise.
4087 # This won't change for different subtargets so cache the result.
4089 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
4090 global et_vect_widen_mult_si_to_di_pattern
4092 if [info exists et_vect_widen_mult_si_to_di_pattern_saved] {
4093 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: using cached result" 2
4095 set et_vect_widen_mult_si_to_di_pattern_saved 0
4096 if {[istarget ia64-*-*]
4097 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4098 set et_vect_widen_mult_si_to_di_pattern_saved 1
4101 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: returning $et_vect_widen_mult_si_to_di_pattern_saved" 2
4102 return $et_vect_widen_mult_si_to_di_pattern_saved
4105 # Return 1 if the target plus current options supports a vector
4106 # widening shift, 0 otherwise.
4108 # This won't change for different subtargets so cache the result.
4110 proc check_effective_target_vect_widen_shift { } {
4111 global et_vect_widen_shift_saved
4113 if [info exists et_vect_shift_saved] {
4114 verbose "check_effective_target_vect_widen_shift: using cached result" 2
4116 set et_vect_widen_shift_saved 0
4117 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4118 set et_vect_widen_shift_saved 1
4121 verbose "check_effective_target_vect_widen_shift: returning $et_vect_widen_shift_saved" 2
4122 return $et_vect_widen_shift_saved
4125 # Return 1 if the target plus current options supports a vector
4126 # dot-product of signed chars, 0 otherwise.
4128 # This won't change for different subtargets so cache the result.
4130 proc check_effective_target_vect_sdot_qi { } {
4131 global et_vect_sdot_qi
4133 if [info exists et_vect_sdot_qi_saved] {
4134 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
4136 set et_vect_sdot_qi_saved 0
4137 if { [istarget ia64-*-*] } {
4138 set et_vect_udot_qi_saved 1
4141 verbose "check_effective_target_vect_sdot_qi: returning $et_vect_sdot_qi_saved" 2
4142 return $et_vect_sdot_qi_saved
4145 # Return 1 if the target plus current options supports a vector
4146 # dot-product of unsigned chars, 0 otherwise.
4148 # This won't change for different subtargets so cache the result.
4150 proc check_effective_target_vect_udot_qi { } {
4151 global et_vect_udot_qi
4153 if [info exists et_vect_udot_qi_saved] {
4154 verbose "check_effective_target_vect_udot_qi: using cached result" 2
4156 set et_vect_udot_qi_saved 0
4157 if { [istarget powerpc*-*-*]
4158 || [istarget ia64-*-*] } {
4159 set et_vect_udot_qi_saved 1
4162 verbose "check_effective_target_vect_udot_qi: returning $et_vect_udot_qi_saved" 2
4163 return $et_vect_udot_qi_saved
4166 # Return 1 if the target plus current options supports a vector
4167 # dot-product of signed shorts, 0 otherwise.
4169 # This won't change for different subtargets so cache the result.
4171 proc check_effective_target_vect_sdot_hi { } {
4172 global et_vect_sdot_hi
4174 if [info exists et_vect_sdot_hi_saved] {
4175 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
4177 set et_vect_sdot_hi_saved 0
4178 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4179 || [istarget ia64-*-*]
4180 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4181 set et_vect_sdot_hi_saved 1
4184 verbose "check_effective_target_vect_sdot_hi: returning $et_vect_sdot_hi_saved" 2
4185 return $et_vect_sdot_hi_saved
4188 # Return 1 if the target plus current options supports a vector
4189 # dot-product of unsigned shorts, 0 otherwise.
4191 # This won't change for different subtargets so cache the result.
4193 proc check_effective_target_vect_udot_hi { } {
4194 global et_vect_udot_hi
4196 if [info exists et_vect_udot_hi_saved] {
4197 verbose "check_effective_target_vect_udot_hi: using cached result" 2
4199 set et_vect_udot_hi_saved 0
4200 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) } {
4201 set et_vect_udot_hi_saved 1
4204 verbose "check_effective_target_vect_udot_hi: returning $et_vect_udot_hi_saved" 2
4205 return $et_vect_udot_hi_saved
4208 # Return 1 if the target plus current options supports a vector
4209 # sad operation of unsigned chars, 0 otherwise.
4211 # This won't change for different subtargets so cache the result.
4213 proc check_effective_target_vect_usad_char { } {
4214 global et_vect_usad_char
4216 if [info exists et_vect_usad_char_saved] {
4217 verbose "check_effective_target_vect_usad_char: using cached result" 2
4219 set et_vect_usad_char_saved 0
4220 if { ([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
4221 set et_vect_usad_char_saved 1
4224 verbose "check_effective_target_vect_usad_char: returning $et_vect_usad_char_saved" 2
4225 return $et_vect_usad_char_saved
4228 # Return 1 if the target plus current options supports a vector
4229 # demotion (packing) of shorts (to chars) and ints (to shorts)
4230 # using modulo arithmetic, 0 otherwise.
4232 # This won't change for different subtargets so cache the result.
4234 proc check_effective_target_vect_pack_trunc { } {
4235 global et_vect_pack_trunc
4237 if [info exists et_vect_pack_trunc_saved] {
4238 verbose "check_effective_target_vect_pack_trunc: using cached result" 2
4240 set et_vect_pack_trunc_saved 0
4241 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4242 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4243 || [istarget aarch64*-*-*]
4244 || [istarget spu-*-*]
4245 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4246 && [check_effective_target_arm_little_endian]) } {
4247 set et_vect_pack_trunc_saved 1
4250 verbose "check_effective_target_vect_pack_trunc: returning $et_vect_pack_trunc_saved" 2
4251 return $et_vect_pack_trunc_saved
4254 # Return 1 if the target plus current options supports a vector
4255 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
4257 # This won't change for different subtargets so cache the result.
4259 proc check_effective_target_vect_unpack { } {
4260 global et_vect_unpack
4262 if [info exists et_vect_unpack_saved] {
4263 verbose "check_effective_target_vect_unpack: using cached result" 2
4265 set et_vect_unpack_saved 0
4266 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
4267 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4268 || [istarget spu-*-*]
4269 || [istarget ia64-*-*]
4270 || [istarget aarch64*-*-*]
4271 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4272 && [check_effective_target_arm_little_endian]) } {
4273 set et_vect_unpack_saved 1
4276 verbose "check_effective_target_vect_unpack: returning $et_vect_unpack_saved" 2
4277 return $et_vect_unpack_saved
4280 # Return 1 if the target plus current options does not guarantee
4281 # that its STACK_BOUNDARY is >= the reguired vector alignment.
4283 # This won't change for different subtargets so cache the result.
4285 proc check_effective_target_unaligned_stack { } {
4286 global et_unaligned_stack_saved
4288 if [info exists et_unaligned_stack_saved] {
4289 verbose "check_effective_target_unaligned_stack: using cached result" 2
4291 set et_unaligned_stack_saved 0
4293 verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
4294 return $et_unaligned_stack_saved
4297 # Return 1 if the target plus current options does not support a vector
4298 # alignment mechanism, 0 otherwise.
4300 # This won't change for different subtargets so cache the result.
4302 proc check_effective_target_vect_no_align { } {
4303 global et_vect_no_align_saved
4305 if [info exists et_vect_no_align_saved] {
4306 verbose "check_effective_target_vect_no_align: using cached result" 2
4308 set et_vect_no_align_saved 0
4309 if { [istarget mipsisa64*-*-*]
4310 || [istarget mips-sde-elf]
4311 || [istarget sparc*-*-*]
4312 || [istarget ia64-*-*]
4313 || [check_effective_target_arm_vect_no_misalign]
4314 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
4315 || ([istarget mips*-*-*]
4316 && [check_effective_target_mips_loongson]) } {
4317 set et_vect_no_align_saved 1
4320 verbose "check_effective_target_vect_no_align: returning $et_vect_no_align_saved" 2
4321 return $et_vect_no_align_saved
4324 # Return 1 if the target supports a vector misalign access, 0 otherwise.
4326 # This won't change for different subtargets so cache the result.
4328 proc check_effective_target_vect_hw_misalign { } {
4329 global et_vect_hw_misalign_saved
4331 if [info exists et_vect_hw_misalign_saved] {
4332 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
4334 set et_vect_hw_misalign_saved 0
4335 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4336 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
4337 || [istarget aarch64*-*-*] } {
4338 set et_vect_hw_misalign_saved 1
4341 verbose "check_effective_target_vect_hw_misalign: returning $et_vect_hw_misalign_saved" 2
4342 return $et_vect_hw_misalign_saved
4346 # Return 1 if arrays are aligned to the vector alignment
4347 # boundary, 0 otherwise.
4349 # This won't change for different subtargets so cache the result.
4351 proc check_effective_target_vect_aligned_arrays { } {
4352 global et_vect_aligned_arrays
4354 if [info exists et_vect_aligned_arrays_saved] {
4355 verbose "check_effective_target_vect_aligned_arrays: using cached result" 2
4357 set et_vect_aligned_arrays_saved 0
4358 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
4359 if { ([is-effective-target lp64]
4360 && ( ![check_avx_available]
4361 || [check_prefer_avx128])) } {
4362 set et_vect_aligned_arrays_saved 1
4365 if [istarget spu-*-*] {
4366 set et_vect_aligned_arrays_saved 1
4369 verbose "check_effective_target_vect_aligned_arrays: returning $et_vect_aligned_arrays_saved" 2
4370 return $et_vect_aligned_arrays_saved
4373 # Return 1 if types of size 32 bit or less are naturally aligned
4374 # (aligned to their type-size), 0 otherwise.
4376 # This won't change for different subtargets so cache the result.
4378 proc check_effective_target_natural_alignment_32 { } {
4379 global et_natural_alignment_32
4381 if [info exists et_natural_alignment_32_saved] {
4382 verbose "check_effective_target_natural_alignment_32: using cached result" 2
4384 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
4385 set et_natural_alignment_32_saved 1
4386 if { ([istarget *-*-darwin*] && [is-effective-target lp64]) } {
4387 set et_natural_alignment_32_saved 0
4390 verbose "check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
4391 return $et_natural_alignment_32_saved
4394 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
4395 # type-size), 0 otherwise.
4397 # This won't change for different subtargets so cache the result.
4399 proc check_effective_target_natural_alignment_64 { } {
4400 global et_natural_alignment_64
4402 if [info exists et_natural_alignment_64_saved] {
4403 verbose "check_effective_target_natural_alignment_64: using cached result" 2
4405 set et_natural_alignment_64_saved 0
4406 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
4407 || [istarget spu-*-*] } {
4408 set et_natural_alignment_64_saved 1
4411 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
4412 return $et_natural_alignment_64_saved
4415 # Return 1 if all vector types are naturally aligned (aligned to their
4416 # type-size), 0 otherwise.
4418 # This won't change for different subtargets so cache the result.
4420 proc check_effective_target_vect_natural_alignment { } {
4421 global et_vect_natural_alignment
4423 if [info exists et_vect_natural_alignment_saved] {
4424 verbose "check_effective_target_vect_natural_alignment: using cached result" 2
4426 set et_vect_natural_alignment_saved 1
4427 if { [check_effective_target_arm_eabi]
4428 || [istarget nvptx-*-*]
4429 || [istarget s390*-*-*] } {
4430 set et_vect_natural_alignment_saved 0
4433 verbose "check_effective_target_vect_natural_alignment: returning $et_vect_natural_alignment_saved" 2
4434 return $et_vect_natural_alignment_saved
4437 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
4439 # This won't change for different subtargets so cache the result.
4441 proc check_effective_target_vector_alignment_reachable { } {
4442 global et_vector_alignment_reachable
4444 if [info exists et_vector_alignment_reachable_saved] {
4445 verbose "check_effective_target_vector_alignment_reachable: using cached result" 2
4447 if { [check_effective_target_vect_aligned_arrays]
4448 || [check_effective_target_natural_alignment_32] } {
4449 set et_vector_alignment_reachable_saved 1
4451 set et_vector_alignment_reachable_saved 0
4454 verbose "check_effective_target_vector_alignment_reachable: returning $et_vector_alignment_reachable_saved" 2
4455 return $et_vector_alignment_reachable_saved
4458 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
4460 # This won't change for different subtargets so cache the result.
4462 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
4463 global et_vector_alignment_reachable_for_64bit
4465 if [info exists et_vector_alignment_reachable_for_64bit_saved] {
4466 verbose "check_effective_target_vector_alignment_reachable_for_64bit: using cached result" 2
4468 if { [check_effective_target_vect_aligned_arrays]
4469 || [check_effective_target_natural_alignment_64] } {
4470 set et_vector_alignment_reachable_for_64bit_saved 1
4472 set et_vector_alignment_reachable_for_64bit_saved 0
4475 verbose "check_effective_target_vector_alignment_reachable_for_64bit: returning $et_vector_alignment_reachable_for_64bit_saved" 2
4476 return $et_vector_alignment_reachable_for_64bit_saved
4479 # Return 1 if the target only requires element alignment for vector accesses
4481 proc check_effective_target_vect_element_align { } {
4482 global et_vect_element_align
4484 if [info exists et_vect_element_align] {
4485 verbose "check_effective_target_vect_element_align: using cached result" 2
4487 set et_vect_element_align 0
4488 if { ([istarget arm*-*-*]
4489 && ![check_effective_target_arm_vect_no_misalign])
4490 || [check_effective_target_vect_hw_misalign] } {
4491 set et_vect_element_align 1
4495 verbose "check_effective_target_vect_element_align: returning $et_vect_element_align" 2
4496 return $et_vect_element_align
4499 # Return 1 if the target supports vector conditional operations, 0 otherwise.
4501 proc check_effective_target_vect_condition { } {
4502 global et_vect_cond_saved
4504 if [info exists et_vect_cond_saved] {
4505 verbose "check_effective_target_vect_cond: using cached result" 2
4507 set et_vect_cond_saved 0
4508 if { [istarget aarch64*-*-*]
4509 || [istarget powerpc*-*-*]
4510 || [istarget ia64-*-*]
4511 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4512 || [istarget spu-*-*]
4513 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4514 set et_vect_cond_saved 1
4518 verbose "check_effective_target_vect_cond: returning $et_vect_cond_saved" 2
4519 return $et_vect_cond_saved
4522 # Return 1 if the target supports vector conditional operations where
4523 # the comparison has different type from the lhs, 0 otherwise.
4525 proc check_effective_target_vect_cond_mixed { } {
4526 global et_vect_cond_mixed_saved
4528 if [info exists et_vect_cond_mixed_saved] {
4529 verbose "check_effective_target_vect_cond_mixed: using cached result" 2
4531 set et_vect_cond_mixed_saved 0
4532 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4533 || [istarget powerpc*-*-*] } {
4534 set et_vect_cond_mixed_saved 1
4538 verbose "check_effective_target_vect_cond_mixed: returning $et_vect_cond_mixed_saved" 2
4539 return $et_vect_cond_mixed_saved
4542 # Return 1 if the target supports vector char multiplication, 0 otherwise.
4544 proc check_effective_target_vect_char_mult { } {
4545 global et_vect_char_mult_saved
4547 if [info exists et_vect_char_mult_saved] {
4548 verbose "check_effective_target_vect_char_mult: using cached result" 2
4550 set et_vect_char_mult_saved 0
4551 if { [istarget aarch64*-*-*]
4552 || [istarget ia64-*-*]
4553 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4554 || [check_effective_target_arm32] } {
4555 set et_vect_char_mult_saved 1
4559 verbose "check_effective_target_vect_char_mult: returning $et_vect_char_mult_saved" 2
4560 return $et_vect_char_mult_saved
4563 # Return 1 if the target supports vector short multiplication, 0 otherwise.
4565 proc check_effective_target_vect_short_mult { } {
4566 global et_vect_short_mult_saved
4568 if [info exists et_vect_short_mult_saved] {
4569 verbose "check_effective_target_vect_short_mult: using cached result" 2
4571 set et_vect_short_mult_saved 0
4572 if { [istarget ia64-*-*]
4573 || [istarget spu-*-*]
4574 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4575 || [istarget powerpc*-*-*]
4576 || [istarget aarch64*-*-*]
4577 || [check_effective_target_arm32]
4578 || ([istarget mips*-*-*]
4579 && [check_effective_target_mips_loongson]) } {
4580 set et_vect_short_mult_saved 1
4584 verbose "check_effective_target_vect_short_mult: returning $et_vect_short_mult_saved" 2
4585 return $et_vect_short_mult_saved
4588 # Return 1 if the target supports vector int multiplication, 0 otherwise.
4590 proc check_effective_target_vect_int_mult { } {
4591 global et_vect_int_mult_saved
4593 if [info exists et_vect_int_mult_saved] {
4594 verbose "check_effective_target_vect_int_mult: using cached result" 2
4596 set et_vect_int_mult_saved 0
4597 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4598 || [istarget spu-*-*]
4599 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4600 || [istarget ia64-*-*]
4601 || [istarget aarch64*-*-*]
4602 || [check_effective_target_arm32] } {
4603 set et_vect_int_mult_saved 1
4607 verbose "check_effective_target_vect_int_mult: returning $et_vect_int_mult_saved" 2
4608 return $et_vect_int_mult_saved
4611 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
4613 proc check_effective_target_vect_extract_even_odd { } {
4614 global et_vect_extract_even_odd_saved
4616 if [info exists et_vect_extract_even_odd_saved] {
4617 verbose "check_effective_target_vect_extract_even_odd: using cached result" 2
4619 set et_vect_extract_even_odd_saved 0
4620 if { [istarget aarch64*-*-*]
4621 || [istarget powerpc*-*-*]
4622 || [is-effective-target arm_neon_ok]
4623 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4624 || [istarget ia64-*-*]
4625 || [istarget spu-*-*]
4626 || ([istarget mips*-*-*]
4627 && [check_effective_target_mpaired_single]) } {
4628 set et_vect_extract_even_odd_saved 1
4632 verbose "check_effective_target_vect_extract_even_odd: returning $et_vect_extract_even_odd_saved" 2
4633 return $et_vect_extract_even_odd_saved
4636 # Return 1 if the target supports vector interleaving, 0 otherwise.
4638 proc check_effective_target_vect_interleave { } {
4639 global et_vect_interleave_saved
4641 if [info exists et_vect_interleave_saved] {
4642 verbose "check_effective_target_vect_interleave: using cached result" 2
4644 set et_vect_interleave_saved 0
4645 if { [istarget aarch64*-*-*]
4646 || [istarget powerpc*-*-*]
4647 || [is-effective-target arm_neon_ok]
4648 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4649 || [istarget ia64-*-*]
4650 || [istarget spu-*-*]
4651 || ([istarget mips*-*-*]
4652 && [check_effective_target_mpaired_single]) } {
4653 set et_vect_interleave_saved 1
4657 verbose "check_effective_target_vect_interleave: returning $et_vect_interleave_saved" 2
4658 return $et_vect_interleave_saved
4661 foreach N {2 3 4 8} {
4662 eval [string map [list N $N] {
4663 # Return 1 if the target supports 2-vector interleaving
4664 proc check_effective_target_vect_stridedN { } {
4665 global et_vect_stridedN_saved
4667 if [info exists et_vect_stridedN_saved] {
4668 verbose "check_effective_target_vect_stridedN: using cached result" 2
4670 set et_vect_stridedN_saved 0
4672 && [check_effective_target_vect_interleave]
4673 && [check_effective_target_vect_extract_even_odd] } {
4674 set et_vect_stridedN_saved 1
4676 if { ([istarget arm*-*-*]
4677 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
4678 set et_vect_stridedN_saved 1
4682 verbose "check_effective_target_vect_stridedN: returning $et_vect_stridedN_saved" 2
4683 return $et_vect_stridedN_saved
4688 # Return 1 if the target supports multiple vector sizes
4690 proc check_effective_target_vect_multiple_sizes { } {
4691 global et_vect_multiple_sizes_saved
4693 set et_vect_multiple_sizes_saved 0
4694 if { ([istarget aarch64*-*-*]
4695 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])) } {
4696 set et_vect_multiple_sizes_saved 1
4698 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
4699 if { ([check_avx_available] && ![check_prefer_avx128]) } {
4700 set et_vect_multiple_sizes_saved 1
4704 verbose "check_effective_target_vect_multiple_sizes: returning $et_vect_multiple_sizes_saved" 2
4705 return $et_vect_multiple_sizes_saved
4708 # Return 1 if the target supports vectors of 64 bits.
4710 proc check_effective_target_vect64 { } {
4711 global et_vect64_saved
4713 if [info exists et_vect64_saved] {
4714 verbose "check_effective_target_vect64: using cached result" 2
4716 set et_vect64_saved 0
4717 if { ([istarget arm*-*-*]
4718 && [check_effective_target_arm_neon_ok]
4719 && [check_effective_target_arm_little_endian])
4720 || [istarget sparc*-*-*] } {
4721 set et_vect64_saved 1
4725 verbose "check_effective_target_vect64: returning $et_vect64_saved" 2
4726 return $et_vect64_saved
4729 # Return 1 if the target supports vector copysignf calls.
4731 proc check_effective_target_vect_call_copysignf { } {
4732 global et_vect_call_copysignf_saved
4734 if [info exists et_vect_call_copysignf_saved] {
4735 verbose "check_effective_target_vect_call_copysignf: using cached result" 2
4737 set et_vect_call_copysignf_saved 0
4738 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4739 || [istarget powerpc*-*-*] } {
4740 set et_vect_call_copysignf_saved 1
4744 verbose "check_effective_target_vect_call_copysignf: returning $et_vect_call_copysignf_saved" 2
4745 return $et_vect_call_copysignf_saved
4748 # Return 1 if the target supports hardware square root instructions.
4750 proc check_effective_target_sqrt_insn { } {
4751 global et_sqrt_insn_saved
4753 if [info exists et_sqrt_insn_saved] {
4754 verbose "check_effective_target_hw_sqrt: using cached result" 2
4756 set et_sqrt_insn_saved 0
4757 if { [istarget x86_64-*-*]
4758 || [istarget powerpc*-*-*]
4759 || [istarget aarch64*-*-*]
4760 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok]) } {
4761 set et_sqrt_insn_saved 1
4765 verbose "check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2
4766 return $et_sqrt_insn_saved
4769 # Return 1 if the target supports vector sqrtf calls.
4771 proc check_effective_target_vect_call_sqrtf { } {
4772 global et_vect_call_sqrtf_saved
4774 if [info exists et_vect_call_sqrtf_saved] {
4775 verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
4777 set et_vect_call_sqrtf_saved 0
4778 if { [istarget aarch64*-*-*]
4779 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4780 || ([istarget powerpc*-*-*] && [check_vsx_hw_available]) } {
4781 set et_vect_call_sqrtf_saved 1
4785 verbose "check_effective_target_vect_call_sqrtf: returning $et_vect_call_sqrtf_saved" 2
4786 return $et_vect_call_sqrtf_saved
4789 # Return 1 if the target supports vector lrint calls.
4791 proc check_effective_target_vect_call_lrint { } {
4792 set et_vect_call_lrint 0
4793 if { ([istarget i?86-*-*] || [istarget x86_64-*-*])
4794 && [check_effective_target_ilp32] } {
4795 set et_vect_call_lrint 1
4798 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
4799 return $et_vect_call_lrint
4802 # Return 1 if the target supports vector btrunc calls.
4804 proc check_effective_target_vect_call_btrunc { } {
4805 global et_vect_call_btrunc_saved
4807 if [info exists et_vect_call_btrunc_saved] {
4808 verbose "check_effective_target_vect_call_btrunc: using cached result" 2
4810 set et_vect_call_btrunc_saved 0
4811 if { [istarget aarch64*-*-*] } {
4812 set et_vect_call_btrunc_saved 1
4816 verbose "check_effective_target_vect_call_btrunc: returning $et_vect_call_btrunc_saved" 2
4817 return $et_vect_call_btrunc_saved
4820 # Return 1 if the target supports vector btruncf calls.
4822 proc check_effective_target_vect_call_btruncf { } {
4823 global et_vect_call_btruncf_saved
4825 if [info exists et_vect_call_btruncf_saved] {
4826 verbose "check_effective_target_vect_call_btruncf: using cached result" 2
4828 set et_vect_call_btruncf_saved 0
4829 if { [istarget aarch64*-*-*] } {
4830 set et_vect_call_btruncf_saved 1
4834 verbose "check_effective_target_vect_call_btruncf: returning $et_vect_call_btruncf_saved" 2
4835 return $et_vect_call_btruncf_saved
4838 # Return 1 if the target supports vector ceil calls.
4840 proc check_effective_target_vect_call_ceil { } {
4841 global et_vect_call_ceil_saved
4843 if [info exists et_vect_call_ceil_saved] {
4844 verbose "check_effective_target_vect_call_ceil: using cached result" 2
4846 set et_vect_call_ceil_saved 0
4847 if { [istarget aarch64*-*-*] } {
4848 set et_vect_call_ceil_saved 1
4852 verbose "check_effective_target_vect_call_ceil: returning $et_vect_call_ceil_saved" 2
4853 return $et_vect_call_ceil_saved
4856 # Return 1 if the target supports vector ceilf calls.
4858 proc check_effective_target_vect_call_ceilf { } {
4859 global et_vect_call_ceilf_saved
4861 if [info exists et_vect_call_ceilf_saved] {
4862 verbose "check_effective_target_vect_call_ceilf: using cached result" 2
4864 set et_vect_call_ceilf_saved 0
4865 if { [istarget aarch64*-*-*] } {
4866 set et_vect_call_ceilf_saved 1
4870 verbose "check_effective_target_vect_call_ceilf: returning $et_vect_call_ceilf_saved" 2
4871 return $et_vect_call_ceilf_saved
4874 # Return 1 if the target supports vector floor calls.
4876 proc check_effective_target_vect_call_floor { } {
4877 global et_vect_call_floor_saved
4879 if [info exists et_vect_call_floor_saved] {
4880 verbose "check_effective_target_vect_call_floor: using cached result" 2
4882 set et_vect_call_floor_saved 0
4883 if { [istarget aarch64*-*-*] } {
4884 set et_vect_call_floor_saved 1
4888 verbose "check_effective_target_vect_call_floor: returning $et_vect_call_floor_saved" 2
4889 return $et_vect_call_floor_saved
4892 # Return 1 if the target supports vector floorf calls.
4894 proc check_effective_target_vect_call_floorf { } {
4895 global et_vect_call_floorf_saved
4897 if [info exists et_vect_call_floorf_saved] {
4898 verbose "check_effective_target_vect_call_floorf: using cached result" 2
4900 set et_vect_call_floorf_saved 0
4901 if { [istarget aarch64*-*-*] } {
4902 set et_vect_call_floorf_saved 1
4906 verbose "check_effective_target_vect_call_floorf: returning $et_vect_call_floorf_saved" 2
4907 return $et_vect_call_floorf_saved
4910 # Return 1 if the target supports vector lceil calls.
4912 proc check_effective_target_vect_call_lceil { } {
4913 global et_vect_call_lceil_saved
4915 if [info exists et_vect_call_lceil_saved] {
4916 verbose "check_effective_target_vect_call_lceil: using cached result" 2
4918 set et_vect_call_lceil_saved 0
4919 if { [istarget aarch64*-*-*] } {
4920 set et_vect_call_lceil_saved 1
4924 verbose "check_effective_target_vect_call_lceil: returning $et_vect_call_lceil_saved" 2
4925 return $et_vect_call_lceil_saved
4928 # Return 1 if the target supports vector lfloor calls.
4930 proc check_effective_target_vect_call_lfloor { } {
4931 global et_vect_call_lfloor_saved
4933 if [info exists et_vect_call_lfloor_saved] {
4934 verbose "check_effective_target_vect_call_lfloor: using cached result" 2
4936 set et_vect_call_lfloor_saved 0
4937 if { [istarget aarch64*-*-*] } {
4938 set et_vect_call_lfloor_saved 1
4942 verbose "check_effective_target_vect_call_lfloor: returning $et_vect_call_lfloor_saved" 2
4943 return $et_vect_call_lfloor_saved
4946 # Return 1 if the target supports vector nearbyint calls.
4948 proc check_effective_target_vect_call_nearbyint { } {
4949 global et_vect_call_nearbyint_saved
4951 if [info exists et_vect_call_nearbyint_saved] {
4952 verbose "check_effective_target_vect_call_nearbyint: using cached result" 2
4954 set et_vect_call_nearbyint_saved 0
4955 if { [istarget aarch64*-*-*] } {
4956 set et_vect_call_nearbyint_saved 1
4960 verbose "check_effective_target_vect_call_nearbyint: returning $et_vect_call_nearbyint_saved" 2
4961 return $et_vect_call_nearbyint_saved
4964 # Return 1 if the target supports vector nearbyintf calls.
4966 proc check_effective_target_vect_call_nearbyintf { } {
4967 global et_vect_call_nearbyintf_saved
4969 if [info exists et_vect_call_nearbyintf_saved] {
4970 verbose "check_effective_target_vect_call_nearbyintf: using cached result" 2
4972 set et_vect_call_nearbyintf_saved 0
4973 if { [istarget aarch64*-*-*] } {
4974 set et_vect_call_nearbyintf_saved 1
4978 verbose "check_effective_target_vect_call_nearbyintf: returning $et_vect_call_nearbyintf_saved" 2
4979 return $et_vect_call_nearbyintf_saved
4982 # Return 1 if the target supports vector round calls.
4984 proc check_effective_target_vect_call_round { } {
4985 global et_vect_call_round_saved
4987 if [info exists et_vect_call_round_saved] {
4988 verbose "check_effective_target_vect_call_round: using cached result" 2
4990 set et_vect_call_round_saved 0
4991 if { [istarget aarch64*-*-*] } {
4992 set et_vect_call_round_saved 1
4996 verbose "check_effective_target_vect_call_round: returning $et_vect_call_round_saved" 2
4997 return $et_vect_call_round_saved
5000 # Return 1 if the target supports vector roundf calls.
5002 proc check_effective_target_vect_call_roundf { } {
5003 global et_vect_call_roundf_saved
5005 if [info exists et_vect_call_roundf_saved] {
5006 verbose "check_effective_target_vect_call_roundf: using cached result" 2
5008 set et_vect_call_roundf_saved 0
5009 if { [istarget aarch64*-*-*] } {
5010 set et_vect_call_roundf_saved 1
5014 verbose "check_effective_target_vect_call_roundf: returning $et_vect_call_roundf_saved" 2
5015 return $et_vect_call_roundf_saved
5018 # Return 1 if the target supports section-anchors
5020 proc check_effective_target_section_anchors { } {
5021 global et_section_anchors_saved
5023 if [info exists et_section_anchors_saved] {
5024 verbose "check_effective_target_section_anchors: using cached result" 2
5026 set et_section_anchors_saved 0
5027 if { [istarget powerpc*-*-*]
5028 || [istarget arm*-*-*] } {
5029 set et_section_anchors_saved 1
5033 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
5034 return $et_section_anchors_saved
5037 # Return 1 if the target supports atomic operations on "int_128" values.
5039 proc check_effective_target_sync_int_128 { } {
5040 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
5041 && ![is-effective-target ia32] } {
5048 # Return 1 if the target supports atomic operations on "int_128" values
5049 # and can execute them.
5051 proc check_effective_target_sync_int_128_runtime { } {
5052 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
5053 && ![is-effective-target ia32] } {
5054 return [check_cached_effective_target sync_int_128_available {
5055 check_runtime_nocache sync_int_128_available {
5059 unsigned int eax, ebx, ecx, edx;
5060 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
5061 return !(ecx & bit_CMPXCHG16B);
5071 # Return 1 if the target supports atomic operations on "long long".
5073 # Note: 32bit x86 targets require -march=pentium in dg-options.
5075 proc check_effective_target_sync_long_long { } {
5076 if { [istarget x86_64-*-*] || [istarget i?86-*-*])
5077 || [istarget aarch64*-*-*]
5078 || [istarget arm*-*-*]
5079 || [istarget alpha*-*-*]
5080 || ([istarget sparc*-*-*] && [check_effective_target_lp64]) } {
5087 # Return 1 if the target supports atomic operations on "long long"
5088 # and can execute them.
5090 # Note: 32bit x86 targets require -march=pentium in dg-options.
5092 proc check_effective_target_sync_long_long_runtime { } {
5093 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
5094 return [check_cached_effective_target sync_long_long_available {
5095 check_runtime_nocache sync_long_long_available {
5099 unsigned int eax, ebx, ecx, edx;
5100 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
5101 return !(edx & bit_CMPXCHG8B);
5106 } elseif { [istarget aarch64*-*-*] } {
5108 } elseif { [istarget arm*-*-linux-*] } {
5109 return [check_runtime sync_longlong_runtime {
5115 if (sizeof (long long) != 8)
5118 /* Just check for native; checking for kernel fallback is tricky. */
5119 asm volatile ("ldrexd r0,r1, [%0]" : : "r" (&l1) : "r0", "r1");
5124 } elseif { [istarget alpha*-*-*] } {
5126 } elseif { ([istarget sparc*-*-*]
5127 && [check_effective_target_lp64]
5128 && [check_effective_target_ultrasparc_hw]) } {
5130 } elseif { [istarget powerpc*-*-*] && [check_effective_target_lp64] } {
5137 # Return 1 if the target supports byte swap instructions.
5139 proc check_effective_target_bswap { } {
5140 global et_bswap_saved
5142 if [info exists et_bswap_saved] {
5143 verbose "check_effective_target_bswap: using cached result" 2
5145 set et_bswap_saved 0
5146 if { [istarget aarch64*-*-*]
5147 || [istarget alpha*-*-*]
5148 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5149 || [istarget m68k-*-*]
5150 || [istarget powerpc*-*-*]
5151 || [istarget rs6000-*-*]
5152 || [istarget s390*-*-*] } {
5153 set et_bswap_saved 1
5155 if { [istarget arm*-*-*]
5156 && [check_no_compiler_messages_nocache arm_v6_or_later object {
5158 #error not armv6 or later
5162 set et_bswap_saved 1
5167 verbose "check_effective_target_bswap: returning $et_bswap_saved" 2
5168 return $et_bswap_saved
5171 # Return 1 if the target supports 16-bit byte swap instructions.
5173 proc check_effective_target_bswap16 { } {
5174 global et_bswap16_saved
5176 if [info exists et_bswap16_saved] {
5177 verbose "check_effective_target_bswap16: using cached result" 2
5179 set et_bswap16_saved 0
5180 if { [is-effective-target bswap]
5181 && ![istarget alpha*-*-*]
5182 && !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
5183 set et_bswap16_saved 1
5187 verbose "check_effective_target_bswap16: returning $et_bswap16_saved" 2
5188 return $et_bswap16_saved
5191 # Return 1 if the target supports 32-bit byte swap instructions.
5193 proc check_effective_target_bswap32 { } {
5194 global et_bswap32_saved
5196 if [info exists et_bswap32_saved] {
5197 verbose "check_effective_target_bswap32: using cached result" 2
5199 set et_bswap32_saved 0
5200 if { [is-effective-target bswap] } {
5201 set et_bswap32_saved 1
5205 verbose "check_effective_target_bswap32: returning $et_bswap32_saved" 2
5206 return $et_bswap32_saved
5209 # Return 1 if the target supports 64-bit byte swap instructions.
5211 proc check_effective_target_bswap64 { } {
5212 global et_bswap64_saved
5214 # expand_unop can expand 64-bit byte swap on 32-bit targets
5215 if { [is-effective-target bswap] && [is-effective-target int32plus] } {
5221 # Return 1 if the target supports atomic operations on "int" and "long".
5223 proc check_effective_target_sync_int_long { } {
5224 global et_sync_int_long_saved
5226 if [info exists et_sync_int_long_saved] {
5227 verbose "check_effective_target_sync_int_long: using cached result" 2
5229 set et_sync_int_long_saved 0
5230 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
5231 # load-reserved/store-conditional instructions.
5232 if { [istarget ia64-*-*]
5233 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5234 || [istarget aarch64*-*-*]
5235 || [istarget alpha*-*-*]
5236 || [istarget arm*-*-linux-*]
5237 || [istarget bfin*-*linux*]
5238 || [istarget hppa*-*linux*]
5239 || [istarget s390*-*-*]
5240 || [istarget powerpc*-*-*]
5241 || [istarget crisv32-*-*] || [istarget cris-*-*]
5242 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
5243 || [check_effective_target_mips_llsc] } {
5244 set et_sync_int_long_saved 1
5248 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
5249 return $et_sync_int_long_saved
5252 # Return 1 if the target supports atomic operations on "char" and "short".
5254 proc check_effective_target_sync_char_short { } {
5255 global et_sync_char_short_saved
5257 if [info exists et_sync_char_short_saved] {
5258 verbose "check_effective_target_sync_char_short: using cached result" 2
5260 set et_sync_char_short_saved 0
5261 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
5262 # load-reserved/store-conditional instructions.
5263 if { [istarget aarch64*-*-*]
5264 || [istarget ia64-*-*]
5265 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5266 || [istarget alpha*-*-*]
5267 || [istarget arm*-*-linux-*]
5268 || [istarget hppa*-*linux*]
5269 || [istarget s390*-*-*]
5270 || [istarget powerpc*-*-*]
5271 || [istarget crisv32-*-*] || [istarget cris-*-*]
5272 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
5273 || [check_effective_target_mips_llsc] } {
5274 set et_sync_char_short_saved 1
5278 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
5279 return $et_sync_char_short_saved
5282 # Return 1 if the target uses a ColdFire FPU.
5284 proc check_effective_target_coldfire_fpu { } {
5285 return [check_no_compiler_messages coldfire_fpu assembly {
5292 # Return true if this is a uClibc target.
5294 proc check_effective_target_uclibc {} {
5295 return [check_no_compiler_messages uclibc object {
5296 #include <features.h>
5297 #if !defined (__UCLIBC__)
5303 # Return true if this is a uclibc target and if the uclibc feature
5304 # described by __$feature__ is not present.
5306 proc check_missing_uclibc_feature {feature} {
5307 return [check_no_compiler_messages $feature object "
5308 #include <features.h>
5309 #if !defined (__UCLIBC) || defined (__${feature}__)
5315 # Return true if this is a Newlib target.
5317 proc check_effective_target_newlib {} {
5318 return [check_no_compiler_messages newlib object {
5323 # Return true if this is NOT a Bionic target.
5325 proc check_effective_target_non_bionic {} {
5326 return [check_no_compiler_messages non_bionic object {
5328 #if defined (__BIONIC__)
5334 # Return true if this target has error.h header.
5336 proc check_effective_target_error_h {} {
5337 return [check_no_compiler_messages error_h object {
5342 # Return true if this target has tgmath.h header.
5344 proc check_effective_target_tgmath_h {} {
5345 return [check_no_compiler_messages tgmath_h object {
5350 # Return true if target's libc supports complex functions.
5352 proc check_effective_target_libc_has_complex_functions {} {
5353 return [check_no_compiler_messages libc_has_complex_functions object {
5354 #include <complex.h>
5359 # (a) an error of a few ULP is expected in string to floating-point
5360 # conversion functions; and
5361 # (b) overflow is not always detected correctly by those functions.
5363 proc check_effective_target_lax_strtofp {} {
5364 # By default, assume that all uClibc targets suffer from this.
5365 return [check_effective_target_uclibc]
5368 # Return 1 if this is a target for which wcsftime is a dummy
5369 # function that always returns 0.
5371 proc check_effective_target_dummy_wcsftime {} {
5372 # By default, assume that all uClibc targets suffer from this.
5373 return [check_effective_target_uclibc]
5376 # Return 1 if constructors with initialization priority arguments are
5377 # supposed on this target.
5379 proc check_effective_target_init_priority {} {
5380 return [check_no_compiler_messages init_priority assembly "
5381 void f() __attribute__((constructor (1000)));
5386 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
5387 # This can be used with any check_* proc that takes no argument and
5388 # returns only 1 or 0. It could be used with check_* procs that take
5389 # arguments with keywords that pass particular arguments.
5391 proc is-effective-target { arg } {
5393 if { [info procs check_effective_target_${arg}] != [list] } {
5394 set selected [check_effective_target_${arg}]
5397 "vmx_hw" { set selected [check_vmx_hw_available] }
5398 "vsx_hw" { set selected [check_vsx_hw_available] }
5399 "p8vector_hw" { set selected [check_p8vector_hw_available] }
5400 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
5401 "dfp_hw" { set selected [check_dfp_hw_available] }
5402 "htm_hw" { set selected [check_htm_hw_available] }
5403 "named_sections" { set selected [check_named_sections_available] }
5404 "gc_sections" { set selected [check_gc_sections_available] }
5405 "cxa_atexit" { set selected [check_cxa_atexit_available] }
5406 default { error "unknown effective target keyword `$arg'" }
5409 verbose "is-effective-target: $arg $selected" 2
5413 # Return 1 if the argument is an effective-target keyword, 0 otherwise.
5415 proc is-effective-target-keyword { arg } {
5416 if { [info procs check_effective_target_${arg}] != [list] } {
5419 # These have different names for their check_* procs.
5421 "vmx_hw" { return 1 }
5422 "vsx_hw" { return 1 }
5423 "p8vector_hw" { return 1 }
5424 "ppc_recip_hw" { return 1 }
5425 "dfp_hw" { return 1 }
5426 "htm_hw" { return 1 }
5427 "named_sections" { return 1 }
5428 "gc_sections" { return 1 }
5429 "cxa_atexit" { return 1 }
5430 default { return 0 }
5435 # Return 1 if target default to short enums
5437 proc check_effective_target_short_enums { } {
5438 return [check_no_compiler_messages short_enums assembly {
5440 int s[sizeof (enum foo) == 1 ? 1 : -1];
5444 # Return 1 if target supports merging string constants at link time.
5446 proc check_effective_target_string_merging { } {
5447 return [check_no_messages_and_pattern string_merging \
5448 "rodata\\.str" assembly {
5449 const char *var = "String";
5453 # Return 1 if target has the basic signed and unsigned types in
5454 # <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
5455 # working <stdint.h> for all targets.
5457 proc check_effective_target_stdint_types { } {
5458 return [check_no_compiler_messages stdint_types assembly {
5460 int8_t a; int16_t b; int32_t c; int64_t d;
5461 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
5465 # Return 1 if target has the basic signed and unsigned types in
5466 # <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
5467 # these types agree with those in the header, as some systems have
5468 # only <inttypes.h>.
5470 proc check_effective_target_inttypes_types { } {
5471 return [check_no_compiler_messages inttypes_types assembly {
5472 #include <inttypes.h>
5473 int8_t a; int16_t b; int32_t c; int64_t d;
5474 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
5478 # Return 1 if programs are intended to be run on a simulator
5479 # (i.e. slowly) rather than hardware (i.e. fast).
5481 proc check_effective_target_simulator { } {
5483 # All "src/sim" simulators set this one.
5484 if [board_info target exists is_simulator] {
5485 return [board_info target is_simulator]
5488 # The "sid" simulators don't set that one, but at least they set
5490 if [board_info target exists slow_simulator] {
5491 return [board_info target slow_simulator]
5497 # Return 1 if programs are intended to be run on hardware rather than
5500 proc check_effective_target_hw { } {
5502 # All "src/sim" simulators set this one.
5503 if [board_info target exists is_simulator] {
5504 if [board_info target is_simulator] {
5511 # The "sid" simulators don't set that one, but at least they set
5513 if [board_info target exists slow_simulator] {
5514 if [board_info target slow_simulator] {
5524 # Return 1 if the target is a VxWorks kernel.
5526 proc check_effective_target_vxworks_kernel { } {
5527 return [check_no_compiler_messages vxworks_kernel assembly {
5528 #if !defined __vxworks || defined __RTP__
5534 # Return 1 if the target is a VxWorks RTP.
5536 proc check_effective_target_vxworks_rtp { } {
5537 return [check_no_compiler_messages vxworks_rtp assembly {
5538 #if !defined __vxworks || !defined __RTP__
5544 # Return 1 if the target is expected to provide wide character support.
5546 proc check_effective_target_wchar { } {
5547 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
5550 return [check_no_compiler_messages wchar assembly {
5555 # Return 1 if the target has <pthread.h>.
5557 proc check_effective_target_pthread_h { } {
5558 return [check_no_compiler_messages pthread_h assembly {
5559 #include <pthread.h>
5563 # Return 1 if the target can truncate a file from a file-descriptor,
5564 # as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
5565 # chsize. We test for a trivially functional truncation; no stubs.
5566 # As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
5567 # different function to be used.
5569 proc check_effective_target_fd_truncate { } {
5571 #define _FILE_OFFSET_BITS 64
5578 FILE *f = fopen ("tst.tmp", "wb");
5580 const char t[] = "test writing more than ten characters";
5584 write (fd, t, sizeof (t) - 1);
5586 if (ftruncate (fd, 10) != 0)
5595 f = fopen ("tst.tmp", "rb");
5596 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
5604 if { [check_runtime ftruncate $prog] } {
5608 regsub "ftruncate" $prog "chsize" prog
5609 return [check_runtime chsize $prog]
5612 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
5614 proc add_options_for_c99_runtime { flags } {
5615 if { [istarget *-*-solaris2*] } {
5616 return "$flags -std=c99"
5618 if { [istarget powerpc-*-darwin*] } {
5619 return "$flags -mmacosx-version-min=10.3"
5624 # Add to FLAGS all the target-specific flags needed to enable
5625 # full IEEE compliance mode.
5627 proc add_options_for_ieee { flags } {
5628 if { [istarget alpha*-*-*]
5629 || [istarget sh*-*-*] } {
5630 return "$flags -mieee"
5632 if { [istarget rx-*-*] } {
5633 return "$flags -mnofpu"
5638 if {![info exists flags_to_postpone]} {
5639 set flags_to_postpone ""
5642 # Add to FLAGS the flags needed to enable functions to bind locally
5643 # when using pic/PIC passes in the testsuite.
5644 proc add_options_for_bind_pic_locally { flags } {
5645 global flags_to_postpone
5647 # Instead of returning 'flags' with the -fPIE or -fpie appended, we save it
5648 # in 'flags_to_postpone' and append it later in gcc_target_compile procedure in
5649 # order to make sure that the multilib_flags doesn't override this.
5651 if {[check_no_compiler_messages using_pic2 assembly {
5656 set flags_to_postpone "-fPIE"
5659 if {[check_no_compiler_messages using_pic1 assembly {
5664 set flags_to_postpone "-fpie"
5670 # Add to FLAGS the flags needed to enable 64-bit vectors.
5672 proc add_options_for_double_vectors { flags } {
5673 if [is-effective-target arm_neon_ok] {
5674 return "$flags -mvectorize-with-neon-double"
5680 # Return 1 if the target provides a full C99 runtime.
5682 proc check_effective_target_c99_runtime { } {
5683 return [check_cached_effective_target c99_runtime {
5686 set file [open "$srcdir/gcc.dg/builtins-config.h"]
5687 set contents [read $file]
5690 #ifndef HAVE_C99_RUNTIME
5691 #error !HAVE_C99_RUNTIME
5694 check_no_compiler_messages_nocache c99_runtime assembly \
5695 $contents [add_options_for_c99_runtime ""]
5699 # Return 1 if target wchar_t is at least 4 bytes.
5701 proc check_effective_target_4byte_wchar_t { } {
5702 return [check_no_compiler_messages 4byte_wchar_t object {
5703 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
5707 # Return 1 if the target supports automatic stack alignment.
5709 proc check_effective_target_automatic_stack_alignment { } {
5710 # Ordinarily x86 supports automatic stack alignment ...
5711 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
5712 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
5713 # ... except Win64 SEH doesn't. Succeed for Win32 though.
5714 return [check_effective_target_ilp32];
5721 # Return true if we are compiling for AVX target.
5723 proc check_avx_available { } {
5724 if { [check_no_compiler_messages avx_available assembly {
5734 # Return true if 32- and 16-bytes vectors are available.
5736 proc check_effective_target_vect_sizes_32B_16B { } {
5737 if { [check_avx_available] && ![check_prefer_avx128] } {
5744 # Return true if 128-bits vectors are preferred even if 256-bits vectors
5747 proc check_prefer_avx128 { } {
5748 if ![check_avx_available] {
5751 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
5752 float a[1024],b[1024],c[1024];
5753 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
5754 } "-O2 -ftree-vectorize"]
5758 # Return 1 if avx512f instructions can be compiled.
5760 proc check_effective_target_avx512f { } {
5761 return [check_no_compiler_messages avx512f object {
5762 typedef double __m512d __attribute__ ((__vector_size__ (64)));
5764 __m512d _mm512_add (__m512d a)
5766 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
5771 # Return 1 if avx instructions can be compiled.
5773 proc check_effective_target_avx { } {
5774 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
5777 return [check_no_compiler_messages avx object {
5778 void _mm256_zeroall (void)
5780 __builtin_ia32_vzeroall ();
5785 # Return 1 if avx2 instructions can be compiled.
5786 proc check_effective_target_avx2 { } {
5787 return [check_no_compiler_messages avx2 object {
5788 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
5790 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
5792 return __builtin_ia32_andnotsi256 (__X, __Y);
5797 # Return 1 if sse instructions can be compiled.
5798 proc check_effective_target_sse { } {
5799 return [check_no_compiler_messages sse object {
5802 __builtin_ia32_stmxcsr ();
5808 # Return 1 if sse2 instructions can be compiled.
5809 proc check_effective_target_sse2 { } {
5810 return [check_no_compiler_messages sse2 object {
5811 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
5813 __m128i _mm_srli_si128 (__m128i __A, int __N)
5815 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
5820 # Return 1 if F16C instructions can be compiled.
5822 proc check_effective_target_f16c { } {
5823 return [check_no_compiler_messages f16c object {
5824 #include "immintrin.h"
5826 foo (unsigned short val)
5828 return _cvtsh_ss (val);
5833 # Return 1 if C wchar_t type is compatible with char16_t.
5835 proc check_effective_target_wchar_t_char16_t_compatible { } {
5836 return [check_no_compiler_messages wchar_t_char16_t object {
5838 __CHAR16_TYPE__ *p16 = &wc;
5839 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
5843 # Return 1 if C wchar_t type is compatible with char32_t.
5845 proc check_effective_target_wchar_t_char32_t_compatible { } {
5846 return [check_no_compiler_messages wchar_t_char32_t object {
5848 __CHAR32_TYPE__ *p32 = &wc;
5849 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
5853 # Return 1 if pow10 function exists.
5855 proc check_effective_target_pow10 { } {
5856 return [check_runtime pow10 {
5866 # Return 1 if current options generate DFP instructions, 0 otherwise.
5868 proc check_effective_target_hard_dfp {} {
5869 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
5870 typedef float d64 __attribute__((mode(DD)));
5872 void foo (void) { z = x + y; }
5876 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
5877 # for strchr etc. functions.
5879 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
5880 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
5883 #if !defined(__cplusplus) \
5884 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
5885 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
5886 ISO C++ correct string.h and wchar.h protos not supported.
5893 # Return 1 if GNU as is used.
5895 proc check_effective_target_gas { } {
5896 global use_gas_saved
5899 if {![info exists use_gas_saved]} {
5900 # Check if the as used by gcc is GNU as.
5901 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
5902 # Provide /dev/null as input, otherwise gas times out reading from
5904 set status [remote_exec host "$gcc_as" "-v /dev/null"]
5905 set as_output [lindex $status 1]
5906 if { [ string first "GNU" $as_output ] >= 0 } {
5912 return $use_gas_saved
5915 # Return 1 if GNU ld is used.
5917 proc check_effective_target_gld { } {
5918 global use_gld_saved
5921 if {![info exists use_gld_saved]} {
5922 # Check if the ld used by gcc is GNU ld.
5923 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
5924 set status [remote_exec host "$gcc_ld" "--version"]
5925 set ld_output [lindex $status 1]
5926 if { [ string first "GNU" $ld_output ] >= 0 } {
5932 return $use_gld_saved
5935 # Return 1 if the compiler has been configure with link-time optimization
5938 proc check_effective_target_lto { } {
5939 if { [istarget nvptx-*-*] } {
5942 return [check_no_compiler_messages lto object {
5947 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
5949 proc check_effective_target_maybe_x32 { } {
5950 return [check_no_compiler_messages maybe_x32 object {
5952 } "-mx32 -maddress-mode=short"]
5955 # Return 1 if this target supports the -fsplit-stack option, 0
5958 proc check_effective_target_split_stack {} {
5959 return [check_no_compiler_messages split_stack object {
5964 # Return 1 if this target supports the -masm=intel option, 0
5967 proc check_effective_target_masm_intel {} {
5968 return [check_no_compiler_messages masm_intel object {
5969 extern void abort (void);
5973 # Return 1 if the language for the compiler under test is C.
5975 proc check_effective_target_c { } {
5977 if [string match $tool "gcc"] {
5983 # Return 1 if the language for the compiler under test is C++.
5985 proc check_effective_target_c++ { } {
5987 if [string match $tool "g++"] {
5993 set cxx_default "c++14"
5994 # Check whether the current active language standard supports the features
5995 # of C++11/C++14 by checking for the presence of one of the -std flags.
5996 # This assumes that the default for the compiler is $cxx_default, and that
5997 # there will never be multiple -std= arguments on the command line.
5998 proc check_effective_target_c++11_only { } {
6000 if ![check_effective_target_c++] {
6003 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
6006 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
6011 proc check_effective_target_c++11 { } {
6012 if [check_effective_target_c++11_only] {
6015 return [check_effective_target_c++14]
6017 proc check_effective_target_c++11_down { } {
6018 if ![check_effective_target_c++] {
6021 return [expr ![check_effective_target_c++14] ]
6024 proc check_effective_target_c++14_only { } {
6026 if ![check_effective_target_c++] {
6029 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
6032 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
6038 proc check_effective_target_c++14 { } {
6039 if [check_effective_target_c++14_only] {
6042 return [check_effective_target_c++1z]
6044 proc check_effective_target_c++14_down { } {
6045 if ![check_effective_target_c++] {
6048 return [expr ![check_effective_target_c++1z] ]
6051 proc check_effective_target_c++98_only { } {
6053 if ![check_effective_target_c++] {
6056 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
6059 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
6065 proc check_effective_target_c++1z_only { } {
6067 if ![check_effective_target_c++] {
6070 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
6073 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
6078 proc check_effective_target_c++1z { } {
6079 return [check_effective_target_c++1z_only]
6082 # Return 1 if expensive testcases should be run.
6084 proc check_effective_target_run_expensive_tests { } {
6085 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
6091 # Returns 1 if "mempcpy" is available on the target system.
6093 proc check_effective_target_mempcpy {} {
6094 return [check_function_available "mempcpy"]
6097 # Returns 1 if "stpcpy" is available on the target system.
6099 proc check_effective_target_stpcpy {} {
6100 return [check_function_available "stpcpy"]
6103 # Check whether the vectorizer tests are supported by the target and
6104 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
6105 # Set dg-do-what-default to either compile or run, depending on target
6106 # capabilities. Return 1 if vectorizer tests are supported by
6107 # target, 0 otherwise.
6109 proc check_vect_support_and_set_flags { } {
6110 global DEFAULT_VECTCFLAGS
6111 global dg-do-what-default
6113 if [istarget powerpc-*paired*] {
6114 lappend DEFAULT_VECTCFLAGS "-mpaired"
6115 if [check_750cl_hw_available] {
6116 set dg-do-what-default run
6118 set dg-do-what-default compile
6120 } elseif [istarget powerpc*-*-*] {
6121 # Skip targets not supporting -maltivec.
6122 if ![is-effective-target powerpc_altivec_ok] {
6126 lappend DEFAULT_VECTCFLAGS "-maltivec"
6127 if [check_p8vector_hw_available] {
6128 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
6129 } elseif [check_vsx_hw_available] {
6130 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
6133 if [check_vmx_hw_available] {
6134 set dg-do-what-default run
6136 if [is-effective-target ilp32] {
6137 # Specify a cpu that supports VMX for compile-only tests.
6138 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
6140 set dg-do-what-default compile
6142 } elseif { [istarget spu-*-*] } {
6143 set dg-do-what-default run
6144 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
6145 lappend DEFAULT_VECTCFLAGS "-msse2"
6146 if { [check_effective_target_sse2_runtime] } {
6147 set dg-do-what-default run
6149 set dg-do-what-default compile
6151 } elseif { [istarget mips*-*-*]
6152 && ([check_effective_target_mpaired_single]
6153 || [check_effective_target_mips_loongson])
6154 && [check_effective_target_nomips16] } {
6155 if { [check_effective_target_mpaired_single] } {
6156 lappend DEFAULT_VECTCFLAGS "-mpaired-single"
6158 set dg-do-what-default run
6159 } elseif [istarget sparc*-*-*] {
6160 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
6161 if [check_effective_target_ultrasparc_hw] {
6162 set dg-do-what-default run
6164 set dg-do-what-default compile
6166 } elseif [istarget alpha*-*-*] {
6167 # Alpha's vectorization capabilities are extremely limited.
6168 # It's more effort than its worth disabling all of the tests
6169 # that it cannot pass. But if you actually want to see what
6170 # does work, command out the return.
6173 lappend DEFAULT_VECTCFLAGS "-mmax"
6174 if [check_alpha_max_hw_available] {
6175 set dg-do-what-default run
6177 set dg-do-what-default compile
6179 } elseif [istarget ia64-*-*] {
6180 set dg-do-what-default run
6181 } elseif [is-effective-target arm_neon_ok] {
6182 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
6183 # NEON does not support denormals, so is not used for vectorization by
6184 # default to avoid loss of precision. We must pass -ffast-math to test
6185 # vectorization of float operations.
6186 lappend DEFAULT_VECTCFLAGS "-ffast-math"
6187 if [is-effective-target arm_neon_hw] {
6188 set dg-do-what-default run
6190 set dg-do-what-default compile
6192 } elseif [istarget "aarch64*-*-*"] {
6193 set dg-do-what-default run
6201 # Return 1 if the target does *not* require strict alignment.
6203 proc check_effective_target_non_strict_align {} {
6204 return [check_no_compiler_messages non_strict_align assembly {
6206 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
6208 void foo(void) { z = (c *) y; }
6212 # Return 1 if the target has <ucontext.h>.
6214 proc check_effective_target_ucontext_h { } {
6215 return [check_no_compiler_messages ucontext_h assembly {
6216 #include <ucontext.h>
6220 proc check_effective_target_aarch64_tiny { } {
6221 if { [istarget aarch64*-*-*] } {
6222 return [check_no_compiler_messages aarch64_tiny object {
6223 #ifdef __AARCH64_CMODEL_TINY__
6226 #error target not AArch64 tiny code model
6234 proc check_effective_target_aarch64_small { } {
6235 if { [istarget aarch64*-*-*] } {
6236 return [check_no_compiler_messages aarch64_small object {
6237 #ifdef __AARCH64_CMODEL_SMALL__
6240 #error target not AArch64 small code model
6248 proc check_effective_target_aarch64_large { } {
6249 if { [istarget aarch64*-*-*] } {
6250 return [check_no_compiler_messages aarch64_large object {
6251 #ifdef __AARCH64_CMODEL_LARGE__
6254 #error target not AArch64 large code model
6262 # Return 1 if <fenv.h> is available with all the standard IEEE
6263 # exceptions and floating-point exceptions are raised by arithmetic
6264 # operations. (If the target requires special options for "inexact"
6265 # exceptions, those need to be specified in the testcases.)
6267 proc check_effective_target_fenv_exceptions {} {
6268 return [check_runtime fenv_exceptions {
6271 #ifndef FE_DIVBYZERO
6272 # error Missing FE_DIVBYZERO
6275 # error Missing FE_INEXACT
6278 # error Missing FE_INVALID
6281 # error Missing FE_OVERFLOW
6283 #ifndef FE_UNDERFLOW
6284 # error Missing FE_UNDERFLOW
6286 volatile float a = 0.0f, r;
6291 if (fetestexcept (FE_INVALID))
6296 } [add_options_for_ieee "-std=gnu99"]]
6299 proc check_effective_target_tiny {} {
6300 global et_target_tiny_saved
6302 if [info exists et_target_tine_saved] {
6303 verbose "check_effective_target_tiny: using cached result" 2
6305 set et_target_tiny_saved 0
6306 if { [istarget aarch64*-*-*]
6307 && [check_effective_target_aarch64_tiny] } {
6308 set et_target_tiny_saved 1
6312 return $et_target_tiny_saved
6315 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
6317 proc check_effective_target_logical_op_short_circuit {} {
6318 if { [istarget mips*-*-*]
6319 || [istarget arc*-*-*]
6320 || [istarget avr*-*-*]
6321 || [istarget crisv32-*-*] || [istarget cris-*-*]
6322 || [istarget mmix-*-*]
6323 || [istarget s390*-*-*]
6324 || [istarget powerpc*-*-*]
6325 || [istarget nios2*-*-*]
6326 || [istarget visium-*-*]
6327 || [check_effective_target_arm_cortex_m] } {
6333 # Record that dg-final test TEST requires convential compilation.
6335 proc force_conventional_output_for { test } {
6336 if { [info proc $test] == "" } {
6337 perror "$test does not exist"
6340 proc ${test}_required_options {} {
6341 global gcc_force_conventional_output
6342 return $gcc_force_conventional_output
6346 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
6347 # otherwise. Cache the result.
6349 proc check_effective_target_pie_copyreloc { } {
6350 global pie_copyreloc_available_saved
6352 global GCC_UNDER_TEST
6354 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
6358 # Need auto-host.h to check linker support.
6359 if { ![file exists ../../auto-host.h ] } {
6363 if [info exists pie_copyreloc_available_saved] {
6364 verbose "check_effective_target_pie_copyreloc returning saved $pie_copyreloc_available_saved" 2
6366 # Set up and compile to see if linker supports PIE with copy
6367 # reloc. Include the current process ID in the file names to
6368 # prevent conflicts with invocations for multiple testsuites.
6373 set f [open $src "w"]
6374 puts $f "#include \"../../auto-host.h\""
6375 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
6376 puts $f "# error Linker does not support PIE with copy reloc."
6380 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
6381 set lines [${tool}_target_compile $src $obj object ""]
6386 if [string match "" $lines] then {
6387 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
6388 set pie_copyreloc_available_saved 1
6390 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
6391 set pie_copyreloc_available_saved 0
6395 return $pie_copyreloc_available_saved
6398 # Return 1 if the target uses comdat groups.
6400 proc check_effective_target_comdat_group {} {
6401 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat" assembly {
6403 inline int foo () { return 1; }