1 # Copyright (C) 1999-2016 Free Software Foundation, Inc.
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC; see the file COPYING3. If not see
15 # <http://www.gnu.org/licenses/>.
17 # Please email any bugs, comments, and/or additions to this file to:
18 # gcc-patches@gcc.gnu.org
20 # This file defines procs for determining features supported by the target.
22 # Try to compile the code given by CONTENTS into an output file of
23 # type TYPE, where TYPE is as for target_compile. Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the name of the output file.
27 # BASENAME is a prefix to use for source and output files.
28 # If ARGS is not empty, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise, code should contain:
34 # "! Fortran" for Fortran code,
36 # "// ObjC++" for ObjC++
38 # If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
39 # allow for ObjC/ObjC++ specific flags.
40 proc check_compile {basename type contents args} {
42 verbose "check_compile tool: $tool for $basename"
44 # Save additional_sources to avoid compiling testsuite's sources
45 # against check_compile's source.
46 global additional_sources
47 if [info exists additional_sources] {
48 set tmp_additional_sources "$additional_sources"
49 set additional_sources ""
52 if { [llength $args] > 0 } {
53 set options [list "additional_flags=[lindex $args 0]"]
57 switch -glob -- $contents {
58 "*! Fortran*" { set src ${basename}[pid].f90 }
59 "*// C++*" { set src ${basename}[pid].cc }
60 "*// ObjC++*" { set src ${basename}[pid].mm }
61 "*/* ObjC*" { set src ${basename}[pid].m }
62 "*// Go*" { set src ${basename}[pid].go }
65 "objc" { set src ${basename}[pid].m }
66 "obj-c++" { set src ${basename}[pid].mm }
67 default { set src ${basename}[pid].c }
72 set compile_type $type
74 assembly { set output ${basename}[pid].s }
75 object { set output ${basename}[pid].o }
76 executable { set output ${basename}[pid].exe }
78 set output ${basename}[pid].s
79 lappend options "additional_flags=-fdump-$type"
80 set compile_type assembly
86 set lines [${tool}_target_compile $src $output $compile_type "$options"]
89 set scan_output $output
90 # Don't try folding this into the switch above; calling "glob" before the
91 # file is created won't work.
92 if [regexp "rtl-(.*)" $type dummy rtl_type] {
93 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
97 # Restore additional_sources.
98 if [info exists additional_sources] {
99 set additional_sources "$tmp_additional_sources"
102 return [list $lines $scan_output]
105 proc current_target_name { } {
107 if [info exists target_info(target,name)] {
108 set answer $target_info(target,name)
115 # Implement an effective-target check for property PROP by invoking
116 # the Tcl command ARGS and seeing if it returns true.
118 proc check_cached_effective_target { prop args } {
122 set target [current_target_name]
123 if {![info exists et_cache($prop,target)]
124 || $et_cache($prop,target) != $target} {
125 verbose "check_cached_effective_target $prop: checking $target" 2
126 set et_cache($prop,target) $target
127 set et_cache($prop,value) [uplevel eval $args]
128 if {![info exists et_prop_list]
129 || [lsearch $et_prop_list $prop] < 0} {
130 lappend et_prop_list $prop
132 verbose "check_cached_effective_target cached list is now: $et_prop_list" 2
134 set value $et_cache($prop,value)
135 verbose "check_cached_effective_target $prop: returning $value for $target" 2
139 # Clear effective-target cache. This is useful after testing
140 # effective-target features and overriding TEST_ALWAYS_FLAGS and/or
142 # If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS then they should
143 # do a clear_effective_target_cache at the end as the target cache can
144 # make decisions based upon the flags, and those decisions need to be
145 # redone when the flags change. An example of this is the
146 # asan_init/asan_finish pair.
148 proc clear_effective_target_cache { } {
152 if {[info exists et_prop_list]} {
153 verbose "clear_effective_target_cache: $et_prop_list" 2
154 foreach prop $et_prop_list {
155 unset et_cache($prop,value)
156 unset et_cache($prop,target)
162 # Like check_compile, but delete the output file and return true if the
163 # compiler printed no messages.
164 proc check_no_compiler_messages_nocache {args} {
165 set result [eval check_compile $args]
166 set lines [lindex $result 0]
167 set output [lindex $result 1]
168 remote_file build delete $output
169 return [string match "" $lines]
172 # Like check_no_compiler_messages_nocache, but cache the result.
173 # PROP is the property we're checking, and doubles as a prefix for
174 # temporary filenames.
175 proc check_no_compiler_messages {prop args} {
176 return [check_cached_effective_target $prop {
177 eval [list check_no_compiler_messages_nocache $prop] $args
181 # Like check_compile, but return true if the compiler printed no
182 # messages and if the contents of the output file satisfy PATTERN.
183 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
184 # don't match regular expression REGEXP, otherwise they satisfy it
185 # if they do match regular expression PATTERN. (PATTERN can start
186 # with something like "[!]" if the regular expression needs to match
187 # "!" as the first character.)
189 # Delete the output file before returning. The other arguments are
190 # as for check_compile.
191 proc check_no_messages_and_pattern_nocache {basename pattern args} {
194 set result [eval [list check_compile $basename] $args]
195 set lines [lindex $result 0]
196 set output [lindex $result 1]
199 if { [string match "" $lines] } {
200 set chan [open "$output"]
201 set invert [regexp {^!(.*)} $pattern dummy pattern]
202 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
206 remote_file build delete $output
210 # Like check_no_messages_and_pattern_nocache, but cache the result.
211 # PROP is the property we're checking, and doubles as a prefix for
212 # temporary filenames.
213 proc check_no_messages_and_pattern {prop pattern args} {
214 return [check_cached_effective_target $prop {
215 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
219 # Try to compile and run an executable from code CONTENTS. Return true
220 # if the compiler reports no messages and if execution "passes" in the
221 # usual DejaGNU sense. The arguments are as for check_compile, with
222 # TYPE implicitly being "executable".
223 proc check_runtime_nocache {basename contents args} {
226 set result [eval [list check_compile $basename executable $contents] $args]
227 set lines [lindex $result 0]
228 set output [lindex $result 1]
231 if { [string match "" $lines] } {
232 # No error messages, everything is OK.
233 set result [remote_load target "./$output" "" ""]
234 set status [lindex $result 0]
235 verbose "check_runtime_nocache $basename: status is <$status>" 2
236 if { $status == "pass" } {
240 remote_file build delete $output
244 # Like check_runtime_nocache, but cache the result. PROP is the
245 # property we're checking, and doubles as a prefix for temporary
247 proc check_runtime {prop args} {
250 return [check_cached_effective_target $prop {
251 eval [list check_runtime_nocache $prop] $args
255 ###############################
256 # proc check_weak_available { }
257 ###############################
259 # weak symbols are only supported in some configs/object formats
260 # this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
262 proc check_weak_available { } {
265 # All mips targets should support it
267 if { [ string first "mips" $target_cpu ] >= 0 } {
271 # All AIX targets should support it
273 if { [istarget *-*-aix*] } {
277 # All solaris2 targets should support it
279 if { [istarget *-*-solaris2*] } {
283 # Windows targets Cygwin and MingW32 support it
285 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
289 # HP-UX 10.X doesn't support it
291 if { [istarget hppa*-*-hpux10*] } {
295 # nvptx (nearly) supports it
297 if { [istarget nvptx-*-*] } {
301 # ELF and ECOFF support it. a.out does with gas/gld but may also with
302 # other linkers, so we should try it
304 set objformat [gcc_target_object_format]
312 unknown { return -1 }
317 ###############################
318 # proc check_weak_override_available { }
319 ###############################
321 # Like check_weak_available, but return 0 if weak symbol definitions
322 # cannot be overridden.
324 proc check_weak_override_available { } {
325 if { [istarget *-*-mingw*] } {
328 return [check_weak_available]
331 ###############################
332 # proc check_visibility_available { what_kind }
333 ###############################
335 # The visibility attribute is only support in some object formats
336 # This proc returns 1 if it is supported, 0 if not.
337 # The argument is the kind of visibility, default/protected/hidden/internal.
339 proc check_visibility_available { what_kind } {
340 if [string match "" $what_kind] { set what_kind "hidden" }
342 return [check_no_compiler_messages visibility_available_$what_kind object "
343 void f() __attribute__((visibility(\"$what_kind\")));
348 ###############################
349 # proc check_alias_available { }
350 ###############################
352 # Determine if the target toolchain supports the alias attribute.
354 # Returns 2 if the target supports aliases. Returns 1 if the target
355 # only supports weak aliased. Returns 0 if the target does not
356 # support aliases at all. Returns -1 if support for aliases could not
359 proc check_alias_available { } {
360 global alias_available_saved
363 if [info exists alias_available_saved] {
364 verbose "check_alias_available returning saved $alias_available_saved" 2
368 verbose "check_alias_available compiling testfile $src" 2
369 set f [open $src "w"]
370 # Compile a small test program. The definition of "g" is
371 # necessary to keep the Solaris assembler from complaining
373 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
374 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
376 set lines [${tool}_target_compile $src $obj object ""]
378 remote_file build delete $obj
380 if [string match "" $lines] then {
381 # No error messages, everything is OK.
382 set alias_available_saved 2
384 if [regexp "alias definitions not supported" $lines] {
385 verbose "check_alias_available target does not support aliases" 2
387 set objformat [gcc_target_object_format]
389 if { $objformat == "elf" } {
390 verbose "check_alias_available but target uses ELF format, so it ought to" 2
391 set alias_available_saved -1
393 set alias_available_saved 0
396 if [regexp "only weak aliases are supported" $lines] {
397 verbose "check_alias_available target supports only weak aliases" 2
398 set alias_available_saved 1
400 set alias_available_saved -1
405 verbose "check_alias_available returning $alias_available_saved" 2
408 return $alias_available_saved
411 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
413 proc check_effective_target_alias { } {
414 if { [check_alias_available] < 2 } {
421 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
423 proc check_ifunc_available { } {
424 return [check_no_compiler_messages ifunc_available object {
429 void f() __attribute__((ifunc("g")));
433 # Returns true if --gc-sections is supported on the target.
435 proc check_gc_sections_available { } {
436 global gc_sections_available_saved
439 if {![info exists gc_sections_available_saved]} {
440 # Some targets don't support gc-sections despite whatever's
441 # advertised by ld's options.
442 if { [istarget alpha*-*-*]
443 || [istarget ia64-*-*] } {
444 set gc_sections_available_saved 0
448 # elf2flt uses -q (--emit-relocs), which is incompatible with
450 if { [board_info target exists ldflags]
451 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
452 set gc_sections_available_saved 0
456 # VxWorks kernel modules are relocatable objects linked with -r,
457 # while RTP executables are linked with -q (--emit-relocs).
458 # Both of these options are incompatible with --gc-sections.
459 if { [istarget *-*-vxworks*] } {
460 set gc_sections_available_saved 0
464 # Check if the ld used by gcc supports --gc-sections.
465 set gcc_spec [${tool}_target_compile "-dumpspecs" "" "none" ""]
466 regsub ".*\n\\*linker:\[ \t\]*\n(\[^ \t\n\]*).*" "$gcc_spec" {\1} linker
467 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=$linker" "" "none" ""] 0]
468 set ld_output [remote_exec host "$gcc_ld" "--help"]
469 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
470 set gc_sections_available_saved 1
472 set gc_sections_available_saved 0
475 return $gc_sections_available_saved
478 # Return 1 if according to target_info struct and explicit target list
479 # target is supposed to support trampolines.
481 proc check_effective_target_trampolines { } {
482 if [target_info exists no_trampolines] {
485 if { [istarget avr-*-*]
486 || [istarget msp430-*-*]
487 || [istarget nvptx-*-*]
488 || [istarget hppa2.0w-hp-hpux11.23]
489 || [istarget hppa64-hp-hpux11.23] } {
495 # Return 1 if according to target_info struct and explicit target list
496 # target disables -fdelete-null-pointer-checks. Targets should return 0
497 # if they simply default to -fno-delete-null-pointer-checks but obey
498 # -fdelete-null-pointer-checks when passed explicitly (and tests that
499 # depend on this option should do that).
501 proc check_effective_target_keeps_null_pointer_checks { } {
502 if [target_info exists keeps_null_pointer_checks] {
505 if { [istarget avr-*-*] } {
511 # Return the autofdo profile wrapper
513 proc profopt-perf-wrapper { } {
515 return "$srcdir/../config/i386/gcc-auto-profile -o perf.data "
518 # Return true if profiling is supported on the target.
520 proc check_profiling_available { test_what } {
521 global profiling_available_saved
523 verbose "Profiling argument is <$test_what>" 1
525 # These conditions depend on the argument so examine them before
526 # looking at the cache variable.
528 # Tree profiling requires TLS runtime support.
529 if { $test_what == "-fprofile-generate" } {
530 if { ![check_effective_target_tls_runtime] } {
535 if { $test_what == "-fauto-profile" } {
536 if { ! ([istarget x86_64-*-linux*] || [istarget i?86-*-linux*]) } {
537 verbose "autofdo only supported on linux"
540 # not cross compiling?
542 verbose "autofdo not supported for non native builds"
545 set event [profopt-perf-wrapper]
547 verbose "autofdo not supported"
551 set status [remote_exec host "$srcdir/../config/i386/gcc-auto-profile" "true -v >/dev/null"]
552 if { [lindex $status 0] != 0 } {
553 verbose "autofdo not supported because perf does not work"
557 # no good way to check this in advance -- check later instead.
558 #set status [remote_exec host "create_gcov" "2>/dev/null"]
559 #if { [lindex $status 0] != 255 } {
560 # verbose "autofdo not supported due to missing create_gcov"
565 # Support for -p on solaris2 relies on mcrt1.o which comes with the
566 # vendor compiler. We cannot reliably predict the directory where the
567 # vendor compiler (and thus mcrt1.o) is installed so we can't
568 # necessarily find mcrt1.o even if we have it.
569 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
573 # We don't yet support profiling for MIPS16.
574 if { [istarget mips*-*-*]
575 && ![check_effective_target_nomips16]
576 && ($test_what == "-p" || $test_what == "-pg") } {
580 # MinGW does not support -p.
581 if { [istarget *-*-mingw*] && $test_what == "-p" } {
585 # cygwin does not support -p.
586 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
590 # uClibc does not have gcrt1.o.
591 if { [check_effective_target_uclibc]
592 && ($test_what == "-p" || $test_what == "-pg") } {
596 # Now examine the cache variable.
597 if {![info exists profiling_available_saved]} {
598 # Some targets don't have any implementation of __bb_init_func or are
599 # missing other needed machinery.
600 if {[istarget aarch64*-*-elf]
601 || [istarget am3*-*-linux*]
602 || [istarget arm*-*-eabi*]
603 || [istarget arm*-*-elf]
604 || [istarget arm*-*-symbianelf*]
605 || [istarget avr-*-*]
606 || [istarget bfin-*-*]
607 || [istarget cris-*-*]
608 || [istarget crisv32-*-*]
609 || [istarget fido-*-elf]
610 || [istarget h8300-*-*]
611 || [istarget lm32-*-*]
612 || [istarget m32c-*-elf]
613 || [istarget m68k-*-elf]
614 || [istarget m68k-*-uclinux*]
615 || [istarget mips*-*-elf*]
616 || [istarget mmix-*-*]
617 || [istarget mn10300-*-elf*]
618 || [istarget moxie-*-elf*]
619 || [istarget msp430-*-*]
620 || [istarget nds32*-*-elf]
621 || [istarget nios2-*-elf]
622 || [istarget nvptx-*-*]
623 || [istarget powerpc-*-eabi*]
624 || [istarget powerpc-*-elf]
626 || [istarget tic6x-*-elf]
627 || [istarget visium-*-*]
628 || [istarget xstormy16-*]
629 || [istarget xtensa*-*-elf]
630 || [istarget *-*-rtems*]
631 || [istarget *-*-vxworks*] } {
632 set profiling_available_saved 0
634 set profiling_available_saved 1
638 # -pg link test result can't be cached since it may change between
640 set profiling_working $profiling_available_saved
641 if { $profiling_available_saved == 1
642 && ![check_no_compiler_messages_nocache profiling executable {
643 int main() { return 0; } } "-pg"] } {
644 set profiling_working 0
647 return $profiling_working
650 # Check to see if a target is "freestanding". This is as per the definition
651 # in Section 4 of C99 standard. Effectively, it is a target which supports no
652 # extra headers or libraries other than what is considered essential.
653 proc check_effective_target_freestanding { } {
654 if { [istarget nvptx-*-*] } {
660 # Return 1 if target has packed layout of structure members by
661 # default, 0 otherwise. Note that this is slightly different than
662 # whether the target has "natural alignment": both attributes may be
665 proc check_effective_target_default_packed { } {
666 return [check_no_compiler_messages default_packed assembly {
667 struct x { char a; long b; } c;
668 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
672 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
673 # documentation, where the test also comes from.
675 proc check_effective_target_pcc_bitfield_type_matters { } {
676 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
677 # bitfields, but let's stick to the example code from the docs.
678 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
679 struct foo1 { char x; char :0; char y; };
680 struct foo2 { char x; int :0; char y; };
681 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
685 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
687 proc add_options_for_tls { flags } {
688 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
689 # libthread, so always pass -pthread for native TLS. Same for AIX.
690 # Need to duplicate native TLS check from
691 # check_effective_target_tls_native to avoid recursion.
692 if { ([istarget powerpc-ibm-aix*]) &&
693 [check_no_messages_and_pattern tls_native "!emutls" assembly {
695 int f (void) { return i; }
696 void g (int j) { i = j; }
698 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
703 # Return 1 if indirect jumps are supported, 0 otherwise.
705 proc check_effective_target_indirect_jumps {} {
706 if { [istarget nvptx-*-*] } {
712 # Return 1 if nonlocal goto is supported, 0 otherwise.
714 proc check_effective_target_nonlocal_goto {} {
715 if { [istarget nvptx-*-*] } {
721 # Return 1 if global constructors are supported, 0 otherwise.
723 proc check_effective_target_global_constructor {} {
724 if { [istarget nvptx-*-*] } {
730 # Return 1 if taking label values is supported, 0 otherwise.
732 proc check_effective_target_label_values {} {
733 if { [istarget nvptx-*-*] } {
736 return [check_no_compiler_messages label_values assembly {
737 #ifdef NO_LABEL_VALUES
743 # Return 1 if builtin_return_address and builtin_frame_address are
744 # supported, 0 otherwise.
746 proc check_effective_target_return_address {} {
747 if { [istarget nvptx-*-*] } {
753 # Return 1 if the assembler does not verify function types against
754 # calls, 0 otherwise. Such verification will typically show up problems
755 # with K&R C function declarations.
757 proc check_effective_target_untyped_assembly {} {
758 if { [istarget nvptx-*-*] } {
764 # Return 1 if alloca is supported, 0 otherwise.
766 proc check_effective_target_alloca {} {
767 if { [istarget nvptx-*-*] } {
773 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
775 proc check_effective_target_tls {} {
776 return [check_no_compiler_messages tls assembly {
778 int f (void) { return i; }
779 void g (int j) { i = j; }
783 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
785 proc check_effective_target_tls_native {} {
786 # VxWorks uses emulated TLS machinery, but with non-standard helper
787 # functions, so we fail to automatically detect it.
788 if { [istarget *-*-vxworks*] } {
792 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
794 int f (void) { return i; }
795 void g (int j) { i = j; }
799 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
801 proc check_effective_target_tls_emulated {} {
802 # VxWorks uses emulated TLS machinery, but with non-standard helper
803 # functions, so we fail to automatically detect it.
804 if { [istarget *-*-vxworks*] } {
808 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
810 int f (void) { return i; }
811 void g (int j) { i = j; }
815 # Return 1 if TLS executables can run correctly, 0 otherwise.
817 proc check_effective_target_tls_runtime {} {
818 # The runtime does not have TLS support, but just
819 # running the test below is insufficient to show this.
820 if { [istarget msp430-*-*] || [istarget visium-*-*] } {
823 return [check_runtime tls_runtime {
824 __thread int thr = 0;
825 int main (void) { return thr; }
826 } [add_options_for_tls ""]]
829 # Return 1 if atomic compare-and-swap is supported on 'int'
831 proc check_effective_target_cas_char {} {
832 return [check_no_compiler_messages cas_char assembly {
833 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
839 proc check_effective_target_cas_int {} {
840 return [check_no_compiler_messages cas_int assembly {
841 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
843 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
851 # Return 1 if -ffunction-sections is supported, 0 otherwise.
853 proc check_effective_target_function_sections {} {
854 # Darwin has its own scheme and silently accepts -ffunction-sections.
855 if { [istarget *-*-darwin*] } {
859 return [check_no_compiler_messages functionsections assembly {
861 } "-ffunction-sections"]
864 # Return 1 if instruction scheduling is available, 0 otherwise.
866 proc check_effective_target_scheduling {} {
867 return [check_no_compiler_messages scheduling object {
869 } "-fschedule-insns"]
872 # Return 1 if trapping arithmetic is available, 0 otherwise.
874 proc check_effective_target_trapping {} {
875 return [check_no_compiler_messages trapping object {
876 int add (int a, int b) { return a + b; }
880 # Return 1 if compilation with -fgraphite is error-free for trivial
883 proc check_effective_target_fgraphite {} {
884 return [check_no_compiler_messages fgraphite object {
889 # Return 1 if compilation with -fopenacc is error-free for trivial
892 proc check_effective_target_fopenacc {} {
893 # nvptx can be built with the device-side bits of openacc, but it
894 # does not make sense to test it as an openacc host.
895 if [istarget nvptx-*-*] { return 0 }
897 return [check_no_compiler_messages fopenacc object {
902 # Return 1 if compilation with -fopenmp is error-free for trivial
905 proc check_effective_target_fopenmp {} {
906 # nvptx can be built with the device-side bits of libgomp, but it
907 # does not make sense to test it as an openmp host.
908 if [istarget nvptx-*-*] { return 0 }
910 return [check_no_compiler_messages fopenmp object {
915 # Return 1 if compilation with -fgnu-tm is error-free for trivial
918 proc check_effective_target_fgnu_tm {} {
919 return [check_no_compiler_messages fgnu_tm object {
924 # Return 1 if the target supports mmap, 0 otherwise.
926 proc check_effective_target_mmap {} {
927 return [check_function_available "mmap"]
930 # Return 1 if the target supports dlopen, 0 otherwise.
931 proc check_effective_target_dlopen {} {
932 return [check_no_compiler_messages dlopen executable {
934 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
935 } [add_options_for_dlopen ""]]
938 proc add_options_for_dlopen { flags } {
942 # Return 1 if the target supports clone, 0 otherwise.
943 proc check_effective_target_clone {} {
944 return [check_function_available "clone"]
947 # Return 1 if the target supports setrlimit, 0 otherwise.
948 proc check_effective_target_setrlimit {} {
949 # Darwin has non-posix compliant RLIMIT_AS
950 if { [istarget *-*-darwin*] } {
953 return [check_function_available "setrlimit"]
956 # Return 1 if the target supports swapcontext, 0 otherwise.
957 proc check_effective_target_swapcontext {} {
958 return [check_no_compiler_messages swapcontext executable {
959 #include <ucontext.h>
962 ucontext_t orig_context,child_context;
963 if (swapcontext(&child_context, &orig_context) < 0) { }
968 # Return 1 if compilation with -pthread is error-free for trivial
971 proc check_effective_target_pthread {} {
972 return [check_no_compiler_messages pthread object {
977 # Return 1 if compilation with -gstabs is error-free for trivial
980 proc check_effective_target_stabs {} {
981 return [check_no_compiler_messages stabs object {
986 # Return 1 if compilation with -mpe-aligned-commons is error-free
987 # for trivial code, 0 otherwise.
989 proc check_effective_target_pe_aligned_commons {} {
990 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
991 return [check_no_compiler_messages pe_aligned_commons object {
993 } "-mpe-aligned-commons"]
998 # Return 1 if the target supports -static
999 proc check_effective_target_static {} {
1000 return [check_no_compiler_messages static executable {
1001 int main (void) { return 0; }
1005 # Return 1 if the target supports -fstack-protector
1006 proc check_effective_target_fstack_protector {} {
1007 return [check_runtime fstack_protector {
1008 int main (void) { return 0; }
1009 } "-fstack-protector"]
1012 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
1013 # for trivial code, 0 otherwise.
1015 proc check_effective_target_freorder {} {
1016 return [check_no_compiler_messages freorder object {
1018 } "-freorder-blocks-and-partition"]
1021 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
1022 # emitted, 0 otherwise. Whether a shared library can actually be built is
1023 # out of scope for this test.
1025 proc check_effective_target_fpic { } {
1026 # Note that M68K has a multilib that supports -fpic but not
1027 # -fPIC, so we need to check both. We test with a program that
1028 # requires GOT references.
1029 foreach arg {fpic fPIC} {
1030 if [check_no_compiler_messages $arg object {
1031 extern int foo (void); extern int bar;
1032 int baz (void) { return foo () + bar; }
1040 # On AArch64, if -fpic is not supported, then we will fall back to -fPIC
1041 # silently. So, we can't rely on above "check_effective_target_fpic" as it
1042 # assumes compiler will give warning if -fpic not supported. Here we check
1043 # whether binutils supports those new -fpic relocation modifiers, and assume
1044 # -fpic is supported if there is binutils support. GCC configuration will
1045 # enable -fpic for AArch64 in this case.
1047 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1048 # memory model -fpic relocation types.
1050 proc check_effective_target_aarch64_small_fpic { } {
1051 if { [istarget aarch64*-*-*] } {
1052 return [check_no_compiler_messages aarch64_small_fpic object {
1053 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1060 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1061 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1062 # in binutils since 2015-03-04 as PR gas/17843.
1064 # This test directive make sure binutils support all features needed by TLS LE
1065 # under -mtls-size=32 on AArch64.
1067 proc check_effective_target_aarch64_tlsle32 { } {
1068 if { [istarget aarch64*-*-*] } {
1069 return [check_no_compiler_messages aarch64_tlsle32 object {
1070 void foo (void) { asm ("movk x1,#:tprel_g0_nc:t1"); }
1077 # Return 1 if -shared is supported, as in no warnings or errors
1078 # emitted, 0 otherwise.
1080 proc check_effective_target_shared { } {
1081 # Note that M68K has a multilib that supports -fpic but not
1082 # -fPIC, so we need to check both. We test with a program that
1083 # requires GOT references.
1084 return [check_no_compiler_messages shared executable {
1085 extern int foo (void); extern int bar;
1086 int baz (void) { return foo () + bar; }
1090 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
1092 proc check_effective_target_pie { } {
1093 if { [istarget *-*-darwin\[912\]*]
1094 || [istarget *-*-dragonfly*]
1095 || [istarget *-*-freebsd*]
1096 || [istarget *-*-linux*]
1097 || [istarget *-*-gnu*] } {
1100 if { [istarget *-*-solaris2.1\[1-9\]*] } {
1101 # Full PIE support was added in Solaris 11.x and Solaris 12, but gcc
1102 # errors out if missing, so check for that.
1103 return [check_no_compiler_messages pie executable {
1104 int main (void) { return 0; }
1110 # Return true if the target supports -mpaired-single (as used on MIPS).
1112 proc check_effective_target_mpaired_single { } {
1113 return [check_no_compiler_messages mpaired_single object {
1115 } "-mpaired-single"]
1118 # Return true if the target has access to FPU instructions.
1120 proc check_effective_target_hard_float { } {
1121 if { [istarget mips*-*-*] } {
1122 return [check_no_compiler_messages hard_float assembly {
1123 #if (defined __mips_soft_float || defined __mips16)
1124 #error __mips_soft_float || __mips16
1129 # This proc is actually checking the availabilty of FPU
1130 # support for doubles, so on the RX we must fail if the
1131 # 64-bit double multilib has been selected.
1132 if { [istarget rx-*-*] } {
1134 # return [check_no_compiler_messages hard_float assembly {
1135 #if defined __RX_64_BIT_DOUBLES__
1136 #error __RX_64_BIT_DOUBLES__
1141 # The generic test equates hard_float with "no call for adding doubles".
1142 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
1143 double a (double b, double c) { return b + c; }
1147 # Return true if the target is a 64-bit MIPS target.
1149 proc check_effective_target_mips64 { } {
1150 return [check_no_compiler_messages mips64 assembly {
1157 # Return true if the target is a MIPS target that does not produce
1160 proc check_effective_target_nomips16 { } {
1161 return [check_no_compiler_messages nomips16 object {
1165 /* A cheap way of testing for -mflip-mips16. */
1166 void foo (void) { asm ("addiu $20,$20,1"); }
1167 void bar (void) { asm ("addiu $20,$20,1"); }
1172 # Add the options needed for MIPS16 function attributes. At the moment,
1173 # we don't support MIPS16 PIC.
1175 proc add_options_for_mips16_attribute { flags } {
1176 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1179 # Return true if we can force a mode that allows MIPS16 code generation.
1180 # We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
1183 proc check_effective_target_mips16_attribute { } {
1184 return [check_no_compiler_messages mips16_attribute assembly {
1188 #if defined __mips_hard_float \
1189 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
1190 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
1191 #error __mips_hard_float && (!_ABIO32 || !_ABIO64)
1193 } [add_options_for_mips16_attribute ""]]
1196 # Return 1 if the target supports long double larger than double when
1197 # using the new ABI, 0 otherwise.
1199 proc check_effective_target_mips_newabi_large_long_double { } {
1200 return [check_no_compiler_messages mips_newabi_large_long_double object {
1201 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1205 # Return true if the target is a MIPS target that has access
1206 # to the LL and SC instructions.
1208 proc check_effective_target_mips_llsc { } {
1209 if { ![istarget mips*-*-*] } {
1212 # Assume that these instructions are always implemented for
1213 # non-elf* targets, via emulation if necessary.
1214 if { ![istarget *-*-elf*] } {
1217 # Otherwise assume LL/SC support for everything but MIPS I.
1218 return [check_no_compiler_messages mips_llsc assembly {
1225 # Return true if the target is a MIPS target that uses in-place relocations.
1227 proc check_effective_target_mips_rel { } {
1228 if { ![istarget mips*-*-*] } {
1231 return [check_no_compiler_messages mips_rel object {
1232 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
1233 || (defined _ABI64 && _MIPS_SIM == _ABI64)
1234 #error _ABIN32 && (_ABIN32 || _ABI64)
1239 # Return true if the target is a MIPS target that uses the EABI.
1241 proc check_effective_target_mips_eabi { } {
1242 if { ![istarget mips*-*-*] } {
1245 return [check_no_compiler_messages mips_eabi object {
1252 # Return 1 if the current multilib does not generate PIC by default.
1254 proc check_effective_target_nonpic { } {
1255 return [check_no_compiler_messages nonpic assembly {
1262 # Return 1 if the current multilib generates PIE by default.
1264 proc check_effective_target_pie_enabled { } {
1265 return [check_no_compiler_messages pie_enabled assembly {
1272 # Return 1 if the target generates -fstack-protector by default.
1274 proc check_effective_target_fstack_protector_enabled {} {
1275 return [ check_no_compiler_messages fstack_protector_enabled assembly {
1276 #if !defined(__SSP__) && !defined(__SSP_ALL__) && \
1277 !defined(__SSP_STRONG__) && !defined(__SSP_EXPICIT__)
1283 # Return 1 if the target does not use a status wrapper.
1285 proc check_effective_target_unwrapped { } {
1286 if { [target_info needs_status_wrapper] != "" \
1287 && [target_info needs_status_wrapper] != "0" } {
1293 # Return true if iconv is supported on the target. In particular IBM1047.
1295 proc check_iconv_available { test_what } {
1298 # If the tool configuration file has not set libiconv, try "-liconv"
1299 if { ![info exists libiconv] } {
1300 set libiconv "-liconv"
1302 set test_what [lindex $test_what 1]
1303 return [check_runtime_nocache $test_what [subst {
1309 cd = iconv_open ("$test_what", "UTF-8");
1310 if (cd == (iconv_t) -1)
1317 # Return true if Cilk Library is supported on the target.
1318 proc check_effective_target_cilkplus_runtime { } {
1319 return [ check_no_compiler_messages_nocache cilkplus_runtime executable {
1323 int __cilkrts_set_param (const char *, const char *);
1325 int x = __cilkrts_set_param ("nworkers", "0");
1328 } "-fcilkplus -lcilkrts" ]
1331 # Return true if the atomic library is supported on the target.
1332 proc check_effective_target_libatomic_available { } {
1333 return [check_no_compiler_messages libatomic_available executable {
1334 int main (void) { return 0; }
1338 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1340 proc check_ascii_locale_available { } {
1344 # Return true if named sections are supported on this target.
1346 proc check_named_sections_available { } {
1347 return [check_no_compiler_messages named_sections assembly {
1348 int __attribute__ ((section("whatever"))) foo;
1352 # Return true if the "naked" function attribute is supported on this target.
1354 proc check_effective_target_naked_functions { } {
1355 return [check_no_compiler_messages naked_functions assembly {
1356 void f() __attribute__((naked));
1360 # Return 1 if the target supports Fortran real kinds larger than real(8),
1363 # When the target name changes, replace the cached result.
1365 proc check_effective_target_fortran_large_real { } {
1366 return [check_no_compiler_messages fortran_large_real executable {
1368 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1375 # Return 1 if the target supports Fortran real kind real(16),
1376 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1377 # this checks for Real(16) only; the other returned real(10) if
1378 # both real(10) and real(16) are available.
1380 # When the target name changes, replace the cached result.
1382 proc check_effective_target_fortran_real_16 { } {
1383 return [check_no_compiler_messages fortran_real_16 executable {
1392 # Return 1 if the target supports Fortran's IEEE modules,
1395 # When the target name changes, replace the cached result.
1397 proc check_effective_target_fortran_ieee { flags } {
1398 return [check_no_compiler_messages fortran_ieee executable {
1400 use, intrinsic :: ieee_features
1406 # Return 1 if the target supports SQRT for the largest floating-point
1407 # type. (Some targets lack the libm support for this FP type.)
1408 # On most targets, this check effectively checks either whether sqrtl is
1409 # available or on __float128 systems whether libquadmath is installed,
1410 # which provides sqrtq.
1412 # When the target name changes, replace the cached result.
1414 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1415 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1417 use iso_fortran_env, only: real_kinds
1418 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1419 real(kind=maxFP), volatile :: x
1427 # Return 1 if the target supports Fortran integer kinds larger than
1428 # integer(8), 0 otherwise.
1430 # When the target name changes, replace the cached result.
1432 proc check_effective_target_fortran_large_int { } {
1433 return [check_no_compiler_messages fortran_large_int executable {
1435 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1436 integer(kind=k) :: i
1441 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1443 # When the target name changes, replace the cached result.
1445 proc check_effective_target_fortran_integer_16 { } {
1446 return [check_no_compiler_messages fortran_integer_16 executable {
1453 # Return 1 if we can statically link libgfortran, 0 otherwise.
1455 # When the target name changes, replace the cached result.
1457 proc check_effective_target_static_libgfortran { } {
1458 return [check_no_compiler_messages static_libgfortran executable {
1465 # Return 1 if cilk-plus is supported by the target, 0 otherwise.
1467 proc check_effective_target_cilkplus { } {
1468 # Skip cilk-plus tests on int16 and size16 targets for now.
1469 # The cilk-plus tests are not generic enough to cover these
1470 # cases and would throw hundreds of FAILs.
1471 if { [check_effective_target_int16]
1472 || ![check_effective_target_size32plus] } {
1476 # Skip AVR, its RAM is too small and too many tests would fail.
1477 if { [istarget avr-*-*] } {
1481 if { ! [check_effective_target_pthread] } {
1488 proc check_linker_plugin_available { } {
1489 return [check_no_compiler_messages_nocache linker_plugin executable {
1490 int main() { return 0; }
1491 } "-flto -fuse-linker-plugin"]
1494 # Return 1 if the target supports executing 750CL paired-single instructions, 0
1495 # otherwise. Cache the result.
1497 proc check_750cl_hw_available { } {
1498 return [check_cached_effective_target 750cl_hw_available {
1499 # If this is not the right target then we can skip the test.
1500 if { ![istarget powerpc-*paired*] } {
1503 check_runtime_nocache 750cl_hw_available {
1507 asm volatile ("ps_mul v0,v0,v0");
1509 asm volatile ("ps_mul 0,0,0");
1518 # Return 1 if the target OS supports running SSE executables, 0
1519 # otherwise. Cache the result.
1521 proc check_sse_os_support_available { } {
1522 return [check_cached_effective_target sse_os_support_available {
1523 # If this is not the right target then we can skip the test.
1524 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1526 } elseif { [istarget i?86-*-solaris2*] } {
1527 # The Solaris 2 kernel doesn't save and restore SSE registers
1528 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1529 check_runtime_nocache sse_os_support_available {
1532 asm volatile ("movaps %xmm0,%xmm0");
1542 # Return 1 if the target OS supports running AVX executables, 0
1543 # otherwise. Cache the result.
1545 proc check_avx_os_support_available { } {
1546 return [check_cached_effective_target avx_os_support_available {
1547 # If this is not the right target then we can skip the test.
1548 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1551 # Check that OS has AVX and SSE saving enabled.
1552 check_runtime_nocache avx_os_support_available {
1555 unsigned int eax, edx;
1557 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1558 return (eax & 6) != 6;
1565 # Return 1 if the target supports executing SSE instructions, 0
1566 # otherwise. Cache the result.
1568 proc check_sse_hw_available { } {
1569 return [check_cached_effective_target sse_hw_available {
1570 # If this is not the right target then we can skip the test.
1571 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1574 check_runtime_nocache sse_hw_available {
1578 unsigned int eax, ebx, ecx, edx;
1579 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1580 return !(edx & bit_SSE);
1588 # Return 1 if the target supports executing SSE2 instructions, 0
1589 # otherwise. Cache the result.
1591 proc check_sse2_hw_available { } {
1592 return [check_cached_effective_target sse2_hw_available {
1593 # If this is not the right target then we can skip the test.
1594 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1597 check_runtime_nocache sse2_hw_available {
1601 unsigned int eax, ebx, ecx, edx;
1602 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1603 return !(edx & bit_SSE2);
1611 # Return 1 if the target supports executing SSE4 instructions, 0
1612 # otherwise. Cache the result.
1614 proc check_sse4_hw_available { } {
1615 return [check_cached_effective_target sse4_hw_available {
1616 # If this is not the right target then we can skip the test.
1617 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1620 check_runtime_nocache sse4_hw_available {
1624 unsigned int eax, ebx, ecx, edx;
1625 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1626 return !(ecx & bit_SSE4_2);
1634 # Return 1 if the target supports executing AVX instructions, 0
1635 # otherwise. Cache the result.
1637 proc check_avx_hw_available { } {
1638 return [check_cached_effective_target avx_hw_available {
1639 # If this is not the right target then we can skip the test.
1640 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1643 check_runtime_nocache avx_hw_available {
1647 unsigned int eax, ebx, ecx, edx;
1648 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1649 return ((ecx & (bit_AVX | bit_OSXSAVE))
1650 != (bit_AVX | bit_OSXSAVE));
1658 # Return 1 if the target supports running SSE executables, 0 otherwise.
1660 proc check_effective_target_sse_runtime { } {
1661 if { [check_effective_target_sse]
1662 && [check_sse_hw_available]
1663 && [check_sse_os_support_available] } {
1669 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1671 proc check_effective_target_sse2_runtime { } {
1672 if { [check_effective_target_sse2]
1673 && [check_sse2_hw_available]
1674 && [check_sse_os_support_available] } {
1680 # Return 1 if the target supports running SSE4 executables, 0 otherwise.
1682 proc check_effective_target_sse4_runtime { } {
1683 if { [check_effective_target_sse4]
1684 && [check_sse4_hw_available]
1685 && [check_sse_os_support_available] } {
1691 # Return 1 if the target supports running AVX executables, 0 otherwise.
1693 proc check_effective_target_avx_runtime { } {
1694 if { [check_effective_target_avx]
1695 && [check_avx_hw_available]
1696 && [check_avx_os_support_available] } {
1702 # Return 1 if we are compiling for 64-bit PowerPC but we do not use direct
1703 # move instructions for moves from GPR to FPR.
1705 proc check_effective_target_powerpc64_no_dm { } {
1706 # The "mulld" checks if we are generating PowerPC64 code. The "lfd"
1707 # checks if we do not use direct moves, but use the old-fashioned
1708 # slower move-via-the-stack.
1709 return [check_no_messages_and_pattern powerpc64_no_dm \
1710 {\mmulld\M.*\mlfd} assembly {
1711 double f(long long x) { return x*x; }
1715 # Return 1 if the target supports executing power8 vector instructions, 0
1716 # otherwise. Cache the result.
1718 proc check_p8vector_hw_available { } {
1719 return [check_cached_effective_target p8vector_hw_available {
1720 # Some simulators are known to not support VSX/power8 instructions.
1721 # For now, disable on Darwin
1722 if { [istarget powerpc-*-eabi]
1723 || [istarget powerpc*-*-eabispe]
1724 || [istarget *-*-darwin*]} {
1727 set options "-mpower8-vector"
1728 check_runtime_nocache p8vector_hw_available {
1732 asm volatile ("xxlorc vs0,vs0,vs0");
1734 asm volatile ("xxlorc 0,0,0");
1743 # Return 1 if the target supports executing power9 vector instructions, 0
1744 # otherwise. Cache the result.
1746 proc check_p9vector_hw_available { } {
1747 return [check_cached_effective_target p9vector_hw_available {
1748 # Some simulators are known to not support VSX/power8/power9
1749 # instructions. For now, disable on Darwin.
1750 if { [istarget powerpc-*-eabi]
1751 || [istarget powerpc*-*-eabispe]
1752 || [istarget *-*-darwin*]} {
1755 set options "-mpower9-vector"
1756 check_runtime_nocache p9vector_hw_available {
1760 vector double v = (vector double) { 0.0, 0.0 };
1761 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
1769 # Return 1 if the target supports executing power9 modulo instructions, 0
1770 # otherwise. Cache the result.
1772 proc check_p9modulo_hw_available { } {
1773 return [check_cached_effective_target p9modulo_hw_available {
1774 # Some simulators are known to not support VSX/power8/power9
1775 # instructions. For now, disable on Darwin.
1776 if { [istarget powerpc-*-eabi]
1777 || [istarget powerpc*-*-eabispe]
1778 || [istarget *-*-darwin*]} {
1781 set options "-mmodulo"
1782 check_runtime_nocache p9modulo_hw_available {
1785 int i = 5, j = 3, r = -1;
1786 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
1794 # Return 1 if the target supports executing __float128 on PowerPC via software
1795 # emulation, 0 otherwise. Cache the result.
1797 proc check_ppc_float128_sw_available { } {
1798 return [check_cached_effective_target ppc_float128_sw_available {
1799 # Some simulators are known to not support VSX/power8/power9
1800 # instructions. For now, disable on Darwin.
1801 if { [istarget powerpc-*-eabi]
1802 || [istarget powerpc*-*-eabispe]
1803 || [istarget *-*-darwin*]} {
1806 set options "-mfloat128 -mvsx"
1807 check_runtime_nocache ppc_float128_sw_available {
1808 volatile __float128 x = 1.0q;
1809 volatile __float128 y = 2.0q;
1812 __float128 z = x + y;
1820 # Return 1 if the target supports executing __float128 on PowerPC via power9
1821 # hardware instructions, 0 otherwise. Cache the result.
1823 proc check_ppc_float128_hw_available { } {
1824 return [check_cached_effective_target ppc_float128_hw_available {
1825 # Some simulators are known to not support VSX/power8/power9
1826 # instructions. For now, disable on Darwin.
1827 if { [istarget powerpc-*-eabi]
1828 || [istarget powerpc*-*-eabispe]
1829 || [istarget *-*-darwin*]} {
1832 set options "-mfloat128 -mvsx -mfloat128-hardware -mpower9-vector"
1833 check_runtime_nocache ppc_float128_hw_available {
1834 volatile __float128 x = 1.0q;
1835 volatile __float128 y = 2.0q;
1838 __float128 z = x + y;
1839 __float128 w = -1.0q;
1841 __asm__ ("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
1842 return ((z != 3.0q) || (z != w);
1849 # Return 1 if the target supports executing VSX instructions, 0
1850 # otherwise. Cache the result.
1852 proc check_vsx_hw_available { } {
1853 return [check_cached_effective_target vsx_hw_available {
1854 # Some simulators are known to not support VSX instructions.
1855 # For now, disable on Darwin
1856 if { [istarget powerpc-*-eabi]
1857 || [istarget powerpc*-*-eabispe]
1858 || [istarget *-*-darwin*]} {
1862 check_runtime_nocache vsx_hw_available {
1866 asm volatile ("xxlor vs0,vs0,vs0");
1868 asm volatile ("xxlor 0,0,0");
1877 # Return 1 if the target supports executing AltiVec instructions, 0
1878 # otherwise. Cache the result.
1880 proc check_vmx_hw_available { } {
1881 return [check_cached_effective_target vmx_hw_available {
1882 # Some simulators are known to not support VMX instructions.
1883 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
1886 # Most targets don't require special flags for this test case, but
1887 # Darwin does. Just to be sure, make sure VSX is not enabled for
1888 # the altivec tests.
1889 if { [istarget *-*-darwin*]
1890 || [istarget *-*-aix*] } {
1891 set options "-maltivec -mno-vsx"
1893 set options "-mno-vsx"
1895 check_runtime_nocache vmx_hw_available {
1899 asm volatile ("vor v0,v0,v0");
1901 asm volatile ("vor 0,0,0");
1910 proc check_ppc_recip_hw_available { } {
1911 return [check_cached_effective_target ppc_recip_hw_available {
1912 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
1913 # For now, disable on Darwin
1914 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1917 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
1918 check_runtime_nocache ppc_recip_hw_available {
1919 volatile double d_recip, d_rsqrt, d_four = 4.0;
1920 volatile float f_recip, f_rsqrt, f_four = 4.0f;
1923 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
1924 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
1925 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
1926 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
1934 # Return 1 if the target supports executing AltiVec and Cell PPU
1935 # instructions, 0 otherwise. Cache the result.
1937 proc check_effective_target_cell_hw { } {
1938 return [check_cached_effective_target cell_hw_available {
1939 # Some simulators are known to not support VMX and PPU instructions.
1940 if { [istarget powerpc-*-eabi*] } {
1943 # Most targets don't require special flags for this test
1944 # case, but Darwin and AIX do.
1945 if { [istarget *-*-darwin*]
1946 || [istarget *-*-aix*] } {
1947 set options "-maltivec -mcpu=cell"
1949 set options "-mcpu=cell"
1951 check_runtime_nocache cell_hw_available {
1955 asm volatile ("vor v0,v0,v0");
1956 asm volatile ("lvlx v0,r0,r0");
1958 asm volatile ("vor 0,0,0");
1959 asm volatile ("lvlx 0,0,0");
1968 # Return 1 if the target supports executing 64-bit instructions, 0
1969 # otherwise. Cache the result.
1971 proc check_effective_target_powerpc64 { } {
1972 global powerpc64_available_saved
1975 if [info exists powerpc64_available_saved] {
1976 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
1978 set powerpc64_available_saved 0
1980 # Some simulators are known to not support powerpc64 instructions.
1981 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
1982 verbose "check_effective_target_powerpc64 returning 0" 2
1983 return $powerpc64_available_saved
1986 # Set up, compile, and execute a test program containing a 64-bit
1987 # instruction. Include the current process ID in the file
1988 # names to prevent conflicts with invocations for multiple
1993 set f [open $src "w"]
1994 puts $f "int main() {"
1995 puts $f "#ifdef __MACH__"
1996 puts $f " asm volatile (\"extsw r0,r0\");"
1998 puts $f " asm volatile (\"extsw 0,0\");"
2000 puts $f " return 0; }"
2003 set opts "additional_flags=-mcpu=G5"
2005 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
2006 set lines [${tool}_target_compile $src $exe executable "$opts"]
2009 if [string match "" $lines] then {
2010 # No error message, compilation succeeded.
2011 set result [${tool}_load "./$exe" "" ""]
2012 set status [lindex $result 0]
2013 remote_file build delete $exe
2014 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
2016 if { $status == "pass" } then {
2017 set powerpc64_available_saved 1
2020 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
2024 return $powerpc64_available_saved
2027 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
2028 # complex float arguments. This affects gfortran tests that call cabsf
2029 # in libm built by an earlier compiler. Return 1 if libm uses the same
2030 # argument passing as the compiler under test, 0 otherwise.
2032 # When the target name changes, replace the cached result.
2034 proc check_effective_target_broken_cplxf_arg { } {
2035 return [check_cached_effective_target broken_cplxf_arg {
2036 # Skip the work for targets known not to be affected.
2037 if { ![istarget powerpc64-*-linux*] } {
2039 } elseif { ![is-effective-target lp64] } {
2042 check_runtime_nocache broken_cplxf_arg {
2043 #include <complex.h>
2044 extern void abort (void);
2045 float fabsf (float);
2046 float cabsf (_Complex float);
2053 if (fabsf (f - 5.0) > 0.0001)
2062 # Return 1 is this is a TI C6X target supporting C67X instructions
2063 proc check_effective_target_ti_c67x { } {
2064 return [check_no_compiler_messages ti_c67x assembly {
2065 #if !defined(_TMS320C6700)
2066 #error !_TMS320C6700
2071 # Return 1 is this is a TI C6X target supporting C64X+ instructions
2072 proc check_effective_target_ti_c64xp { } {
2073 return [check_no_compiler_messages ti_c64xp assembly {
2074 #if !defined(_TMS320C6400_PLUS)
2075 #error !_TMS320C6400_PLUS
2081 proc check_alpha_max_hw_available { } {
2082 return [check_runtime alpha_max_hw_available {
2083 int main() { return __builtin_alpha_amask(1<<8) != 0; }
2087 # Returns true iff the FUNCTION is available on the target system.
2088 # (This is essentially a Tcl implementation of Autoconf's
2091 proc check_function_available { function } {
2092 return [check_no_compiler_messages ${function}_available \
2098 int main () { $function (); }
2102 # Returns true iff "fork" is available on the target system.
2104 proc check_fork_available {} {
2105 return [check_function_available "fork"]
2108 # Returns true iff "mkfifo" is available on the target system.
2110 proc check_mkfifo_available {} {
2111 if { [istarget *-*-cygwin*] } {
2112 # Cygwin has mkfifo, but support is incomplete.
2116 return [check_function_available "mkfifo"]
2119 # Returns true iff "__cxa_atexit" is used on the target system.
2121 proc check_cxa_atexit_available { } {
2122 return [check_cached_effective_target cxa_atexit_available {
2123 if { [istarget hppa*-*-hpux10*] } {
2124 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
2126 } elseif { [istarget *-*-vxworks] } {
2127 # vxworks doesn't have __cxa_atexit but subsequent test passes.
2130 check_runtime_nocache cxa_atexit_available {
2133 static unsigned int count;
2150 Y() { f(); count = 2; }
2159 int main() { return 0; }
2165 proc check_effective_target_objc2 { } {
2166 return [check_no_compiler_messages objc2 object {
2175 proc check_effective_target_next_runtime { } {
2176 return [check_no_compiler_messages objc2 object {
2177 #ifdef __NEXT_RUNTIME__
2180 #error !__NEXT_RUNTIME__
2185 # Return 1 if we're generating 32-bit code using default options, 0
2188 proc check_effective_target_ilp32 { } {
2189 return [check_no_compiler_messages ilp32 object {
2190 int dummy[sizeof (int) == 4
2191 && sizeof (void *) == 4
2192 && sizeof (long) == 4 ? 1 : -1];
2196 # Return 1 if we're generating ia32 code using default options, 0
2199 proc check_effective_target_ia32 { } {
2200 return [check_no_compiler_messages ia32 object {
2201 int dummy[sizeof (int) == 4
2202 && sizeof (void *) == 4
2203 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
2207 # Return 1 if we're generating x32 code using default options, 0
2210 proc check_effective_target_x32 { } {
2211 return [check_no_compiler_messages x32 object {
2212 int dummy[sizeof (int) == 4
2213 && sizeof (void *) == 4
2214 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
2218 # Return 1 if we're generating 32-bit integers using default
2219 # options, 0 otherwise.
2221 proc check_effective_target_int32 { } {
2222 return [check_no_compiler_messages int32 object {
2223 int dummy[sizeof (int) == 4 ? 1 : -1];
2227 # Return 1 if we're generating 32-bit or larger integers using default
2228 # options, 0 otherwise.
2230 proc check_effective_target_int32plus { } {
2231 return [check_no_compiler_messages int32plus object {
2232 int dummy[sizeof (int) >= 4 ? 1 : -1];
2236 # Return 1 if we're generating 32-bit or larger pointers using default
2237 # options, 0 otherwise.
2239 proc check_effective_target_ptr32plus { } {
2240 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
2241 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
2242 # cannot really hold a 32-bit address, so we always return false here.
2243 if { [istarget msp430-*-*] } {
2247 return [check_no_compiler_messages ptr32plus object {
2248 int dummy[sizeof (void *) >= 4 ? 1 : -1];
2252 # Return 1 if we support 32-bit or larger array and structure sizes
2253 # using default options, 0 otherwise. Avoid false positive on
2254 # targets with 20 or 24 bit address spaces.
2256 proc check_effective_target_size32plus { } {
2257 return [check_no_compiler_messages size32plus object {
2258 char dummy[16777217L];
2262 # Returns 1 if we're generating 16-bit or smaller integers with the
2263 # default options, 0 otherwise.
2265 proc check_effective_target_int16 { } {
2266 return [check_no_compiler_messages int16 object {
2267 int dummy[sizeof (int) < 4 ? 1 : -1];
2271 # Return 1 if we're generating 64-bit code using default options, 0
2274 proc check_effective_target_lp64 { } {
2275 return [check_no_compiler_messages lp64 object {
2276 int dummy[sizeof (int) == 4
2277 && sizeof (void *) == 8
2278 && sizeof (long) == 8 ? 1 : -1];
2282 # Return 1 if we're generating 64-bit code using default llp64 options,
2285 proc check_effective_target_llp64 { } {
2286 return [check_no_compiler_messages llp64 object {
2287 int dummy[sizeof (int) == 4
2288 && sizeof (void *) == 8
2289 && sizeof (long long) == 8
2290 && sizeof (long) == 4 ? 1 : -1];
2294 # Return 1 if long and int have different sizes,
2297 proc check_effective_target_long_neq_int { } {
2298 return [check_no_compiler_messages long_ne_int object {
2299 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2303 # Return 1 if the target supports long double larger than double,
2306 proc check_effective_target_large_long_double { } {
2307 return [check_no_compiler_messages large_long_double object {
2308 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2312 # Return 1 if the target supports double larger than float,
2315 proc check_effective_target_large_double { } {
2316 return [check_no_compiler_messages large_double object {
2317 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2321 # Return 1 if the target supports long double of 128 bits,
2324 proc check_effective_target_longdouble128 { } {
2325 return [check_no_compiler_messages longdouble128 object {
2326 int dummy[sizeof(long double) == 16 ? 1 : -1];
2330 # Return 1 if the target supports double of 64 bits,
2333 proc check_effective_target_double64 { } {
2334 return [check_no_compiler_messages double64 object {
2335 int dummy[sizeof(double) == 8 ? 1 : -1];
2339 # Return 1 if the target supports double of at least 64 bits,
2342 proc check_effective_target_double64plus { } {
2343 return [check_no_compiler_messages double64plus object {
2344 int dummy[sizeof(double) >= 8 ? 1 : -1];
2348 # Return 1 if the target supports 'w' suffix on floating constant
2351 proc check_effective_target_has_w_floating_suffix { } {
2353 if [check_effective_target_c++] {
2354 append opts "-std=gnu++03"
2356 return [check_no_compiler_messages w_fp_suffix object {
2361 # Return 1 if the target supports 'q' suffix on floating constant
2364 proc check_effective_target_has_q_floating_suffix { } {
2366 if [check_effective_target_c++] {
2367 append opts "-std=gnu++03"
2369 return [check_no_compiler_messages q_fp_suffix object {
2373 # Return 1 if the target supports compiling fixed-point,
2376 proc check_effective_target_fixed_point { } {
2377 return [check_no_compiler_messages fixed_point object {
2378 _Sat _Fract x; _Sat _Accum y;
2382 # Return 1 if the target supports compiling decimal floating point,
2385 proc check_effective_target_dfp_nocache { } {
2386 verbose "check_effective_target_dfp_nocache: compiling source" 2
2387 set ret [check_no_compiler_messages_nocache dfp object {
2388 float x __attribute__((mode(DD)));
2390 verbose "check_effective_target_dfp_nocache: returning $ret" 2
2394 proc check_effective_target_dfprt_nocache { } {
2395 return [check_runtime_nocache dfprt {
2396 typedef float d64 __attribute__((mode(DD)));
2397 d64 x = 1.2df, y = 2.3dd, z;
2398 int main () { z = x + y; return 0; }
2402 # Return 1 if the target supports compiling Decimal Floating Point,
2405 # This won't change for different subtargets so cache the result.
2407 proc check_effective_target_dfp { } {
2408 return [check_cached_effective_target dfp {
2409 check_effective_target_dfp_nocache
2413 # Return 1 if the target supports linking and executing Decimal Floating
2414 # Point, 0 otherwise.
2416 # This won't change for different subtargets so cache the result.
2418 proc check_effective_target_dfprt { } {
2419 return [check_cached_effective_target dfprt {
2420 check_effective_target_dfprt_nocache
2424 # Return 1 if the target supports executing DFP hardware instructions,
2425 # 0 otherwise. Cache the result.
2427 proc check_dfp_hw_available { } {
2428 return [check_cached_effective_target dfp_hw_available {
2429 # For now, disable on Darwin
2430 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2433 check_runtime_nocache dfp_hw_available {
2434 volatile _Decimal64 r;
2435 volatile _Decimal64 a = 4.0DD;
2436 volatile _Decimal64 b = 2.0DD;
2439 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2440 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2441 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2442 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2445 } "-mcpu=power6 -mhard-float"
2450 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2452 proc check_effective_target_ucn_nocache { } {
2453 # -std=c99 is only valid for C
2454 if [check_effective_target_c] {
2455 set ucnopts "-std=c99"
2459 verbose "check_effective_target_ucn_nocache: compiling source" 2
2460 set ret [check_no_compiler_messages_nocache ucn object {
2463 verbose "check_effective_target_ucn_nocache: returning $ret" 2
2467 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2469 # This won't change for different subtargets, so cache the result.
2471 proc check_effective_target_ucn { } {
2472 return [check_cached_effective_target ucn {
2473 check_effective_target_ucn_nocache
2477 # Return 1 if the target needs a command line argument to enable a SIMD
2480 proc check_effective_target_vect_cmdline_needed { } {
2481 global et_vect_cmdline_needed_saved
2482 global et_vect_cmdline_needed_target_name
2484 if { ![info exists et_vect_cmdline_needed_target_name] } {
2485 set et_vect_cmdline_needed_target_name ""
2488 # If the target has changed since we set the cached value, clear it.
2489 set current_target [current_target_name]
2490 if { $current_target != $et_vect_cmdline_needed_target_name } {
2491 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
2492 set et_vect_cmdline_needed_target_name $current_target
2493 if { [info exists et_vect_cmdline_needed_saved] } {
2494 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
2495 unset et_vect_cmdline_needed_saved
2499 if [info exists et_vect_cmdline_needed_saved] {
2500 verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
2502 set et_vect_cmdline_needed_saved 1
2503 if { [istarget alpha*-*-*]
2504 || [istarget ia64-*-*]
2505 || (([istarget x86_64-*-*] || [istarget i?86-*-*])
2506 && ([check_effective_target_x32]
2507 || [check_effective_target_lp64]))
2508 || ([istarget powerpc*-*-*]
2509 && ([check_effective_target_powerpc_spe]
2510 || [check_effective_target_powerpc_altivec]))
2511 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
2512 || [istarget spu-*-*]
2513 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
2514 || [istarget aarch64*-*-*] } {
2515 set et_vect_cmdline_needed_saved 0
2519 verbose "check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
2520 return $et_vect_cmdline_needed_saved
2523 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
2525 # This won't change for different subtargets so cache the result.
2527 proc check_effective_target_vect_int { } {
2528 global et_vect_int_saved
2530 if [info exists et_vect_int_saved] {
2531 verbose "check_effective_target_vect_int: using cached result" 2
2533 set et_vect_int_saved 0
2534 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2535 || ([istarget powerpc*-*-*]
2536 && ![istarget powerpc-*-linux*paired*])
2537 || [istarget spu-*-*]
2538 || [istarget sparc*-*-*]
2539 || [istarget alpha*-*-*]
2540 || [istarget ia64-*-*]
2541 || [istarget aarch64*-*-*]
2542 || [check_effective_target_arm32]
2543 || ([istarget mips*-*-*]
2544 && [check_effective_target_mips_loongson]) } {
2545 set et_vect_int_saved 1
2549 verbose "check_effective_target_vect_int: returning $et_vect_int_saved" 2
2550 return $et_vect_int_saved
2553 # Return 1 if the target supports signed int->float conversion
2556 proc check_effective_target_vect_intfloat_cvt { } {
2557 global et_vect_intfloat_cvt_saved
2559 if [info exists et_vect_intfloat_cvt_saved] {
2560 verbose "check_effective_target_vect_intfloat_cvt: using cached result" 2
2562 set et_vect_intfloat_cvt_saved 0
2563 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2564 || ([istarget powerpc*-*-*]
2565 && ![istarget powerpc-*-linux*paired*])
2566 || ([istarget arm*-*-*]
2567 && [check_effective_target_arm_neon_ok])} {
2568 set et_vect_intfloat_cvt_saved 1
2572 verbose "check_effective_target_vect_intfloat_cvt: returning $et_vect_intfloat_cvt_saved" 2
2573 return $et_vect_intfloat_cvt_saved
2576 #Return 1 if we're supporting __int128 for target, 0 otherwise.
2578 proc check_effective_target_int128 { } {
2579 return [check_no_compiler_messages int128 object {
2581 #ifndef __SIZEOF_INT128__
2590 # Return 1 if the target supports unsigned int->float conversion
2593 proc check_effective_target_vect_uintfloat_cvt { } {
2594 global et_vect_uintfloat_cvt_saved
2596 if [info exists et_vect_uintfloat_cvt_saved] {
2597 verbose "check_effective_target_vect_uintfloat_cvt: using cached result" 2
2599 set et_vect_uintfloat_cvt_saved 0
2600 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2601 || ([istarget powerpc*-*-*]
2602 && ![istarget powerpc-*-linux*paired*])
2603 || [istarget aarch64*-*-*]
2604 || ([istarget arm*-*-*]
2605 && [check_effective_target_arm_neon_ok])} {
2606 set et_vect_uintfloat_cvt_saved 1
2610 verbose "check_effective_target_vect_uintfloat_cvt: returning $et_vect_uintfloat_cvt_saved" 2
2611 return $et_vect_uintfloat_cvt_saved
2615 # Return 1 if the target supports signed float->int conversion
2618 proc check_effective_target_vect_floatint_cvt { } {
2619 global et_vect_floatint_cvt_saved
2621 if [info exists et_vect_floatint_cvt_saved] {
2622 verbose "check_effective_target_vect_floatint_cvt: using cached result" 2
2624 set et_vect_floatint_cvt_saved 0
2625 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2626 || ([istarget powerpc*-*-*]
2627 && ![istarget powerpc-*-linux*paired*])
2628 || ([istarget arm*-*-*]
2629 && [check_effective_target_arm_neon_ok])} {
2630 set et_vect_floatint_cvt_saved 1
2634 verbose "check_effective_target_vect_floatint_cvt: returning $et_vect_floatint_cvt_saved" 2
2635 return $et_vect_floatint_cvt_saved
2638 # Return 1 if the target supports unsigned float->int conversion
2641 proc check_effective_target_vect_floatuint_cvt { } {
2642 global et_vect_floatuint_cvt_saved
2644 if [info exists et_vect_floatuint_cvt_saved] {
2645 verbose "check_effective_target_vect_floatuint_cvt: using cached result" 2
2647 set et_vect_floatuint_cvt_saved 0
2648 if { ([istarget powerpc*-*-*]
2649 && ![istarget powerpc-*-linux*paired*])
2650 || ([istarget arm*-*-*]
2651 && [check_effective_target_arm_neon_ok])} {
2652 set et_vect_floatuint_cvt_saved 1
2656 verbose "check_effective_target_vect_floatuint_cvt: returning $et_vect_floatuint_cvt_saved" 2
2657 return $et_vect_floatuint_cvt_saved
2660 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
2662 # This won't change for different subtargets so cache the result.
2664 proc check_effective_target_vect_simd_clones { } {
2665 global et_vect_simd_clones_saved
2667 if [info exists et_vect_simd_clones_saved] {
2668 verbose "check_effective_target_vect_simd_clones: using cached result" 2
2670 set et_vect_simd_clones_saved 0
2671 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2672 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx and
2673 # avx2 clone. Only the right clone for the specified arch will be
2674 # chosen, but still we need to at least be able to assemble
2676 if { [check_effective_target_avx512f] } {
2677 set et_vect_simd_clones_saved 1
2682 verbose "check_effective_target_vect_simd_clones: returning $et_vect_simd_clones_saved" 2
2683 return $et_vect_simd_clones_saved
2686 # Return 1 if this is a AArch64 target supporting big endian
2687 proc check_effective_target_aarch64_big_endian { } {
2688 return [check_no_compiler_messages aarch64_big_endian assembly {
2689 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
2690 #error !__aarch64__ || !__AARCH64EB__
2695 # Return 1 if this is a AArch64 target supporting little endian
2696 proc check_effective_target_aarch64_little_endian { } {
2697 if { ![istarget aarch64*-*-*] } {
2701 return [check_no_compiler_messages aarch64_little_endian assembly {
2702 #if !defined(__aarch64__) || defined(__AARCH64EB__)
2708 # Return 1 if this is a compiler supporting ARC atomic operations
2709 proc check_effective_target_arc_atomic { } {
2710 return [check_no_compiler_messages arc_atomic assembly {
2711 #if !defined(__ARC_ATOMIC__)
2717 # Return 1 if this is an arm target using 32-bit instructions
2718 proc check_effective_target_arm32 { } {
2719 if { ![istarget arm*-*-*] } {
2723 return [check_no_compiler_messages arm32 assembly {
2724 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
2725 #error !__arm || __thumb__ && !__thumb2__
2730 # Return 1 if this is an arm target not using Thumb
2731 proc check_effective_target_arm_nothumb { } {
2732 if { ![istarget arm*-*-*] } {
2736 return [check_no_compiler_messages arm_nothumb assembly {
2737 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
2738 #error !__arm__ || __thumb || __thumb2__
2743 # Return 1 if this is a little-endian ARM target
2744 proc check_effective_target_arm_little_endian { } {
2745 if { ![istarget arm*-*-*] } {
2749 return [check_no_compiler_messages arm_little_endian assembly {
2750 #if !defined(__arm__) || !defined(__ARMEL__)
2751 #error !__arm__ || !__ARMEL__
2756 # Return 1 if this is an ARM target that only supports aligned vector accesses
2757 proc check_effective_target_arm_vect_no_misalign { } {
2758 if { ![istarget arm*-*-*] } {
2762 return [check_no_compiler_messages arm_vect_no_misalign assembly {
2763 #if !defined(__arm__) \
2764 || (defined(__ARM_FEATURE_UNALIGNED) \
2765 && defined(__ARMEL__))
2766 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
2772 # Return 1 if this is an ARM target supporting -mfpu=vfp
2773 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
2776 proc check_effective_target_arm_vfp_ok { } {
2777 if { [check_effective_target_arm32] } {
2778 return [check_no_compiler_messages arm_vfp_ok object {
2780 } "-mfpu=vfp -mfloat-abi=softfp"]
2786 # Return 1 if this is an ARM target supporting -mfpu=vfp3
2787 # -mfloat-abi=softfp.
2789 proc check_effective_target_arm_vfp3_ok { } {
2790 if { [check_effective_target_arm32] } {
2791 return [check_no_compiler_messages arm_vfp3_ok object {
2793 } "-mfpu=vfp3 -mfloat-abi=softfp"]
2799 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
2800 # -mfloat-abi=softfp.
2801 proc check_effective_target_arm_v8_vfp_ok {} {
2802 if { [check_effective_target_arm32] } {
2803 return [check_no_compiler_messages arm_v8_vfp_ok object {
2806 __asm__ volatile ("vrinta.f32.f32 s0, s0");
2809 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
2815 # Return 1 if this is an ARM target supporting -mfpu=vfp
2816 # -mfloat-abi=hard. Some multilibs may be incompatible with these
2819 proc check_effective_target_arm_hard_vfp_ok { } {
2820 if { [check_effective_target_arm32]
2821 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
2822 return [check_no_compiler_messages arm_hard_vfp_ok executable {
2823 int main() { return 0;}
2824 } "-mfpu=vfp -mfloat-abi=hard"]
2830 # Return 1 if this is an ARM target defining __ARM_FP. We may need
2831 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2832 # incompatible with these options. Also set et_arm_fp_flags to the
2833 # best options to add.
2835 proc check_effective_target_arm_fp_ok_nocache { } {
2836 global et_arm_fp_flags
2837 set et_arm_fp_flags ""
2838 if { [check_effective_target_arm32] } {
2839 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
2840 if { [check_no_compiler_messages_nocache arm_fp_ok object {
2842 #error __ARM_FP not defined
2845 set et_arm_fp_flags $flags
2854 proc check_effective_target_arm_fp_ok { } {
2855 return [check_cached_effective_target arm_fp_ok \
2856 check_effective_target_arm_fp_ok_nocache]
2859 # Add the options needed to define __ARM_FP. We need either
2860 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
2861 # specified by the multilib, use it.
2863 proc add_options_for_arm_fp { flags } {
2864 if { ! [check_effective_target_arm_fp_ok] } {
2867 global et_arm_fp_flags
2868 return "$flags $et_arm_fp_flags"
2871 # Return 1 if this is an ARM target that supports DSP multiply with
2872 # current multilib flags.
2874 proc check_effective_target_arm_dsp { } {
2875 return [check_no_compiler_messages arm_dsp assembly {
2876 #ifndef __ARM_FEATURE_DSP
2883 # Return 1 if this is an ARM target that supports unaligned word/halfword
2884 # load/store instructions.
2886 proc check_effective_target_arm_unaligned { } {
2887 return [check_no_compiler_messages arm_unaligned assembly {
2888 #ifndef __ARM_FEATURE_UNALIGNED
2889 #error no unaligned support
2895 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2896 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2897 # incompatible with these options. Also set et_arm_crypto_flags to the
2898 # best options to add.
2900 proc check_effective_target_arm_crypto_ok_nocache { } {
2901 global et_arm_crypto_flags
2902 set et_arm_crypto_flags ""
2903 if { [check_effective_target_arm_v8_neon_ok] } {
2904 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
2905 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
2906 #include "arm_neon.h"
2908 foo (uint8x16_t a, uint8x16_t b)
2910 return vaeseq_u8 (a, b);
2913 set et_arm_crypto_flags $flags
2922 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2924 proc check_effective_target_arm_crypto_ok { } {
2925 return [check_cached_effective_target arm_crypto_ok \
2926 check_effective_target_arm_crypto_ok_nocache]
2929 # Add options for crypto extensions.
2930 proc add_options_for_arm_crypto { flags } {
2931 if { ! [check_effective_target_arm_crypto_ok] } {
2934 global et_arm_crypto_flags
2935 return "$flags $et_arm_crypto_flags"
2938 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2939 # or -mfloat-abi=hard, but if one is already specified by the
2940 # multilib, use it. Similarly, if a -mfpu option already enables
2941 # NEON, do not add -mfpu=neon.
2943 proc add_options_for_arm_neon { flags } {
2944 if { ! [check_effective_target_arm_neon_ok] } {
2947 global et_arm_neon_flags
2948 return "$flags $et_arm_neon_flags"
2951 proc add_options_for_arm_v8_vfp { flags } {
2952 if { ! [check_effective_target_arm_v8_vfp_ok] } {
2955 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
2958 proc add_options_for_arm_v8_neon { flags } {
2959 if { ! [check_effective_target_arm_v8_neon_ok] } {
2962 global et_arm_v8_neon_flags
2963 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
2966 # Add the options needed for ARMv8.1 Adv.SIMD. Also adds the ARMv8 NEON
2967 # options for AArch64 and for ARM.
2969 proc add_options_for_arm_v8_1a_neon { flags } {
2970 if { ! [check_effective_target_arm_v8_1a_neon_ok] } {
2973 global et_arm_v8_1a_neon_flags
2974 return "$flags $et_arm_v8_1a_neon_flags -march=armv8.1-a"
2977 proc add_options_for_arm_crc { flags } {
2978 if { ! [check_effective_target_arm_crc_ok] } {
2981 global et_arm_crc_flags
2982 return "$flags $et_arm_crc_flags"
2985 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2986 # or -mfloat-abi=hard, but if one is already specified by the
2987 # multilib, use it. Similarly, if a -mfpu option already enables
2988 # NEON, do not add -mfpu=neon.
2990 proc add_options_for_arm_neonv2 { flags } {
2991 if { ! [check_effective_target_arm_neonv2_ok] } {
2994 global et_arm_neonv2_flags
2995 return "$flags $et_arm_neonv2_flags"
2998 # Add the options needed for vfp3.
2999 proc add_options_for_arm_vfp3 { flags } {
3000 if { ! [check_effective_target_arm_vfp3_ok] } {
3003 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
3006 # Return 1 if this is an ARM target supporting -mfpu=neon
3007 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3008 # incompatible with these options. Also set et_arm_neon_flags to the
3009 # best options to add.
3011 proc check_effective_target_arm_neon_ok_nocache { } {
3012 global et_arm_neon_flags
3013 set et_arm_neon_flags ""
3014 if { [check_effective_target_arm32] } {
3015 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a"} {
3016 if { [check_no_compiler_messages_nocache arm_neon_ok object {
3018 #ifndef __ARM_NEON__
3021 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3022 configured for -mcpu=arm926ej-s, for example. */
3023 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
3024 #error Architecture does not support NEON.
3027 set et_arm_neon_flags $flags
3036 proc check_effective_target_arm_neon_ok { } {
3037 return [check_cached_effective_target arm_neon_ok \
3038 check_effective_target_arm_neon_ok_nocache]
3041 proc check_effective_target_arm_crc_ok_nocache { } {
3042 global et_arm_crc_flags
3043 set et_arm_crc_flags "-march=armv8-a+crc"
3044 return [check_no_compiler_messages_nocache arm_crc_ok object {
3045 #if !defined (__ARM_FEATURE_CRC32)
3048 } "$et_arm_crc_flags"]
3051 proc check_effective_target_arm_crc_ok { } {
3052 return [check_cached_effective_target arm_crc_ok \
3053 check_effective_target_arm_crc_ok_nocache]
3056 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
3057 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3058 # incompatible with these options. Also set et_arm_neon_fp16_flags to
3059 # the best options to add.
3061 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
3062 global et_arm_neon_fp16_flags
3063 global et_arm_neon_flags
3064 set et_arm_neon_fp16_flags ""
3065 if { [check_effective_target_arm32]
3066 && [check_effective_target_arm_neon_ok] } {
3067 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3068 "-mfpu=neon-fp16 -mfloat-abi=softfp"
3069 "-mfp16-format=ieee"
3070 "-mfloat-abi=softfp -mfp16-format=ieee"
3071 "-mfpu=neon-fp16 -mfp16-format=ieee"
3072 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
3073 if { [check_no_compiler_messages_nocache arm_neon_fp16_ok object {
3074 #include "arm_neon.h"
3076 foo (float32x4_t arg)
3078 return vcvt_f16_f32 (arg);
3080 } "$et_arm_neon_flags $flags"] } {
3081 set et_arm_neon_fp16_flags [concat $et_arm_neon_flags $flags]
3090 proc check_effective_target_arm_neon_fp16_ok { } {
3091 return [check_cached_effective_target arm_neon_fp16_ok \
3092 check_effective_target_arm_neon_fp16_ok_nocache]
3095 proc check_effective_target_arm_neon_fp16_hw { } {
3096 if {! [check_effective_target_arm_neon_fp16_ok] } {
3099 global et_arm_neon_fp16_flags
3100 check_runtime_nocache arm_neon_fp16_hw {
3102 main (int argc, char **argv)
3104 asm ("vcvt.f32.f16 q1, d0");
3107 } $et_arm_neon_fp16_flags
3110 proc add_options_for_arm_neon_fp16 { flags } {
3111 if { ! [check_effective_target_arm_neon_fp16_ok] } {
3114 global et_arm_neon_fp16_flags
3115 return "$flags $et_arm_neon_fp16_flags"
3118 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
3119 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3120 # incompatible with these options. Also set et_arm_v8_neon_flags to the
3121 # best options to add.
3123 proc check_effective_target_arm_v8_neon_ok_nocache { } {
3124 global et_arm_v8_neon_flags
3125 set et_arm_v8_neon_flags ""
3126 if { [check_effective_target_arm32] } {
3127 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3128 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
3130 #error not armv8 or later
3132 #include "arm_neon.h"
3136 __asm__ volatile ("vrintn.f32 q0, q0");
3138 } "$flags -march=armv8-a"] } {
3139 set et_arm_v8_neon_flags $flags
3148 proc check_effective_target_arm_v8_neon_ok { } {
3149 return [check_cached_effective_target arm_v8_neon_ok \
3150 check_effective_target_arm_v8_neon_ok_nocache]
3153 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
3154 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3155 # incompatible with these options. Also set et_arm_neonv2_flags to the
3156 # best options to add.
3158 proc check_effective_target_arm_neonv2_ok_nocache { } {
3159 global et_arm_neonv2_flags
3160 global et_arm_neon_flags
3161 set et_arm_neonv2_flags ""
3162 if { [check_effective_target_arm32]
3163 && [check_effective_target_arm_neon_ok] } {
3164 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
3165 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
3166 #include "arm_neon.h"
3168 foo (float32x2_t a, float32x2_t b, float32x2_t c)
3170 return vfma_f32 (a, b, c);
3172 } "$et_arm_neon_flags $flags"] } {
3173 set et_arm_neonv2_flags [concat $et_arm_neon_flags $flags]
3182 proc check_effective_target_arm_neonv2_ok { } {
3183 return [check_cached_effective_target arm_neonv2_ok \
3184 check_effective_target_arm_neonv2_ok_nocache]
3187 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3188 # or -mfloat-abi=hard, but if one is already specified by the
3191 proc add_options_for_arm_fp16 { flags } {
3192 if { ! [check_effective_target_arm_fp16_ok] } {
3195 global et_arm_fp16_flags
3196 return "$flags $et_arm_fp16_flags"
3199 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
3200 # Skip multilibs that are incompatible with these options and set
3201 # et_arm_fp16_flags to the best options to add.
3203 proc check_effective_target_arm_fp16_ok_nocache { } {
3204 global et_arm_fp16_flags
3205 set et_arm_fp16_flags ""
3206 if { ! [check_effective_target_arm32] } {
3209 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" "-mfpu=*fpv[1-9][0-9]*" } ]] {
3210 # Multilib flags would override -mfpu.
3213 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
3214 # Must generate floating-point instructions.
3217 if [check_effective_target_arm_hf_eabi] {
3218 # Use existing float-abi and force an fpu which supports fp16
3219 set et_arm_fp16_flags "-mfpu=vfpv4"
3222 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
3223 # The existing -mfpu value is OK; use it, but add softfp.
3224 set et_arm_fp16_flags "-mfloat-abi=softfp"
3227 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
3228 # macro to check for this support.
3229 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
3230 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
3233 set et_arm_fp16_flags "$flags"
3240 proc check_effective_target_arm_fp16_ok { } {
3241 return [check_cached_effective_target arm_fp16_ok \
3242 check_effective_target_arm_fp16_ok_nocache]
3245 # Creates a series of routines that return 1 if the given architecture
3246 # can be selected and a routine to give the flags to select that architecture
3247 # Note: Extra flags may be added to disable options from newer compilers
3248 # (Thumb in particular - but others may be added in the future).
3249 # -march=armv7ve is special and is handled explicitly after this loop because
3250 # it needs more than one predefine check to identify.
3251 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
3252 # /* { dg-add-options arm_arch_v5 } */
3253 # /* { dg-require-effective-target arm_arch_v5_multilib } */
3254 foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__
3255 v4t "-march=armv4t" __ARM_ARCH_4T__
3256 v5 "-march=armv5 -marm" __ARM_ARCH_5__
3257 v5t "-march=armv5t" __ARM_ARCH_5T__
3258 v5te "-march=armv5te" __ARM_ARCH_5TE__
3259 v6 "-march=armv6" __ARM_ARCH_6__
3260 v6k "-march=armv6k" __ARM_ARCH_6K__
3261 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
3262 v6z "-march=armv6z" __ARM_ARCH_6Z__
3263 v6m "-march=armv6-m -mthumb" __ARM_ARCH_6M__
3264 v7a "-march=armv7-a" __ARM_ARCH_7A__
3265 v7r "-march=armv7-r" __ARM_ARCH_7R__
3266 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
3267 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
3268 v8a "-march=armv8-a" __ARM_ARCH_8A__
3269 v8_1a "-march=armv8.1a" __ARM_ARCH_8A__ } {
3270 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
3271 proc check_effective_target_arm_arch_FUNC_ok { } {
3272 if { [ string match "*-marm*" "FLAG" ] &&
3273 ![check_effective_target_arm_arm_ok] } {
3276 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
3283 proc add_options_for_arm_arch_FUNC { flags } {
3284 return "$flags FLAG"
3287 proc check_effective_target_arm_arch_FUNC_multilib { } {
3288 return [check_runtime arm_arch_FUNC_multilib {
3294 } [add_options_for_arm_arch_FUNC ""]]
3299 # Same functions as above but for -march=armv7ve. To uniquely identify
3300 # -march=armv7ve we need to check for __ARM_ARCH_7A__ as well as
3301 # __ARM_FEATURE_IDIV otherwise it aliases with armv7-a.
3303 proc check_effective_target_arm_arch_v7ve_ok { } {
3304 if { [ string match "*-marm*" "-march=armv7ve" ] &&
3305 ![check_effective_target_arm_arm_ok] } {
3308 return [check_no_compiler_messages arm_arch_v7ve_ok assembly {
3309 #if !defined (__ARM_ARCH_7A__) || !defined (__ARM_FEATURE_IDIV)
3312 } "-march=armv7ve" ]
3315 proc add_options_for_arm_arch_v7ve { flags } {
3316 return "$flags -march=armv7ve"
3319 # Return 1 if this is an ARM target where -marm causes ARM to be
3322 proc check_effective_target_arm_arm_ok { } {
3323 return [check_no_compiler_messages arm_arm_ok assembly {
3324 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
3325 #error !__arm__ || __thumb__ || __thumb2__
3331 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
3334 proc check_effective_target_arm_thumb1_ok { } {
3335 return [check_no_compiler_messages arm_thumb1_ok assembly {
3336 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3337 #error !__arm__ || !__thumb__ || __thumb2__
3339 int foo (int i) { return i; }
3343 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
3346 proc check_effective_target_arm_thumb2_ok { } {
3347 return [check_no_compiler_messages arm_thumb2_ok assembly {
3348 #if !defined(__thumb2__)
3351 int foo (int i) { return i; }
3355 # Return 1 if this is an ARM target where Thumb-1 is used without options
3356 # added by the test.
3358 proc check_effective_target_arm_thumb1 { } {
3359 return [check_no_compiler_messages arm_thumb1 assembly {
3360 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3361 #error !__arm__ || !__thumb__ || __thumb2__
3367 # Return 1 if this is an ARM target where Thumb-2 is used without options
3368 # added by the test.
3370 proc check_effective_target_arm_thumb2 { } {
3371 return [check_no_compiler_messages arm_thumb2 assembly {
3372 #if !defined(__thumb2__)
3379 # Return 1 if this is an ARM target where conditional execution is available.
3381 proc check_effective_target_arm_cond_exec { } {
3382 return [check_no_compiler_messages arm_cond_exec assembly {
3383 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
3390 # Return 1 if this is an ARM cortex-M profile cpu
3392 proc check_effective_target_arm_cortex_m { } {
3393 if { ![istarget arm*-*-*] } {
3396 return [check_no_compiler_messages arm_cortex_m assembly {
3397 #if !defined(__ARM_ARCH_7M__) \
3398 && !defined (__ARM_ARCH_7EM__) \
3399 && !defined (__ARM_ARCH_6M__)
3400 #error !__ARM_ARCH_7M__ && !__ARM_ARCH_7EM__ && !__ARM_ARCH_6M__
3406 # Return 1 if this compilation turns on string_ops_prefer_neon on.
3408 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
3409 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
3410 int foo (void) { return 0; }
3411 } "-O2 -mprint-tune-info" ]
3414 # Return 1 if the target supports executing NEON instructions, 0
3415 # otherwise. Cache the result.
3417 proc check_effective_target_arm_neon_hw { } {
3418 return [check_runtime arm_neon_hw_available {
3422 long long a = 0, b = 1;
3423 asm ("vorr %P0, %P1, %P2"
3425 : "0" (a), "w" (b));
3428 } [add_options_for_arm_neon ""]]
3431 proc check_effective_target_arm_neonv2_hw { } {
3432 return [check_runtime arm_neon_hwv2_available {
3433 #include "arm_neon.h"
3437 float32x2_t a, b, c;
3438 asm ("vfma.f32 %P0, %P1, %P2"
3440 : "w" (b), "w" (c));
3443 } [add_options_for_arm_neonv2 ""]]
3446 # Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
3447 # otherwise. The test is valid for AArch64 and ARM. Record the command
3448 # line options needed.
3450 proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
3451 global et_arm_v8_1a_neon_flags
3452 set et_arm_v8_1a_neon_flags ""
3454 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
3458 # Iterate through sets of options to find the compiler flags that
3459 # need to be added to the -march option. Start with the empty set
3460 # since AArch64 only needs the -march setting.
3461 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
3462 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3463 if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object {
3464 #if !defined (__ARM_FEATURE_QRDMX)
3465 #error "__ARM_FEATURE_QRDMX not defined"
3467 } "$flags -march=armv8.1-a"] } {
3468 set et_arm_v8_1a_neon_flags "$flags -march=armv8.1-a"
3476 proc check_effective_target_arm_v8_1a_neon_ok { } {
3477 return [check_cached_effective_target arm_v8_1a_neon_ok \
3478 check_effective_target_arm_v8_1a_neon_ok_nocache]
3481 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
3484 proc check_effective_target_arm_v8_neon_hw { } {
3485 return [check_runtime arm_v8_neon_hw_available {
3486 #include "arm_neon.h"
3490 float32x2_t a = { 1.0f, 2.0f };
3491 #ifdef __ARM_ARCH_ISA_A64
3492 asm ("frinta %0.2s, %1.2s"
3496 asm ("vrinta.f32 %P0, %P1"
3500 return a[0] == 2.0f;
3502 } [add_options_for_arm_v8_neon ""]]
3505 # Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
3506 # otherwise. The test is valid for AArch64 and ARM.
3508 proc check_effective_target_arm_v8_1a_neon_hw { } {
3509 if { ![check_effective_target_arm_v8_1a_neon_ok] } {
3512 return [check_runtime arm_v8_1a_neon_hw_available {
3516 #ifdef __ARM_ARCH_ISA_A64
3517 __Int32x2_t a = {0, 1};
3518 __Int32x2_t b = {0, 2};
3521 asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
3524 : /* No clobbers. */);
3528 __simd64_int32_t a = {0, 1};
3529 __simd64_int32_t b = {0, 2};
3530 __simd64_int32_t result;
3532 asm ("vqrdmlah.s32 %P0, %P1, %P2"
3535 : /* No clobbers. */);
3540 } [add_options_for_arm_v8_1a_neon ""]]
3543 # Return 1 if this is a ARM target with NEON enabled.
3545 proc check_effective_target_arm_neon { } {
3546 if { [check_effective_target_arm32] } {
3547 return [check_no_compiler_messages arm_neon object {
3548 #ifndef __ARM_NEON__
3559 proc check_effective_target_arm_neonv2 { } {
3560 if { [check_effective_target_arm32] } {
3561 return [check_no_compiler_messages arm_neon object {
3562 #ifndef __ARM_NEON__
3565 #ifndef __ARM_FEATURE_FMA
3577 # Return 1 if this is an ARM target with load acquire and store release
3578 # instructions for 8-, 16- and 32-bit types.
3580 proc check_effective_target_arm_acq_rel { } {
3581 return [check_no_compiler_messages arm_acq_rel object {
3583 load_acquire_store_release (void)
3585 asm ("lda r0, [r1]\n\t"
3591 : : : "r0", "memory");
3596 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
3597 # the Loongson vector modes.
3599 proc check_effective_target_mips_loongson { } {
3600 return [check_no_compiler_messages loongson assembly {
3601 #if !defined(__mips_loongson_vector_rev)
3602 #error !__mips_loongson_vector_rev
3607 # Return 1 if this is a MIPS target that supports the legacy NAN.
3609 proc check_effective_target_mips_nanlegacy { } {
3610 return [check_no_compiler_messages nanlegacy assembly {
3612 int main () { return 0; }
3616 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
3619 proc check_effective_target_arm_eabi { } {
3620 return [check_no_compiler_messages arm_eabi object {
3621 #ifndef __ARM_EABI__
3629 # Return 1 if this is an ARM target that adheres to the hard-float variant of
3630 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
3632 proc check_effective_target_arm_hf_eabi { } {
3633 return [check_no_compiler_messages arm_hf_eabi object {
3634 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
3635 #error not hard-float EABI
3642 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
3643 # Some multilibs may be incompatible with this option.
3645 proc check_effective_target_arm_iwmmxt_ok { } {
3646 if { [check_effective_target_arm32] } {
3647 return [check_no_compiler_messages arm_iwmmxt_ok object {
3655 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
3656 # for an ARM target.
3657 proc check_effective_target_arm_prefer_ldrd_strd { } {
3658 if { ![check_effective_target_arm32] } {
3662 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
3663 void foo (int *p) { p[0] = 1; p[1] = 0;}
3667 # Return 1 if this is a PowerPC target supporting -meabi.
3669 proc check_effective_target_powerpc_eabi_ok { } {
3670 if { [istarget powerpc*-*-*] } {
3671 return [check_no_compiler_messages powerpc_eabi_ok object {
3679 # Return 1 if this is a PowerPC target with floating-point registers.
3681 proc check_effective_target_powerpc_fprs { } {
3682 if { [istarget powerpc*-*-*]
3683 || [istarget rs6000-*-*] } {
3684 return [check_no_compiler_messages powerpc_fprs object {
3696 # Return 1 if this is a PowerPC target with hardware double-precision
3699 proc check_effective_target_powerpc_hard_double { } {
3700 if { [istarget powerpc*-*-*]
3701 || [istarget rs6000-*-*] } {
3702 return [check_no_compiler_messages powerpc_hard_double object {
3714 # Return 1 if this is a PowerPC target supporting -maltivec.
3716 proc check_effective_target_powerpc_altivec_ok { } {
3717 if { ([istarget powerpc*-*-*]
3718 && ![istarget powerpc-*-linux*paired*])
3719 || [istarget rs6000-*-*] } {
3720 # AltiVec is not supported on AIX before 5.3.
3721 if { [istarget powerpc*-*-aix4*]
3722 || [istarget powerpc*-*-aix5.1*]
3723 || [istarget powerpc*-*-aix5.2*] } {
3726 return [check_no_compiler_messages powerpc_altivec_ok object {
3734 # Return 1 if this is a PowerPC target supporting -mpower8-vector
3736 proc check_effective_target_powerpc_p8vector_ok { } {
3737 if { ([istarget powerpc*-*-*]
3738 && ![istarget powerpc-*-linux*paired*])
3739 || [istarget rs6000-*-*] } {
3740 # AltiVec is not supported on AIX before 5.3.
3741 if { [istarget powerpc*-*-aix4*]
3742 || [istarget powerpc*-*-aix5.1*]
3743 || [istarget powerpc*-*-aix5.2*] } {
3746 return [check_no_compiler_messages powerpc_p8vector_ok object {
3749 asm volatile ("xxlorc vs0,vs0,vs0");
3751 asm volatile ("xxlorc 0,0,0");
3755 } "-mpower8-vector"]
3761 # Return 1 if this is a PowerPC target supporting -mpower9-vector
3763 proc check_effective_target_powerpc_p9vector_ok { } {
3764 if { ([istarget powerpc*-*-*]
3765 && ![istarget powerpc-*-linux*paired*])
3766 || [istarget rs6000-*-*] } {
3767 # AltiVec is not supported on AIX before 5.3.
3768 if { [istarget powerpc*-*-aix4*]
3769 || [istarget powerpc*-*-aix5.1*]
3770 || [istarget powerpc*-*-aix5.2*] } {
3773 return [check_no_compiler_messages powerpc_p9vector_ok object {
3776 vector double v = (vector double) { 0.0, 0.0 };
3777 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
3780 } "-mpower9-vector"]
3786 # Return 1 if this is a PowerPC target supporting -mmodulo
3788 proc check_effective_target_powerpc_p9modulo_ok { } {
3789 if { ([istarget powerpc*-*-*]
3790 && ![istarget powerpc-*-linux*paired*])
3791 || [istarget rs6000-*-*] } {
3792 # AltiVec is not supported on AIX before 5.3.
3793 if { [istarget powerpc*-*-aix4*]
3794 || [istarget powerpc*-*-aix5.1*]
3795 || [istarget powerpc*-*-aix5.2*] } {
3798 return [check_no_compiler_messages powerpc_p9modulo_ok object {
3800 int i = 5, j = 3, r = -1;
3801 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
3810 # Return 1 if this is a PowerPC target supporting -mfloat128 via either
3811 # software emulation on power7/power8 systems or hardware support on power9.
3813 proc check_effective_target_powerpc_float128_sw_ok { } {
3814 if { ([istarget powerpc*-*-*]
3815 && ![istarget powerpc-*-linux*paired*])
3816 || [istarget rs6000-*-*] } {
3817 # AltiVec is not supported on AIX before 5.3.
3818 if { [istarget powerpc*-*-aix4*]
3819 || [istarget powerpc*-*-aix5.1*]
3820 || [istarget powerpc*-*-aix5.2*] } {
3823 return [check_no_compiler_messages powerpc_float128_sw_ok object {
3824 volatile __float128 x = 1.0q;
3825 volatile __float128 y = 2.0q;
3827 __float128 z = x + y;
3830 } "-mfloat128 -mvsx"]
3836 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
3837 # support on power9.
3839 proc check_effective_target_powerpc_float128_hw_ok { } {
3840 if { ([istarget powerpc*-*-*]
3841 && ![istarget powerpc-*-linux*paired*])
3842 || [istarget rs6000-*-*] } {
3843 # AltiVec is not supported on AIX before 5.3.
3844 if { [istarget powerpc*-*-aix4*]
3845 || [istarget powerpc*-*-aix5.1*]
3846 || [istarget powerpc*-*-aix5.2*] } {
3849 return [check_no_compiler_messages powerpc_float128_hw_ok object {
3850 volatile __float128 x = 1.0q;
3851 volatile __float128 y = 2.0q;
3854 __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
3857 } "-mfloat128-hardware"]
3863 # Return 1 if this is a PowerPC target supporting -mvsx
3865 proc check_effective_target_powerpc_vsx_ok { } {
3866 if { ([istarget powerpc*-*-*]
3867 && ![istarget powerpc-*-linux*paired*])
3868 || [istarget rs6000-*-*] } {
3869 # VSX is not supported on AIX before 7.1.
3870 if { [istarget powerpc*-*-aix4*]
3871 || [istarget powerpc*-*-aix5*]
3872 || [istarget powerpc*-*-aix6*] } {
3875 return [check_no_compiler_messages powerpc_vsx_ok object {
3878 asm volatile ("xxlor vs0,vs0,vs0");
3880 asm volatile ("xxlor 0,0,0");
3890 # Return 1 if this is a PowerPC target supporting -mhtm
3892 proc check_effective_target_powerpc_htm_ok { } {
3893 if { ([istarget powerpc*-*-*]
3894 && ![istarget powerpc-*-linux*paired*])
3895 || [istarget rs6000-*-*] } {
3896 # HTM is not supported on AIX yet.
3897 if { [istarget powerpc*-*-aix*] } {
3900 return [check_no_compiler_messages powerpc_htm_ok object {
3902 asm volatile ("tbegin. 0");
3911 # Return 1 if the target supports executing HTM hardware instructions,
3912 # 0 otherwise. Cache the result.
3914 proc check_htm_hw_available { } {
3915 return [check_cached_effective_target htm_hw_available {
3916 # For now, disable on Darwin
3917 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
3920 check_runtime_nocache htm_hw_available {
3930 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
3932 proc check_effective_target_powerpc_ppu_ok { } {
3933 if [check_effective_target_powerpc_altivec_ok] {
3934 return [check_no_compiler_messages cell_asm_available object {
3937 asm volatile ("lvlx v0,v0,v0");
3939 asm volatile ("lvlx 0,0,0");
3949 # Return 1 if this is a PowerPC target that supports SPU.
3951 proc check_effective_target_powerpc_spu { } {
3952 if { [istarget powerpc*-*-linux*] } {
3953 return [check_effective_target_powerpc_altivec_ok]
3959 # Return 1 if this is a PowerPC SPE target. The check includes options
3960 # specified by dg-options for this test, so don't cache the result.
3962 proc check_effective_target_powerpc_spe_nocache { } {
3963 if { [istarget powerpc*-*-*] } {
3964 return [check_no_compiler_messages_nocache powerpc_spe object {
3970 } [current_compiler_flags]]
3976 # Return 1 if this is a PowerPC target with SPE enabled.
3978 proc check_effective_target_powerpc_spe { } {
3979 if { [istarget powerpc*-*-*] } {
3980 return [check_no_compiler_messages powerpc_spe object {
3992 # Return 1 if this is a PowerPC target with Altivec enabled.
3994 proc check_effective_target_powerpc_altivec { } {
3995 if { [istarget powerpc*-*-*] } {
3996 return [check_no_compiler_messages powerpc_altivec object {
4008 # Return 1 if this is a PowerPC 405 target. The check includes options
4009 # specified by dg-options for this test, so don't cache the result.
4011 proc check_effective_target_powerpc_405_nocache { } {
4012 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
4013 return [check_no_compiler_messages_nocache powerpc_405 object {
4019 } [current_compiler_flags]]
4025 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
4027 proc check_effective_target_powerpc_elfv2 { } {
4028 if { [istarget powerpc*-*-*] } {
4029 return [check_no_compiler_messages powerpc_elfv2 object {
4031 #error not ELF v2 ABI
4041 # Return 1 if this is a SPU target with a toolchain that
4042 # supports automatic overlay generation.
4044 proc check_effective_target_spu_auto_overlay { } {
4045 if { [istarget spu*-*-elf*] } {
4046 return [check_no_compiler_messages spu_auto_overlay executable {
4048 } "-Wl,--auto-overlay" ]
4054 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
4055 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
4056 # test environment appears to run executables on such a simulator.
4058 proc check_effective_target_ultrasparc_hw { } {
4059 return [check_runtime ultrasparc_hw {
4060 int main() { return 0; }
4061 } "-mcpu=ultrasparc"]
4064 # Return 1 if the test environment supports executing UltraSPARC VIS2
4065 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
4067 proc check_effective_target_ultrasparc_vis2_hw { } {
4068 return [check_runtime ultrasparc_vis2_hw {
4069 int main() { __asm__(".word 0x81b00320"); return 0; }
4070 } "-mcpu=ultrasparc3"]
4073 # Return 1 if the test environment supports executing UltraSPARC VIS3
4074 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
4076 proc check_effective_target_ultrasparc_vis3_hw { } {
4077 return [check_runtime ultrasparc_vis3_hw {
4078 int main() { __asm__(".word 0x81b00220"); return 0; }
4082 # Return 1 if this is a SPARC-V9 target.
4084 proc check_effective_target_sparc_v9 { } {
4085 if { [istarget sparc*-*-*] } {
4086 return [check_no_compiler_messages sparc_v9 object {
4088 asm volatile ("return %i7+8");
4097 # Return 1 if this is a SPARC target with VIS enabled.
4099 proc check_effective_target_sparc_vis { } {
4100 if { [istarget sparc*-*-*] } {
4101 return [check_no_compiler_messages sparc_vis object {
4113 # Return 1 if the target supports hardware vector shift operation.
4115 proc check_effective_target_vect_shift { } {
4116 global et_vect_shift_saved
4118 if [info exists et_vect_shift_saved] {
4119 verbose "check_effective_target_vect_shift: using cached result" 2
4121 set et_vect_shift_saved 0
4122 if { ([istarget powerpc*-*-*]
4123 && ![istarget powerpc-*-linux*paired*])
4124 || [istarget ia64-*-*]
4125 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4126 || [istarget aarch64*-*-*]
4127 || [check_effective_target_arm32]
4128 || ([istarget mips*-*-*]
4129 && [check_effective_target_mips_loongson]) } {
4130 set et_vect_shift_saved 1
4134 verbose "check_effective_target_vect_shift: returning $et_vect_shift_saved" 2
4135 return $et_vect_shift_saved
4138 proc check_effective_target_whole_vector_shift { } {
4139 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4140 || [istarget ia64-*-*]
4141 || [istarget aarch64*-*-*]
4142 || [istarget powerpc64*-*-*]
4143 || ([check_effective_target_arm32]
4144 && [check_effective_target_arm_little_endian])
4145 || ([istarget mips*-*-*]
4146 && [check_effective_target_mips_loongson]) } {
4152 verbose "check_effective_target_vect_long: returning $answer" 2
4156 # Return 1 if the target supports vector bswap operations.
4158 proc check_effective_target_vect_bswap { } {
4159 global et_vect_bswap_saved
4161 if [info exists et_vect_bswap_saved] {
4162 verbose "check_effective_target_vect_bswap: using cached result" 2
4164 set et_vect_bswap_saved 0
4165 if { [istarget aarch64*-*-*]
4166 || ([istarget arm*-*-*]
4167 && [check_effective_target_arm_neon])
4169 set et_vect_bswap_saved 1
4173 verbose "check_effective_target_vect_bswap: returning $et_vect_bswap_saved" 2
4174 return $et_vect_bswap_saved
4177 # Return 1 if the target supports hardware vector shift operation for char.
4179 proc check_effective_target_vect_shift_char { } {
4180 global et_vect_shift_char_saved
4182 if [info exists et_vect_shift_char_saved] {
4183 verbose "check_effective_target_vect_shift_char: using cached result" 2
4185 set et_vect_shift_char_saved 0
4186 if { ([istarget powerpc*-*-*]
4187 && ![istarget powerpc-*-linux*paired*])
4188 || [check_effective_target_arm32] } {
4189 set et_vect_shift_char_saved 1
4193 verbose "check_effective_target_vect_shift_char: returning $et_vect_shift_char_saved" 2
4194 return $et_vect_shift_char_saved
4197 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
4199 # This can change for different subtargets so do not cache the result.
4201 proc check_effective_target_vect_long { } {
4202 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4203 || (([istarget powerpc*-*-*]
4204 && ![istarget powerpc-*-linux*paired*])
4205 && [check_effective_target_ilp32])
4206 || [check_effective_target_arm32]
4207 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
4208 || [istarget aarch64*-*-*] } {
4214 verbose "check_effective_target_vect_long: returning $answer" 2
4218 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
4220 # This won't change for different subtargets so cache the result.
4222 proc check_effective_target_vect_float { } {
4223 global et_vect_float_saved
4225 if [info exists et_vect_float_saved] {
4226 verbose "check_effective_target_vect_float: using cached result" 2
4228 set et_vect_float_saved 0
4229 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4230 || [istarget powerpc*-*-*]
4231 || [istarget spu-*-*]
4232 || [istarget mips-sde-elf]
4233 || [istarget mipsisa64*-*-*]
4234 || [istarget ia64-*-*]
4235 || [istarget aarch64*-*-*]
4236 || [check_effective_target_arm32] } {
4237 set et_vect_float_saved 1
4241 verbose "check_effective_target_vect_float: returning $et_vect_float_saved" 2
4242 return $et_vect_float_saved
4245 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
4247 # This won't change for different subtargets so cache the result.
4249 proc check_effective_target_vect_double { } {
4250 global et_vect_double_saved
4252 if [info exists et_vect_double_saved] {
4253 verbose "check_effective_target_vect_double: using cached result" 2
4255 set et_vect_double_saved 0
4256 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4257 || [istarget aarch64*-*-*] } {
4258 if { [check_no_compiler_messages vect_double assembly {
4259 #ifdef __tune_atom__
4260 # error No double vectorizer support.
4263 set et_vect_double_saved 1
4265 set et_vect_double_saved 0
4267 } elseif { [istarget spu-*-*] } {
4268 set et_vect_double_saved 1
4269 } elseif { [istarget powerpc*-*-*] && [check_vsx_hw_available] } {
4270 set et_vect_double_saved 1
4274 verbose "check_effective_target_vect_double: returning $et_vect_double_saved" 2
4275 return $et_vect_double_saved
4278 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
4280 # This won't change for different subtargets so cache the result.
4282 proc check_effective_target_vect_long_long { } {
4283 global et_vect_long_long_saved
4285 if [info exists et_vect_long_long_saved] {
4286 verbose "check_effective_target_vect_long_long: using cached result" 2
4288 set et_vect_long_long_saved 0
4289 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4290 set et_vect_long_long_saved 1
4294 verbose "check_effective_target_vect_long_long: returning $et_vect_long_long_saved" 2
4295 return $et_vect_long_long_saved
4299 # Return 1 if the target plus current options does not support a vector
4300 # max instruction on "int", 0 otherwise.
4302 # This won't change for different subtargets so cache the result.
4304 proc check_effective_target_vect_no_int_min_max { } {
4305 global et_vect_no_int_min_max_saved
4307 if [info exists et_vect_no_int_min_max_saved] {
4308 verbose "check_effective_target_vect_no_int_min_max: using cached result" 2
4310 set et_vect_no_int_min_max_saved 0
4311 if { [istarget sparc*-*-*]
4312 || [istarget spu-*-*]
4313 || [istarget alpha*-*-*]
4314 || ([istarget mips*-*-*]
4315 && [check_effective_target_mips_loongson]) } {
4316 set et_vect_no_int_min_max_saved 1
4319 verbose "check_effective_target_vect_no_int_min_max: returning $et_vect_no_int_min_max_saved" 2
4320 return $et_vect_no_int_min_max_saved
4323 # Return 1 if the target plus current options does not support a vector
4324 # add instruction on "int", 0 otherwise.
4326 # This won't change for different subtargets so cache the result.
4328 proc check_effective_target_vect_no_int_add { } {
4329 global et_vect_no_int_add_saved
4331 if [info exists et_vect_no_int_add_saved] {
4332 verbose "check_effective_target_vect_no_int_add: using cached result" 2
4334 set et_vect_no_int_add_saved 0
4335 # Alpha only supports vector add on V8QI and V4HI.
4336 if { [istarget alpha*-*-*] } {
4337 set et_vect_no_int_add_saved 1
4340 verbose "check_effective_target_vect_no_int_add: returning $et_vect_no_int_add_saved" 2
4341 return $et_vect_no_int_add_saved
4344 # Return 1 if the target plus current options does not support vector
4345 # bitwise instructions, 0 otherwise.
4347 # This won't change for different subtargets so cache the result.
4349 proc check_effective_target_vect_no_bitwise { } {
4350 global et_vect_no_bitwise_saved
4352 if [info exists et_vect_no_bitwise_saved] {
4353 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
4355 set et_vect_no_bitwise_saved 0
4357 verbose "check_effective_target_vect_no_bitwise: returning $et_vect_no_bitwise_saved" 2
4358 return $et_vect_no_bitwise_saved
4361 # Return 1 if the target plus current options supports vector permutation,
4364 # This won't change for different subtargets so cache the result.
4366 proc check_effective_target_vect_perm { } {
4369 if [info exists et_vect_perm_saved] {
4370 verbose "check_effective_target_vect_perm: using cached result" 2
4372 set et_vect_perm_saved 0
4373 if { [is-effective-target arm_neon_ok]
4374 || [istarget aarch64*-*-*]
4375 || [istarget powerpc*-*-*]
4376 || [istarget spu-*-*]
4377 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4378 || ([istarget mips*-*-*]
4379 && [check_effective_target_mpaired_single]) } {
4380 set et_vect_perm_saved 1
4383 verbose "check_effective_target_vect_perm: returning $et_vect_perm_saved" 2
4384 return $et_vect_perm_saved
4387 # Return 1 if the target plus current options supports vector permutation
4388 # on byte-sized elements, 0 otherwise.
4390 # This won't change for different subtargets so cache the result.
4392 proc check_effective_target_vect_perm_byte { } {
4393 global et_vect_perm_byte
4395 if [info exists et_vect_perm_byte_saved] {
4396 verbose "check_effective_target_vect_perm_byte: using cached result" 2
4398 set et_vect_perm_byte_saved 0
4399 if { ([is-effective-target arm_neon_ok]
4400 && [is-effective-target arm_little_endian])
4401 || ([istarget aarch64*-*-*]
4402 && [is-effective-target aarch64_little_endian])
4403 || [istarget powerpc*-*-*]
4404 || [istarget spu-*-*] } {
4405 set et_vect_perm_byte_saved 1
4408 verbose "check_effective_target_vect_perm_byte: returning $et_vect_perm_byte_saved" 2
4409 return $et_vect_perm_byte_saved
4412 # Return 1 if the target plus current options supports vector permutation
4413 # on short-sized elements, 0 otherwise.
4415 # This won't change for different subtargets so cache the result.
4417 proc check_effective_target_vect_perm_short { } {
4418 global et_vect_perm_short
4420 if [info exists et_vect_perm_short_saved] {
4421 verbose "check_effective_target_vect_perm_short: using cached result" 2
4423 set et_vect_perm_short_saved 0
4424 if { ([is-effective-target arm_neon_ok]
4425 && [is-effective-target arm_little_endian])
4426 || ([istarget aarch64*-*-*]
4427 && [is-effective-target aarch64_little_endian])
4428 || [istarget powerpc*-*-*]
4429 || [istarget spu-*-*] } {
4430 set et_vect_perm_short_saved 1
4433 verbose "check_effective_target_vect_perm_short: returning $et_vect_perm_short_saved" 2
4434 return $et_vect_perm_short_saved
4437 # Return 1 if the target plus current options supports a vector
4438 # widening summation of *short* args into *int* result, 0 otherwise.
4440 # This won't change for different subtargets so cache the result.
4442 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
4443 global et_vect_widen_sum_hi_to_si_pattern
4445 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved] {
4446 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: using cached result" 2
4448 set et_vect_widen_sum_hi_to_si_pattern_saved 0
4449 if { [istarget powerpc*-*-*]
4450 || [istarget aarch64*-*-*]
4451 || ([istarget arm*-*-*] &&
4452 [check_effective_target_arm_neon_ok])
4453 || [istarget ia64-*-*] } {
4454 set et_vect_widen_sum_hi_to_si_pattern_saved 1
4457 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: returning $et_vect_widen_sum_hi_to_si_pattern_saved" 2
4458 return $et_vect_widen_sum_hi_to_si_pattern_saved
4461 # Return 1 if the target plus current options supports a vector
4462 # widening summation of *short* args into *int* result, 0 otherwise.
4463 # A target can also support this widening summation if it can support
4464 # promotion (unpacking) from shorts to ints.
4466 # This won't change for different subtargets so cache the result.
4468 proc check_effective_target_vect_widen_sum_hi_to_si { } {
4469 global et_vect_widen_sum_hi_to_si
4471 if [info exists et_vect_widen_sum_hi_to_si_saved] {
4472 verbose "check_effective_target_vect_widen_sum_hi_to_si: using cached result" 2
4474 set et_vect_widen_sum_hi_to_si_saved [check_effective_target_vect_unpack]
4475 if { [istarget powerpc*-*-*]
4476 || [istarget ia64-*-*] } {
4477 set et_vect_widen_sum_hi_to_si_saved 1
4480 verbose "check_effective_target_vect_widen_sum_hi_to_si: returning $et_vect_widen_sum_hi_to_si_saved" 2
4481 return $et_vect_widen_sum_hi_to_si_saved
4484 # Return 1 if the target plus current options supports a vector
4485 # widening summation of *char* args into *short* result, 0 otherwise.
4486 # A target can also support this widening summation if it can support
4487 # promotion (unpacking) from chars to shorts.
4489 # This won't change for different subtargets so cache the result.
4491 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
4492 global et_vect_widen_sum_qi_to_hi
4494 if [info exists et_vect_widen_sum_qi_to_hi_saved] {
4495 verbose "check_effective_target_vect_widen_sum_qi_to_hi: using cached result" 2
4497 set et_vect_widen_sum_qi_to_hi_saved 0
4498 if { [check_effective_target_vect_unpack]
4499 || [check_effective_target_arm_neon_ok]
4500 || [istarget ia64-*-*] } {
4501 set et_vect_widen_sum_qi_to_hi_saved 1
4504 verbose "check_effective_target_vect_widen_sum_qi_to_hi: returning $et_vect_widen_sum_qi_to_hi_saved" 2
4505 return $et_vect_widen_sum_qi_to_hi_saved
4508 # Return 1 if the target plus current options supports a vector
4509 # widening summation of *char* args into *int* result, 0 otherwise.
4511 # This won't change for different subtargets so cache the result.
4513 proc check_effective_target_vect_widen_sum_qi_to_si { } {
4514 global et_vect_widen_sum_qi_to_si
4516 if [info exists et_vect_widen_sum_qi_to_si_saved] {
4517 verbose "check_effective_target_vect_widen_sum_qi_to_si: using cached result" 2
4519 set et_vect_widen_sum_qi_to_si_saved 0
4520 if { [istarget powerpc*-*-*] } {
4521 set et_vect_widen_sum_qi_to_si_saved 1
4524 verbose "check_effective_target_vect_widen_sum_qi_to_si: returning $et_vect_widen_sum_qi_to_si_saved" 2
4525 return $et_vect_widen_sum_qi_to_si_saved
4528 # Return 1 if the target plus current options supports a vector
4529 # widening multiplication of *char* args into *short* result, 0 otherwise.
4530 # A target can also support this widening multplication if it can support
4531 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
4532 # multiplication of shorts).
4534 # This won't change for different subtargets so cache the result.
4537 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
4538 global et_vect_widen_mult_qi_to_hi
4540 if [info exists et_vect_widen_mult_qi_to_hi_saved] {
4541 verbose "check_effective_target_vect_widen_mult_qi_to_hi: using cached result" 2
4543 if { [check_effective_target_vect_unpack]
4544 && [check_effective_target_vect_short_mult] } {
4545 set et_vect_widen_mult_qi_to_hi_saved 1
4547 set et_vect_widen_mult_qi_to_hi_saved 0
4549 if { [istarget powerpc*-*-*]
4550 || [istarget aarch64*-*-*]
4551 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4552 set et_vect_widen_mult_qi_to_hi_saved 1
4555 verbose "check_effective_target_vect_widen_mult_qi_to_hi: returning $et_vect_widen_mult_qi_to_hi_saved" 2
4556 return $et_vect_widen_mult_qi_to_hi_saved
4559 # Return 1 if the target plus current options supports a vector
4560 # widening multiplication of *short* args into *int* result, 0 otherwise.
4561 # A target can also support this widening multplication if it can support
4562 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
4563 # multiplication of ints).
4565 # This won't change for different subtargets so cache the result.
4568 proc check_effective_target_vect_widen_mult_hi_to_si { } {
4569 global et_vect_widen_mult_hi_to_si
4571 if [info exists et_vect_widen_mult_hi_to_si_saved] {
4572 verbose "check_effective_target_vect_widen_mult_hi_to_si: using cached result" 2
4574 if { [check_effective_target_vect_unpack]
4575 && [check_effective_target_vect_int_mult] } {
4576 set et_vect_widen_mult_hi_to_si_saved 1
4578 set et_vect_widen_mult_hi_to_si_saved 0
4580 if { [istarget powerpc*-*-*]
4581 || [istarget spu-*-*]
4582 || [istarget ia64-*-*]
4583 || [istarget aarch64*-*-*]
4584 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4585 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4586 set et_vect_widen_mult_hi_to_si_saved 1
4589 verbose "check_effective_target_vect_widen_mult_hi_to_si: returning $et_vect_widen_mult_hi_to_si_saved" 2
4590 return $et_vect_widen_mult_hi_to_si_saved
4593 # Return 1 if the target plus current options supports a vector
4594 # widening multiplication of *char* args into *short* result, 0 otherwise.
4596 # This won't change for different subtargets so cache the result.
4598 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
4599 global et_vect_widen_mult_qi_to_hi_pattern
4601 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved] {
4602 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: using cached result" 2
4604 set et_vect_widen_mult_qi_to_hi_pattern_saved 0
4605 if { [istarget powerpc*-*-*]
4606 || ([istarget arm*-*-*]
4607 && [check_effective_target_arm_neon_ok]
4608 && [check_effective_target_arm_little_endian]) } {
4609 set et_vect_widen_mult_qi_to_hi_pattern_saved 1
4612 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: returning $et_vect_widen_mult_qi_to_hi_pattern_saved" 2
4613 return $et_vect_widen_mult_qi_to_hi_pattern_saved
4616 # Return 1 if the target plus current options supports a vector
4617 # widening multiplication of *short* args into *int* result, 0 otherwise.
4619 # This won't change for different subtargets so cache the result.
4621 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
4622 global et_vect_widen_mult_hi_to_si_pattern
4624 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved] {
4625 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: using cached result" 2
4627 set et_vect_widen_mult_hi_to_si_pattern_saved 0
4628 if { [istarget powerpc*-*-*]
4629 || [istarget spu-*-*]
4630 || [istarget ia64-*-*]
4631 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4632 || ([istarget arm*-*-*]
4633 && [check_effective_target_arm_neon_ok]
4634 && [check_effective_target_arm_little_endian]) } {
4635 set et_vect_widen_mult_hi_to_si_pattern_saved 1
4638 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: returning $et_vect_widen_mult_hi_to_si_pattern_saved" 2
4639 return $et_vect_widen_mult_hi_to_si_pattern_saved
4642 # Return 1 if the target plus current options supports a vector
4643 # widening multiplication of *int* args into *long* result, 0 otherwise.
4645 # This won't change for different subtargets so cache the result.
4647 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
4648 global et_vect_widen_mult_si_to_di_pattern
4650 if [info exists et_vect_widen_mult_si_to_di_pattern_saved] {
4651 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: using cached result" 2
4653 set et_vect_widen_mult_si_to_di_pattern_saved 0
4654 if {[istarget ia64-*-*]
4655 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4656 set et_vect_widen_mult_si_to_di_pattern_saved 1
4659 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: returning $et_vect_widen_mult_si_to_di_pattern_saved" 2
4660 return $et_vect_widen_mult_si_to_di_pattern_saved
4663 # Return 1 if the target plus current options supports a vector
4664 # widening shift, 0 otherwise.
4666 # This won't change for different subtargets so cache the result.
4668 proc check_effective_target_vect_widen_shift { } {
4669 global et_vect_widen_shift_saved
4671 if [info exists et_vect_shift_saved] {
4672 verbose "check_effective_target_vect_widen_shift: using cached result" 2
4674 set et_vect_widen_shift_saved 0
4675 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4676 set et_vect_widen_shift_saved 1
4679 verbose "check_effective_target_vect_widen_shift: returning $et_vect_widen_shift_saved" 2
4680 return $et_vect_widen_shift_saved
4683 # Return 1 if the target plus current options supports a vector
4684 # dot-product of signed chars, 0 otherwise.
4686 # This won't change for different subtargets so cache the result.
4688 proc check_effective_target_vect_sdot_qi { } {
4689 global et_vect_sdot_qi
4691 if [info exists et_vect_sdot_qi_saved] {
4692 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
4694 set et_vect_sdot_qi_saved 0
4695 if { [istarget ia64-*-*] } {
4696 set et_vect_udot_qi_saved 1
4699 verbose "check_effective_target_vect_sdot_qi: returning $et_vect_sdot_qi_saved" 2
4700 return $et_vect_sdot_qi_saved
4703 # Return 1 if the target plus current options supports a vector
4704 # dot-product of unsigned chars, 0 otherwise.
4706 # This won't change for different subtargets so cache the result.
4708 proc check_effective_target_vect_udot_qi { } {
4709 global et_vect_udot_qi
4711 if [info exists et_vect_udot_qi_saved] {
4712 verbose "check_effective_target_vect_udot_qi: using cached result" 2
4714 set et_vect_udot_qi_saved 0
4715 if { [istarget powerpc*-*-*]
4716 || [istarget ia64-*-*] } {
4717 set et_vect_udot_qi_saved 1
4720 verbose "check_effective_target_vect_udot_qi: returning $et_vect_udot_qi_saved" 2
4721 return $et_vect_udot_qi_saved
4724 # Return 1 if the target plus current options supports a vector
4725 # dot-product of signed shorts, 0 otherwise.
4727 # This won't change for different subtargets so cache the result.
4729 proc check_effective_target_vect_sdot_hi { } {
4730 global et_vect_sdot_hi
4732 if [info exists et_vect_sdot_hi_saved] {
4733 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
4735 set et_vect_sdot_hi_saved 0
4736 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4737 || [istarget ia64-*-*]
4738 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4739 set et_vect_sdot_hi_saved 1
4742 verbose "check_effective_target_vect_sdot_hi: returning $et_vect_sdot_hi_saved" 2
4743 return $et_vect_sdot_hi_saved
4746 # Return 1 if the target plus current options supports a vector
4747 # dot-product of unsigned shorts, 0 otherwise.
4749 # This won't change for different subtargets so cache the result.
4751 proc check_effective_target_vect_udot_hi { } {
4752 global et_vect_udot_hi
4754 if [info exists et_vect_udot_hi_saved] {
4755 verbose "check_effective_target_vect_udot_hi: using cached result" 2
4757 set et_vect_udot_hi_saved 0
4758 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) } {
4759 set et_vect_udot_hi_saved 1
4762 verbose "check_effective_target_vect_udot_hi: returning $et_vect_udot_hi_saved" 2
4763 return $et_vect_udot_hi_saved
4766 # Return 1 if the target plus current options supports a vector
4767 # sad operation of unsigned chars, 0 otherwise.
4769 # This won't change for different subtargets so cache the result.
4771 proc check_effective_target_vect_usad_char { } {
4772 global et_vect_usad_char
4774 if [info exists et_vect_usad_char_saved] {
4775 verbose "check_effective_target_vect_usad_char: using cached result" 2
4777 set et_vect_usad_char_saved 0
4778 if { ([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
4779 set et_vect_usad_char_saved 1
4782 verbose "check_effective_target_vect_usad_char: returning $et_vect_usad_char_saved" 2
4783 return $et_vect_usad_char_saved
4786 # Return 1 if the target plus current options supports a vector
4787 # demotion (packing) of shorts (to chars) and ints (to shorts)
4788 # using modulo arithmetic, 0 otherwise.
4790 # This won't change for different subtargets so cache the result.
4792 proc check_effective_target_vect_pack_trunc { } {
4793 global et_vect_pack_trunc
4795 if [info exists et_vect_pack_trunc_saved] {
4796 verbose "check_effective_target_vect_pack_trunc: using cached result" 2
4798 set et_vect_pack_trunc_saved 0
4799 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4800 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4801 || [istarget aarch64*-*-*]
4802 || [istarget spu-*-*]
4803 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4804 && [check_effective_target_arm_little_endian]) } {
4805 set et_vect_pack_trunc_saved 1
4808 verbose "check_effective_target_vect_pack_trunc: returning $et_vect_pack_trunc_saved" 2
4809 return $et_vect_pack_trunc_saved
4812 # Return 1 if the target plus current options supports a vector
4813 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
4815 # This won't change for different subtargets so cache the result.
4817 proc check_effective_target_vect_unpack { } {
4818 global et_vect_unpack
4820 if [info exists et_vect_unpack_saved] {
4821 verbose "check_effective_target_vect_unpack: using cached result" 2
4823 set et_vect_unpack_saved 0
4824 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
4825 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4826 || [istarget spu-*-*]
4827 || [istarget ia64-*-*]
4828 || [istarget aarch64*-*-*]
4829 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4830 && [check_effective_target_arm_little_endian]) } {
4831 set et_vect_unpack_saved 1
4834 verbose "check_effective_target_vect_unpack: returning $et_vect_unpack_saved" 2
4835 return $et_vect_unpack_saved
4838 # Return 1 if the target plus current options does not guarantee
4839 # that its STACK_BOUNDARY is >= the reguired vector alignment.
4841 # This won't change for different subtargets so cache the result.
4843 proc check_effective_target_unaligned_stack { } {
4844 global et_unaligned_stack_saved
4846 if [info exists et_unaligned_stack_saved] {
4847 verbose "check_effective_target_unaligned_stack: using cached result" 2
4849 set et_unaligned_stack_saved 0
4851 verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
4852 return $et_unaligned_stack_saved
4855 # Return 1 if the target plus current options does not support a vector
4856 # alignment mechanism, 0 otherwise.
4858 # This won't change for different subtargets so cache the result.
4860 proc check_effective_target_vect_no_align { } {
4861 global et_vect_no_align_saved
4863 if [info exists et_vect_no_align_saved] {
4864 verbose "check_effective_target_vect_no_align: using cached result" 2
4866 set et_vect_no_align_saved 0
4867 if { [istarget mipsisa64*-*-*]
4868 || [istarget mips-sde-elf]
4869 || [istarget sparc*-*-*]
4870 || [istarget ia64-*-*]
4871 || [check_effective_target_arm_vect_no_misalign]
4872 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
4873 || ([istarget mips*-*-*]
4874 && [check_effective_target_mips_loongson]) } {
4875 set et_vect_no_align_saved 1
4878 verbose "check_effective_target_vect_no_align: returning $et_vect_no_align_saved" 2
4879 return $et_vect_no_align_saved
4882 # Return 1 if the target supports a vector misalign access, 0 otherwise.
4884 # This won't change for different subtargets so cache the result.
4886 proc check_effective_target_vect_hw_misalign { } {
4887 global et_vect_hw_misalign_saved
4889 if [info exists et_vect_hw_misalign_saved] {
4890 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
4892 set et_vect_hw_misalign_saved 0
4893 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4894 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
4895 || [istarget aarch64*-*-*] } {
4896 set et_vect_hw_misalign_saved 1
4899 verbose "check_effective_target_vect_hw_misalign: returning $et_vect_hw_misalign_saved" 2
4900 return $et_vect_hw_misalign_saved
4904 # Return 1 if arrays are aligned to the vector alignment
4905 # boundary, 0 otherwise.
4907 # This won't change for different subtargets so cache the result.
4909 proc check_effective_target_vect_aligned_arrays { } {
4910 global et_vect_aligned_arrays
4912 if [info exists et_vect_aligned_arrays_saved] {
4913 verbose "check_effective_target_vect_aligned_arrays: using cached result" 2
4915 set et_vect_aligned_arrays_saved 0
4916 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
4917 if { ([is-effective-target lp64]
4918 && ( ![check_avx_available]
4919 || [check_prefer_avx128])) } {
4920 set et_vect_aligned_arrays_saved 1
4923 if [istarget spu-*-*] {
4924 set et_vect_aligned_arrays_saved 1
4927 verbose "check_effective_target_vect_aligned_arrays: returning $et_vect_aligned_arrays_saved" 2
4928 return $et_vect_aligned_arrays_saved
4931 # Return 1 if types of size 32 bit or less are naturally aligned
4932 # (aligned to their type-size), 0 otherwise.
4934 # This won't change for different subtargets so cache the result.
4936 proc check_effective_target_natural_alignment_32 { } {
4937 global et_natural_alignment_32
4939 if [info exists et_natural_alignment_32_saved] {
4940 verbose "check_effective_target_natural_alignment_32: using cached result" 2
4942 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
4943 set et_natural_alignment_32_saved 1
4944 if { ([istarget *-*-darwin*] && [is-effective-target lp64]) } {
4945 set et_natural_alignment_32_saved 0
4948 verbose "check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
4949 return $et_natural_alignment_32_saved
4952 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
4953 # type-size), 0 otherwise.
4955 # This won't change for different subtargets so cache the result.
4957 proc check_effective_target_natural_alignment_64 { } {
4958 global et_natural_alignment_64
4960 if [info exists et_natural_alignment_64_saved] {
4961 verbose "check_effective_target_natural_alignment_64: using cached result" 2
4963 set et_natural_alignment_64_saved 0
4964 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
4965 || [istarget spu-*-*] } {
4966 set et_natural_alignment_64_saved 1
4969 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
4970 return $et_natural_alignment_64_saved
4973 # Return 1 if all vector types are naturally aligned (aligned to their
4974 # type-size), 0 otherwise.
4976 # This won't change for different subtargets so cache the result.
4978 proc check_effective_target_vect_natural_alignment { } {
4979 global et_vect_natural_alignment
4981 if [info exists et_vect_natural_alignment_saved] {
4982 verbose "check_effective_target_vect_natural_alignment: using cached result" 2
4984 set et_vect_natural_alignment_saved 1
4985 if { [check_effective_target_arm_eabi]
4986 || [istarget nvptx-*-*]
4987 || [istarget s390*-*-*] } {
4988 set et_vect_natural_alignment_saved 0
4991 verbose "check_effective_target_vect_natural_alignment: returning $et_vect_natural_alignment_saved" 2
4992 return $et_vect_natural_alignment_saved
4995 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
4997 # This won't change for different subtargets so cache the result.
4999 proc check_effective_target_vector_alignment_reachable { } {
5000 global et_vector_alignment_reachable
5002 if [info exists et_vector_alignment_reachable_saved] {
5003 verbose "check_effective_target_vector_alignment_reachable: using cached result" 2
5005 if { [check_effective_target_vect_aligned_arrays]
5006 || [check_effective_target_natural_alignment_32] } {
5007 set et_vector_alignment_reachable_saved 1
5009 set et_vector_alignment_reachable_saved 0
5012 verbose "check_effective_target_vector_alignment_reachable: returning $et_vector_alignment_reachable_saved" 2
5013 return $et_vector_alignment_reachable_saved
5016 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
5018 # This won't change for different subtargets so cache the result.
5020 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
5021 global et_vector_alignment_reachable_for_64bit
5023 if [info exists et_vector_alignment_reachable_for_64bit_saved] {
5024 verbose "check_effective_target_vector_alignment_reachable_for_64bit: using cached result" 2
5026 if { [check_effective_target_vect_aligned_arrays]
5027 || [check_effective_target_natural_alignment_64] } {
5028 set et_vector_alignment_reachable_for_64bit_saved 1
5030 set et_vector_alignment_reachable_for_64bit_saved 0
5033 verbose "check_effective_target_vector_alignment_reachable_for_64bit: returning $et_vector_alignment_reachable_for_64bit_saved" 2
5034 return $et_vector_alignment_reachable_for_64bit_saved
5037 # Return 1 if the target only requires element alignment for vector accesses
5039 proc check_effective_target_vect_element_align { } {
5040 global et_vect_element_align
5042 if [info exists et_vect_element_align] {
5043 verbose "check_effective_target_vect_element_align: using cached result" 2
5045 set et_vect_element_align 0
5046 if { ([istarget arm*-*-*]
5047 && ![check_effective_target_arm_vect_no_misalign])
5048 || [check_effective_target_vect_hw_misalign] } {
5049 set et_vect_element_align 1
5053 verbose "check_effective_target_vect_element_align: returning $et_vect_element_align" 2
5054 return $et_vect_element_align
5057 # Return 1 if the target supports vector LOAD_LANES operations, 0 otherwise.
5059 proc check_effective_target_vect_load_lanes { } {
5060 global et_vect_load_lanes
5062 if [info exists et_vect_load_lanes] {
5063 verbose "check_effective_target_vect_load_lanes: using cached result" 2
5065 set et_vect_load_lanes 0
5066 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])
5067 || [istarget aarch64*-*-*] } {
5068 set et_vect_load_lanes 1
5072 verbose "check_effective_target_vect_load_lanes: returning $et_vect_load_lanes" 2
5073 return $et_vect_load_lanes
5076 # Return 1 if the target supports vector conditional operations, 0 otherwise.
5078 proc check_effective_target_vect_condition { } {
5079 global et_vect_cond_saved
5081 if [info exists et_vect_cond_saved] {
5082 verbose "check_effective_target_vect_cond: using cached result" 2
5084 set et_vect_cond_saved 0
5085 if { [istarget aarch64*-*-*]
5086 || [istarget powerpc*-*-*]
5087 || [istarget ia64-*-*]
5088 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5089 || [istarget spu-*-*]
5090 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
5091 set et_vect_cond_saved 1
5095 verbose "check_effective_target_vect_cond: returning $et_vect_cond_saved" 2
5096 return $et_vect_cond_saved
5099 # Return 1 if the target supports vector conditional operations where
5100 # the comparison has different type from the lhs, 0 otherwise.
5102 proc check_effective_target_vect_cond_mixed { } {
5103 global et_vect_cond_mixed_saved
5105 if [info exists et_vect_cond_mixed_saved] {
5106 verbose "check_effective_target_vect_cond_mixed: using cached result" 2
5108 set et_vect_cond_mixed_saved 0
5109 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5110 || [istarget powerpc*-*-*] } {
5111 set et_vect_cond_mixed_saved 1
5115 verbose "check_effective_target_vect_cond_mixed: returning $et_vect_cond_mixed_saved" 2
5116 return $et_vect_cond_mixed_saved
5119 # Return 1 if the target supports vector char multiplication, 0 otherwise.
5121 proc check_effective_target_vect_char_mult { } {
5122 global et_vect_char_mult_saved
5124 if [info exists et_vect_char_mult_saved] {
5125 verbose "check_effective_target_vect_char_mult: using cached result" 2
5127 set et_vect_char_mult_saved 0
5128 if { [istarget aarch64*-*-*]
5129 || [istarget ia64-*-*]
5130 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5131 || [check_effective_target_arm32]
5132 || [check_effective_target_powerpc_altivec] } {
5133 set et_vect_char_mult_saved 1
5137 verbose "check_effective_target_vect_char_mult: returning $et_vect_char_mult_saved" 2
5138 return $et_vect_char_mult_saved
5141 # Return 1 if the target supports vector short multiplication, 0 otherwise.
5143 proc check_effective_target_vect_short_mult { } {
5144 global et_vect_short_mult_saved
5146 if [info exists et_vect_short_mult_saved] {
5147 verbose "check_effective_target_vect_short_mult: using cached result" 2
5149 set et_vect_short_mult_saved 0
5150 if { [istarget ia64-*-*]
5151 || [istarget spu-*-*]
5152 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5153 || [istarget powerpc*-*-*]
5154 || [istarget aarch64*-*-*]
5155 || [check_effective_target_arm32]
5156 || ([istarget mips*-*-*]
5157 && [check_effective_target_mips_loongson]) } {
5158 set et_vect_short_mult_saved 1
5162 verbose "check_effective_target_vect_short_mult: returning $et_vect_short_mult_saved" 2
5163 return $et_vect_short_mult_saved
5166 # Return 1 if the target supports vector int multiplication, 0 otherwise.
5168 proc check_effective_target_vect_int_mult { } {
5169 global et_vect_int_mult_saved
5171 if [info exists et_vect_int_mult_saved] {
5172 verbose "check_effective_target_vect_int_mult: using cached result" 2
5174 set et_vect_int_mult_saved 0
5175 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5176 || [istarget spu-*-*]
5177 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5178 || [istarget ia64-*-*]
5179 || [istarget aarch64*-*-*]
5180 || [check_effective_target_arm32] } {
5181 set et_vect_int_mult_saved 1
5185 verbose "check_effective_target_vect_int_mult: returning $et_vect_int_mult_saved" 2
5186 return $et_vect_int_mult_saved
5189 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
5191 proc check_effective_target_vect_extract_even_odd { } {
5192 global et_vect_extract_even_odd_saved
5194 if [info exists et_vect_extract_even_odd_saved] {
5195 verbose "check_effective_target_vect_extract_even_odd: using cached result" 2
5197 set et_vect_extract_even_odd_saved 0
5198 if { [istarget aarch64*-*-*]
5199 || [istarget powerpc*-*-*]
5200 || [is-effective-target arm_neon_ok]
5201 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5202 || [istarget ia64-*-*]
5203 || [istarget spu-*-*]
5204 || ([istarget mips*-*-*]
5205 && [check_effective_target_mpaired_single]) } {
5206 set et_vect_extract_even_odd_saved 1
5210 verbose "check_effective_target_vect_extract_even_odd: returning $et_vect_extract_even_odd_saved" 2
5211 return $et_vect_extract_even_odd_saved
5214 # Return 1 if the target supports vector interleaving, 0 otherwise.
5216 proc check_effective_target_vect_interleave { } {
5217 global et_vect_interleave_saved
5219 if [info exists et_vect_interleave_saved] {
5220 verbose "check_effective_target_vect_interleave: using cached result" 2
5222 set et_vect_interleave_saved 0
5223 if { [istarget aarch64*-*-*]
5224 || [istarget powerpc*-*-*]
5225 || [is-effective-target arm_neon_ok]
5226 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5227 || [istarget ia64-*-*]
5228 || [istarget spu-*-*]
5229 || ([istarget mips*-*-*]
5230 && [check_effective_target_mpaired_single]) } {
5231 set et_vect_interleave_saved 1
5235 verbose "check_effective_target_vect_interleave: returning $et_vect_interleave_saved" 2
5236 return $et_vect_interleave_saved
5239 foreach N {2 3 4 8} {
5240 eval [string map [list N $N] {
5241 # Return 1 if the target supports 2-vector interleaving
5242 proc check_effective_target_vect_stridedN { } {
5243 global et_vect_stridedN_saved
5245 if [info exists et_vect_stridedN_saved] {
5246 verbose "check_effective_target_vect_stridedN: using cached result" 2
5248 set et_vect_stridedN_saved 0
5250 && [check_effective_target_vect_interleave]
5251 && [check_effective_target_vect_extract_even_odd] } {
5252 set et_vect_stridedN_saved 1
5254 if { ([istarget arm*-*-*]
5255 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
5256 set et_vect_stridedN_saved 1
5260 verbose "check_effective_target_vect_stridedN: returning $et_vect_stridedN_saved" 2
5261 return $et_vect_stridedN_saved
5266 # Return 1 if the target supports multiple vector sizes
5268 proc check_effective_target_vect_multiple_sizes { } {
5269 global et_vect_multiple_sizes_saved
5271 set et_vect_multiple_sizes_saved 0
5272 if { ([istarget aarch64*-*-*]
5273 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])) } {
5274 set et_vect_multiple_sizes_saved 1
5276 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
5277 if { ([check_avx_available] && ![check_prefer_avx128]) } {
5278 set et_vect_multiple_sizes_saved 1
5282 verbose "check_effective_target_vect_multiple_sizes: returning $et_vect_multiple_sizes_saved" 2
5283 return $et_vect_multiple_sizes_saved
5286 # Return 1 if the target supports vectors of 64 bits.
5288 proc check_effective_target_vect64 { } {
5289 global et_vect64_saved
5291 if [info exists et_vect64_saved] {
5292 verbose "check_effective_target_vect64: using cached result" 2
5294 set et_vect64_saved 0
5295 if { ([istarget arm*-*-*]
5296 && [check_effective_target_arm_neon_ok]
5297 && [check_effective_target_arm_little_endian])
5298 || [istarget aarch64*-*-*]
5299 || [istarget sparc*-*-*] } {
5300 set et_vect64_saved 1
5304 verbose "check_effective_target_vect64: returning $et_vect64_saved" 2
5305 return $et_vect64_saved
5308 # Return 1 if the target supports vector copysignf calls.
5310 proc check_effective_target_vect_call_copysignf { } {
5311 global et_vect_call_copysignf_saved
5313 if [info exists et_vect_call_copysignf_saved] {
5314 verbose "check_effective_target_vect_call_copysignf: using cached result" 2
5316 set et_vect_call_copysignf_saved 0
5317 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5318 || [istarget powerpc*-*-*] } {
5319 set et_vect_call_copysignf_saved 1
5323 verbose "check_effective_target_vect_call_copysignf: returning $et_vect_call_copysignf_saved" 2
5324 return $et_vect_call_copysignf_saved
5327 # Return 1 if the target supports hardware square root instructions.
5329 proc check_effective_target_sqrt_insn { } {
5330 global et_sqrt_insn_saved
5332 if [info exists et_sqrt_insn_saved] {
5333 verbose "check_effective_target_hw_sqrt: using cached result" 2
5335 set et_sqrt_insn_saved 0
5336 if { [istarget x86_64-*-*]
5337 || [istarget powerpc*-*-*]
5338 || [istarget aarch64*-*-*]
5339 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok]) } {
5340 set et_sqrt_insn_saved 1
5344 verbose "check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2
5345 return $et_sqrt_insn_saved
5348 # Return 1 if the target supports vector sqrtf calls.
5350 proc check_effective_target_vect_call_sqrtf { } {
5351 global et_vect_call_sqrtf_saved
5353 if [info exists et_vect_call_sqrtf_saved] {
5354 verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
5356 set et_vect_call_sqrtf_saved 0
5357 if { [istarget aarch64*-*-*]
5358 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5359 || ([istarget powerpc*-*-*] && [check_vsx_hw_available]) } {
5360 set et_vect_call_sqrtf_saved 1
5364 verbose "check_effective_target_vect_call_sqrtf: returning $et_vect_call_sqrtf_saved" 2
5365 return $et_vect_call_sqrtf_saved
5368 # Return 1 if the target supports vector lrint calls.
5370 proc check_effective_target_vect_call_lrint { } {
5371 set et_vect_call_lrint 0
5372 if { ([istarget i?86-*-*] || [istarget x86_64-*-*])
5373 && [check_effective_target_ilp32] } {
5374 set et_vect_call_lrint 1
5377 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
5378 return $et_vect_call_lrint
5381 # Return 1 if the target supports vector btrunc calls.
5383 proc check_effective_target_vect_call_btrunc { } {
5384 global et_vect_call_btrunc_saved
5386 if [info exists et_vect_call_btrunc_saved] {
5387 verbose "check_effective_target_vect_call_btrunc: using cached result" 2
5389 set et_vect_call_btrunc_saved 0
5390 if { [istarget aarch64*-*-*] } {
5391 set et_vect_call_btrunc_saved 1
5395 verbose "check_effective_target_vect_call_btrunc: returning $et_vect_call_btrunc_saved" 2
5396 return $et_vect_call_btrunc_saved
5399 # Return 1 if the target supports vector btruncf calls.
5401 proc check_effective_target_vect_call_btruncf { } {
5402 global et_vect_call_btruncf_saved
5404 if [info exists et_vect_call_btruncf_saved] {
5405 verbose "check_effective_target_vect_call_btruncf: using cached result" 2
5407 set et_vect_call_btruncf_saved 0
5408 if { [istarget aarch64*-*-*] } {
5409 set et_vect_call_btruncf_saved 1
5413 verbose "check_effective_target_vect_call_btruncf: returning $et_vect_call_btruncf_saved" 2
5414 return $et_vect_call_btruncf_saved
5417 # Return 1 if the target supports vector ceil calls.
5419 proc check_effective_target_vect_call_ceil { } {
5420 global et_vect_call_ceil_saved
5422 if [info exists et_vect_call_ceil_saved] {
5423 verbose "check_effective_target_vect_call_ceil: using cached result" 2
5425 set et_vect_call_ceil_saved 0
5426 if { [istarget aarch64*-*-*] } {
5427 set et_vect_call_ceil_saved 1
5431 verbose "check_effective_target_vect_call_ceil: returning $et_vect_call_ceil_saved" 2
5432 return $et_vect_call_ceil_saved
5435 # Return 1 if the target supports vector ceilf calls.
5437 proc check_effective_target_vect_call_ceilf { } {
5438 global et_vect_call_ceilf_saved
5440 if [info exists et_vect_call_ceilf_saved] {
5441 verbose "check_effective_target_vect_call_ceilf: using cached result" 2
5443 set et_vect_call_ceilf_saved 0
5444 if { [istarget aarch64*-*-*] } {
5445 set et_vect_call_ceilf_saved 1
5449 verbose "check_effective_target_vect_call_ceilf: returning $et_vect_call_ceilf_saved" 2
5450 return $et_vect_call_ceilf_saved
5453 # Return 1 if the target supports vector floor calls.
5455 proc check_effective_target_vect_call_floor { } {
5456 global et_vect_call_floor_saved
5458 if [info exists et_vect_call_floor_saved] {
5459 verbose "check_effective_target_vect_call_floor: using cached result" 2
5461 set et_vect_call_floor_saved 0
5462 if { [istarget aarch64*-*-*] } {
5463 set et_vect_call_floor_saved 1
5467 verbose "check_effective_target_vect_call_floor: returning $et_vect_call_floor_saved" 2
5468 return $et_vect_call_floor_saved
5471 # Return 1 if the target supports vector floorf calls.
5473 proc check_effective_target_vect_call_floorf { } {
5474 global et_vect_call_floorf_saved
5476 if [info exists et_vect_call_floorf_saved] {
5477 verbose "check_effective_target_vect_call_floorf: using cached result" 2
5479 set et_vect_call_floorf_saved 0
5480 if { [istarget aarch64*-*-*] } {
5481 set et_vect_call_floorf_saved 1
5485 verbose "check_effective_target_vect_call_floorf: returning $et_vect_call_floorf_saved" 2
5486 return $et_vect_call_floorf_saved
5489 # Return 1 if the target supports vector lceil calls.
5491 proc check_effective_target_vect_call_lceil { } {
5492 global et_vect_call_lceil_saved
5494 if [info exists et_vect_call_lceil_saved] {
5495 verbose "check_effective_target_vect_call_lceil: using cached result" 2
5497 set et_vect_call_lceil_saved 0
5498 if { [istarget aarch64*-*-*] } {
5499 set et_vect_call_lceil_saved 1
5503 verbose "check_effective_target_vect_call_lceil: returning $et_vect_call_lceil_saved" 2
5504 return $et_vect_call_lceil_saved
5507 # Return 1 if the target supports vector lfloor calls.
5509 proc check_effective_target_vect_call_lfloor { } {
5510 global et_vect_call_lfloor_saved
5512 if [info exists et_vect_call_lfloor_saved] {
5513 verbose "check_effective_target_vect_call_lfloor: using cached result" 2
5515 set et_vect_call_lfloor_saved 0
5516 if { [istarget aarch64*-*-*] } {
5517 set et_vect_call_lfloor_saved 1
5521 verbose "check_effective_target_vect_call_lfloor: returning $et_vect_call_lfloor_saved" 2
5522 return $et_vect_call_lfloor_saved
5525 # Return 1 if the target supports vector nearbyint calls.
5527 proc check_effective_target_vect_call_nearbyint { } {
5528 global et_vect_call_nearbyint_saved
5530 if [info exists et_vect_call_nearbyint_saved] {
5531 verbose "check_effective_target_vect_call_nearbyint: using cached result" 2
5533 set et_vect_call_nearbyint_saved 0
5534 if { [istarget aarch64*-*-*] } {
5535 set et_vect_call_nearbyint_saved 1
5539 verbose "check_effective_target_vect_call_nearbyint: returning $et_vect_call_nearbyint_saved" 2
5540 return $et_vect_call_nearbyint_saved
5543 # Return 1 if the target supports vector nearbyintf calls.
5545 proc check_effective_target_vect_call_nearbyintf { } {
5546 global et_vect_call_nearbyintf_saved
5548 if [info exists et_vect_call_nearbyintf_saved] {
5549 verbose "check_effective_target_vect_call_nearbyintf: using cached result" 2
5551 set et_vect_call_nearbyintf_saved 0
5552 if { [istarget aarch64*-*-*] } {
5553 set et_vect_call_nearbyintf_saved 1
5557 verbose "check_effective_target_vect_call_nearbyintf: returning $et_vect_call_nearbyintf_saved" 2
5558 return $et_vect_call_nearbyintf_saved
5561 # Return 1 if the target supports vector round calls.
5563 proc check_effective_target_vect_call_round { } {
5564 global et_vect_call_round_saved
5566 if [info exists et_vect_call_round_saved] {
5567 verbose "check_effective_target_vect_call_round: using cached result" 2
5569 set et_vect_call_round_saved 0
5570 if { [istarget aarch64*-*-*] } {
5571 set et_vect_call_round_saved 1
5575 verbose "check_effective_target_vect_call_round: returning $et_vect_call_round_saved" 2
5576 return $et_vect_call_round_saved
5579 # Return 1 if the target supports vector roundf calls.
5581 proc check_effective_target_vect_call_roundf { } {
5582 global et_vect_call_roundf_saved
5584 if [info exists et_vect_call_roundf_saved] {
5585 verbose "check_effective_target_vect_call_roundf: using cached result" 2
5587 set et_vect_call_roundf_saved 0
5588 if { [istarget aarch64*-*-*] } {
5589 set et_vect_call_roundf_saved 1
5593 verbose "check_effective_target_vect_call_roundf: returning $et_vect_call_roundf_saved" 2
5594 return $et_vect_call_roundf_saved
5597 # Return 1 if the target supports section-anchors
5599 proc check_effective_target_section_anchors { } {
5600 global et_section_anchors_saved
5602 if [info exists et_section_anchors_saved] {
5603 verbose "check_effective_target_section_anchors: using cached result" 2
5605 set et_section_anchors_saved 0
5606 if { [istarget powerpc*-*-*]
5607 || [istarget arm*-*-*]
5608 || [istarget aarch64*-*-*] } {
5609 set et_section_anchors_saved 1
5613 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
5614 return $et_section_anchors_saved
5617 # Return 1 if the target supports atomic operations on "int_128" values.
5619 proc check_effective_target_sync_int_128 { } {
5620 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
5621 && ![is-effective-target ia32] } {
5623 } elseif { [istarget spu-*-*] } {
5630 # Return 1 if the target supports atomic operations on "int_128" values
5631 # and can execute them.
5633 proc check_effective_target_sync_int_128_runtime { } {
5634 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
5635 && ![is-effective-target ia32] } {
5636 return [check_cached_effective_target sync_int_128_available {
5637 check_runtime_nocache sync_int_128_available {
5641 unsigned int eax, ebx, ecx, edx;
5642 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
5643 return !(ecx & bit_CMPXCHG16B);
5648 } elseif { [istarget spu-*-*] } {
5655 # Return 1 if the target supports atomic operations on "long long".
5657 # Note: 32bit x86 targets require -march=pentium in dg-options.
5658 # Note: 32bit s390 targets require -mzarch in dg-options.
5660 proc check_effective_target_sync_long_long { } {
5661 if { [istarget x86_64-*-*] || [istarget i?86-*-*])
5662 || [istarget aarch64*-*-*]
5663 || [istarget arm*-*-*]
5664 || [istarget alpha*-*-*]
5665 || ([istarget sparc*-*-*] && [check_effective_target_lp64])
5666 || [istarget s390*-*-*]
5667 || [istarget spu-*-*] } {
5674 # Return 1 if the target supports atomic operations on "long long"
5675 # and can execute them.
5677 # Note: 32bit x86 targets require -march=pentium in dg-options.
5679 proc check_effective_target_sync_long_long_runtime { } {
5680 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
5681 return [check_cached_effective_target sync_long_long_available {
5682 check_runtime_nocache sync_long_long_available {
5686 unsigned int eax, ebx, ecx, edx;
5687 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
5688 return !(edx & bit_CMPXCHG8B);
5693 } elseif { [istarget aarch64*-*-*] } {
5695 } elseif { [istarget arm*-*-linux-*] } {
5696 return [check_runtime sync_longlong_runtime {
5702 if (sizeof (long long) != 8)
5705 /* Just check for native; checking for kernel fallback is tricky. */
5706 asm volatile ("ldrexd r0,r1, [%0]" : : "r" (&l1) : "r0", "r1");
5711 } elseif { [istarget alpha*-*-*] } {
5713 } elseif { ([istarget sparc*-*-*]
5714 && [check_effective_target_lp64]
5715 && [check_effective_target_ultrasparc_hw]) } {
5717 } elseif { [istarget spu-*-*] } {
5719 } elseif { [istarget powerpc*-*-*] && [check_effective_target_lp64] } {
5726 # Return 1 if the target supports byte swap instructions.
5728 proc check_effective_target_bswap { } {
5729 global et_bswap_saved
5731 if [info exists et_bswap_saved] {
5732 verbose "check_effective_target_bswap: using cached result" 2
5734 set et_bswap_saved 0
5735 if { [istarget aarch64*-*-*]
5736 || [istarget alpha*-*-*]
5737 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5738 || [istarget m68k-*-*]
5739 || [istarget powerpc*-*-*]
5740 || [istarget rs6000-*-*]
5741 || [istarget s390*-*-*] } {
5742 set et_bswap_saved 1
5744 if { [istarget arm*-*-*]
5745 && [check_no_compiler_messages_nocache arm_v6_or_later object {
5747 #error not armv6 or later
5751 set et_bswap_saved 1
5756 verbose "check_effective_target_bswap: returning $et_bswap_saved" 2
5757 return $et_bswap_saved
5760 # Return 1 if the target supports 16-bit byte swap instructions.
5762 proc check_effective_target_bswap16 { } {
5763 global et_bswap16_saved
5765 if [info exists et_bswap16_saved] {
5766 verbose "check_effective_target_bswap16: using cached result" 2
5768 set et_bswap16_saved 0
5769 if { [is-effective-target bswap]
5770 && ![istarget alpha*-*-*]
5771 && !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
5772 set et_bswap16_saved 1
5776 verbose "check_effective_target_bswap16: returning $et_bswap16_saved" 2
5777 return $et_bswap16_saved
5780 # Return 1 if the target supports 32-bit byte swap instructions.
5782 proc check_effective_target_bswap32 { } {
5783 global et_bswap32_saved
5785 if [info exists et_bswap32_saved] {
5786 verbose "check_effective_target_bswap32: using cached result" 2
5788 set et_bswap32_saved 0
5789 if { [is-effective-target bswap] } {
5790 set et_bswap32_saved 1
5794 verbose "check_effective_target_bswap32: returning $et_bswap32_saved" 2
5795 return $et_bswap32_saved
5798 # Return 1 if the target supports 64-bit byte swap instructions.
5800 # Note: 32bit s390 targets require -mzarch in dg-options.
5802 proc check_effective_target_bswap64 { } {
5803 global et_bswap64_saved
5805 # expand_unop can expand 64-bit byte swap on 32-bit targets
5806 if { [is-effective-target bswap] && [is-effective-target int32plus] } {
5812 # Return 1 if the target supports atomic operations on "int" and "long".
5814 proc check_effective_target_sync_int_long { } {
5815 global et_sync_int_long_saved
5817 if [info exists et_sync_int_long_saved] {
5818 verbose "check_effective_target_sync_int_long: using cached result" 2
5820 set et_sync_int_long_saved 0
5821 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
5822 # load-reserved/store-conditional instructions.
5823 if { [istarget ia64-*-*]
5824 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5825 || [istarget aarch64*-*-*]
5826 || [istarget alpha*-*-*]
5827 || [istarget arm*-*-linux-*]
5828 || ([istarget arm*-*-*]
5829 && [check_effective_target_arm_acq_rel])
5830 || [istarget bfin*-*linux*]
5831 || [istarget hppa*-*linux*]
5832 || [istarget s390*-*-*]
5833 || [istarget powerpc*-*-*]
5834 || [istarget crisv32-*-*] || [istarget cris-*-*]
5835 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
5836 || [istarget spu-*-*]
5837 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
5838 || [check_effective_target_mips_llsc] } {
5839 set et_sync_int_long_saved 1
5843 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
5844 return $et_sync_int_long_saved
5847 # Return 1 if the target supports atomic operations on "char" and "short".
5849 proc check_effective_target_sync_char_short { } {
5850 global et_sync_char_short_saved
5852 if [info exists et_sync_char_short_saved] {
5853 verbose "check_effective_target_sync_char_short: using cached result" 2
5855 set et_sync_char_short_saved 0
5856 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
5857 # load-reserved/store-conditional instructions.
5858 if { [istarget aarch64*-*-*]
5859 || [istarget ia64-*-*]
5860 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5861 || [istarget alpha*-*-*]
5862 || [istarget arm*-*-linux-*]
5863 || ([istarget arm*-*-*]
5864 && [check_effective_target_arm_acq_rel])
5865 || [istarget hppa*-*linux*]
5866 || [istarget s390*-*-*]
5867 || [istarget powerpc*-*-*]
5868 || [istarget crisv32-*-*] || [istarget cris-*-*]
5869 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
5870 || [istarget spu-*-*]
5871 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
5872 || [check_effective_target_mips_llsc] } {
5873 set et_sync_char_short_saved 1
5877 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
5878 return $et_sync_char_short_saved
5881 # Return 1 if the target uses a ColdFire FPU.
5883 proc check_effective_target_coldfire_fpu { } {
5884 return [check_no_compiler_messages coldfire_fpu assembly {
5891 # Return true if this is a uClibc target.
5893 proc check_effective_target_uclibc {} {
5894 return [check_no_compiler_messages uclibc object {
5895 #include <features.h>
5896 #if !defined (__UCLIBC__)
5902 # Return true if this is a uclibc target and if the uclibc feature
5903 # described by __$feature__ is not present.
5905 proc check_missing_uclibc_feature {feature} {
5906 return [check_no_compiler_messages $feature object "
5907 #include <features.h>
5908 #if !defined (__UCLIBC) || defined (__${feature}__)
5914 # Return true if this is a Newlib target.
5916 proc check_effective_target_newlib {} {
5917 return [check_no_compiler_messages newlib object {
5922 # Return true if this is NOT a Bionic target.
5924 proc check_effective_target_non_bionic {} {
5925 return [check_no_compiler_messages non_bionic object {
5927 #if defined (__BIONIC__)
5933 # Return true if this target has error.h header.
5935 proc check_effective_target_error_h {} {
5936 return [check_no_compiler_messages error_h object {
5941 # Return true if this target has tgmath.h header.
5943 proc check_effective_target_tgmath_h {} {
5944 return [check_no_compiler_messages tgmath_h object {
5949 # Return true if target's libc supports complex functions.
5951 proc check_effective_target_libc_has_complex_functions {} {
5952 return [check_no_compiler_messages libc_has_complex_functions object {
5953 #include <complex.h>
5958 # (a) an error of a few ULP is expected in string to floating-point
5959 # conversion functions; and
5960 # (b) overflow is not always detected correctly by those functions.
5962 proc check_effective_target_lax_strtofp {} {
5963 # By default, assume that all uClibc targets suffer from this.
5964 return [check_effective_target_uclibc]
5967 # Return 1 if this is a target for which wcsftime is a dummy
5968 # function that always returns 0.
5970 proc check_effective_target_dummy_wcsftime {} {
5971 # By default, assume that all uClibc targets suffer from this.
5972 return [check_effective_target_uclibc]
5975 # Return 1 if constructors with initialization priority arguments are
5976 # supposed on this target.
5978 proc check_effective_target_init_priority {} {
5979 return [check_no_compiler_messages init_priority assembly "
5980 void f() __attribute__((constructor (1000)));
5985 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
5986 # This can be used with any check_* proc that takes no argument and
5987 # returns only 1 or 0. It could be used with check_* procs that take
5988 # arguments with keywords that pass particular arguments.
5990 proc is-effective-target { arg } {
5992 if { [info procs check_effective_target_${arg}] != [list] } {
5993 set selected [check_effective_target_${arg}]
5996 "vmx_hw" { set selected [check_vmx_hw_available] }
5997 "vsx_hw" { set selected [check_vsx_hw_available] }
5998 "p8vector_hw" { set selected [check_p8vector_hw_available] }
5999 "p9vector_hw" { set selected [check_p9vector_hw_available] }
6000 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
6001 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
6002 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
6003 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
6004 "dfp_hw" { set selected [check_dfp_hw_available] }
6005 "htm_hw" { set selected [check_htm_hw_available] }
6006 "named_sections" { set selected [check_named_sections_available] }
6007 "gc_sections" { set selected [check_gc_sections_available] }
6008 "cxa_atexit" { set selected [check_cxa_atexit_available] }
6009 default { error "unknown effective target keyword `$arg'" }
6012 verbose "is-effective-target: $arg $selected" 2
6016 # Return 1 if the argument is an effective-target keyword, 0 otherwise.
6018 proc is-effective-target-keyword { arg } {
6019 if { [info procs check_effective_target_${arg}] != [list] } {
6022 # These have different names for their check_* procs.
6024 "vmx_hw" { return 1 }
6025 "vsx_hw" { return 1 }
6026 "p8vector_hw" { return 1 }
6027 "p9vector_hw" { return 1 }
6028 "p9modulo_hw" { return 1 }
6029 "ppc_float128_sw" { return 1 }
6030 "ppc_float128_hw" { return 1 }
6031 "ppc_recip_hw" { return 1 }
6032 "dfp_hw" { return 1 }
6033 "htm_hw" { return 1 }
6034 "named_sections" { return 1 }
6035 "gc_sections" { return 1 }
6036 "cxa_atexit" { return 1 }
6037 default { return 0 }
6042 # Return 1 if target default to short enums
6044 proc check_effective_target_short_enums { } {
6045 return [check_no_compiler_messages short_enums assembly {
6047 int s[sizeof (enum foo) == 1 ? 1 : -1];
6051 # Return 1 if target supports merging string constants at link time.
6053 proc check_effective_target_string_merging { } {
6054 return [check_no_messages_and_pattern string_merging \
6055 "rodata\\.str" assembly {
6056 const char *var = "String";
6060 # Return 1 if target has the basic signed and unsigned types in
6061 # <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
6062 # working <stdint.h> for all targets.
6064 proc check_effective_target_stdint_types { } {
6065 return [check_no_compiler_messages stdint_types assembly {
6067 int8_t a; int16_t b; int32_t c; int64_t d;
6068 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
6072 # Return 1 if target has the basic signed and unsigned types in
6073 # <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
6074 # these types agree with those in the header, as some systems have
6075 # only <inttypes.h>.
6077 proc check_effective_target_inttypes_types { } {
6078 return [check_no_compiler_messages inttypes_types assembly {
6079 #include <inttypes.h>
6080 int8_t a; int16_t b; int32_t c; int64_t d;
6081 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
6085 # Return 1 if programs are intended to be run on a simulator
6086 # (i.e. slowly) rather than hardware (i.e. fast).
6088 proc check_effective_target_simulator { } {
6090 # All "src/sim" simulators set this one.
6091 if [board_info target exists is_simulator] {
6092 return [board_info target is_simulator]
6095 # The "sid" simulators don't set that one, but at least they set
6097 if [board_info target exists slow_simulator] {
6098 return [board_info target slow_simulator]
6104 # Return 1 if programs are intended to be run on hardware rather than
6107 proc check_effective_target_hw { } {
6109 # All "src/sim" simulators set this one.
6110 if [board_info target exists is_simulator] {
6111 if [board_info target is_simulator] {
6118 # The "sid" simulators don't set that one, but at least they set
6120 if [board_info target exists slow_simulator] {
6121 if [board_info target slow_simulator] {
6131 # Return 1 if the target is a VxWorks kernel.
6133 proc check_effective_target_vxworks_kernel { } {
6134 return [check_no_compiler_messages vxworks_kernel assembly {
6135 #if !defined __vxworks || defined __RTP__
6141 # Return 1 if the target is a VxWorks RTP.
6143 proc check_effective_target_vxworks_rtp { } {
6144 return [check_no_compiler_messages vxworks_rtp assembly {
6145 #if !defined __vxworks || !defined __RTP__
6151 # Return 1 if the target is expected to provide wide character support.
6153 proc check_effective_target_wchar { } {
6154 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
6157 return [check_no_compiler_messages wchar assembly {
6162 # Return 1 if the target has <pthread.h>.
6164 proc check_effective_target_pthread_h { } {
6165 return [check_no_compiler_messages pthread_h assembly {
6166 #include <pthread.h>
6170 # Return 1 if the target can truncate a file from a file-descriptor,
6171 # as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
6172 # chsize. We test for a trivially functional truncation; no stubs.
6173 # As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
6174 # different function to be used.
6176 proc check_effective_target_fd_truncate { } {
6178 #define _FILE_OFFSET_BITS 64
6185 FILE *f = fopen ("tst.tmp", "wb");
6187 const char t[] = "test writing more than ten characters";
6191 write (fd, t, sizeof (t) - 1);
6193 if (ftruncate (fd, 10) != 0)
6202 f = fopen ("tst.tmp", "rb");
6203 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
6211 if { [check_runtime ftruncate $prog] } {
6215 regsub "ftruncate" $prog "chsize" prog
6216 return [check_runtime chsize $prog]
6219 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
6221 proc add_options_for_c99_runtime { flags } {
6222 if { [istarget *-*-solaris2*] } {
6223 return "$flags -std=c99"
6225 if { [istarget powerpc-*-darwin*] } {
6226 return "$flags -mmacosx-version-min=10.3"
6231 # Add to FLAGS all the target-specific flags needed to enable
6232 # full IEEE compliance mode.
6234 proc add_options_for_ieee { flags } {
6235 if { [istarget alpha*-*-*]
6236 || [istarget sh*-*-*] } {
6237 return "$flags -mieee"
6239 if { [istarget rx-*-*] } {
6240 return "$flags -mnofpu"
6245 if {![info exists flags_to_postpone]} {
6246 set flags_to_postpone ""
6249 # Add to FLAGS the flags needed to enable functions to bind locally
6250 # when using pic/PIC passes in the testsuite.
6251 proc add_options_for_bind_pic_locally { flags } {
6252 global flags_to_postpone
6254 # Instead of returning 'flags' with the -fPIE or -fpie appended, we save it
6255 # in 'flags_to_postpone' and append it later in gcc_target_compile procedure in
6256 # order to make sure that the multilib_flags doesn't override this.
6258 if {[check_no_compiler_messages using_pic2 assembly {
6263 set flags_to_postpone "-fPIE"
6266 if {[check_no_compiler_messages using_pic1 assembly {
6271 set flags_to_postpone "-fpie"
6277 # Add to FLAGS the flags needed to enable 64-bit vectors.
6279 proc add_options_for_double_vectors { flags } {
6280 if [is-effective-target arm_neon_ok] {
6281 return "$flags -mvectorize-with-neon-double"
6287 # Return 1 if the target provides a full C99 runtime.
6289 proc check_effective_target_c99_runtime { } {
6290 return [check_cached_effective_target c99_runtime {
6293 set file [open "$srcdir/gcc.dg/builtins-config.h"]
6294 set contents [read $file]
6297 #ifndef HAVE_C99_RUNTIME
6298 #error !HAVE_C99_RUNTIME
6301 check_no_compiler_messages_nocache c99_runtime assembly \
6302 $contents [add_options_for_c99_runtime ""]
6306 # Return 1 if target wchar_t is at least 4 bytes.
6308 proc check_effective_target_4byte_wchar_t { } {
6309 return [check_no_compiler_messages 4byte_wchar_t object {
6310 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
6314 # Return 1 if the target supports automatic stack alignment.
6316 proc check_effective_target_automatic_stack_alignment { } {
6317 # Ordinarily x86 supports automatic stack alignment ...
6318 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
6319 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
6320 # ... except Win64 SEH doesn't. Succeed for Win32 though.
6321 return [check_effective_target_ilp32];
6328 # Return true if we are compiling for AVX target.
6330 proc check_avx_available { } {
6331 if { [check_no_compiler_messages avx_available assembly {
6341 # Return true if 32- and 16-bytes vectors are available.
6343 proc check_effective_target_vect_sizes_32B_16B { } {
6344 if { [check_avx_available] && ![check_prefer_avx128] } {
6351 # Return true if 128-bits vectors are preferred even if 256-bits vectors
6354 proc check_prefer_avx128 { } {
6355 if ![check_avx_available] {
6358 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
6359 float a[1024],b[1024],c[1024];
6360 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
6361 } "-O2 -ftree-vectorize"]
6365 # Return 1 if avx512f instructions can be compiled.
6367 proc check_effective_target_avx512f { } {
6368 return [check_no_compiler_messages avx512f object {
6369 typedef double __m512d __attribute__ ((__vector_size__ (64)));
6371 __m512d _mm512_add (__m512d a)
6373 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
6378 # Return 1 if avx instructions can be compiled.
6380 proc check_effective_target_avx { } {
6381 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
6384 return [check_no_compiler_messages avx object {
6385 void _mm256_zeroall (void)
6387 __builtin_ia32_vzeroall ();
6392 # Return 1 if avx2 instructions can be compiled.
6393 proc check_effective_target_avx2 { } {
6394 return [check_no_compiler_messages avx2 object {
6395 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
6397 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
6399 return __builtin_ia32_andnotsi256 (__X, __Y);
6404 # Return 1 if sse instructions can be compiled.
6405 proc check_effective_target_sse { } {
6406 return [check_no_compiler_messages sse object {
6409 __builtin_ia32_stmxcsr ();
6415 # Return 1 if sse2 instructions can be compiled.
6416 proc check_effective_target_sse2 { } {
6417 return [check_no_compiler_messages sse2 object {
6418 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
6420 __m128i _mm_srli_si128 (__m128i __A, int __N)
6422 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
6427 # Return 1 if sse4.1 instructions can be compiled.
6428 proc check_effective_target_sse4 { } {
6429 return [check_no_compiler_messages sse4.1 object {
6430 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
6431 typedef int __v4si __attribute__ ((__vector_size__ (16)));
6433 __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
6435 return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
6441 # Return 1 if F16C instructions can be compiled.
6443 proc check_effective_target_f16c { } {
6444 return [check_no_compiler_messages f16c object {
6445 #include "immintrin.h"
6447 foo (unsigned short val)
6449 return _cvtsh_ss (val);
6454 # Return 1 if C wchar_t type is compatible with char16_t.
6456 proc check_effective_target_wchar_t_char16_t_compatible { } {
6457 return [check_no_compiler_messages wchar_t_char16_t object {
6459 __CHAR16_TYPE__ *p16 = &wc;
6460 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
6464 # Return 1 if C wchar_t type is compatible with char32_t.
6466 proc check_effective_target_wchar_t_char32_t_compatible { } {
6467 return [check_no_compiler_messages wchar_t_char32_t object {
6469 __CHAR32_TYPE__ *p32 = &wc;
6470 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
6474 # Return 1 if pow10 function exists.
6476 proc check_effective_target_pow10 { } {
6477 return [check_runtime pow10 {
6487 # Return 1 if issignaling function exists.
6488 proc check_effective_target_issignaling {} {
6489 return [check_runtime issignaling {
6494 return issignaling (0.0);
6499 # Return 1 if current options generate DFP instructions, 0 otherwise.
6500 proc check_effective_target_hard_dfp {} {
6501 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
6502 typedef float d64 __attribute__((mode(DD)));
6504 void foo (void) { z = x + y; }
6508 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
6509 # for strchr etc. functions.
6511 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
6512 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
6515 #if !defined(__cplusplus) \
6516 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
6517 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
6518 ISO C++ correct string.h and wchar.h protos not supported.
6525 # Return 1 if GNU as is used.
6527 proc check_effective_target_gas { } {
6528 global use_gas_saved
6531 if {![info exists use_gas_saved]} {
6532 # Check if the as used by gcc is GNU as.
6533 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
6534 # Provide /dev/null as input, otherwise gas times out reading from
6536 set status [remote_exec host "$gcc_as" "-v /dev/null"]
6537 set as_output [lindex $status 1]
6538 if { [ string first "GNU" $as_output ] >= 0 } {
6544 return $use_gas_saved
6547 # Return 1 if GNU ld is used.
6549 proc check_effective_target_gld { } {
6550 global use_gld_saved
6553 if {![info exists use_gld_saved]} {
6554 # Check if the ld used by gcc is GNU ld.
6555 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
6556 set status [remote_exec host "$gcc_ld" "--version"]
6557 set ld_output [lindex $status 1]
6558 if { [ string first "GNU" $ld_output ] >= 0 } {
6564 return $use_gld_saved
6567 # Return 1 if the compiler has been configure with link-time optimization
6570 proc check_effective_target_lto { } {
6571 if { [istarget nvptx-*-*] } {
6574 return [check_no_compiler_messages lto object {
6579 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
6581 proc check_effective_target_maybe_x32 { } {
6582 return [check_no_compiler_messages maybe_x32 object {
6584 } "-mx32 -maddress-mode=short"]
6587 # Return 1 if this target supports the -fsplit-stack option, 0
6590 proc check_effective_target_split_stack {} {
6591 return [check_no_compiler_messages split_stack object {
6596 # Return 1 if this target supports the -masm=intel option, 0
6599 proc check_effective_target_masm_intel {} {
6600 return [check_no_compiler_messages masm_intel object {
6601 extern void abort (void);
6605 # Return 1 if the language for the compiler under test is C.
6607 proc check_effective_target_c { } {
6609 if [string match $tool "gcc"] {
6615 # Return 1 if the language for the compiler under test is C++.
6617 proc check_effective_target_c++ { } {
6619 if [string match $tool "g++"] {
6625 set cxx_default "c++14"
6626 # Check whether the current active language standard supports the features
6627 # of C++11/C++14 by checking for the presence of one of the -std flags.
6628 # This assumes that the default for the compiler is $cxx_default, and that
6629 # there will never be multiple -std= arguments on the command line.
6630 proc check_effective_target_c++11_only { } {
6632 if ![check_effective_target_c++] {
6635 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
6638 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
6643 proc check_effective_target_c++11 { } {
6644 if [check_effective_target_c++11_only] {
6647 return [check_effective_target_c++14]
6649 proc check_effective_target_c++11_down { } {
6650 if ![check_effective_target_c++] {
6653 return [expr ![check_effective_target_c++14] ]
6656 proc check_effective_target_c++14_only { } {
6658 if ![check_effective_target_c++] {
6661 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
6664 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
6670 proc check_effective_target_c++14 { } {
6671 if [check_effective_target_c++14_only] {
6674 return [check_effective_target_c++1z]
6676 proc check_effective_target_c++14_down { } {
6677 if ![check_effective_target_c++] {
6680 return [expr ![check_effective_target_c++1z] ]
6683 proc check_effective_target_c++98_only { } {
6685 if ![check_effective_target_c++] {
6688 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
6691 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
6697 proc check_effective_target_c++1z_only { } {
6699 if ![check_effective_target_c++] {
6702 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
6705 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
6710 proc check_effective_target_c++1z { } {
6711 return [check_effective_target_c++1z_only]
6714 # Check for C++ Concepts TS support, i.e. -fconcepts flag.
6715 proc check_effective_target_concepts { } {
6716 return [check-flags { "" { } { -fconcepts } }]
6719 # Return 1 if expensive testcases should be run.
6721 proc check_effective_target_run_expensive_tests { } {
6722 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
6728 # Returns 1 if "mempcpy" is available on the target system.
6730 proc check_effective_target_mempcpy {} {
6731 return [check_function_available "mempcpy"]
6734 # Returns 1 if "stpcpy" is available on the target system.
6736 proc check_effective_target_stpcpy {} {
6737 return [check_function_available "stpcpy"]
6740 # Check whether the vectorizer tests are supported by the target and
6741 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
6742 # Set dg-do-what-default to either compile or run, depending on target
6743 # capabilities. Return 1 if vectorizer tests are supported by
6744 # target, 0 otherwise.
6746 proc check_vect_support_and_set_flags { } {
6747 global DEFAULT_VECTCFLAGS
6748 global dg-do-what-default
6750 if [istarget powerpc-*paired*] {
6751 lappend DEFAULT_VECTCFLAGS "-mpaired"
6752 if [check_750cl_hw_available] {
6753 set dg-do-what-default run
6755 set dg-do-what-default compile
6757 } elseif [istarget powerpc*-*-*] {
6758 # Skip targets not supporting -maltivec.
6759 if ![is-effective-target powerpc_altivec_ok] {
6763 lappend DEFAULT_VECTCFLAGS "-maltivec"
6764 if [check_p9vector_hw_available] {
6765 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
6766 } elseif [check_p8vector_hw_available] {
6767 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
6768 } elseif [check_vsx_hw_available] {
6769 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
6772 if [check_vmx_hw_available] {
6773 set dg-do-what-default run
6775 if [is-effective-target ilp32] {
6776 # Specify a cpu that supports VMX for compile-only tests.
6777 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
6779 set dg-do-what-default compile
6781 } elseif { [istarget spu-*-*] } {
6782 set dg-do-what-default run
6783 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
6784 lappend DEFAULT_VECTCFLAGS "-msse2"
6785 if { [check_effective_target_sse2_runtime] } {
6786 set dg-do-what-default run
6788 set dg-do-what-default compile
6790 } elseif { [istarget mips*-*-*]
6791 && ([check_effective_target_mpaired_single]
6792 || [check_effective_target_mips_loongson])
6793 && [check_effective_target_nomips16] } {
6794 if { [check_effective_target_mpaired_single] } {
6795 lappend DEFAULT_VECTCFLAGS "-mpaired-single"
6797 set dg-do-what-default run
6798 } elseif [istarget sparc*-*-*] {
6799 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
6800 if [check_effective_target_ultrasparc_hw] {
6801 set dg-do-what-default run
6803 set dg-do-what-default compile
6805 } elseif [istarget alpha*-*-*] {
6806 # Alpha's vectorization capabilities are extremely limited.
6807 # It's more effort than its worth disabling all of the tests
6808 # that it cannot pass. But if you actually want to see what
6809 # does work, command out the return.
6812 lappend DEFAULT_VECTCFLAGS "-mmax"
6813 if [check_alpha_max_hw_available] {
6814 set dg-do-what-default run
6816 set dg-do-what-default compile
6818 } elseif [istarget ia64-*-*] {
6819 set dg-do-what-default run
6820 } elseif [is-effective-target arm_neon_ok] {
6821 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
6822 # NEON does not support denormals, so is not used for vectorization by
6823 # default to avoid loss of precision. We must pass -ffast-math to test
6824 # vectorization of float operations.
6825 lappend DEFAULT_VECTCFLAGS "-ffast-math"
6826 if [is-effective-target arm_neon_hw] {
6827 set dg-do-what-default run
6829 set dg-do-what-default compile
6831 } elseif [istarget "aarch64*-*-*"] {
6832 set dg-do-what-default run
6840 # Return 1 if the target does *not* require strict alignment.
6842 proc check_effective_target_non_strict_align {} {
6844 # On ARM, the default is to use STRICT_ALIGNMENT, but there
6845 # are interfaces defined for misaligned access and thus
6846 # depending on the architecture levels unaligned access is
6848 if [istarget "arm*-*-*"] {
6849 return [check_effective_target_arm_unaligned]
6852 return [check_no_compiler_messages non_strict_align assembly {
6854 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
6856 void foo(void) { z = (c *) y; }
6860 # Return 1 if the target has <ucontext.h>.
6862 proc check_effective_target_ucontext_h { } {
6863 return [check_no_compiler_messages ucontext_h assembly {
6864 #include <ucontext.h>
6868 proc check_effective_target_aarch64_tiny { } {
6869 if { [istarget aarch64*-*-*] } {
6870 return [check_no_compiler_messages aarch64_tiny object {
6871 #ifdef __AARCH64_CMODEL_TINY__
6874 #error target not AArch64 tiny code model
6882 # Create functions to check that the AArch64 assembler supports the
6883 # various architecture extensions via the .arch_extension pseudo-op.
6885 foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse"} {
6886 eval [string map [list FUNC $aarch64_ext] {
6887 proc check_effective_target_aarch64_asm_FUNC_ok { } {
6888 if { [istarget aarch64*-*-*] } {
6889 return [check_no_compiler_messages aarch64_FUNC_assembler object {
6890 __asm__ (".arch_extension FUNC");
6891 } "-march=armv8-a+FUNC"]
6899 proc check_effective_target_aarch64_small { } {
6900 if { [istarget aarch64*-*-*] } {
6901 return [check_no_compiler_messages aarch64_small object {
6902 #ifdef __AARCH64_CMODEL_SMALL__
6905 #error target not AArch64 small code model
6913 proc check_effective_target_aarch64_large { } {
6914 if { [istarget aarch64*-*-*] } {
6915 return [check_no_compiler_messages aarch64_large object {
6916 #ifdef __AARCH64_CMODEL_LARGE__
6919 #error target not AArch64 large code model
6927 # Return 1 if <fenv.h> is available with all the standard IEEE
6928 # exceptions and floating-point exceptions are raised by arithmetic
6929 # operations. (If the target requires special options for "inexact"
6930 # exceptions, those need to be specified in the testcases.)
6932 proc check_effective_target_fenv_exceptions {} {
6933 return [check_runtime fenv_exceptions {
6936 #ifndef FE_DIVBYZERO
6937 # error Missing FE_DIVBYZERO
6940 # error Missing FE_INEXACT
6943 # error Missing FE_INVALID
6946 # error Missing FE_OVERFLOW
6948 #ifndef FE_UNDERFLOW
6949 # error Missing FE_UNDERFLOW
6951 volatile float a = 0.0f, r;
6956 if (fetestexcept (FE_INVALID))
6961 } [add_options_for_ieee "-std=gnu99"]]
6964 proc check_effective_target_tiny {} {
6965 global et_target_tiny_saved
6967 if [info exists et_target_tine_saved] {
6968 verbose "check_effective_target_tiny: using cached result" 2
6970 set et_target_tiny_saved 0
6971 if { [istarget aarch64*-*-*]
6972 && [check_effective_target_aarch64_tiny] } {
6973 set et_target_tiny_saved 1
6977 return $et_target_tiny_saved
6980 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
6982 proc check_effective_target_logical_op_short_circuit {} {
6983 if { [istarget mips*-*-*]
6984 || [istarget arc*-*-*]
6985 || [istarget avr*-*-*]
6986 || [istarget crisv32-*-*] || [istarget cris-*-*]
6987 || [istarget mmix-*-*]
6988 || [istarget s390*-*-*]
6989 || [istarget powerpc*-*-*]
6990 || [istarget nios2*-*-*]
6991 || [istarget visium-*-*]
6992 || [check_effective_target_arm_cortex_m] } {
6998 # Record that dg-final test TEST requires convential compilation.
7000 proc force_conventional_output_for { test } {
7001 if { [info proc $test] == "" } {
7002 perror "$test does not exist"
7005 proc ${test}_required_options {} {
7006 global gcc_force_conventional_output
7007 return $gcc_force_conventional_output
7011 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
7012 # otherwise. Cache the result.
7014 proc check_effective_target_pie_copyreloc { } {
7015 global pie_copyreloc_available_saved
7017 global GCC_UNDER_TEST
7019 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
7023 # Need auto-host.h to check linker support.
7024 if { ![file exists ../../auto-host.h ] } {
7028 if [info exists pie_copyreloc_available_saved] {
7029 verbose "check_effective_target_pie_copyreloc returning saved $pie_copyreloc_available_saved" 2
7031 # Set up and compile to see if linker supports PIE with copy
7032 # reloc. Include the current process ID in the file names to
7033 # prevent conflicts with invocations for multiple testsuites.
7038 set f [open $src "w"]
7039 puts $f "#include \"../../auto-host.h\""
7040 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
7041 puts $f "# error Linker does not support PIE with copy reloc."
7045 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
7046 set lines [${tool}_target_compile $src $obj object ""]
7051 if [string match "" $lines] then {
7052 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
7053 set pie_copyreloc_available_saved 1
7055 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
7056 set pie_copyreloc_available_saved 0
7060 return $pie_copyreloc_available_saved
7063 # Return 1 if the x86 target supports R_386_GOT32X relocation, 0
7064 # otherwise. Cache the result.
7066 proc check_effective_target_got32x_reloc { } {
7067 global got32x_reloc_available_saved
7069 global GCC_UNDER_TEST
7071 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
7075 # Need auto-host.h to check linker support.
7076 if { ![file exists ../../auto-host.h ] } {
7080 if [info exists got32x_reloc_available_saved] {
7081 verbose "check_effective_target_got32x_reloc returning saved $got32x_reloc_available_saved" 2
7083 # Include the current process ID in the file names to prevent
7084 # conflicts with invocations for multiple testsuites.
7086 set src got32x[pid].c
7087 set obj got32x[pid].o
7089 set f [open $src "w"]
7090 puts $f "#include \"../../auto-host.h\""
7091 puts $f "#if HAVE_AS_IX86_GOT32X == 0"
7092 puts $f "# error Assembler does not support R_386_GOT32X."
7096 verbose "check_effective_target_got32x_reloc compiling testfile $src" 2
7097 set lines [${tool}_target_compile $src $obj object ""]
7102 if [string match "" $lines] then {
7103 verbose "check_effective_target_got32x_reloc testfile compilation passed" 2
7104 set got32x_reloc_available_saved 1
7106 verbose "check_effective_target_got32x_reloc testfile compilation failed" 2
7107 set got32x_reloc_available_saved 0
7111 return $got32x_reloc_available_saved
7114 # Return 1 if the x86 target supports calling ___tls_get_addr via GOT,
7115 # 0 otherwise. Cache the result.
7117 proc check_effective_target_tls_get_addr_via_got { } {
7118 global tls_get_addr_via_got_available_saved
7120 global GCC_UNDER_TEST
7122 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
7126 # Need auto-host.h to check linker support.
7127 if { ![file exists ../../auto-host.h ] } {
7131 if [info exists tls_get_addr_via_got_available_saved] {
7132 verbose "check_effective_target_tls_get_addr_via_got returning saved $tls_get_addr_via_got_available_saved" 2
7134 # Include the current process ID in the file names to prevent
7135 # conflicts with invocations for multiple testsuites.
7137 set src tls_get_addr_via_got[pid].c
7138 set obj tls_get_addr_via_got[pid].o
7140 set f [open $src "w"]
7141 puts $f "#include \"../../auto-host.h\""
7142 puts $f "#if HAVE_AS_IX86_TLS_GET_ADDR_GOT == 0"
7143 puts $f "# error Assembler/linker do not support calling ___tls_get_addr via GOT."
7147 verbose "check_effective_target_tls_get_addr_via_got compiling testfile $src" 2
7148 set lines [${tool}_target_compile $src $obj object ""]
7153 if [string match "" $lines] then {
7154 verbose "check_effective_target_tls_get_addr_via_got testfile compilation passed" 2
7155 set tls_get_addr_via_got_available_saved 1
7157 verbose "check_effective_target_tls_get_addr_via_got testfile compilation failed" 2
7158 set tls_get_addr_via_got_available_saved 0
7162 return $tls_get_addr_via_got_available_saved
7165 # Return 1 if the target uses comdat groups.
7167 proc check_effective_target_comdat_group {} {
7168 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat" assembly {
7170 inline int foo () { return 1; }
7175 # Return 1 if target supports __builtin_eh_return
7176 proc check_effective_target_builtin_eh_return { } {
7177 return [check_no_compiler_messages builtin_eh_return object {
7178 void test (long l, void *p)
7180 __builtin_eh_return (l, p);
7185 # Return 1 if the target supports max reduction for vectors.
7187 proc check_effective_target_vect_max_reduc { } {
7188 if { [istarget aarch64*-*-*] || [istarget arm*-*-*] } {
7194 # Return 1 if there is an nvptx offload compiler.
7196 proc check_effective_target_offload_nvptx { } {
7197 return [check_no_compiler_messages offload_nvptx object {
7198 int main () {return 0;}
7199 } "-foffload=nvptx-none" ]
7202 # Return 1 if the compiler has been configured with hsa offloading.
7204 proc check_effective_target_offload_hsa { } {
7205 return [check_no_compiler_messages offload_hsa assembly {
7206 int main () {return 0;}