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1 # Copyright (C) 1999-2015 Free Software Foundation, Inc.
2
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
7 #
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
12 #
13 # You should have received a copy of the GNU General Public License
14 # along with GCC; see the file COPYING3. If not see
15 # <http://www.gnu.org/licenses/>.
16
17 # Please email any bugs, comments, and/or additions to this file to:
18 # gcc-patches@gcc.gnu.org
19
20 # This file defines procs for determining features supported by the target.
21
22 # Try to compile the code given by CONTENTS into an output file of
23 # type TYPE, where TYPE is as for target_compile. Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the name of the output file.
26 #
27 # BASENAME is a prefix to use for source and output files.
28 # If ARGS is not empty, its first element is a string that
29 # should be added to the command line.
30 #
31 # Assume by default that CONTENTS is C code.
32 # Otherwise, code should contain:
33 # "// C++" for c++,
34 # "! Fortran" for Fortran code,
35 # "/* ObjC", for ObjC
36 # "// ObjC++" for ObjC++
37 # and "// Go" for Go
38 # If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
39 # allow for ObjC/ObjC++ specific flags.
40 proc check_compile {basename type contents args} {
41 global tool
42 verbose "check_compile tool: $tool for $basename"
43
44 # Save additional_sources to avoid compiling testsuite's sources
45 # against check_compile's source.
46 global additional_sources
47 if [info exists additional_sources] {
48 set tmp_additional_sources "$additional_sources"
49 set additional_sources ""
50 }
51
52 if { [llength $args] > 0 } {
53 set options [list "additional_flags=[lindex $args 0]"]
54 } else {
55 set options ""
56 }
57 switch -glob -- $contents {
58 "*! Fortran*" { set src ${basename}[pid].f90 }
59 "*// C++*" { set src ${basename}[pid].cc }
60 "*// ObjC++*" { set src ${basename}[pid].mm }
61 "*/* ObjC*" { set src ${basename}[pid].m }
62 "*// Go*" { set src ${basename}[pid].go }
63 default {
64 switch -- $tool {
65 "objc" { set src ${basename}[pid].m }
66 "obj-c++" { set src ${basename}[pid].mm }
67 default { set src ${basename}[pid].c }
68 }
69 }
70 }
71
72 set compile_type $type
73 switch -glob $type {
74 assembly { set output ${basename}[pid].s }
75 object { set output ${basename}[pid].o }
76 executable { set output ${basename}[pid].exe }
77 "rtl-*" {
78 set output ${basename}[pid].s
79 lappend options "additional_flags=-fdump-$type"
80 set compile_type assembly
81 }
82 }
83 set f [open $src "w"]
84 puts $f $contents
85 close $f
86 set lines [${tool}_target_compile $src $output $compile_type "$options"]
87 file delete $src
88
89 set scan_output $output
90 # Don't try folding this into the switch above; calling "glob" before the
91 # file is created won't work.
92 if [regexp "rtl-(.*)" $type dummy rtl_type] {
93 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
94 file delete $output
95 }
96
97 # Restore additional_sources.
98 if [info exists additional_sources] {
99 set additional_sources "$tmp_additional_sources"
100 }
101
102 return [list $lines $scan_output]
103 }
104
105 proc current_target_name { } {
106 global target_info
107 if [info exists target_info(target,name)] {
108 set answer $target_info(target,name)
109 } else {
110 set answer ""
111 }
112 return $answer
113 }
114
115 # Implement an effective-target check for property PROP by invoking
116 # the Tcl command ARGS and seeing if it returns true.
117
118 proc check_cached_effective_target { prop args } {
119 global et_cache
120 global et_prop_list
121
122 set target [current_target_name]
123 if {![info exists et_cache($prop,target)]
124 || $et_cache($prop,target) != $target} {
125 verbose "check_cached_effective_target $prop: checking $target" 2
126 set et_cache($prop,target) $target
127 set et_cache($prop,value) [uplevel eval $args]
128 if {![info exists et_prop_list]
129 || [lsearch $et_prop_list $prop] < 0} {
130 lappend et_prop_list $prop
131 }
132 verbose "check_cached_effective_target cached list is now: $et_prop_list" 2
133 }
134 set value $et_cache($prop,value)
135 verbose "check_cached_effective_target $prop: returning $value for $target" 2
136 return $value
137 }
138
139 # Clear effective-target cache. This is useful after testing
140 # effective-target features and overriding TEST_ALWAYS_FLAGS and/or
141 # ALWAYS_CXXFLAGS.
142 # If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS then they should
143 # do a clear_effective_target_cache at the end as the target cache can
144 # make decisions based upon the flags, and those decisions need to be
145 # redone when the flags change. An example of this is the
146 # asan_init/asan_finish pair.
147
148 proc clear_effective_target_cache { } {
149 global et_cache
150 global et_prop_list
151
152 if {[info exists et_prop_list]} {
153 verbose "clear_effective_target_cache: $et_prop_list" 2
154 foreach prop $et_prop_list {
155 unset et_cache($prop,value)
156 unset et_cache($prop,target)
157 }
158 unset et_prop_list
159 }
160 }
161
162 # Like check_compile, but delete the output file and return true if the
163 # compiler printed no messages.
164 proc check_no_compiler_messages_nocache {args} {
165 set result [eval check_compile $args]
166 set lines [lindex $result 0]
167 set output [lindex $result 1]
168 remote_file build delete $output
169 return [string match "" $lines]
170 }
171
172 # Like check_no_compiler_messages_nocache, but cache the result.
173 # PROP is the property we're checking, and doubles as a prefix for
174 # temporary filenames.
175 proc check_no_compiler_messages {prop args} {
176 return [check_cached_effective_target $prop {
177 eval [list check_no_compiler_messages_nocache $prop] $args
178 }]
179 }
180
181 # Like check_compile, but return true if the compiler printed no
182 # messages and if the contents of the output file satisfy PATTERN.
183 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
184 # don't match regular expression REGEXP, otherwise they satisfy it
185 # if they do match regular expression PATTERN. (PATTERN can start
186 # with something like "[!]" if the regular expression needs to match
187 # "!" as the first character.)
188 #
189 # Delete the output file before returning. The other arguments are
190 # as for check_compile.
191 proc check_no_messages_and_pattern_nocache {basename pattern args} {
192 global tool
193
194 set result [eval [list check_compile $basename] $args]
195 set lines [lindex $result 0]
196 set output [lindex $result 1]
197
198 set ok 0
199 if { [string match "" $lines] } {
200 set chan [open "$output"]
201 set invert [regexp {^!(.*)} $pattern dummy pattern]
202 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
203 close $chan
204 }
205
206 remote_file build delete $output
207 return $ok
208 }
209
210 # Like check_no_messages_and_pattern_nocache, but cache the result.
211 # PROP is the property we're checking, and doubles as a prefix for
212 # temporary filenames.
213 proc check_no_messages_and_pattern {prop pattern args} {
214 return [check_cached_effective_target $prop {
215 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
216 }]
217 }
218
219 # Try to compile and run an executable from code CONTENTS. Return true
220 # if the compiler reports no messages and if execution "passes" in the
221 # usual DejaGNU sense. The arguments are as for check_compile, with
222 # TYPE implicitly being "executable".
223 proc check_runtime_nocache {basename contents args} {
224 global tool
225
226 set result [eval [list check_compile $basename executable $contents] $args]
227 set lines [lindex $result 0]
228 set output [lindex $result 1]
229
230 set ok 0
231 if { [string match "" $lines] } {
232 # No error messages, everything is OK.
233 set result [remote_load target "./$output" "" ""]
234 set status [lindex $result 0]
235 verbose "check_runtime_nocache $basename: status is <$status>" 2
236 if { $status == "pass" } {
237 set ok 1
238 }
239 }
240 remote_file build delete $output
241 return $ok
242 }
243
244 # Like check_runtime_nocache, but cache the result. PROP is the
245 # property we're checking, and doubles as a prefix for temporary
246 # filenames.
247 proc check_runtime {prop args} {
248 global tool
249
250 return [check_cached_effective_target $prop {
251 eval [list check_runtime_nocache $prop] $args
252 }]
253 }
254
255 ###############################
256 # proc check_weak_available { }
257 ###############################
258
259 # weak symbols are only supported in some configs/object formats
260 # this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
261
262 proc check_weak_available { } {
263 global target_cpu
264
265 # All mips targets should support it
266
267 if { [ string first "mips" $target_cpu ] >= 0 } {
268 return 1
269 }
270
271 # All AIX targets should support it
272
273 if { [istarget *-*-aix*] } {
274 return 1
275 }
276
277 # All solaris2 targets should support it
278
279 if { [istarget *-*-solaris2*] } {
280 return 1
281 }
282
283 # Windows targets Cygwin and MingW32 support it
284
285 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
286 return 1
287 }
288
289 # HP-UX 10.X doesn't support it
290
291 if { [istarget hppa*-*-hpux10*] } {
292 return 0
293 }
294
295 # nvptx (nearly) supports it
296
297 if { [istarget nvptx-*-*] } {
298 return 1
299 }
300
301 # ELF and ECOFF support it. a.out does with gas/gld but may also with
302 # other linkers, so we should try it
303
304 set objformat [gcc_target_object_format]
305
306 switch $objformat {
307 elf { return 1 }
308 ecoff { return 1 }
309 a.out { return 1 }
310 mach-o { return 1 }
311 som { return 1 }
312 unknown { return -1 }
313 default { return 0 }
314 }
315 }
316
317 ###############################
318 # proc check_weak_override_available { }
319 ###############################
320
321 # Like check_weak_available, but return 0 if weak symbol definitions
322 # cannot be overridden.
323
324 proc check_weak_override_available { } {
325 if { [istarget *-*-mingw*] } {
326 return 0
327 }
328 return [check_weak_available]
329 }
330
331 ###############################
332 # proc check_visibility_available { what_kind }
333 ###############################
334
335 # The visibility attribute is only support in some object formats
336 # This proc returns 1 if it is supported, 0 if not.
337 # The argument is the kind of visibility, default/protected/hidden/internal.
338
339 proc check_visibility_available { what_kind } {
340 if [string match "" $what_kind] { set what_kind "hidden" }
341
342 return [check_no_compiler_messages visibility_available_$what_kind object "
343 void f() __attribute__((visibility(\"$what_kind\")));
344 void f() {}
345 "]
346 }
347
348 ###############################
349 # proc check_alias_available { }
350 ###############################
351
352 # Determine if the target toolchain supports the alias attribute.
353
354 # Returns 2 if the target supports aliases. Returns 1 if the target
355 # only supports weak aliased. Returns 0 if the target does not
356 # support aliases at all. Returns -1 if support for aliases could not
357 # be determined.
358
359 proc check_alias_available { } {
360 global alias_available_saved
361 global tool
362
363 if [info exists alias_available_saved] {
364 verbose "check_alias_available returning saved $alias_available_saved" 2
365 } else {
366 set src alias[pid].c
367 set obj alias[pid].o
368 verbose "check_alias_available compiling testfile $src" 2
369 set f [open $src "w"]
370 # Compile a small test program. The definition of "g" is
371 # necessary to keep the Solaris assembler from complaining
372 # about the program.
373 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
374 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
375 close $f
376 set lines [${tool}_target_compile $src $obj object ""]
377 file delete $src
378 remote_file build delete $obj
379
380 if [string match "" $lines] then {
381 # No error messages, everything is OK.
382 set alias_available_saved 2
383 } else {
384 if [regexp "alias definitions not supported" $lines] {
385 verbose "check_alias_available target does not support aliases" 2
386
387 set objformat [gcc_target_object_format]
388
389 if { $objformat == "elf" } {
390 verbose "check_alias_available but target uses ELF format, so it ought to" 2
391 set alias_available_saved -1
392 } else {
393 set alias_available_saved 0
394 }
395 } else {
396 if [regexp "only weak aliases are supported" $lines] {
397 verbose "check_alias_available target supports only weak aliases" 2
398 set alias_available_saved 1
399 } else {
400 set alias_available_saved -1
401 }
402 }
403 }
404
405 verbose "check_alias_available returning $alias_available_saved" 2
406 }
407
408 return $alias_available_saved
409 }
410
411 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
412
413 proc check_effective_target_alias { } {
414 if { [check_alias_available] < 2 } {
415 return 0
416 } else {
417 return 1
418 }
419 }
420
421 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
422
423 proc check_ifunc_available { } {
424 return [check_no_compiler_messages ifunc_available object {
425 #ifdef __cplusplus
426 extern "C"
427 #endif
428 void g() {}
429 void f() __attribute__((ifunc("g")));
430 }]
431 }
432
433 # Returns true if --gc-sections is supported on the target.
434
435 proc check_gc_sections_available { } {
436 global gc_sections_available_saved
437 global tool
438
439 if {![info exists gc_sections_available_saved]} {
440 # Some targets don't support gc-sections despite whatever's
441 # advertised by ld's options.
442 if { [istarget alpha*-*-*]
443 || [istarget ia64-*-*] } {
444 set gc_sections_available_saved 0
445 return 0
446 }
447
448 # elf2flt uses -q (--emit-relocs), which is incompatible with
449 # --gc-sections.
450 if { [board_info target exists ldflags]
451 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
452 set gc_sections_available_saved 0
453 return 0
454 }
455
456 # VxWorks kernel modules are relocatable objects linked with -r,
457 # while RTP executables are linked with -q (--emit-relocs).
458 # Both of these options are incompatible with --gc-sections.
459 if { [istarget *-*-vxworks*] } {
460 set gc_sections_available_saved 0
461 return 0
462 }
463
464 # Check if the ld used by gcc supports --gc-sections.
465 set gcc_spec [${tool}_target_compile "-dumpspecs" "" "none" ""]
466 regsub ".*\n\\*linker:\[ \t\]*\n(\[^ \t\n\]*).*" "$gcc_spec" {\1} linker
467 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=$linker" "" "none" ""] 0]
468 set ld_output [remote_exec host "$gcc_ld" "--help"]
469 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
470 set gc_sections_available_saved 1
471 } else {
472 set gc_sections_available_saved 0
473 }
474 }
475 return $gc_sections_available_saved
476 }
477
478 # Return 1 if according to target_info struct and explicit target list
479 # target is supposed to support trampolines.
480
481 proc check_effective_target_trampolines { } {
482 if [target_info exists no_trampolines] {
483 return 0
484 }
485 if { [istarget avr-*-*]
486 || [istarget msp430-*-*]
487 || [istarget nvptx-*-*]
488 || [istarget hppa2.0w-hp-hpux11.23]
489 || [istarget hppa64-hp-hpux11.23] } {
490 return 0;
491 }
492 return 1
493 }
494
495 # Return 1 if according to target_info struct and explicit target list
496 # target disables -fdelete-null-pointer-checks. Targets should return 0
497 # if they simply default to -fno-delete-null-pointer-checks but obey
498 # -fdelete-null-pointer-checks when passed explicitly (and tests that
499 # depend on this option should do that).
500
501 proc check_effective_target_keeps_null_pointer_checks { } {
502 if [target_info exists keeps_null_pointer_checks] {
503 return 1
504 }
505 if { [istarget avr-*-*] } {
506 return 1;
507 }
508 return 0
509 }
510
511 # Return true if profiling is supported on the target.
512
513 proc check_profiling_available { test_what } {
514 global profiling_available_saved
515
516 verbose "Profiling argument is <$test_what>" 1
517
518 # These conditions depend on the argument so examine them before
519 # looking at the cache variable.
520
521 # Tree profiling requires TLS runtime support.
522 if { $test_what == "-fprofile-generate" } {
523 if { ![check_effective_target_tls_runtime] } {
524 return 0
525 }
526 }
527
528 # Support for -p on solaris2 relies on mcrt1.o which comes with the
529 # vendor compiler. We cannot reliably predict the directory where the
530 # vendor compiler (and thus mcrt1.o) is installed so we can't
531 # necessarily find mcrt1.o even if we have it.
532 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
533 return 0
534 }
535
536 # We don't yet support profiling for MIPS16.
537 if { [istarget mips*-*-*]
538 && ![check_effective_target_nomips16]
539 && ($test_what == "-p" || $test_what == "-pg") } {
540 return 0
541 }
542
543 # MinGW does not support -p.
544 if { [istarget *-*-mingw*] && $test_what == "-p" } {
545 return 0
546 }
547
548 # cygwin does not support -p.
549 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
550 return 0
551 }
552
553 # uClibc does not have gcrt1.o.
554 if { [check_effective_target_uclibc]
555 && ($test_what == "-p" || $test_what == "-pg") } {
556 return 0
557 }
558
559 # Now examine the cache variable.
560 if {![info exists profiling_available_saved]} {
561 # Some targets don't have any implementation of __bb_init_func or are
562 # missing other needed machinery.
563 if {[istarget aarch64*-*-elf]
564 || [istarget am3*-*-linux*]
565 || [istarget arm*-*-eabi*]
566 || [istarget arm*-*-elf]
567 || [istarget arm*-*-symbianelf*]
568 || [istarget avr-*-*]
569 || [istarget bfin-*-*]
570 || [istarget cris-*-*]
571 || [istarget crisv32-*-*]
572 || [istarget fido-*-elf]
573 || [istarget h8300-*-*]
574 || [istarget lm32-*-*]
575 || [istarget m32c-*-elf]
576 || [istarget m68k-*-elf]
577 || [istarget m68k-*-uclinux*]
578 || [istarget mep-*-elf]
579 || [istarget mips*-*-elf*]
580 || [istarget mmix-*-*]
581 || [istarget mn10300-*-elf*]
582 || [istarget moxie-*-elf*]
583 || [istarget msp430-*-*]
584 || [istarget nds32*-*-elf]
585 || [istarget nios2-*-elf]
586 || [istarget nvptx-*-*]
587 || [istarget powerpc-*-eabi*]
588 || [istarget powerpc-*-elf]
589 || [istarget rx-*-*]
590 || [istarget tic6x-*-elf]
591 || [istarget visium-*-*]
592 || [istarget xstormy16-*]
593 || [istarget xtensa*-*-elf]
594 || [istarget *-*-rtems*]
595 || [istarget *-*-vxworks*] } {
596 set profiling_available_saved 0
597 } else {
598 set profiling_available_saved 1
599 }
600 }
601
602 # -pg link test result can't be cached since it may change between
603 # runs.
604 set profiling_working $profiling_available_saved
605 if { $profiling_available_saved == 1
606 && ![check_no_compiler_messages_nocache profiling executable {
607 int main() { return 0; } } "-pg"] } {
608 set profiling_working 0
609 }
610
611 return $profiling_working
612 }
613
614 # Check to see if a target is "freestanding". This is as per the definition
615 # in Section 4 of C99 standard. Effectively, it is a target which supports no
616 # extra headers or libraries other than what is considered essential.
617 proc check_effective_target_freestanding { } {
618 if { [istarget nvptx-*-*] } {
619 return 1
620 }
621 return 0
622 }
623
624 # Return 1 if target has packed layout of structure members by
625 # default, 0 otherwise. Note that this is slightly different than
626 # whether the target has "natural alignment": both attributes may be
627 # false.
628
629 proc check_effective_target_default_packed { } {
630 return [check_no_compiler_messages default_packed assembly {
631 struct x { char a; long b; } c;
632 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
633 }]
634 }
635
636 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
637 # documentation, where the test also comes from.
638
639 proc check_effective_target_pcc_bitfield_type_matters { } {
640 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
641 # bitfields, but let's stick to the example code from the docs.
642 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
643 struct foo1 { char x; char :0; char y; };
644 struct foo2 { char x; int :0; char y; };
645 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
646 }]
647 }
648
649 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
650
651 proc add_options_for_tls { flags } {
652 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
653 # libthread, so always pass -pthread for native TLS. Same for AIX.
654 # Need to duplicate native TLS check from
655 # check_effective_target_tls_native to avoid recursion.
656 if { ([istarget powerpc-ibm-aix*]) &&
657 [check_no_messages_and_pattern tls_native "!emutls" assembly {
658 __thread int i;
659 int f (void) { return i; }
660 void g (int j) { i = j; }
661 }] } {
662 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
663 }
664 return $flags
665 }
666
667 # Return 1 if indirect jumps are supported, 0 otherwise.
668
669 proc check_effective_target_indirect_jumps {} {
670 if { [istarget nvptx-*-*] } {
671 return 0
672 }
673 return 1
674 }
675
676 # Return 1 if nonlocal goto is supported, 0 otherwise.
677
678 proc check_effective_target_nonlocal_goto {} {
679 if { [istarget nvptx-*-*] } {
680 return 0
681 }
682 return 1
683 }
684
685 # Return 1 if global constructors are supported, 0 otherwise.
686
687 proc check_effective_target_global_constructor {} {
688 if { [istarget nvptx-*-*] } {
689 return 0
690 }
691 return 1
692 }
693
694 # Return 1 if taking label values is supported, 0 otherwise.
695
696 proc check_effective_target_label_values {} {
697 if { [istarget nvptx-*-*] } {
698 return 0
699 }
700 return [check_no_compiler_messages label_values assembly {
701 #ifdef NO_LABEL_VALUES
702 #error NO
703 #endif
704 }]
705 }
706
707 # Return 1 if builtin_return_address and builtin_frame_address are
708 # supported, 0 otherwise.
709
710 proc check_effective_target_return_address {} {
711 if { [istarget nvptx-*-*] } {
712 return 0
713 }
714 return 1
715 }
716
717 # Return 1 if the assembler does not verify function types against
718 # calls, 0 otherwise. Such verification will typically show up problems
719 # with K&R C function declarations.
720
721 proc check_effective_target_untyped_assembly {} {
722 if { [istarget nvptx-*-*] } {
723 return 0
724 }
725 return 1
726 }
727
728 # Return 1 if alloca is supported, 0 otherwise.
729
730 proc check_effective_target_alloca {} {
731 if { [istarget nvptx-*-*] } {
732 return 0
733 }
734 return 1
735 }
736
737 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
738
739 proc check_effective_target_tls {} {
740 return [check_no_compiler_messages tls assembly {
741 __thread int i;
742 int f (void) { return i; }
743 void g (int j) { i = j; }
744 }]
745 }
746
747 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
748
749 proc check_effective_target_tls_native {} {
750 # VxWorks uses emulated TLS machinery, but with non-standard helper
751 # functions, so we fail to automatically detect it.
752 if { [istarget *-*-vxworks*] } {
753 return 0
754 }
755
756 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
757 __thread int i;
758 int f (void) { return i; }
759 void g (int j) { i = j; }
760 }]
761 }
762
763 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
764
765 proc check_effective_target_tls_emulated {} {
766 # VxWorks uses emulated TLS machinery, but with non-standard helper
767 # functions, so we fail to automatically detect it.
768 if { [istarget *-*-vxworks*] } {
769 return 1
770 }
771
772 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
773 __thread int i;
774 int f (void) { return i; }
775 void g (int j) { i = j; }
776 }]
777 }
778
779 # Return 1 if TLS executables can run correctly, 0 otherwise.
780
781 proc check_effective_target_tls_runtime {} {
782 # The runtime does not have TLS support, but just
783 # running the test below is insufficient to show this.
784 if { [istarget msp430-*-*] || [istarget visium-*-*] } {
785 return 0
786 }
787 return [check_runtime tls_runtime {
788 __thread int thr = 0;
789 int main (void) { return thr; }
790 } [add_options_for_tls ""]]
791 }
792
793 # Return 1 if atomic compare-and-swap is supported on 'int'
794
795 proc check_effective_target_cas_char {} {
796 return [check_no_compiler_messages cas_char assembly {
797 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
798 #error unsupported
799 #endif
800 } ""]
801 }
802
803 proc check_effective_target_cas_int {} {
804 return [check_no_compiler_messages cas_int assembly {
805 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
806 /* ok */
807 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
808 /* ok */
809 #else
810 #error unsupported
811 #endif
812 } ""]
813 }
814
815 # Return 1 if -ffunction-sections is supported, 0 otherwise.
816
817 proc check_effective_target_function_sections {} {
818 # Darwin has its own scheme and silently accepts -ffunction-sections.
819 if { [istarget *-*-darwin*] } {
820 return 0
821 }
822
823 return [check_no_compiler_messages functionsections assembly {
824 void foo (void) { }
825 } "-ffunction-sections"]
826 }
827
828 # Return 1 if instruction scheduling is available, 0 otherwise.
829
830 proc check_effective_target_scheduling {} {
831 return [check_no_compiler_messages scheduling object {
832 void foo (void) { }
833 } "-fschedule-insns"]
834 }
835
836 # Return 1 if trapping arithmetic is available, 0 otherwise.
837
838 proc check_effective_target_trapping {} {
839 return [check_no_compiler_messages trapping object {
840 int add (int a, int b) { return a + b; }
841 } "-ftrapv"]
842 }
843
844 # Return 1 if compilation with -fgraphite is error-free for trivial
845 # code, 0 otherwise.
846
847 proc check_effective_target_fgraphite {} {
848 return [check_no_compiler_messages fgraphite object {
849 void foo (void) { }
850 } "-O1 -fgraphite"]
851 }
852
853 # Return 1 if compilation with -fopenacc is error-free for trivial
854 # code, 0 otherwise.
855
856 proc check_effective_target_fopenacc {} {
857 # nvptx can be built with the device-side bits of openacc, but it
858 # does not make sense to test it as an openacc host.
859 if [istarget nvptx-*-*] { return 0 }
860
861 return [check_no_compiler_messages fopenacc object {
862 void foo (void) { }
863 } "-fopenacc"]
864 }
865
866 # Return 1 if compilation with -fopenmp is error-free for trivial
867 # code, 0 otherwise.
868
869 proc check_effective_target_fopenmp {} {
870 # nvptx can be built with the device-side bits of libgomp, but it
871 # does not make sense to test it as an openmp host.
872 if [istarget nvptx-*-*] { return 0 }
873
874 return [check_no_compiler_messages fopenmp object {
875 void foo (void) { }
876 } "-fopenmp"]
877 }
878
879 # Return 1 if compilation with -fgnu-tm is error-free for trivial
880 # code, 0 otherwise.
881
882 proc check_effective_target_fgnu_tm {} {
883 return [check_no_compiler_messages fgnu_tm object {
884 void foo (void) { }
885 } "-fgnu-tm"]
886 }
887
888 # Return 1 if the target supports mmap, 0 otherwise.
889
890 proc check_effective_target_mmap {} {
891 return [check_function_available "mmap"]
892 }
893
894 # Return 1 if the target supports dlopen, 0 otherwise.
895 proc check_effective_target_dlopen {} {
896 return [check_no_compiler_messages dlopen executable {
897 #include <dlfcn.h>
898 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
899 } [add_options_for_dlopen ""]]
900 }
901
902 proc add_options_for_dlopen { flags } {
903 return "$flags -ldl"
904 }
905
906 # Return 1 if the target supports clone, 0 otherwise.
907 proc check_effective_target_clone {} {
908 return [check_function_available "clone"]
909 }
910
911 # Return 1 if the target supports setrlimit, 0 otherwise.
912 proc check_effective_target_setrlimit {} {
913 # Darwin has non-posix compliant RLIMIT_AS
914 if { [istarget *-*-darwin*] } {
915 return 0
916 }
917 return [check_function_available "setrlimit"]
918 }
919
920 # Return 1 if the target supports swapcontext, 0 otherwise.
921 proc check_effective_target_swapcontext {} {
922 return [check_no_compiler_messages swapcontext executable {
923 #include <ucontext.h>
924 int main (void)
925 {
926 ucontext_t orig_context,child_context;
927 if (swapcontext(&child_context, &orig_context) < 0) { }
928 }
929 }]
930 }
931
932 # Return 1 if compilation with -pthread is error-free for trivial
933 # code, 0 otherwise.
934
935 proc check_effective_target_pthread {} {
936 return [check_no_compiler_messages pthread object {
937 void foo (void) { }
938 } "-pthread"]
939 }
940
941 # Return 1 if compilation with -mpe-aligned-commons is error-free
942 # for trivial code, 0 otherwise.
943
944 proc check_effective_target_pe_aligned_commons {} {
945 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
946 return [check_no_compiler_messages pe_aligned_commons object {
947 int foo;
948 } "-mpe-aligned-commons"]
949 }
950 return 0
951 }
952
953 # Return 1 if the target supports -static
954 proc check_effective_target_static {} {
955 return [check_no_compiler_messages static executable {
956 int main (void) { return 0; }
957 } "-static"]
958 }
959
960 # Return 1 if the target supports -fstack-protector
961 proc check_effective_target_fstack_protector {} {
962 return [check_runtime fstack_protector {
963 int main (void) { return 0; }
964 } "-fstack-protector"]
965 }
966
967 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
968 # for trivial code, 0 otherwise.
969
970 proc check_effective_target_freorder {} {
971 return [check_no_compiler_messages freorder object {
972 void foo (void) { }
973 } "-freorder-blocks-and-partition"]
974 }
975
976 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
977 # emitted, 0 otherwise. Whether a shared library can actually be built is
978 # out of scope for this test.
979
980 proc check_effective_target_fpic { } {
981 # Note that M68K has a multilib that supports -fpic but not
982 # -fPIC, so we need to check both. We test with a program that
983 # requires GOT references.
984 foreach arg {fpic fPIC} {
985 if [check_no_compiler_messages $arg object {
986 extern int foo (void); extern int bar;
987 int baz (void) { return foo () + bar; }
988 } "-$arg"] {
989 return 1
990 }
991 }
992 return 0
993 }
994
995 # On AArch64, if -fpic is not supported, then we will fall back to -fPIC
996 # silently. So, we can't rely on above "check_effective_target_fpic" as it
997 # assumes compiler will give warning if -fpic not supported. Here we check
998 # whether binutils supports those new -fpic relocation modifiers, and assume
999 # -fpic is supported if there is binutils support. GCC configuration will
1000 # enable -fpic for AArch64 in this case.
1001 #
1002 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1003 # memory model -fpic relocation types.
1004
1005 proc check_effective_target_aarch64_small_fpic { } {
1006 if { [istarget aarch64*-*-*] } {
1007 return [check_no_compiler_messages aarch64_small_fpic object {
1008 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1009 }]
1010 } else {
1011 return 0
1012 }
1013 }
1014
1015 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1016 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1017 # in binutils since 2015-03-04 as PR gas/17843.
1018 #
1019 # This test directive make sure binutils support all features needed by TLS LE
1020 # under -mtls-size=32 on AArch64.
1021
1022 proc check_effective_target_aarch64_tlsle32 { } {
1023 if { [istarget aarch64*-*-*] } {
1024 return [check_no_compiler_messages aarch64_tlsle32 object {
1025 void foo (void) { asm ("movk x1,#:tprel_g0_nc:t1"); }
1026 }]
1027 } else {
1028 return 0
1029 }
1030 }
1031
1032 # Return 1 if -shared is supported, as in no warnings or errors
1033 # emitted, 0 otherwise.
1034
1035 proc check_effective_target_shared { } {
1036 # Note that M68K has a multilib that supports -fpic but not
1037 # -fPIC, so we need to check both. We test with a program that
1038 # requires GOT references.
1039 return [check_no_compiler_messages shared executable {
1040 extern int foo (void); extern int bar;
1041 int baz (void) { return foo () + bar; }
1042 } "-shared -fpic"]
1043 }
1044
1045 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
1046
1047 proc check_effective_target_pie { } {
1048 if { [istarget *-*-darwin\[912\]*]
1049 || [istarget *-*-dragonfly*]
1050 || [istarget *-*-freebsd*]
1051 || [istarget *-*-linux*]
1052 || [istarget *-*-gnu*] } {
1053 return 1;
1054 }
1055 if { [istarget *-*-solaris2.1\[1-9\]*] } {
1056 # Full PIE support was added in Solaris 11.x and Solaris 12, but gcc
1057 # errors out if missing, so check for that.
1058 return [check_no_compiler_messages pie executable {
1059 int main (void) { return 0; }
1060 } "-pie -fpie"]
1061 }
1062 return 0
1063 }
1064
1065 # Return true if the target supports -mpaired-single (as used on MIPS).
1066
1067 proc check_effective_target_mpaired_single { } {
1068 return [check_no_compiler_messages mpaired_single object {
1069 void foo (void) { }
1070 } "-mpaired-single"]
1071 }
1072
1073 # Return true if the target has access to FPU instructions.
1074
1075 proc check_effective_target_hard_float { } {
1076 if { [istarget mips*-*-*] } {
1077 return [check_no_compiler_messages hard_float assembly {
1078 #if (defined __mips_soft_float || defined __mips16)
1079 #error __mips_soft_float || __mips16
1080 #endif
1081 }]
1082 }
1083
1084 # This proc is actually checking the availabilty of FPU
1085 # support for doubles, so on the RX we must fail if the
1086 # 64-bit double multilib has been selected.
1087 if { [istarget rx-*-*] } {
1088 return 0
1089 # return [check_no_compiler_messages hard_float assembly {
1090 #if defined __RX_64_BIT_DOUBLES__
1091 #error __RX_64_BIT_DOUBLES__
1092 #endif
1093 # }]
1094 }
1095
1096 # The generic test equates hard_float with "no call for adding doubles".
1097 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
1098 double a (double b, double c) { return b + c; }
1099 }]
1100 }
1101
1102 # Return true if the target is a 64-bit MIPS target.
1103
1104 proc check_effective_target_mips64 { } {
1105 return [check_no_compiler_messages mips64 assembly {
1106 #ifndef __mips64
1107 #error !__mips64
1108 #endif
1109 }]
1110 }
1111
1112 # Return true if the target is a MIPS target that does not produce
1113 # MIPS16 code.
1114
1115 proc check_effective_target_nomips16 { } {
1116 return [check_no_compiler_messages nomips16 object {
1117 #ifndef __mips
1118 #error !__mips
1119 #else
1120 /* A cheap way of testing for -mflip-mips16. */
1121 void foo (void) { asm ("addiu $20,$20,1"); }
1122 void bar (void) { asm ("addiu $20,$20,1"); }
1123 #endif
1124 }]
1125 }
1126
1127 # Add the options needed for MIPS16 function attributes. At the moment,
1128 # we don't support MIPS16 PIC.
1129
1130 proc add_options_for_mips16_attribute { flags } {
1131 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1132 }
1133
1134 # Return true if we can force a mode that allows MIPS16 code generation.
1135 # We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
1136 # for o32 and o64.
1137
1138 proc check_effective_target_mips16_attribute { } {
1139 return [check_no_compiler_messages mips16_attribute assembly {
1140 #ifdef PIC
1141 #error PIC
1142 #endif
1143 #if defined __mips_hard_float \
1144 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
1145 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
1146 #error __mips_hard_float && (!_ABIO32 || !_ABIO64)
1147 #endif
1148 } [add_options_for_mips16_attribute ""]]
1149 }
1150
1151 # Return 1 if the target supports long double larger than double when
1152 # using the new ABI, 0 otherwise.
1153
1154 proc check_effective_target_mips_newabi_large_long_double { } {
1155 return [check_no_compiler_messages mips_newabi_large_long_double object {
1156 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1157 } "-mabi=64"]
1158 }
1159
1160 # Return true if the target is a MIPS target that has access
1161 # to the LL and SC instructions.
1162
1163 proc check_effective_target_mips_llsc { } {
1164 if { ![istarget mips*-*-*] } {
1165 return 0
1166 }
1167 # Assume that these instructions are always implemented for
1168 # non-elf* targets, via emulation if necessary.
1169 if { ![istarget *-*-elf*] } {
1170 return 1
1171 }
1172 # Otherwise assume LL/SC support for everything but MIPS I.
1173 return [check_no_compiler_messages mips_llsc assembly {
1174 #if __mips == 1
1175 #error __mips == 1
1176 #endif
1177 }]
1178 }
1179
1180 # Return true if the target is a MIPS target that uses in-place relocations.
1181
1182 proc check_effective_target_mips_rel { } {
1183 if { ![istarget mips*-*-*] } {
1184 return 0
1185 }
1186 return [check_no_compiler_messages mips_rel object {
1187 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
1188 || (defined _ABI64 && _MIPS_SIM == _ABI64)
1189 #error _ABIN32 && (_ABIN32 || _ABI64)
1190 #endif
1191 }]
1192 }
1193
1194 # Return true if the target is a MIPS target that uses the EABI.
1195
1196 proc check_effective_target_mips_eabi { } {
1197 if { ![istarget mips*-*-*] } {
1198 return 0
1199 }
1200 return [check_no_compiler_messages mips_eabi object {
1201 #ifndef __mips_eabi
1202 #error !__mips_eabi
1203 #endif
1204 }]
1205 }
1206
1207 # Return 1 if the current multilib does not generate PIC by default.
1208
1209 proc check_effective_target_nonpic { } {
1210 return [check_no_compiler_messages nonpic assembly {
1211 #if __PIC__
1212 #error __PIC__
1213 #endif
1214 }]
1215 }
1216
1217 # Return 1 if the current multilib generates PIE by default.
1218
1219 proc check_effective_target_pie_enabled { } {
1220 return [check_no_compiler_messages pie_enabled assembly {
1221 #ifndef __PIE__
1222 #error unsupported
1223 #endif
1224 }]
1225 }
1226
1227 # Return 1 if the target generates -fstack-protector by default.
1228
1229 proc check_effective_target_fstack_protector_enabled {} {
1230 return [ check_no_compiler_messages fstack_protector_enabled assembly {
1231 #if !defined(__SSP__) && !defined(__SSP_ALL__) && \
1232 !defined(__SSP_STRONG__) && !defined(__SSP_EXPICIT__)
1233 #error unsupported
1234 #endif
1235 }]
1236 }
1237
1238 # Return 1 if the target does not use a status wrapper.
1239
1240 proc check_effective_target_unwrapped { } {
1241 if { [target_info needs_status_wrapper] != "" \
1242 && [target_info needs_status_wrapper] != "0" } {
1243 return 0
1244 }
1245 return 1
1246 }
1247
1248 # Return true if iconv is supported on the target. In particular IBM1047.
1249
1250 proc check_iconv_available { test_what } {
1251 global libiconv
1252
1253 # If the tool configuration file has not set libiconv, try "-liconv"
1254 if { ![info exists libiconv] } {
1255 set libiconv "-liconv"
1256 }
1257 set test_what [lindex $test_what 1]
1258 return [check_runtime_nocache $test_what [subst {
1259 #include <iconv.h>
1260 int main (void)
1261 {
1262 iconv_t cd;
1263
1264 cd = iconv_open ("$test_what", "UTF-8");
1265 if (cd == (iconv_t) -1)
1266 return 1;
1267 return 0;
1268 }
1269 }] $libiconv]
1270 }
1271
1272 # Return true if Cilk Library is supported on the target.
1273 proc check_libcilkrts_available { } {
1274 return [ check_no_compiler_messages_nocache libcilkrts_available executable {
1275 #ifdef __cplusplus
1276 extern "C"
1277 #endif
1278 int __cilkrts_set_param (const char *, const char *);
1279 int main (void) {
1280 int x = __cilkrts_set_param ("nworkers", "0");
1281 return x;
1282 }
1283 } "-fcilkplus -lcilkrts" ]
1284 }
1285
1286 # Return true if the atomic library is supported on the target.
1287 proc check_effective_target_libatomic_available { } {
1288 return [check_no_compiler_messages libatomic_available executable {
1289 int main (void) { return 0; }
1290 } "-latomic"]
1291 }
1292
1293 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1294
1295 proc check_ascii_locale_available { } {
1296 return 1
1297 }
1298
1299 # Return true if named sections are supported on this target.
1300
1301 proc check_named_sections_available { } {
1302 return [check_no_compiler_messages named_sections assembly {
1303 int __attribute__ ((section("whatever"))) foo;
1304 }]
1305 }
1306
1307 # Return true if the "naked" function attribute is supported on this target.
1308
1309 proc check_effective_target_naked_functions { } {
1310 return [check_no_compiler_messages naked_functions assembly {
1311 void f() __attribute__((naked));
1312 }]
1313 }
1314
1315 # Return 1 if the target supports Fortran real kinds larger than real(8),
1316 # 0 otherwise.
1317 #
1318 # When the target name changes, replace the cached result.
1319
1320 proc check_effective_target_fortran_large_real { } {
1321 return [check_no_compiler_messages fortran_large_real executable {
1322 ! Fortran
1323 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1324 real(kind=k) :: x
1325 x = cos (x)
1326 end
1327 }]
1328 }
1329
1330 # Return 1 if the target supports Fortran real kind real(16),
1331 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1332 # this checks for Real(16) only; the other returned real(10) if
1333 # both real(10) and real(16) are available.
1334 #
1335 # When the target name changes, replace the cached result.
1336
1337 proc check_effective_target_fortran_real_16 { } {
1338 return [check_no_compiler_messages fortran_real_16 executable {
1339 ! Fortran
1340 real(kind=16) :: x
1341 x = cos (x)
1342 end
1343 }]
1344 }
1345
1346
1347 # Return 1 if the target supports Fortran's IEEE modules,
1348 # 0 otherwise.
1349 #
1350 # When the target name changes, replace the cached result.
1351
1352 proc check_effective_target_fortran_ieee { flags } {
1353 return [check_no_compiler_messages fortran_ieee executable {
1354 ! Fortran
1355 use, intrinsic :: ieee_features
1356 end
1357 } $flags ]
1358 }
1359
1360
1361 # Return 1 if the target supports SQRT for the largest floating-point
1362 # type. (Some targets lack the libm support for this FP type.)
1363 # On most targets, this check effectively checks either whether sqrtl is
1364 # available or on __float128 systems whether libquadmath is installed,
1365 # which provides sqrtq.
1366 #
1367 # When the target name changes, replace the cached result.
1368
1369 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1370 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1371 ! Fortran
1372 use iso_fortran_env, only: real_kinds
1373 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1374 real(kind=maxFP), volatile :: x
1375 x = 2.0_maxFP
1376 x = sqrt (x)
1377 end
1378 }]
1379 }
1380
1381
1382 # Return 1 if the target supports Fortran integer kinds larger than
1383 # integer(8), 0 otherwise.
1384 #
1385 # When the target name changes, replace the cached result.
1386
1387 proc check_effective_target_fortran_large_int { } {
1388 return [check_no_compiler_messages fortran_large_int executable {
1389 ! Fortran
1390 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1391 integer(kind=k) :: i
1392 end
1393 }]
1394 }
1395
1396 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1397 #
1398 # When the target name changes, replace the cached result.
1399
1400 proc check_effective_target_fortran_integer_16 { } {
1401 return [check_no_compiler_messages fortran_integer_16 executable {
1402 ! Fortran
1403 integer(16) :: i
1404 end
1405 }]
1406 }
1407
1408 # Return 1 if we can statically link libgfortran, 0 otherwise.
1409 #
1410 # When the target name changes, replace the cached result.
1411
1412 proc check_effective_target_static_libgfortran { } {
1413 return [check_no_compiler_messages static_libgfortran executable {
1414 ! Fortran
1415 print *, 'test'
1416 end
1417 } "-static"]
1418 }
1419
1420 # Return 1 if cilk-plus is supported by the target, 0 otherwise.
1421
1422 proc check_effective_target_cilkplus { } {
1423 # Skip cilk-plus tests on int16 and size16 targets for now.
1424 # The cilk-plus tests are not generic enough to cover these
1425 # cases and would throw hundreds of FAILs.
1426 if { [check_effective_target_int16]
1427 || ![check_effective_target_size32plus] } {
1428 return 0;
1429 }
1430
1431 # Skip AVR, its RAM is too small and too many tests would fail.
1432 if { [istarget avr-*-*] } {
1433 return 0;
1434 }
1435 return 1
1436 }
1437
1438 proc check_linker_plugin_available { } {
1439 return [check_no_compiler_messages_nocache linker_plugin executable {
1440 int main() { return 0; }
1441 } "-flto -fuse-linker-plugin"]
1442 }
1443
1444 # Return 1 if the target supports executing 750CL paired-single instructions, 0
1445 # otherwise. Cache the result.
1446
1447 proc check_750cl_hw_available { } {
1448 return [check_cached_effective_target 750cl_hw_available {
1449 # If this is not the right target then we can skip the test.
1450 if { ![istarget powerpc-*paired*] } {
1451 expr 0
1452 } else {
1453 check_runtime_nocache 750cl_hw_available {
1454 int main()
1455 {
1456 #ifdef __MACH__
1457 asm volatile ("ps_mul v0,v0,v0");
1458 #else
1459 asm volatile ("ps_mul 0,0,0");
1460 #endif
1461 return 0;
1462 }
1463 } "-mpaired"
1464 }
1465 }]
1466 }
1467
1468 # Return 1 if the target OS supports running SSE executables, 0
1469 # otherwise. Cache the result.
1470
1471 proc check_sse_os_support_available { } {
1472 return [check_cached_effective_target sse_os_support_available {
1473 # If this is not the right target then we can skip the test.
1474 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1475 expr 0
1476 } elseif { [istarget i?86-*-solaris2*] } {
1477 # The Solaris 2 kernel doesn't save and restore SSE registers
1478 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1479 check_runtime_nocache sse_os_support_available {
1480 int main ()
1481 {
1482 asm volatile ("movaps %xmm0,%xmm0");
1483 return 0;
1484 }
1485 } "-msse"
1486 } else {
1487 expr 1
1488 }
1489 }]
1490 }
1491
1492 # Return 1 if the target OS supports running AVX executables, 0
1493 # otherwise. Cache the result.
1494
1495 proc check_avx_os_support_available { } {
1496 return [check_cached_effective_target avx_os_support_available {
1497 # If this is not the right target then we can skip the test.
1498 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1499 expr 0
1500 } else {
1501 # Check that OS has AVX and SSE saving enabled.
1502 check_runtime_nocache avx_os_support_available {
1503 int main ()
1504 {
1505 unsigned int eax, edx;
1506
1507 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1508 return (eax & 6) != 6;
1509 }
1510 } ""
1511 }
1512 }]
1513 }
1514
1515 # Return 1 if the target supports executing SSE instructions, 0
1516 # otherwise. Cache the result.
1517
1518 proc check_sse_hw_available { } {
1519 return [check_cached_effective_target sse_hw_available {
1520 # If this is not the right target then we can skip the test.
1521 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1522 expr 0
1523 } else {
1524 check_runtime_nocache sse_hw_available {
1525 #include "cpuid.h"
1526 int main ()
1527 {
1528 unsigned int eax, ebx, ecx, edx;
1529 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1530 return !(edx & bit_SSE);
1531 return 1;
1532 }
1533 } ""
1534 }
1535 }]
1536 }
1537
1538 # Return 1 if the target supports executing SSE2 instructions, 0
1539 # otherwise. Cache the result.
1540
1541 proc check_sse2_hw_available { } {
1542 return [check_cached_effective_target sse2_hw_available {
1543 # If this is not the right target then we can skip the test.
1544 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1545 expr 0
1546 } else {
1547 check_runtime_nocache sse2_hw_available {
1548 #include "cpuid.h"
1549 int main ()
1550 {
1551 unsigned int eax, ebx, ecx, edx;
1552 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1553 return !(edx & bit_SSE2);
1554 return 1;
1555 }
1556 } ""
1557 }
1558 }]
1559 }
1560
1561 # Return 1 if the target supports executing AVX instructions, 0
1562 # otherwise. Cache the result.
1563
1564 proc check_avx_hw_available { } {
1565 return [check_cached_effective_target avx_hw_available {
1566 # If this is not the right target then we can skip the test.
1567 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1568 expr 0
1569 } else {
1570 check_runtime_nocache avx_hw_available {
1571 #include "cpuid.h"
1572 int main ()
1573 {
1574 unsigned int eax, ebx, ecx, edx;
1575 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1576 return ((ecx & (bit_AVX | bit_OSXSAVE))
1577 != (bit_AVX | bit_OSXSAVE));
1578 return 1;
1579 }
1580 } ""
1581 }
1582 }]
1583 }
1584
1585 # Return 1 if the target supports running SSE executables, 0 otherwise.
1586
1587 proc check_effective_target_sse_runtime { } {
1588 if { [check_effective_target_sse]
1589 && [check_sse_hw_available]
1590 && [check_sse_os_support_available] } {
1591 return 1
1592 }
1593 return 0
1594 }
1595
1596 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1597
1598 proc check_effective_target_sse2_runtime { } {
1599 if { [check_effective_target_sse2]
1600 && [check_sse2_hw_available]
1601 && [check_sse_os_support_available] } {
1602 return 1
1603 }
1604 return 0
1605 }
1606
1607 # Return 1 if the target supports running AVX executables, 0 otherwise.
1608
1609 proc check_effective_target_avx_runtime { } {
1610 if { [check_effective_target_avx]
1611 && [check_avx_hw_available]
1612 && [check_avx_os_support_available] } {
1613 return 1
1614 }
1615 return 0
1616 }
1617
1618 # Return 1 if the target supports executing power8 vector instructions, 0
1619 # otherwise. Cache the result.
1620
1621 proc check_p8vector_hw_available { } {
1622 return [check_cached_effective_target p8vector_hw_available {
1623 # Some simulators are known to not support VSX/power8 instructions.
1624 # For now, disable on Darwin
1625 if { [istarget powerpc-*-eabi]
1626 || [istarget powerpc*-*-eabispe]
1627 || [istarget *-*-darwin*]} {
1628 expr 0
1629 } else {
1630 set options "-mpower8-vector"
1631 check_runtime_nocache p8vector_hw_available {
1632 int main()
1633 {
1634 #ifdef __MACH__
1635 asm volatile ("xxlorc vs0,vs0,vs0");
1636 #else
1637 asm volatile ("xxlorc 0,0,0");
1638 #endif
1639 return 0;
1640 }
1641 } $options
1642 }
1643 }]
1644 }
1645
1646 # Return 1 if the target supports executing power9 vector instructions, 0
1647 # otherwise. Cache the result.
1648
1649 proc check_p9vector_hw_available { } {
1650 return [check_cached_effective_target p9vector_hw_available {
1651 # Some simulators are known to not support VSX/power8/power9
1652 # instructions. For now, disable on Darwin.
1653 if { [istarget powerpc-*-eabi]
1654 || [istarget powerpc*-*-eabispe]
1655 || [istarget *-*-darwin*]} {
1656 expr 0
1657 } else {
1658 set options "-mpower9-vector"
1659 check_runtime_nocache p9vector_hw_available {
1660 int main()
1661 {
1662 long e = -1;
1663 vector double v = (vector double) { 0.0, 0.0 };
1664 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
1665 return e;
1666 }
1667 } $options
1668 }
1669 }]
1670 }
1671
1672 # Return 1 if the target supports executing power9 modulo instructions, 0
1673 # otherwise. Cache the result.
1674
1675 proc check_p9modulo_hw_available { } {
1676 return [check_cached_effective_target p9modulo_hw_available {
1677 # Some simulators are known to not support VSX/power8/power9
1678 # instructions. For now, disable on Darwin.
1679 if { [istarget powerpc-*-eabi]
1680 || [istarget powerpc*-*-eabispe]
1681 || [istarget *-*-darwin*]} {
1682 expr 0
1683 } else {
1684 set options "-mmodulo"
1685 check_runtime_nocache p9modulo_hw_available {
1686 int main()
1687 {
1688 int i = 5, j = 3, r = -1;
1689 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
1690 return (r == 2);
1691 }
1692 } $options
1693 }
1694 }]
1695 }
1696
1697 # Return 1 if the target supports executing __float128 on PowerPC via software
1698 # emulation, 0 otherwise. Cache the result.
1699
1700 proc check_ppc_float128_sw_available { } {
1701 return [check_cached_effective_target ppc_float128_sw_available {
1702 # Some simulators are known to not support VSX/power8/power9
1703 # instructions. For now, disable on Darwin.
1704 if { [istarget powerpc-*-eabi]
1705 || [istarget powerpc*-*-eabispe]
1706 || [istarget *-*-darwin*]} {
1707 expr 0
1708 } else {
1709 set options "-mfloat128 -mvsx"
1710 check_runtime_nocache ppc_float128_sw_available {
1711 volatile __float128 x = 1.0q;
1712 volatile __float128 y = 2.0q;
1713 int main()
1714 {
1715 __float128 z = x + y;
1716 return (z == 3.0q);
1717 }
1718 } $options
1719 }
1720 }]
1721 }
1722
1723 # Return 1 if the target supports executing __float128 on PowerPC via power9
1724 # hardware instructions, 0 otherwise. Cache the result.
1725
1726 proc check_ppc_float128_hw_available { } {
1727 return [check_cached_effective_target ppc_float128_hw_available {
1728 # Some simulators are known to not support VSX/power8/power9
1729 # instructions. For now, disable on Darwin.
1730 if { [istarget powerpc-*-eabi]
1731 || [istarget powerpc*-*-eabispe]
1732 || [istarget *-*-darwin*]} {
1733 expr 0
1734 } else {
1735 set options "-mfloat128-hardware"
1736 check_runtime_nocache ppc_float128_hw_available {
1737 volatile __float128 x = 1.0q;
1738 volatile __float128 y = 2.0q;
1739 int main()
1740 {
1741 __float128 z = x + y;
1742 __float128 w = -1.0q;
1743
1744 __asm__ ("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
1745 return ((z == 3.0q) && (z == w);
1746 }
1747 } $options
1748 }
1749 }]
1750 }
1751
1752 # Return 1 if the target supports executing VSX instructions, 0
1753 # otherwise. Cache the result.
1754
1755 proc check_vsx_hw_available { } {
1756 return [check_cached_effective_target vsx_hw_available {
1757 # Some simulators are known to not support VSX instructions.
1758 # For now, disable on Darwin
1759 if { [istarget powerpc-*-eabi]
1760 || [istarget powerpc*-*-eabispe]
1761 || [istarget *-*-darwin*]} {
1762 expr 0
1763 } else {
1764 set options "-mvsx"
1765 check_runtime_nocache vsx_hw_available {
1766 int main()
1767 {
1768 #ifdef __MACH__
1769 asm volatile ("xxlor vs0,vs0,vs0");
1770 #else
1771 asm volatile ("xxlor 0,0,0");
1772 #endif
1773 return 0;
1774 }
1775 } $options
1776 }
1777 }]
1778 }
1779
1780 # Return 1 if the target supports executing AltiVec instructions, 0
1781 # otherwise. Cache the result.
1782
1783 proc check_vmx_hw_available { } {
1784 return [check_cached_effective_target vmx_hw_available {
1785 # Some simulators are known to not support VMX instructions.
1786 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
1787 expr 0
1788 } else {
1789 # Most targets don't require special flags for this test case, but
1790 # Darwin does. Just to be sure, make sure VSX is not enabled for
1791 # the altivec tests.
1792 if { [istarget *-*-darwin*]
1793 || [istarget *-*-aix*] } {
1794 set options "-maltivec -mno-vsx"
1795 } else {
1796 set options "-mno-vsx"
1797 }
1798 check_runtime_nocache vmx_hw_available {
1799 int main()
1800 {
1801 #ifdef __MACH__
1802 asm volatile ("vor v0,v0,v0");
1803 #else
1804 asm volatile ("vor 0,0,0");
1805 #endif
1806 return 0;
1807 }
1808 } $options
1809 }
1810 }]
1811 }
1812
1813 proc check_ppc_recip_hw_available { } {
1814 return [check_cached_effective_target ppc_recip_hw_available {
1815 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
1816 # For now, disable on Darwin
1817 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1818 expr 0
1819 } else {
1820 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
1821 check_runtime_nocache ppc_recip_hw_available {
1822 volatile double d_recip, d_rsqrt, d_four = 4.0;
1823 volatile float f_recip, f_rsqrt, f_four = 4.0f;
1824 int main()
1825 {
1826 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
1827 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
1828 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
1829 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
1830 return 0;
1831 }
1832 } $options
1833 }
1834 }]
1835 }
1836
1837 # Return 1 if the target supports executing AltiVec and Cell PPU
1838 # instructions, 0 otherwise. Cache the result.
1839
1840 proc check_effective_target_cell_hw { } {
1841 return [check_cached_effective_target cell_hw_available {
1842 # Some simulators are known to not support VMX and PPU instructions.
1843 if { [istarget powerpc-*-eabi*] } {
1844 expr 0
1845 } else {
1846 # Most targets don't require special flags for this test
1847 # case, but Darwin and AIX do.
1848 if { [istarget *-*-darwin*]
1849 || [istarget *-*-aix*] } {
1850 set options "-maltivec -mcpu=cell"
1851 } else {
1852 set options "-mcpu=cell"
1853 }
1854 check_runtime_nocache cell_hw_available {
1855 int main()
1856 {
1857 #ifdef __MACH__
1858 asm volatile ("vor v0,v0,v0");
1859 asm volatile ("lvlx v0,r0,r0");
1860 #else
1861 asm volatile ("vor 0,0,0");
1862 asm volatile ("lvlx 0,0,0");
1863 #endif
1864 return 0;
1865 }
1866 } $options
1867 }
1868 }]
1869 }
1870
1871 # Return 1 if the target supports executing 64-bit instructions, 0
1872 # otherwise. Cache the result.
1873
1874 proc check_effective_target_powerpc64 { } {
1875 global powerpc64_available_saved
1876 global tool
1877
1878 if [info exists powerpc64_available_saved] {
1879 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
1880 } else {
1881 set powerpc64_available_saved 0
1882
1883 # Some simulators are known to not support powerpc64 instructions.
1884 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
1885 verbose "check_effective_target_powerpc64 returning 0" 2
1886 return $powerpc64_available_saved
1887 }
1888
1889 # Set up, compile, and execute a test program containing a 64-bit
1890 # instruction. Include the current process ID in the file
1891 # names to prevent conflicts with invocations for multiple
1892 # testsuites.
1893 set src ppc[pid].c
1894 set exe ppc[pid].x
1895
1896 set f [open $src "w"]
1897 puts $f "int main() {"
1898 puts $f "#ifdef __MACH__"
1899 puts $f " asm volatile (\"extsw r0,r0\");"
1900 puts $f "#else"
1901 puts $f " asm volatile (\"extsw 0,0\");"
1902 puts $f "#endif"
1903 puts $f " return 0; }"
1904 close $f
1905
1906 set opts "additional_flags=-mcpu=G5"
1907
1908 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
1909 set lines [${tool}_target_compile $src $exe executable "$opts"]
1910 file delete $src
1911
1912 if [string match "" $lines] then {
1913 # No error message, compilation succeeded.
1914 set result [${tool}_load "./$exe" "" ""]
1915 set status [lindex $result 0]
1916 remote_file build delete $exe
1917 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
1918
1919 if { $status == "pass" } then {
1920 set powerpc64_available_saved 1
1921 }
1922 } else {
1923 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
1924 }
1925 }
1926
1927 return $powerpc64_available_saved
1928 }
1929
1930 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
1931 # complex float arguments. This affects gfortran tests that call cabsf
1932 # in libm built by an earlier compiler. Return 1 if libm uses the same
1933 # argument passing as the compiler under test, 0 otherwise.
1934 #
1935 # When the target name changes, replace the cached result.
1936
1937 proc check_effective_target_broken_cplxf_arg { } {
1938 return [check_cached_effective_target broken_cplxf_arg {
1939 # Skip the work for targets known not to be affected.
1940 if { ![istarget powerpc64-*-linux*] } {
1941 expr 0
1942 } elseif { ![is-effective-target lp64] } {
1943 expr 0
1944 } else {
1945 check_runtime_nocache broken_cplxf_arg {
1946 #include <complex.h>
1947 extern void abort (void);
1948 float fabsf (float);
1949 float cabsf (_Complex float);
1950 int main ()
1951 {
1952 _Complex float cf;
1953 float f;
1954 cf = 3 + 4.0fi;
1955 f = cabsf (cf);
1956 if (fabsf (f - 5.0) > 0.0001)
1957 abort ();
1958 return 0;
1959 }
1960 } "-lm"
1961 }
1962 }]
1963 }
1964
1965 # Return 1 is this is a TI C6X target supporting C67X instructions
1966 proc check_effective_target_ti_c67x { } {
1967 return [check_no_compiler_messages ti_c67x assembly {
1968 #if !defined(_TMS320C6700)
1969 #error !_TMS320C6700
1970 #endif
1971 }]
1972 }
1973
1974 # Return 1 is this is a TI C6X target supporting C64X+ instructions
1975 proc check_effective_target_ti_c64xp { } {
1976 return [check_no_compiler_messages ti_c64xp assembly {
1977 #if !defined(_TMS320C6400_PLUS)
1978 #error !_TMS320C6400_PLUS
1979 #endif
1980 }]
1981 }
1982
1983
1984 proc check_alpha_max_hw_available { } {
1985 return [check_runtime alpha_max_hw_available {
1986 int main() { return __builtin_alpha_amask(1<<8) != 0; }
1987 }]
1988 }
1989
1990 # Returns true iff the FUNCTION is available on the target system.
1991 # (This is essentially a Tcl implementation of Autoconf's
1992 # AC_CHECK_FUNC.)
1993
1994 proc check_function_available { function } {
1995 return [check_no_compiler_messages ${function}_available \
1996 executable [subst {
1997 #ifdef __cplusplus
1998 extern "C"
1999 #endif
2000 char $function ();
2001 int main () { $function (); }
2002 }] "-fno-builtin" ]
2003 }
2004
2005 # Returns true iff "fork" is available on the target system.
2006
2007 proc check_fork_available {} {
2008 return [check_function_available "fork"]
2009 }
2010
2011 # Returns true iff "mkfifo" is available on the target system.
2012
2013 proc check_mkfifo_available {} {
2014 if { [istarget *-*-cygwin*] } {
2015 # Cygwin has mkfifo, but support is incomplete.
2016 return 0
2017 }
2018
2019 return [check_function_available "mkfifo"]
2020 }
2021
2022 # Returns true iff "__cxa_atexit" is used on the target system.
2023
2024 proc check_cxa_atexit_available { } {
2025 return [check_cached_effective_target cxa_atexit_available {
2026 if { [istarget hppa*-*-hpux10*] } {
2027 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
2028 expr 0
2029 } elseif { [istarget *-*-vxworks] } {
2030 # vxworks doesn't have __cxa_atexit but subsequent test passes.
2031 expr 0
2032 } else {
2033 check_runtime_nocache cxa_atexit_available {
2034 // C++
2035 #include <stdlib.h>
2036 static unsigned int count;
2037 struct X
2038 {
2039 X() { count = 1; }
2040 ~X()
2041 {
2042 if (count != 3)
2043 exit(1);
2044 count = 4;
2045 }
2046 };
2047 void f()
2048 {
2049 static X x;
2050 }
2051 struct Y
2052 {
2053 Y() { f(); count = 2; }
2054 ~Y()
2055 {
2056 if (count != 2)
2057 exit(1);
2058 count = 3;
2059 }
2060 };
2061 Y y;
2062 int main() { return 0; }
2063 }
2064 }
2065 }]
2066 }
2067
2068 proc check_effective_target_objc2 { } {
2069 return [check_no_compiler_messages objc2 object {
2070 #ifdef __OBJC2__
2071 int dummy[1];
2072 #else
2073 #error !__OBJC2__
2074 #endif
2075 }]
2076 }
2077
2078 proc check_effective_target_next_runtime { } {
2079 return [check_no_compiler_messages objc2 object {
2080 #ifdef __NEXT_RUNTIME__
2081 int dummy[1];
2082 #else
2083 #error !__NEXT_RUNTIME__
2084 #endif
2085 }]
2086 }
2087
2088 # Return 1 if we're generating 32-bit code using default options, 0
2089 # otherwise.
2090
2091 proc check_effective_target_ilp32 { } {
2092 return [check_no_compiler_messages ilp32 object {
2093 int dummy[sizeof (int) == 4
2094 && sizeof (void *) == 4
2095 && sizeof (long) == 4 ? 1 : -1];
2096 }]
2097 }
2098
2099 # Return 1 if we're generating ia32 code using default options, 0
2100 # otherwise.
2101
2102 proc check_effective_target_ia32 { } {
2103 return [check_no_compiler_messages ia32 object {
2104 int dummy[sizeof (int) == 4
2105 && sizeof (void *) == 4
2106 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
2107 }]
2108 }
2109
2110 # Return 1 if we're generating x32 code using default options, 0
2111 # otherwise.
2112
2113 proc check_effective_target_x32 { } {
2114 return [check_no_compiler_messages x32 object {
2115 int dummy[sizeof (int) == 4
2116 && sizeof (void *) == 4
2117 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
2118 }]
2119 }
2120
2121 # Return 1 if we're generating 32-bit integers using default
2122 # options, 0 otherwise.
2123
2124 proc check_effective_target_int32 { } {
2125 return [check_no_compiler_messages int32 object {
2126 int dummy[sizeof (int) == 4 ? 1 : -1];
2127 }]
2128 }
2129
2130 # Return 1 if we're generating 32-bit or larger integers using default
2131 # options, 0 otherwise.
2132
2133 proc check_effective_target_int32plus { } {
2134 return [check_no_compiler_messages int32plus object {
2135 int dummy[sizeof (int) >= 4 ? 1 : -1];
2136 }]
2137 }
2138
2139 # Return 1 if we're generating 32-bit or larger pointers using default
2140 # options, 0 otherwise.
2141
2142 proc check_effective_target_ptr32plus { } {
2143 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
2144 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
2145 # cannot really hold a 32-bit address, so we always return false here.
2146 if { [istarget msp430-*-*] } {
2147 return 0
2148 }
2149
2150 return [check_no_compiler_messages ptr32plus object {
2151 int dummy[sizeof (void *) >= 4 ? 1 : -1];
2152 }]
2153 }
2154
2155 # Return 1 if we support 32-bit or larger array and structure sizes
2156 # using default options, 0 otherwise. Avoid false positive on
2157 # targets with 20 or 24 bit address spaces.
2158
2159 proc check_effective_target_size32plus { } {
2160 return [check_no_compiler_messages size32plus object {
2161 char dummy[16777217L];
2162 }]
2163 }
2164
2165 # Returns 1 if we're generating 16-bit or smaller integers with the
2166 # default options, 0 otherwise.
2167
2168 proc check_effective_target_int16 { } {
2169 return [check_no_compiler_messages int16 object {
2170 int dummy[sizeof (int) < 4 ? 1 : -1];
2171 }]
2172 }
2173
2174 # Return 1 if we're generating 64-bit code using default options, 0
2175 # otherwise.
2176
2177 proc check_effective_target_lp64 { } {
2178 return [check_no_compiler_messages lp64 object {
2179 int dummy[sizeof (int) == 4
2180 && sizeof (void *) == 8
2181 && sizeof (long) == 8 ? 1 : -1];
2182 }]
2183 }
2184
2185 # Return 1 if we're generating 64-bit code using default llp64 options,
2186 # 0 otherwise.
2187
2188 proc check_effective_target_llp64 { } {
2189 return [check_no_compiler_messages llp64 object {
2190 int dummy[sizeof (int) == 4
2191 && sizeof (void *) == 8
2192 && sizeof (long long) == 8
2193 && sizeof (long) == 4 ? 1 : -1];
2194 }]
2195 }
2196
2197 # Return 1 if long and int have different sizes,
2198 # 0 otherwise.
2199
2200 proc check_effective_target_long_neq_int { } {
2201 return [check_no_compiler_messages long_ne_int object {
2202 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2203 }]
2204 }
2205
2206 # Return 1 if the target supports long double larger than double,
2207 # 0 otherwise.
2208
2209 proc check_effective_target_large_long_double { } {
2210 return [check_no_compiler_messages large_long_double object {
2211 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2212 }]
2213 }
2214
2215 # Return 1 if the target supports double larger than float,
2216 # 0 otherwise.
2217
2218 proc check_effective_target_large_double { } {
2219 return [check_no_compiler_messages large_double object {
2220 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2221 }]
2222 }
2223
2224 # Return 1 if the target supports long double of 128 bits,
2225 # 0 otherwise.
2226
2227 proc check_effective_target_longdouble128 { } {
2228 return [check_no_compiler_messages longdouble128 object {
2229 int dummy[sizeof(long double) == 16 ? 1 : -1];
2230 }]
2231 }
2232
2233 # Return 1 if the target supports double of 64 bits,
2234 # 0 otherwise.
2235
2236 proc check_effective_target_double64 { } {
2237 return [check_no_compiler_messages double64 object {
2238 int dummy[sizeof(double) == 8 ? 1 : -1];
2239 }]
2240 }
2241
2242 # Return 1 if the target supports double of at least 64 bits,
2243 # 0 otherwise.
2244
2245 proc check_effective_target_double64plus { } {
2246 return [check_no_compiler_messages double64plus object {
2247 int dummy[sizeof(double) >= 8 ? 1 : -1];
2248 }]
2249 }
2250
2251 # Return 1 if the target supports 'w' suffix on floating constant
2252 # 0 otherwise.
2253
2254 proc check_effective_target_has_w_floating_suffix { } {
2255 set opts ""
2256 if [check_effective_target_c++] {
2257 append opts "-std=gnu++03"
2258 }
2259 return [check_no_compiler_messages w_fp_suffix object {
2260 float dummy = 1.0w;
2261 } "$opts"]
2262 }
2263
2264 # Return 1 if the target supports 'q' suffix on floating constant
2265 # 0 otherwise.
2266
2267 proc check_effective_target_has_q_floating_suffix { } {
2268 set opts ""
2269 if [check_effective_target_c++] {
2270 append opts "-std=gnu++03"
2271 }
2272 return [check_no_compiler_messages q_fp_suffix object {
2273 float dummy = 1.0q;
2274 } "$opts"]
2275 }
2276 # Return 1 if the target supports compiling fixed-point,
2277 # 0 otherwise.
2278
2279 proc check_effective_target_fixed_point { } {
2280 return [check_no_compiler_messages fixed_point object {
2281 _Sat _Fract x; _Sat _Accum y;
2282 }]
2283 }
2284
2285 # Return 1 if the target supports compiling decimal floating point,
2286 # 0 otherwise.
2287
2288 proc check_effective_target_dfp_nocache { } {
2289 verbose "check_effective_target_dfp_nocache: compiling source" 2
2290 set ret [check_no_compiler_messages_nocache dfp object {
2291 float x __attribute__((mode(DD)));
2292 }]
2293 verbose "check_effective_target_dfp_nocache: returning $ret" 2
2294 return $ret
2295 }
2296
2297 proc check_effective_target_dfprt_nocache { } {
2298 return [check_runtime_nocache dfprt {
2299 typedef float d64 __attribute__((mode(DD)));
2300 d64 x = 1.2df, y = 2.3dd, z;
2301 int main () { z = x + y; return 0; }
2302 }]
2303 }
2304
2305 # Return 1 if the target supports compiling Decimal Floating Point,
2306 # 0 otherwise.
2307 #
2308 # This won't change for different subtargets so cache the result.
2309
2310 proc check_effective_target_dfp { } {
2311 return [check_cached_effective_target dfp {
2312 check_effective_target_dfp_nocache
2313 }]
2314 }
2315
2316 # Return 1 if the target supports linking and executing Decimal Floating
2317 # Point, 0 otherwise.
2318 #
2319 # This won't change for different subtargets so cache the result.
2320
2321 proc check_effective_target_dfprt { } {
2322 return [check_cached_effective_target dfprt {
2323 check_effective_target_dfprt_nocache
2324 }]
2325 }
2326
2327 # Return 1 if the target supports executing DFP hardware instructions,
2328 # 0 otherwise. Cache the result.
2329
2330 proc check_dfp_hw_available { } {
2331 return [check_cached_effective_target dfp_hw_available {
2332 # For now, disable on Darwin
2333 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2334 expr 0
2335 } else {
2336 check_runtime_nocache dfp_hw_available {
2337 volatile _Decimal64 r;
2338 volatile _Decimal64 a = 4.0DD;
2339 volatile _Decimal64 b = 2.0DD;
2340 int main()
2341 {
2342 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2343 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2344 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2345 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2346 return 0;
2347 }
2348 } "-mcpu=power6 -mhard-float"
2349 }
2350 }]
2351 }
2352
2353 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2354
2355 proc check_effective_target_ucn_nocache { } {
2356 # -std=c99 is only valid for C
2357 if [check_effective_target_c] {
2358 set ucnopts "-std=c99"
2359 } else {
2360 set ucnopts ""
2361 }
2362 verbose "check_effective_target_ucn_nocache: compiling source" 2
2363 set ret [check_no_compiler_messages_nocache ucn object {
2364 int \u00C0;
2365 } $ucnopts]
2366 verbose "check_effective_target_ucn_nocache: returning $ret" 2
2367 return $ret
2368 }
2369
2370 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2371 #
2372 # This won't change for different subtargets, so cache the result.
2373
2374 proc check_effective_target_ucn { } {
2375 return [check_cached_effective_target ucn {
2376 check_effective_target_ucn_nocache
2377 }]
2378 }
2379
2380 # Return 1 if the target needs a command line argument to enable a SIMD
2381 # instruction set.
2382
2383 proc check_effective_target_vect_cmdline_needed { } {
2384 global et_vect_cmdline_needed_saved
2385 global et_vect_cmdline_needed_target_name
2386
2387 if { ![info exists et_vect_cmdline_needed_target_name] } {
2388 set et_vect_cmdline_needed_target_name ""
2389 }
2390
2391 # If the target has changed since we set the cached value, clear it.
2392 set current_target [current_target_name]
2393 if { $current_target != $et_vect_cmdline_needed_target_name } {
2394 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
2395 set et_vect_cmdline_needed_target_name $current_target
2396 if { [info exists et_vect_cmdline_needed_saved] } {
2397 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
2398 unset et_vect_cmdline_needed_saved
2399 }
2400 }
2401
2402 if [info exists et_vect_cmdline_needed_saved] {
2403 verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
2404 } else {
2405 set et_vect_cmdline_needed_saved 1
2406 if { [istarget alpha*-*-*]
2407 || [istarget ia64-*-*]
2408 || (([istarget x86_64-*-*] || [istarget i?86-*-*])
2409 && ([check_effective_target_x32]
2410 || [check_effective_target_lp64]))
2411 || ([istarget powerpc*-*-*]
2412 && ([check_effective_target_powerpc_spe]
2413 || [check_effective_target_powerpc_altivec]))
2414 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
2415 || [istarget spu-*-*]
2416 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
2417 || [istarget aarch64*-*-*] } {
2418 set et_vect_cmdline_needed_saved 0
2419 }
2420 }
2421
2422 verbose "check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
2423 return $et_vect_cmdline_needed_saved
2424 }
2425
2426 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
2427 #
2428 # This won't change for different subtargets so cache the result.
2429
2430 proc check_effective_target_vect_int { } {
2431 global et_vect_int_saved
2432
2433 if [info exists et_vect_int_saved] {
2434 verbose "check_effective_target_vect_int: using cached result" 2
2435 } else {
2436 set et_vect_int_saved 0
2437 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2438 || ([istarget powerpc*-*-*]
2439 && ![istarget powerpc-*-linux*paired*])
2440 || [istarget spu-*-*]
2441 || [istarget sparc*-*-*]
2442 || [istarget alpha*-*-*]
2443 || [istarget ia64-*-*]
2444 || [istarget aarch64*-*-*]
2445 || [check_effective_target_arm32]
2446 || ([istarget mips*-*-*]
2447 && [check_effective_target_mips_loongson]) } {
2448 set et_vect_int_saved 1
2449 }
2450 }
2451
2452 verbose "check_effective_target_vect_int: returning $et_vect_int_saved" 2
2453 return $et_vect_int_saved
2454 }
2455
2456 # Return 1 if the target supports signed int->float conversion
2457 #
2458
2459 proc check_effective_target_vect_intfloat_cvt { } {
2460 global et_vect_intfloat_cvt_saved
2461
2462 if [info exists et_vect_intfloat_cvt_saved] {
2463 verbose "check_effective_target_vect_intfloat_cvt: using cached result" 2
2464 } else {
2465 set et_vect_intfloat_cvt_saved 0
2466 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2467 || ([istarget powerpc*-*-*]
2468 && ![istarget powerpc-*-linux*paired*])
2469 || ([istarget arm*-*-*]
2470 && [check_effective_target_arm_neon_ok])} {
2471 set et_vect_intfloat_cvt_saved 1
2472 }
2473 }
2474
2475 verbose "check_effective_target_vect_intfloat_cvt: returning $et_vect_intfloat_cvt_saved" 2
2476 return $et_vect_intfloat_cvt_saved
2477 }
2478
2479 #Return 1 if we're supporting __int128 for target, 0 otherwise.
2480
2481 proc check_effective_target_int128 { } {
2482 return [check_no_compiler_messages int128 object {
2483 int dummy[
2484 #ifndef __SIZEOF_INT128__
2485 -1
2486 #else
2487 1
2488 #endif
2489 ];
2490 }]
2491 }
2492
2493 # Return 1 if the target supports unsigned int->float conversion
2494 #
2495
2496 proc check_effective_target_vect_uintfloat_cvt { } {
2497 global et_vect_uintfloat_cvt_saved
2498
2499 if [info exists et_vect_uintfloat_cvt_saved] {
2500 verbose "check_effective_target_vect_uintfloat_cvt: using cached result" 2
2501 } else {
2502 set et_vect_uintfloat_cvt_saved 0
2503 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2504 || ([istarget powerpc*-*-*]
2505 && ![istarget powerpc-*-linux*paired*])
2506 || [istarget aarch64*-*-*]
2507 || ([istarget arm*-*-*]
2508 && [check_effective_target_arm_neon_ok])} {
2509 set et_vect_uintfloat_cvt_saved 1
2510 }
2511 }
2512
2513 verbose "check_effective_target_vect_uintfloat_cvt: returning $et_vect_uintfloat_cvt_saved" 2
2514 return $et_vect_uintfloat_cvt_saved
2515 }
2516
2517
2518 # Return 1 if the target supports signed float->int conversion
2519 #
2520
2521 proc check_effective_target_vect_floatint_cvt { } {
2522 global et_vect_floatint_cvt_saved
2523
2524 if [info exists et_vect_floatint_cvt_saved] {
2525 verbose "check_effective_target_vect_floatint_cvt: using cached result" 2
2526 } else {
2527 set et_vect_floatint_cvt_saved 0
2528 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2529 || ([istarget powerpc*-*-*]
2530 && ![istarget powerpc-*-linux*paired*])
2531 || ([istarget arm*-*-*]
2532 && [check_effective_target_arm_neon_ok])} {
2533 set et_vect_floatint_cvt_saved 1
2534 }
2535 }
2536
2537 verbose "check_effective_target_vect_floatint_cvt: returning $et_vect_floatint_cvt_saved" 2
2538 return $et_vect_floatint_cvt_saved
2539 }
2540
2541 # Return 1 if the target supports unsigned float->int conversion
2542 #
2543
2544 proc check_effective_target_vect_floatuint_cvt { } {
2545 global et_vect_floatuint_cvt_saved
2546
2547 if [info exists et_vect_floatuint_cvt_saved] {
2548 verbose "check_effective_target_vect_floatuint_cvt: using cached result" 2
2549 } else {
2550 set et_vect_floatuint_cvt_saved 0
2551 if { ([istarget powerpc*-*-*]
2552 && ![istarget powerpc-*-linux*paired*])
2553 || ([istarget arm*-*-*]
2554 && [check_effective_target_arm_neon_ok])} {
2555 set et_vect_floatuint_cvt_saved 1
2556 }
2557 }
2558
2559 verbose "check_effective_target_vect_floatuint_cvt: returning $et_vect_floatuint_cvt_saved" 2
2560 return $et_vect_floatuint_cvt_saved
2561 }
2562
2563 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
2564 #
2565 # This won't change for different subtargets so cache the result.
2566
2567 proc check_effective_target_vect_simd_clones { } {
2568 global et_vect_simd_clones_saved
2569
2570 if [info exists et_vect_simd_clones_saved] {
2571 verbose "check_effective_target_vect_simd_clones: using cached result" 2
2572 } else {
2573 set et_vect_simd_clones_saved 0
2574 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2575 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx and
2576 # avx2 clone. Only the right clone for the specified arch will be
2577 # chosen, but still we need to at least be able to assemble
2578 # avx2.
2579 if { [check_effective_target_avx2] } {
2580 set et_vect_simd_clones_saved 1
2581 }
2582 }
2583 }
2584
2585 verbose "check_effective_target_vect_simd_clones: returning $et_vect_simd_clones_saved" 2
2586 return $et_vect_simd_clones_saved
2587 }
2588
2589 # Return 1 if this is a AArch64 target supporting big endian
2590 proc check_effective_target_aarch64_big_endian { } {
2591 return [check_no_compiler_messages aarch64_big_endian assembly {
2592 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
2593 #error !__aarch64__ || !__AARCH64EB__
2594 #endif
2595 }]
2596 }
2597
2598 # Return 1 if this is a AArch64 target supporting little endian
2599 proc check_effective_target_aarch64_little_endian { } {
2600 if { ![istarget aarch64*-*-*] } {
2601 return 0
2602 }
2603
2604 return [check_no_compiler_messages aarch64_little_endian assembly {
2605 #if !defined(__aarch64__) || defined(__AARCH64EB__)
2606 #error FOO
2607 #endif
2608 }]
2609 }
2610
2611 # Return 1 if this is an arm target using 32-bit instructions
2612 proc check_effective_target_arm32 { } {
2613 if { ![istarget arm*-*-*] } {
2614 return 0
2615 }
2616
2617 return [check_no_compiler_messages arm32 assembly {
2618 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
2619 #error !__arm || __thumb__ && !__thumb2__
2620 #endif
2621 }]
2622 }
2623
2624 # Return 1 if this is an arm target not using Thumb
2625 proc check_effective_target_arm_nothumb { } {
2626 if { ![istarget arm*-*-*] } {
2627 return 0
2628 }
2629
2630 return [check_no_compiler_messages arm_nothumb assembly {
2631 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
2632 #error !__arm__ || __thumb || __thumb2__
2633 #endif
2634 }]
2635 }
2636
2637 # Return 1 if this is a little-endian ARM target
2638 proc check_effective_target_arm_little_endian { } {
2639 if { ![istarget arm*-*-*] } {
2640 return 0
2641 }
2642
2643 return [check_no_compiler_messages arm_little_endian assembly {
2644 #if !defined(__arm__) || !defined(__ARMEL__)
2645 #error !__arm__ || !__ARMEL__
2646 #endif
2647 }]
2648 }
2649
2650 # Return 1 if this is an ARM target that only supports aligned vector accesses
2651 proc check_effective_target_arm_vect_no_misalign { } {
2652 if { ![istarget arm*-*-*] } {
2653 return 0
2654 }
2655
2656 return [check_no_compiler_messages arm_vect_no_misalign assembly {
2657 #if !defined(__arm__) \
2658 || (defined(__ARM_FEATURE_UNALIGNED) \
2659 && defined(__ARMEL__))
2660 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
2661 #endif
2662 }]
2663 }
2664
2665
2666 # Return 1 if this is an ARM target supporting -mfpu=vfp
2667 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
2668 # options.
2669
2670 proc check_effective_target_arm_vfp_ok { } {
2671 if { [check_effective_target_arm32] } {
2672 return [check_no_compiler_messages arm_vfp_ok object {
2673 int dummy;
2674 } "-mfpu=vfp -mfloat-abi=softfp"]
2675 } else {
2676 return 0
2677 }
2678 }
2679
2680 # Return 1 if this is an ARM target supporting -mfpu=vfp3
2681 # -mfloat-abi=softfp.
2682
2683 proc check_effective_target_arm_vfp3_ok { } {
2684 if { [check_effective_target_arm32] } {
2685 return [check_no_compiler_messages arm_vfp3_ok object {
2686 int dummy;
2687 } "-mfpu=vfp3 -mfloat-abi=softfp"]
2688 } else {
2689 return 0
2690 }
2691 }
2692
2693 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
2694 # -mfloat-abi=softfp.
2695 proc check_effective_target_arm_v8_vfp_ok {} {
2696 if { [check_effective_target_arm32] } {
2697 return [check_no_compiler_messages arm_v8_vfp_ok object {
2698 int foo (void)
2699 {
2700 __asm__ volatile ("vrinta.f32.f32 s0, s0");
2701 return 0;
2702 }
2703 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
2704 } else {
2705 return 0
2706 }
2707 }
2708
2709 # Return 1 if this is an ARM target supporting -mfpu=vfp
2710 # -mfloat-abi=hard. Some multilibs may be incompatible with these
2711 # options.
2712
2713 proc check_effective_target_arm_hard_vfp_ok { } {
2714 if { [check_effective_target_arm32]
2715 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
2716 return [check_no_compiler_messages arm_hard_vfp_ok executable {
2717 int main() { return 0;}
2718 } "-mfpu=vfp -mfloat-abi=hard"]
2719 } else {
2720 return 0
2721 }
2722 }
2723
2724 # Return 1 if this is an ARM target that supports DSP multiply with
2725 # current multilib flags.
2726
2727 proc check_effective_target_arm_dsp { } {
2728 return [check_no_compiler_messages arm_dsp assembly {
2729 #ifndef __ARM_FEATURE_DSP
2730 #error not DSP
2731 #endif
2732 int i;
2733 }]
2734 }
2735
2736 # Return 1 if this is an ARM target that supports unaligned word/halfword
2737 # load/store instructions.
2738
2739 proc check_effective_target_arm_unaligned { } {
2740 return [check_no_compiler_messages arm_unaligned assembly {
2741 #ifndef __ARM_FEATURE_UNALIGNED
2742 #error no unaligned support
2743 #endif
2744 int i;
2745 }]
2746 }
2747
2748 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2749 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2750 # incompatible with these options. Also set et_arm_crypto_flags to the
2751 # best options to add.
2752
2753 proc check_effective_target_arm_crypto_ok_nocache { } {
2754 global et_arm_crypto_flags
2755 set et_arm_crypto_flags ""
2756 if { [check_effective_target_arm32] } {
2757 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
2758 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
2759 #include "arm_neon.h"
2760 uint8x16_t
2761 foo (uint8x16_t a, uint8x16_t b)
2762 {
2763 return vaeseq_u8 (a, b);
2764 }
2765 } "$flags"] } {
2766 set et_arm_crypto_flags $flags
2767 return 1
2768 }
2769 }
2770 }
2771
2772 return 0
2773 }
2774
2775 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2776
2777 proc check_effective_target_arm_crypto_ok { } {
2778 return [check_cached_effective_target arm_crypto_ok \
2779 check_effective_target_arm_crypto_ok_nocache]
2780 }
2781
2782 # Add options for crypto extensions.
2783 proc add_options_for_arm_crypto { flags } {
2784 if { ! [check_effective_target_arm_crypto_ok] } {
2785 return "$flags"
2786 }
2787 global et_arm_crypto_flags
2788 return "$flags $et_arm_crypto_flags"
2789 }
2790
2791 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2792 # or -mfloat-abi=hard, but if one is already specified by the
2793 # multilib, use it. Similarly, if a -mfpu option already enables
2794 # NEON, do not add -mfpu=neon.
2795
2796 proc add_options_for_arm_neon { flags } {
2797 if { ! [check_effective_target_arm_neon_ok] } {
2798 return "$flags"
2799 }
2800 global et_arm_neon_flags
2801 return "$flags $et_arm_neon_flags"
2802 }
2803
2804 proc add_options_for_arm_v8_vfp { flags } {
2805 if { ! [check_effective_target_arm_v8_vfp_ok] } {
2806 return "$flags"
2807 }
2808 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
2809 }
2810
2811 proc add_options_for_arm_v8_neon { flags } {
2812 if { ! [check_effective_target_arm_v8_neon_ok] } {
2813 return "$flags"
2814 }
2815 global et_arm_v8_neon_flags
2816 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
2817 }
2818
2819 # Add the options needed for ARMv8.1 Adv.SIMD.
2820
2821 proc add_options_for_arm_v8_1a_neon { flags } {
2822 if { [istarget aarch64*-*-*] } {
2823 return "$flags -march=armv8.1-a"
2824 } else {
2825 return "$flags"
2826 }
2827 }
2828
2829 proc add_options_for_arm_crc { flags } {
2830 if { ! [check_effective_target_arm_crc_ok] } {
2831 return "$flags"
2832 }
2833 global et_arm_crc_flags
2834 return "$flags $et_arm_crc_flags"
2835 }
2836
2837 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2838 # or -mfloat-abi=hard, but if one is already specified by the
2839 # multilib, use it. Similarly, if a -mfpu option already enables
2840 # NEON, do not add -mfpu=neon.
2841
2842 proc add_options_for_arm_neonv2 { flags } {
2843 if { ! [check_effective_target_arm_neonv2_ok] } {
2844 return "$flags"
2845 }
2846 global et_arm_neonv2_flags
2847 return "$flags $et_arm_neonv2_flags"
2848 }
2849
2850 # Add the options needed for vfp3.
2851 proc add_options_for_arm_vfp3 { flags } {
2852 if { ! [check_effective_target_arm_vfp3_ok] } {
2853 return "$flags"
2854 }
2855 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
2856 }
2857
2858 # Return 1 if this is an ARM target supporting -mfpu=neon
2859 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2860 # incompatible with these options. Also set et_arm_neon_flags to the
2861 # best options to add.
2862
2863 proc check_effective_target_arm_neon_ok_nocache { } {
2864 global et_arm_neon_flags
2865 set et_arm_neon_flags ""
2866 if { [check_effective_target_arm32] } {
2867 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp"} {
2868 if { [check_no_compiler_messages_nocache arm_neon_ok object {
2869 int dummy;
2870 #ifndef __ARM_NEON__
2871 #error not NEON
2872 #endif
2873 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
2874 configured for -mcpu=arm926ej-s, for example. */
2875 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
2876 #error Architecture does not support NEON.
2877 #endif
2878 } "$flags"] } {
2879 set et_arm_neon_flags $flags
2880 return 1
2881 }
2882 }
2883 }
2884
2885 return 0
2886 }
2887
2888 proc check_effective_target_arm_neon_ok { } {
2889 return [check_cached_effective_target arm_neon_ok \
2890 check_effective_target_arm_neon_ok_nocache]
2891 }
2892
2893 proc check_effective_target_arm_crc_ok_nocache { } {
2894 global et_arm_crc_flags
2895 set et_arm_crc_flags "-march=armv8-a+crc"
2896 return [check_no_compiler_messages_nocache arm_crc_ok object {
2897 #if !defined (__ARM_FEATURE_CRC32)
2898 #error FOO
2899 #endif
2900 } "$et_arm_crc_flags"]
2901 }
2902
2903 proc check_effective_target_arm_crc_ok { } {
2904 return [check_cached_effective_target arm_crc_ok \
2905 check_effective_target_arm_crc_ok_nocache]
2906 }
2907
2908 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
2909 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2910 # incompatible with these options. Also set et_arm_neon_flags to the
2911 # best options to add.
2912
2913 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
2914 global et_arm_neon_fp16_flags
2915 set et_arm_neon_fp16_flags ""
2916 if { [check_effective_target_arm32] } {
2917 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
2918 "-mfpu=neon-fp16 -mfloat-abi=softfp"
2919 "-mfp16-format=ieee"
2920 "-mfloat-abi=softfp -mfp16-format=ieee"
2921 "-mfpu=neon-fp16 -mfp16-format=ieee"
2922 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
2923 if { [check_no_compiler_messages_nocache arm_neon_fp_16_ok object {
2924 #include "arm_neon.h"
2925 float16x4_t
2926 foo (float32x4_t arg)
2927 {
2928 return vcvt_f16_f32 (arg);
2929 }
2930 } "$flags"] } {
2931 set et_arm_neon_fp16_flags $flags
2932 return 1
2933 }
2934 }
2935 }
2936
2937 return 0
2938 }
2939
2940 proc check_effective_target_arm_neon_fp16_ok { } {
2941 return [check_cached_effective_target arm_neon_fp16_ok \
2942 check_effective_target_arm_neon_fp16_ok_nocache]
2943 }
2944
2945 proc check_effective_target_arm_neon_fp16_hw { } {
2946 if {! [check_effective_target_arm_neon_fp16_ok] } {
2947 return 0
2948 }
2949 global et_arm_neon_fp16_flags
2950 check_runtime_nocache arm_neon_fp16_hw {
2951 int
2952 main (int argc, char **argv)
2953 {
2954 asm ("vcvt.f32.f16 q1, d0");
2955 return 0;
2956 }
2957 } $et_arm_neon_fp16_flags
2958 }
2959
2960 proc add_options_for_arm_neon_fp16 { flags } {
2961 if { ! [check_effective_target_arm_neon_fp16_ok] } {
2962 return "$flags"
2963 }
2964 global et_arm_neon_fp16_flags
2965 return "$flags $et_arm_neon_fp16_flags"
2966 }
2967
2968 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
2969 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2970 # incompatible with these options. Also set et_arm_v8_neon_flags to the
2971 # best options to add.
2972
2973 proc check_effective_target_arm_v8_neon_ok_nocache { } {
2974 global et_arm_v8_neon_flags
2975 set et_arm_v8_neon_flags ""
2976 if { [check_effective_target_arm32] } {
2977 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
2978 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
2979 #if __ARM_ARCH < 8
2980 #error not armv8 or later
2981 #endif
2982 #include "arm_neon.h"
2983 void
2984 foo ()
2985 {
2986 __asm__ volatile ("vrintn.f32 q0, q0");
2987 }
2988 } "$flags -march=armv8-a"] } {
2989 set et_arm_v8_neon_flags $flags
2990 return 1
2991 }
2992 }
2993 }
2994
2995 return 0
2996 }
2997
2998 proc check_effective_target_arm_v8_neon_ok { } {
2999 return [check_cached_effective_target arm_v8_neon_ok \
3000 check_effective_target_arm_v8_neon_ok_nocache]
3001 }
3002
3003 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
3004 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3005 # incompatible with these options. Also set et_arm_neonv2_flags to the
3006 # best options to add.
3007
3008 proc check_effective_target_arm_neonv2_ok_nocache { } {
3009 global et_arm_neonv2_flags
3010 set et_arm_neonv2_flags ""
3011 if { [check_effective_target_arm32] } {
3012 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
3013 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
3014 #include "arm_neon.h"
3015 float32x2_t
3016 foo (float32x2_t a, float32x2_t b, float32x2_t c)
3017 {
3018 return vfma_f32 (a, b, c);
3019 }
3020 } "$flags"] } {
3021 set et_arm_neonv2_flags $flags
3022 return 1
3023 }
3024 }
3025 }
3026
3027 return 0
3028 }
3029
3030 proc check_effective_target_arm_neonv2_ok { } {
3031 return [check_cached_effective_target arm_neonv2_ok \
3032 check_effective_target_arm_neonv2_ok_nocache]
3033 }
3034
3035 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3036 # or -mfloat-abi=hard, but if one is already specified by the
3037 # multilib, use it.
3038
3039 proc add_options_for_arm_fp16 { flags } {
3040 if { ! [check_effective_target_arm_fp16_ok] } {
3041 return "$flags"
3042 }
3043 global et_arm_fp16_flags
3044 return "$flags $et_arm_fp16_flags"
3045 }
3046
3047 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
3048 # Skip multilibs that are incompatible with these options and set
3049 # et_arm_fp16_flags to the best options to add.
3050
3051 proc check_effective_target_arm_fp16_ok_nocache { } {
3052 global et_arm_fp16_flags
3053 set et_arm_fp16_flags ""
3054 if { ! [check_effective_target_arm32] } {
3055 return 0;
3056 }
3057 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" "-mfpu=*fpv[1-9][0-9]*" } ]] {
3058 # Multilib flags would override -mfpu.
3059 return 0
3060 }
3061 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
3062 # Must generate floating-point instructions.
3063 return 0
3064 }
3065 if [check_effective_target_arm_hf_eabi] {
3066 # Use existing float-abi and force an fpu which supports fp16
3067 set et_arm_fp16_flags "-mfpu=vfpv4"
3068 return 1;
3069 }
3070 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
3071 # The existing -mfpu value is OK; use it, but add softfp.
3072 set et_arm_fp16_flags "-mfloat-abi=softfp"
3073 return 1;
3074 }
3075 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
3076 # macro to check for this support.
3077 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
3078 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
3079 int dummy;
3080 } "$flags"] } {
3081 set et_arm_fp16_flags "$flags"
3082 return 1
3083 }
3084
3085 return 0
3086 }
3087
3088 proc check_effective_target_arm_fp16_ok { } {
3089 return [check_cached_effective_target arm_fp16_ok \
3090 check_effective_target_arm_fp16_ok_nocache]
3091 }
3092
3093 # Creates a series of routines that return 1 if the given architecture
3094 # can be selected and a routine to give the flags to select that architecture
3095 # Note: Extra flags may be added to disable options from newer compilers
3096 # (Thumb in particular - but others may be added in the future)
3097 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
3098 # /* { dg-add-options arm_arch_v5 } */
3099 # /* { dg-require-effective-target arm_arch_v5_multilib } */
3100 foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__
3101 v4t "-march=armv4t" __ARM_ARCH_4T__
3102 v5 "-march=armv5 -marm" __ARM_ARCH_5__
3103 v5t "-march=armv5t" __ARM_ARCH_5T__
3104 v5te "-march=armv5te" __ARM_ARCH_5TE__
3105 v6 "-march=armv6" __ARM_ARCH_6__
3106 v6k "-march=armv6k" __ARM_ARCH_6K__
3107 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
3108 v6z "-march=armv6z" __ARM_ARCH_6Z__
3109 v6m "-march=armv6-m -mthumb" __ARM_ARCH_6M__
3110 v7a "-march=armv7-a" __ARM_ARCH_7A__
3111 v7ve "-march=armv7ve" __ARM_ARCH_7A__
3112 v7r "-march=armv7-r" __ARM_ARCH_7R__
3113 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
3114 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
3115 v8a "-march=armv8-a" __ARM_ARCH_8A__
3116 v8_1a "-march=armv8.1a" __ARM_ARCH_8A__ } {
3117 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
3118 proc check_effective_target_arm_arch_FUNC_ok { } {
3119 if { [ string match "*-marm*" "FLAG" ] &&
3120 ![check_effective_target_arm_arm_ok] } {
3121 return 0
3122 }
3123 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
3124 #if !defined (DEF)
3125 #error !DEF
3126 #endif
3127 } "FLAG" ]
3128 }
3129
3130 proc add_options_for_arm_arch_FUNC { flags } {
3131 return "$flags FLAG"
3132 }
3133
3134 proc check_effective_target_arm_arch_FUNC_multilib { } {
3135 return [check_runtime arm_arch_FUNC_multilib {
3136 int
3137 main (void)
3138 {
3139 return 0;
3140 }
3141 } [add_options_for_arm_arch_FUNC ""]]
3142 }
3143 }]
3144 }
3145
3146 # Return 1 if this is an ARM target where -marm causes ARM to be
3147 # used (not Thumb)
3148
3149 proc check_effective_target_arm_arm_ok { } {
3150 return [check_no_compiler_messages arm_arm_ok assembly {
3151 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
3152 #error !__arm__ || __thumb__ || __thumb2__
3153 #endif
3154 } "-marm"]
3155 }
3156
3157
3158 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
3159 # used.
3160
3161 proc check_effective_target_arm_thumb1_ok { } {
3162 return [check_no_compiler_messages arm_thumb1_ok assembly {
3163 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3164 #error !__arm__ || !__thumb__ || __thumb2__
3165 #endif
3166 int foo (int i) { return i; }
3167 } "-mthumb"]
3168 }
3169
3170 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
3171 # used.
3172
3173 proc check_effective_target_arm_thumb2_ok { } {
3174 return [check_no_compiler_messages arm_thumb2_ok assembly {
3175 #if !defined(__thumb2__)
3176 #error !__thumb2__
3177 #endif
3178 int foo (int i) { return i; }
3179 } "-mthumb"]
3180 }
3181
3182 # Return 1 if this is an ARM target where Thumb-1 is used without options
3183 # added by the test.
3184
3185 proc check_effective_target_arm_thumb1 { } {
3186 return [check_no_compiler_messages arm_thumb1 assembly {
3187 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3188 #error !__arm__ || !__thumb__ || __thumb2__
3189 #endif
3190 int i;
3191 } ""]
3192 }
3193
3194 # Return 1 if this is an ARM target where Thumb-2 is used without options
3195 # added by the test.
3196
3197 proc check_effective_target_arm_thumb2 { } {
3198 return [check_no_compiler_messages arm_thumb2 assembly {
3199 #if !defined(__thumb2__)
3200 #error !__thumb2__
3201 #endif
3202 int i;
3203 } ""]
3204 }
3205
3206 # Return 1 if this is an ARM target where conditional execution is available.
3207
3208 proc check_effective_target_arm_cond_exec { } {
3209 return [check_no_compiler_messages arm_cond_exec assembly {
3210 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
3211 #error FOO
3212 #endif
3213 int i;
3214 } ""]
3215 }
3216
3217 # Return 1 if this is an ARM cortex-M profile cpu
3218
3219 proc check_effective_target_arm_cortex_m { } {
3220 if { ![istarget arm*-*-*] } {
3221 return 0
3222 }
3223 return [check_no_compiler_messages arm_cortex_m assembly {
3224 #if !defined(__ARM_ARCH_7M__) \
3225 && !defined (__ARM_ARCH_7EM__) \
3226 && !defined (__ARM_ARCH_6M__)
3227 #error !__ARM_ARCH_7M__ && !__ARM_ARCH_7EM__ && !__ARM_ARCH_6M__
3228 #endif
3229 int i;
3230 } "-mthumb"]
3231 }
3232
3233 # Return 1 if this compilation turns on string_ops_prefer_neon on.
3234
3235 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
3236 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
3237 int foo (void) { return 0; }
3238 } "-O2 -mprint-tune-info" ]
3239 }
3240
3241 # Return 1 if the target supports executing NEON instructions, 0
3242 # otherwise. Cache the result.
3243
3244 proc check_effective_target_arm_neon_hw { } {
3245 return [check_runtime arm_neon_hw_available {
3246 int
3247 main (void)
3248 {
3249 long long a = 0, b = 1;
3250 asm ("vorr %P0, %P1, %P2"
3251 : "=w" (a)
3252 : "0" (a), "w" (b));
3253 return (a != 1);
3254 }
3255 } [add_options_for_arm_neon ""]]
3256 }
3257
3258 proc check_effective_target_arm_neonv2_hw { } {
3259 return [check_runtime arm_neon_hwv2_available {
3260 #include "arm_neon.h"
3261 int
3262 main (void)
3263 {
3264 float32x2_t a, b, c;
3265 asm ("vfma.f32 %P0, %P1, %P2"
3266 : "=w" (a)
3267 : "w" (b), "w" (c));
3268 return 0;
3269 }
3270 } [add_options_for_arm_neonv2 ""]]
3271 }
3272
3273 # Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
3274 # otherwise. The test is valid for AArch64.
3275
3276 proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
3277 if { ![istarget aarch64*-*-*] } {
3278 return 0
3279 }
3280 return [check_no_compiler_messages_nocache arm_v8_1a_neon_ok assembly {
3281 #if !defined (__ARM_FEATURE_QRDMX)
3282 #error "__ARM_FEATURE_QRDMX not defined"
3283 #endif
3284 } [add_options_for_arm_v8_1a_neon ""]]
3285 }
3286
3287 proc check_effective_target_arm_v8_1a_neon_ok { } {
3288 return [check_cached_effective_target arm_v8_1a_neon_ok \
3289 check_effective_target_arm_v8_1a_neon_ok_nocache]
3290 }
3291
3292 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
3293 # otherwise.
3294
3295 proc check_effective_target_arm_v8_neon_hw { } {
3296 return [check_runtime arm_v8_neon_hw_available {
3297 #include "arm_neon.h"
3298 int
3299 main (void)
3300 {
3301 float32x2_t a;
3302 asm ("vrinta.f32 %P0, %P1"
3303 : "=w" (a)
3304 : "0" (a));
3305 return 0;
3306 }
3307 } [add_options_for_arm_v8_neon ""]]
3308 }
3309
3310 # Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
3311 # otherwise. The test is valid for AArch64.
3312
3313 proc check_effective_target_arm_v8_1a_neon_hw { } {
3314 if { ![check_effective_target_arm_v8_1a_neon_ok] } {
3315 return 0;
3316 }
3317 return [check_runtime_nocache arm_v8_1a_neon_hw_available {
3318 int
3319 main (void)
3320 {
3321 __Int32x2_t a = {0, 1};
3322 __Int32x2_t b = {0, 2};
3323 __Int32x2_t result;
3324
3325 asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
3326 : "=w"(result)
3327 : "w"(a), "w"(b)
3328 : /* No clobbers. */);
3329
3330 return result[0];
3331 }
3332 } [add_options_for_arm_v8_1a_neon ""]]
3333 }
3334
3335 # Return 1 if this is a ARM target with NEON enabled.
3336
3337 proc check_effective_target_arm_neon { } {
3338 if { [check_effective_target_arm32] } {
3339 return [check_no_compiler_messages arm_neon object {
3340 #ifndef __ARM_NEON__
3341 #error not NEON
3342 #else
3343 int dummy;
3344 #endif
3345 }]
3346 } else {
3347 return 0
3348 }
3349 }
3350
3351 proc check_effective_target_arm_neonv2 { } {
3352 if { [check_effective_target_arm32] } {
3353 return [check_no_compiler_messages arm_neon object {
3354 #ifndef __ARM_NEON__
3355 #error not NEON
3356 #else
3357 #ifndef __ARM_FEATURE_FMA
3358 #error not NEONv2
3359 #else
3360 int dummy;
3361 #endif
3362 #endif
3363 }]
3364 } else {
3365 return 0
3366 }
3367 }
3368
3369 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
3370 # the Loongson vector modes.
3371
3372 proc check_effective_target_mips_loongson { } {
3373 return [check_no_compiler_messages loongson assembly {
3374 #if !defined(__mips_loongson_vector_rev)
3375 #error !__mips_loongson_vector_rev
3376 #endif
3377 }]
3378 }
3379
3380 # Return 1 if this is a MIPS target that supports the legacy NAN.
3381
3382 proc check_effective_target_mips_nanlegacy { } {
3383 return [check_no_compiler_messages nanlegacy assembly {
3384 #include <stdlib.h>
3385 int main () { return 0; }
3386 } "-mnan=legacy"]
3387 }
3388
3389 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
3390 # Architecture.
3391
3392 proc check_effective_target_arm_eabi { } {
3393 return [check_no_compiler_messages arm_eabi object {
3394 #ifndef __ARM_EABI__
3395 #error not EABI
3396 #else
3397 int dummy;
3398 #endif
3399 }]
3400 }
3401
3402 # Return 1 if this is an ARM target that adheres to the hard-float variant of
3403 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
3404
3405 proc check_effective_target_arm_hf_eabi { } {
3406 return [check_no_compiler_messages arm_hf_eabi object {
3407 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
3408 #error not hard-float EABI
3409 #else
3410 int dummy;
3411 #endif
3412 }]
3413 }
3414
3415 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
3416 # Some multilibs may be incompatible with this option.
3417
3418 proc check_effective_target_arm_iwmmxt_ok { } {
3419 if { [check_effective_target_arm32] } {
3420 return [check_no_compiler_messages arm_iwmmxt_ok object {
3421 int dummy;
3422 } "-mcpu=iwmmxt"]
3423 } else {
3424 return 0
3425 }
3426 }
3427
3428 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
3429 # for an ARM target.
3430 proc check_effective_target_arm_prefer_ldrd_strd { } {
3431 if { ![check_effective_target_arm32] } {
3432 return 0;
3433 }
3434
3435 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
3436 void foo (int *p) { p[0] = 1; p[1] = 0;}
3437 } "-O2 -mthumb" ]
3438 }
3439
3440 # Return 1 if this is a PowerPC target supporting -meabi.
3441
3442 proc check_effective_target_powerpc_eabi_ok { } {
3443 if { [istarget powerpc*-*-*] } {
3444 return [check_no_compiler_messages powerpc_eabi_ok object {
3445 int dummy;
3446 } "-meabi"]
3447 } else {
3448 return 0
3449 }
3450 }
3451
3452 # Return 1 if this is a PowerPC target with floating-point registers.
3453
3454 proc check_effective_target_powerpc_fprs { } {
3455 if { [istarget powerpc*-*-*]
3456 || [istarget rs6000-*-*] } {
3457 return [check_no_compiler_messages powerpc_fprs object {
3458 #ifdef __NO_FPRS__
3459 #error no FPRs
3460 #else
3461 int dummy;
3462 #endif
3463 }]
3464 } else {
3465 return 0
3466 }
3467 }
3468
3469 # Return 1 if this is a PowerPC target with hardware double-precision
3470 # floating point.
3471
3472 proc check_effective_target_powerpc_hard_double { } {
3473 if { [istarget powerpc*-*-*]
3474 || [istarget rs6000-*-*] } {
3475 return [check_no_compiler_messages powerpc_hard_double object {
3476 #ifdef _SOFT_DOUBLE
3477 #error soft double
3478 #else
3479 int dummy;
3480 #endif
3481 }]
3482 } else {
3483 return 0
3484 }
3485 }
3486
3487 # Return 1 if this is a PowerPC target supporting -maltivec.
3488
3489 proc check_effective_target_powerpc_altivec_ok { } {
3490 if { ([istarget powerpc*-*-*]
3491 && ![istarget powerpc-*-linux*paired*])
3492 || [istarget rs6000-*-*] } {
3493 # AltiVec is not supported on AIX before 5.3.
3494 if { [istarget powerpc*-*-aix4*]
3495 || [istarget powerpc*-*-aix5.1*]
3496 || [istarget powerpc*-*-aix5.2*] } {
3497 return 0
3498 }
3499 return [check_no_compiler_messages powerpc_altivec_ok object {
3500 int dummy;
3501 } "-maltivec"]
3502 } else {
3503 return 0
3504 }
3505 }
3506
3507 # Return 1 if this is a PowerPC target supporting -mpower8-vector
3508
3509 proc check_effective_target_powerpc_p8vector_ok { } {
3510 if { ([istarget powerpc*-*-*]
3511 && ![istarget powerpc-*-linux*paired*])
3512 || [istarget rs6000-*-*] } {
3513 # AltiVec is not supported on AIX before 5.3.
3514 if { [istarget powerpc*-*-aix4*]
3515 || [istarget powerpc*-*-aix5.1*]
3516 || [istarget powerpc*-*-aix5.2*] } {
3517 return 0
3518 }
3519 return [check_no_compiler_messages powerpc_p8vector_ok object {
3520 int main (void) {
3521 #ifdef __MACH__
3522 asm volatile ("xxlorc vs0,vs0,vs0");
3523 #else
3524 asm volatile ("xxlorc 0,0,0");
3525 #endif
3526 return 0;
3527 }
3528 } "-mpower8-vector"]
3529 } else {
3530 return 0
3531 }
3532 }
3533
3534 # Return 1 if this is a PowerPC target supporting -mpower9-vector
3535
3536 proc check_effective_target_powerpc_p9vector_ok { } {
3537 if { ([istarget powerpc*-*-*]
3538 && ![istarget powerpc-*-linux*paired*])
3539 || [istarget rs6000-*-*] } {
3540 # AltiVec is not supported on AIX before 5.3.
3541 if { [istarget powerpc*-*-aix4*]
3542 || [istarget powerpc*-*-aix5.1*]
3543 || [istarget powerpc*-*-aix5.2*] } {
3544 return 0
3545 }
3546 return [check_no_compiler_messages powerpc_p9vector_ok object {
3547 int main (void) {
3548 long e = -1;
3549 vector double v = (vector double) { 0.0, 0.0 };
3550 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
3551 return e;
3552 }
3553 } "-mpower9-vector"]
3554 } else {
3555 return 0
3556 }
3557 }
3558
3559 # Return 1 if this is a PowerPC target supporting -mmodulo
3560
3561 proc check_effective_target_powerpc_p9modulo_ok { } {
3562 if { ([istarget powerpc*-*-*]
3563 && ![istarget powerpc-*-linux*paired*])
3564 || [istarget rs6000-*-*] } {
3565 # AltiVec is not supported on AIX before 5.3.
3566 if { [istarget powerpc*-*-aix4*]
3567 || [istarget powerpc*-*-aix5.1*]
3568 || [istarget powerpc*-*-aix5.2*] } {
3569 return 0
3570 }
3571 return [check_no_compiler_messages powerpc_p9modulo_ok object {
3572 int main (void) {
3573 int i = 5, j = 3, r = -1;
3574 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
3575 return (r == 2);
3576 }
3577 } "-mmodulo"]
3578 } else {
3579 return 0
3580 }
3581 }
3582
3583 # Return 1 if this is a PowerPC target supporting -mfloat128 via either
3584 # software emulation on power7/power8 systems or hardware support on power9.
3585
3586 proc check_effective_target_powerpc_float128_sw_ok { } {
3587 if { ([istarget powerpc*-*-*]
3588 && ![istarget powerpc-*-linux*paired*])
3589 || [istarget rs6000-*-*] } {
3590 # AltiVec is not supported on AIX before 5.3.
3591 if { [istarget powerpc*-*-aix4*]
3592 || [istarget powerpc*-*-aix5.1*]
3593 || [istarget powerpc*-*-aix5.2*] } {
3594 return 0
3595 }
3596 return [check_no_compiler_messages powerpc_float128_sw_ok object {
3597 volatile __float128 x = 1.0q;
3598 volatile __float128 y = 2.0q;
3599 int main() {
3600 __float128 z = x + y;
3601 return (z == 3.0q);
3602 }
3603 } "-mfloat128 -mvsx"]
3604 } else {
3605 return 0
3606 }
3607 }
3608
3609 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
3610 # support on power9.
3611
3612 proc check_effective_target_powerpc_float128_hw_ok { } {
3613 if { ([istarget powerpc*-*-*]
3614 && ![istarget powerpc-*-linux*paired*])
3615 || [istarget rs6000-*-*] } {
3616 # AltiVec is not supported on AIX before 5.3.
3617 if { [istarget powerpc*-*-aix4*]
3618 || [istarget powerpc*-*-aix5.1*]
3619 || [istarget powerpc*-*-aix5.2*] } {
3620 return 0
3621 }
3622 return [check_no_compiler_messages powerpc_float128_hw_ok object {
3623 volatile __float128 x = 1.0q;
3624 volatile __float128 y = 2.0q;
3625 int main() {
3626 __float128 z;
3627 __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
3628 return (z == 3.0q);
3629 }
3630 } "-mfloat128-hardware"]
3631 } else {
3632 return 0
3633 }
3634 }
3635
3636 # Return 1 if this is a PowerPC target supporting -mvsx
3637
3638 proc check_effective_target_powerpc_vsx_ok { } {
3639 if { ([istarget powerpc*-*-*]
3640 && ![istarget powerpc-*-linux*paired*])
3641 || [istarget rs6000-*-*] } {
3642 # VSX is not supported on AIX before 7.1.
3643 if { [istarget powerpc*-*-aix4*]
3644 || [istarget powerpc*-*-aix5*]
3645 || [istarget powerpc*-*-aix6*] } {
3646 return 0
3647 }
3648 return [check_no_compiler_messages powerpc_vsx_ok object {
3649 int main (void) {
3650 #ifdef __MACH__
3651 asm volatile ("xxlor vs0,vs0,vs0");
3652 #else
3653 asm volatile ("xxlor 0,0,0");
3654 #endif
3655 return 0;
3656 }
3657 } "-mvsx"]
3658 } else {
3659 return 0
3660 }
3661 }
3662
3663 # Return 1 if this is a PowerPC target supporting -mhtm
3664
3665 proc check_effective_target_powerpc_htm_ok { } {
3666 if { ([istarget powerpc*-*-*]
3667 && ![istarget powerpc-*-linux*paired*])
3668 || [istarget rs6000-*-*] } {
3669 # HTM is not supported on AIX yet.
3670 if { [istarget powerpc*-*-aix*] } {
3671 return 0
3672 }
3673 return [check_no_compiler_messages powerpc_htm_ok object {
3674 int main (void) {
3675 asm volatile ("tbegin. 0");
3676 return 0;
3677 }
3678 } "-mhtm"]
3679 } else {
3680 return 0
3681 }
3682 }
3683
3684 # Return 1 if the target supports executing HTM hardware instructions,
3685 # 0 otherwise. Cache the result.
3686
3687 proc check_htm_hw_available { } {
3688 return [check_cached_effective_target htm_hw_available {
3689 # For now, disable on Darwin
3690 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
3691 expr 0
3692 } else {
3693 check_runtime_nocache htm_hw_available {
3694 int main()
3695 {
3696 __builtin_ttest ();
3697 return 0;
3698 }
3699 } "-mhtm"
3700 }
3701 }]
3702 }
3703 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
3704
3705 proc check_effective_target_powerpc_ppu_ok { } {
3706 if [check_effective_target_powerpc_altivec_ok] {
3707 return [check_no_compiler_messages cell_asm_available object {
3708 int main (void) {
3709 #ifdef __MACH__
3710 asm volatile ("lvlx v0,v0,v0");
3711 #else
3712 asm volatile ("lvlx 0,0,0");
3713 #endif
3714 return 0;
3715 }
3716 }]
3717 } else {
3718 return 0
3719 }
3720 }
3721
3722 # Return 1 if this is a PowerPC target that supports SPU.
3723
3724 proc check_effective_target_powerpc_spu { } {
3725 if { [istarget powerpc*-*-linux*] } {
3726 return [check_effective_target_powerpc_altivec_ok]
3727 } else {
3728 return 0
3729 }
3730 }
3731
3732 # Return 1 if this is a PowerPC SPE target. The check includes options
3733 # specified by dg-options for this test, so don't cache the result.
3734
3735 proc check_effective_target_powerpc_spe_nocache { } {
3736 if { [istarget powerpc*-*-*] } {
3737 return [check_no_compiler_messages_nocache powerpc_spe object {
3738 #ifndef __SPE__
3739 #error not SPE
3740 #else
3741 int dummy;
3742 #endif
3743 } [current_compiler_flags]]
3744 } else {
3745 return 0
3746 }
3747 }
3748
3749 # Return 1 if this is a PowerPC target with SPE enabled.
3750
3751 proc check_effective_target_powerpc_spe { } {
3752 if { [istarget powerpc*-*-*] } {
3753 return [check_no_compiler_messages powerpc_spe object {
3754 #ifndef __SPE__
3755 #error not SPE
3756 #else
3757 int dummy;
3758 #endif
3759 }]
3760 } else {
3761 return 0
3762 }
3763 }
3764
3765 # Return 1 if this is a PowerPC target with Altivec enabled.
3766
3767 proc check_effective_target_powerpc_altivec { } {
3768 if { [istarget powerpc*-*-*] } {
3769 return [check_no_compiler_messages powerpc_altivec object {
3770 #ifndef __ALTIVEC__
3771 #error not Altivec
3772 #else
3773 int dummy;
3774 #endif
3775 }]
3776 } else {
3777 return 0
3778 }
3779 }
3780
3781 # Return 1 if this is a PowerPC 405 target. The check includes options
3782 # specified by dg-options for this test, so don't cache the result.
3783
3784 proc check_effective_target_powerpc_405_nocache { } {
3785 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
3786 return [check_no_compiler_messages_nocache powerpc_405 object {
3787 #ifdef __PPC405__
3788 int dummy;
3789 #else
3790 #error not a PPC405
3791 #endif
3792 } [current_compiler_flags]]
3793 } else {
3794 return 0
3795 }
3796 }
3797
3798 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
3799
3800 proc check_effective_target_powerpc_elfv2 { } {
3801 if { [istarget powerpc*-*-*] } {
3802 return [check_no_compiler_messages powerpc_elfv2 object {
3803 #if _CALL_ELF != 2
3804 #error not ELF v2 ABI
3805 #else
3806 int dummy;
3807 #endif
3808 }]
3809 } else {
3810 return 0
3811 }
3812 }
3813
3814 # Return 1 if this is a SPU target with a toolchain that
3815 # supports automatic overlay generation.
3816
3817 proc check_effective_target_spu_auto_overlay { } {
3818 if { [istarget spu*-*-elf*] } {
3819 return [check_no_compiler_messages spu_auto_overlay executable {
3820 int main (void) { }
3821 } "-Wl,--auto-overlay" ]
3822 } else {
3823 return 0
3824 }
3825 }
3826
3827 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
3828 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
3829 # test environment appears to run executables on such a simulator.
3830
3831 proc check_effective_target_ultrasparc_hw { } {
3832 return [check_runtime ultrasparc_hw {
3833 int main() { return 0; }
3834 } "-mcpu=ultrasparc"]
3835 }
3836
3837 # Return 1 if the test environment supports executing UltraSPARC VIS2
3838 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
3839
3840 proc check_effective_target_ultrasparc_vis2_hw { } {
3841 return [check_runtime ultrasparc_vis2_hw {
3842 int main() { __asm__(".word 0x81b00320"); return 0; }
3843 } "-mcpu=ultrasparc3"]
3844 }
3845
3846 # Return 1 if the test environment supports executing UltraSPARC VIS3
3847 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
3848
3849 proc check_effective_target_ultrasparc_vis3_hw { } {
3850 return [check_runtime ultrasparc_vis3_hw {
3851 int main() { __asm__(".word 0x81b00220"); return 0; }
3852 } "-mcpu=niagara3"]
3853 }
3854
3855 # Return 1 if this is a SPARC-V9 target.
3856
3857 proc check_effective_target_sparc_v9 { } {
3858 if { [istarget sparc*-*-*] } {
3859 return [check_no_compiler_messages sparc_v9 object {
3860 int main (void) {
3861 asm volatile ("return %i7+8");
3862 return 0;
3863 }
3864 }]
3865 } else {
3866 return 0
3867 }
3868 }
3869
3870 # Return 1 if this is a SPARC target with VIS enabled.
3871
3872 proc check_effective_target_sparc_vis { } {
3873 if { [istarget sparc*-*-*] } {
3874 return [check_no_compiler_messages sparc_vis object {
3875 #ifndef __VIS__
3876 #error not VIS
3877 #else
3878 int dummy;
3879 #endif
3880 }]
3881 } else {
3882 return 0
3883 }
3884 }
3885
3886 # Return 1 if the target supports hardware vector shift operation.
3887
3888 proc check_effective_target_vect_shift { } {
3889 global et_vect_shift_saved
3890
3891 if [info exists et_vect_shift_saved] {
3892 verbose "check_effective_target_vect_shift: using cached result" 2
3893 } else {
3894 set et_vect_shift_saved 0
3895 if { ([istarget powerpc*-*-*]
3896 && ![istarget powerpc-*-linux*paired*])
3897 || [istarget ia64-*-*]
3898 || [istarget i?86-*-*] || [istarget x86_64-*-*]
3899 || [istarget aarch64*-*-*]
3900 || [check_effective_target_arm32]
3901 || ([istarget mips*-*-*]
3902 && [check_effective_target_mips_loongson]) } {
3903 set et_vect_shift_saved 1
3904 }
3905 }
3906
3907 verbose "check_effective_target_vect_shift: returning $et_vect_shift_saved" 2
3908 return $et_vect_shift_saved
3909 }
3910
3911 proc check_effective_target_whole_vector_shift { } {
3912 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3913 || [istarget ia64-*-*]
3914 || [istarget aarch64*-*-*]
3915 || ([check_effective_target_arm32]
3916 && [check_effective_target_arm_little_endian])
3917 || ([istarget mips*-*-*]
3918 && [check_effective_target_mips_loongson]) } {
3919 set answer 1
3920 } else {
3921 set answer 0
3922 }
3923
3924 verbose "check_effective_target_vect_long: returning $answer" 2
3925 return $answer
3926 }
3927
3928 # Return 1 if the target supports vector bswap operations.
3929
3930 proc check_effective_target_vect_bswap { } {
3931 global et_vect_bswap_saved
3932
3933 if [info exists et_vect_bswap_saved] {
3934 verbose "check_effective_target_vect_bswap: using cached result" 2
3935 } else {
3936 set et_vect_bswap_saved 0
3937 if { [istarget aarch64*-*-*]
3938 || ([istarget arm*-*-*]
3939 && [check_effective_target_arm_neon])
3940 } {
3941 set et_vect_bswap_saved 1
3942 }
3943 }
3944
3945 verbose "check_effective_target_vect_bswap: returning $et_vect_bswap_saved" 2
3946 return $et_vect_bswap_saved
3947 }
3948
3949 # Return 1 if the target supports hardware vector shift operation for char.
3950
3951 proc check_effective_target_vect_shift_char { } {
3952 global et_vect_shift_char_saved
3953
3954 if [info exists et_vect_shift_char_saved] {
3955 verbose "check_effective_target_vect_shift_char: using cached result" 2
3956 } else {
3957 set et_vect_shift_char_saved 0
3958 if { ([istarget powerpc*-*-*]
3959 && ![istarget powerpc-*-linux*paired*])
3960 || [check_effective_target_arm32] } {
3961 set et_vect_shift_char_saved 1
3962 }
3963 }
3964
3965 verbose "check_effective_target_vect_shift_char: returning $et_vect_shift_char_saved" 2
3966 return $et_vect_shift_char_saved
3967 }
3968
3969 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
3970 #
3971 # This can change for different subtargets so do not cache the result.
3972
3973 proc check_effective_target_vect_long { } {
3974 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3975 || (([istarget powerpc*-*-*]
3976 && ![istarget powerpc-*-linux*paired*])
3977 && [check_effective_target_ilp32])
3978 || [check_effective_target_arm32]
3979 || ([istarget sparc*-*-*] && [check_effective_target_ilp32]) } {
3980 set answer 1
3981 } else {
3982 set answer 0
3983 }
3984
3985 verbose "check_effective_target_vect_long: returning $answer" 2
3986 return $answer
3987 }
3988
3989 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
3990 #
3991 # This won't change for different subtargets so cache the result.
3992
3993 proc check_effective_target_vect_float { } {
3994 global et_vect_float_saved
3995
3996 if [info exists et_vect_float_saved] {
3997 verbose "check_effective_target_vect_float: using cached result" 2
3998 } else {
3999 set et_vect_float_saved 0
4000 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4001 || [istarget powerpc*-*-*]
4002 || [istarget spu-*-*]
4003 || [istarget mips-sde-elf]
4004 || [istarget mipsisa64*-*-*]
4005 || [istarget ia64-*-*]
4006 || [istarget aarch64*-*-*]
4007 || [check_effective_target_arm32] } {
4008 set et_vect_float_saved 1
4009 }
4010 }
4011
4012 verbose "check_effective_target_vect_float: returning $et_vect_float_saved" 2
4013 return $et_vect_float_saved
4014 }
4015
4016 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
4017 #
4018 # This won't change for different subtargets so cache the result.
4019
4020 proc check_effective_target_vect_double { } {
4021 global et_vect_double_saved
4022
4023 if [info exists et_vect_double_saved] {
4024 verbose "check_effective_target_vect_double: using cached result" 2
4025 } else {
4026 set et_vect_double_saved 0
4027 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4028 || [istarget aarch64*-*-*] } {
4029 if { [check_no_compiler_messages vect_double assembly {
4030 #ifdef __tune_atom__
4031 # error No double vectorizer support.
4032 #endif
4033 }] } {
4034 set et_vect_double_saved 1
4035 } else {
4036 set et_vect_double_saved 0
4037 }
4038 } elseif { [istarget spu-*-*] } {
4039 set et_vect_double_saved 1
4040 } elseif { [istarget powerpc*-*-*] && [check_vsx_hw_available] } {
4041 set et_vect_double_saved 1
4042 }
4043 }
4044
4045 verbose "check_effective_target_vect_double: returning $et_vect_double_saved" 2
4046 return $et_vect_double_saved
4047 }
4048
4049 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
4050 #
4051 # This won't change for different subtargets so cache the result.
4052
4053 proc check_effective_target_vect_long_long { } {
4054 global et_vect_long_long_saved
4055
4056 if [info exists et_vect_long_long_saved] {
4057 verbose "check_effective_target_vect_long_long: using cached result" 2
4058 } else {
4059 set et_vect_long_long_saved 0
4060 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4061 set et_vect_long_long_saved 1
4062 }
4063 }
4064
4065 verbose "check_effective_target_vect_long_long: returning $et_vect_long_long_saved" 2
4066 return $et_vect_long_long_saved
4067 }
4068
4069
4070 # Return 1 if the target plus current options does not support a vector
4071 # max instruction on "int", 0 otherwise.
4072 #
4073 # This won't change for different subtargets so cache the result.
4074
4075 proc check_effective_target_vect_no_int_min_max { } {
4076 global et_vect_no_int_min_max_saved
4077
4078 if [info exists et_vect_no_int_min_max_saved] {
4079 verbose "check_effective_target_vect_no_int_min_max: using cached result" 2
4080 } else {
4081 set et_vect_no_int_min_max_saved 0
4082 if { [istarget sparc*-*-*]
4083 || [istarget spu-*-*]
4084 || [istarget alpha*-*-*]
4085 || ([istarget mips*-*-*]
4086 && [check_effective_target_mips_loongson]) } {
4087 set et_vect_no_int_min_max_saved 1
4088 }
4089 }
4090 verbose "check_effective_target_vect_no_int_min_max: returning $et_vect_no_int_min_max_saved" 2
4091 return $et_vect_no_int_min_max_saved
4092 }
4093
4094 # Return 1 if the target plus current options does not support a vector
4095 # add instruction on "int", 0 otherwise.
4096 #
4097 # This won't change for different subtargets so cache the result.
4098
4099 proc check_effective_target_vect_no_int_add { } {
4100 global et_vect_no_int_add_saved
4101
4102 if [info exists et_vect_no_int_add_saved] {
4103 verbose "check_effective_target_vect_no_int_add: using cached result" 2
4104 } else {
4105 set et_vect_no_int_add_saved 0
4106 # Alpha only supports vector add on V8QI and V4HI.
4107 if { [istarget alpha*-*-*] } {
4108 set et_vect_no_int_add_saved 1
4109 }
4110 }
4111 verbose "check_effective_target_vect_no_int_add: returning $et_vect_no_int_add_saved" 2
4112 return $et_vect_no_int_add_saved
4113 }
4114
4115 # Return 1 if the target plus current options does not support vector
4116 # bitwise instructions, 0 otherwise.
4117 #
4118 # This won't change for different subtargets so cache the result.
4119
4120 proc check_effective_target_vect_no_bitwise { } {
4121 global et_vect_no_bitwise_saved
4122
4123 if [info exists et_vect_no_bitwise_saved] {
4124 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
4125 } else {
4126 set et_vect_no_bitwise_saved 0
4127 }
4128 verbose "check_effective_target_vect_no_bitwise: returning $et_vect_no_bitwise_saved" 2
4129 return $et_vect_no_bitwise_saved
4130 }
4131
4132 # Return 1 if the target plus current options supports vector permutation,
4133 # 0 otherwise.
4134 #
4135 # This won't change for different subtargets so cache the result.
4136
4137 proc check_effective_target_vect_perm { } {
4138 global et_vect_perm
4139
4140 if [info exists et_vect_perm_saved] {
4141 verbose "check_effective_target_vect_perm: using cached result" 2
4142 } else {
4143 set et_vect_perm_saved 0
4144 if { [is-effective-target arm_neon_ok]
4145 || [istarget aarch64*-*-*]
4146 || [istarget powerpc*-*-*]
4147 || [istarget spu-*-*]
4148 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4149 || ([istarget mips*-*-*]
4150 && [check_effective_target_mpaired_single]) } {
4151 set et_vect_perm_saved 1
4152 }
4153 }
4154 verbose "check_effective_target_vect_perm: returning $et_vect_perm_saved" 2
4155 return $et_vect_perm_saved
4156 }
4157
4158 # Return 1 if the target plus current options supports vector permutation
4159 # on byte-sized elements, 0 otherwise.
4160 #
4161 # This won't change for different subtargets so cache the result.
4162
4163 proc check_effective_target_vect_perm_byte { } {
4164 global et_vect_perm_byte
4165
4166 if [info exists et_vect_perm_byte_saved] {
4167 verbose "check_effective_target_vect_perm_byte: using cached result" 2
4168 } else {
4169 set et_vect_perm_byte_saved 0
4170 if { ([is-effective-target arm_neon_ok]
4171 && [is-effective-target arm_little_endian])
4172 || ([istarget aarch64*-*-*]
4173 && [is-effective-target aarch64_little_endian])
4174 || [istarget powerpc*-*-*]
4175 || [istarget spu-*-*] } {
4176 set et_vect_perm_byte_saved 1
4177 }
4178 }
4179 verbose "check_effective_target_vect_perm_byte: returning $et_vect_perm_byte_saved" 2
4180 return $et_vect_perm_byte_saved
4181 }
4182
4183 # Return 1 if the target plus current options supports vector permutation
4184 # on short-sized elements, 0 otherwise.
4185 #
4186 # This won't change for different subtargets so cache the result.
4187
4188 proc check_effective_target_vect_perm_short { } {
4189 global et_vect_perm_short
4190
4191 if [info exists et_vect_perm_short_saved] {
4192 verbose "check_effective_target_vect_perm_short: using cached result" 2
4193 } else {
4194 set et_vect_perm_short_saved 0
4195 if { ([is-effective-target arm_neon_ok]
4196 && [is-effective-target arm_little_endian])
4197 || ([istarget aarch64*-*-*]
4198 && [is-effective-target aarch64_little_endian])
4199 || [istarget powerpc*-*-*]
4200 || [istarget spu-*-*] } {
4201 set et_vect_perm_short_saved 1
4202 }
4203 }
4204 verbose "check_effective_target_vect_perm_short: returning $et_vect_perm_short_saved" 2
4205 return $et_vect_perm_short_saved
4206 }
4207
4208 # Return 1 if the target plus current options supports a vector
4209 # widening summation of *short* args into *int* result, 0 otherwise.
4210 #
4211 # This won't change for different subtargets so cache the result.
4212
4213 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
4214 global et_vect_widen_sum_hi_to_si_pattern
4215
4216 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved] {
4217 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: using cached result" 2
4218 } else {
4219 set et_vect_widen_sum_hi_to_si_pattern_saved 0
4220 if { [istarget powerpc*-*-*]
4221 || [istarget aarch64*-*-*]
4222 || [istarget ia64-*-*] } {
4223 set et_vect_widen_sum_hi_to_si_pattern_saved 1
4224 }
4225 }
4226 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: returning $et_vect_widen_sum_hi_to_si_pattern_saved" 2
4227 return $et_vect_widen_sum_hi_to_si_pattern_saved
4228 }
4229
4230 # Return 1 if the target plus current options supports a vector
4231 # widening summation of *short* args into *int* result, 0 otherwise.
4232 # A target can also support this widening summation if it can support
4233 # promotion (unpacking) from shorts to ints.
4234 #
4235 # This won't change for different subtargets so cache the result.
4236
4237 proc check_effective_target_vect_widen_sum_hi_to_si { } {
4238 global et_vect_widen_sum_hi_to_si
4239
4240 if [info exists et_vect_widen_sum_hi_to_si_saved] {
4241 verbose "check_effective_target_vect_widen_sum_hi_to_si: using cached result" 2
4242 } else {
4243 set et_vect_widen_sum_hi_to_si_saved [check_effective_target_vect_unpack]
4244 if { [istarget powerpc*-*-*]
4245 || [istarget ia64-*-*] } {
4246 set et_vect_widen_sum_hi_to_si_saved 1
4247 }
4248 }
4249 verbose "check_effective_target_vect_widen_sum_hi_to_si: returning $et_vect_widen_sum_hi_to_si_saved" 2
4250 return $et_vect_widen_sum_hi_to_si_saved
4251 }
4252
4253 # Return 1 if the target plus current options supports a vector
4254 # widening summation of *char* args into *short* result, 0 otherwise.
4255 # A target can also support this widening summation if it can support
4256 # promotion (unpacking) from chars to shorts.
4257 #
4258 # This won't change for different subtargets so cache the result.
4259
4260 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
4261 global et_vect_widen_sum_qi_to_hi
4262
4263 if [info exists et_vect_widen_sum_qi_to_hi_saved] {
4264 verbose "check_effective_target_vect_widen_sum_qi_to_hi: using cached result" 2
4265 } else {
4266 set et_vect_widen_sum_qi_to_hi_saved 0
4267 if { [check_effective_target_vect_unpack]
4268 || [check_effective_target_arm_neon_ok]
4269 || [istarget ia64-*-*] } {
4270 set et_vect_widen_sum_qi_to_hi_saved 1
4271 }
4272 }
4273 verbose "check_effective_target_vect_widen_sum_qi_to_hi: returning $et_vect_widen_sum_qi_to_hi_saved" 2
4274 return $et_vect_widen_sum_qi_to_hi_saved
4275 }
4276
4277 # Return 1 if the target plus current options supports a vector
4278 # widening summation of *char* args into *int* result, 0 otherwise.
4279 #
4280 # This won't change for different subtargets so cache the result.
4281
4282 proc check_effective_target_vect_widen_sum_qi_to_si { } {
4283 global et_vect_widen_sum_qi_to_si
4284
4285 if [info exists et_vect_widen_sum_qi_to_si_saved] {
4286 verbose "check_effective_target_vect_widen_sum_qi_to_si: using cached result" 2
4287 } else {
4288 set et_vect_widen_sum_qi_to_si_saved 0
4289 if { [istarget powerpc*-*-*] } {
4290 set et_vect_widen_sum_qi_to_si_saved 1
4291 }
4292 }
4293 verbose "check_effective_target_vect_widen_sum_qi_to_si: returning $et_vect_widen_sum_qi_to_si_saved" 2
4294 return $et_vect_widen_sum_qi_to_si_saved
4295 }
4296
4297 # Return 1 if the target plus current options supports a vector
4298 # widening multiplication of *char* args into *short* result, 0 otherwise.
4299 # A target can also support this widening multplication if it can support
4300 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
4301 # multiplication of shorts).
4302 #
4303 # This won't change for different subtargets so cache the result.
4304
4305
4306 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
4307 global et_vect_widen_mult_qi_to_hi
4308
4309 if [info exists et_vect_widen_mult_qi_to_hi_saved] {
4310 verbose "check_effective_target_vect_widen_mult_qi_to_hi: using cached result" 2
4311 } else {
4312 if { [check_effective_target_vect_unpack]
4313 && [check_effective_target_vect_short_mult] } {
4314 set et_vect_widen_mult_qi_to_hi_saved 1
4315 } else {
4316 set et_vect_widen_mult_qi_to_hi_saved 0
4317 }
4318 if { [istarget powerpc*-*-*]
4319 || [istarget aarch64*-*-*]
4320 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4321 set et_vect_widen_mult_qi_to_hi_saved 1
4322 }
4323 }
4324 verbose "check_effective_target_vect_widen_mult_qi_to_hi: returning $et_vect_widen_mult_qi_to_hi_saved" 2
4325 return $et_vect_widen_mult_qi_to_hi_saved
4326 }
4327
4328 # Return 1 if the target plus current options supports a vector
4329 # widening multiplication of *short* args into *int* result, 0 otherwise.
4330 # A target can also support this widening multplication if it can support
4331 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
4332 # multiplication of ints).
4333 #
4334 # This won't change for different subtargets so cache the result.
4335
4336
4337 proc check_effective_target_vect_widen_mult_hi_to_si { } {
4338 global et_vect_widen_mult_hi_to_si
4339
4340 if [info exists et_vect_widen_mult_hi_to_si_saved] {
4341 verbose "check_effective_target_vect_widen_mult_hi_to_si: using cached result" 2
4342 } else {
4343 if { [check_effective_target_vect_unpack]
4344 && [check_effective_target_vect_int_mult] } {
4345 set et_vect_widen_mult_hi_to_si_saved 1
4346 } else {
4347 set et_vect_widen_mult_hi_to_si_saved 0
4348 }
4349 if { [istarget powerpc*-*-*]
4350 || [istarget spu-*-*]
4351 || [istarget ia64-*-*]
4352 || [istarget aarch64*-*-*]
4353 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4354 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4355 set et_vect_widen_mult_hi_to_si_saved 1
4356 }
4357 }
4358 verbose "check_effective_target_vect_widen_mult_hi_to_si: returning $et_vect_widen_mult_hi_to_si_saved" 2
4359 return $et_vect_widen_mult_hi_to_si_saved
4360 }
4361
4362 # Return 1 if the target plus current options supports a vector
4363 # widening multiplication of *char* args into *short* result, 0 otherwise.
4364 #
4365 # This won't change for different subtargets so cache the result.
4366
4367 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
4368 global et_vect_widen_mult_qi_to_hi_pattern
4369
4370 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved] {
4371 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: using cached result" 2
4372 } else {
4373 set et_vect_widen_mult_qi_to_hi_pattern_saved 0
4374 if { [istarget powerpc*-*-*]
4375 || ([istarget arm*-*-*]
4376 && [check_effective_target_arm_neon_ok]
4377 && [check_effective_target_arm_little_endian]) } {
4378 set et_vect_widen_mult_qi_to_hi_pattern_saved 1
4379 }
4380 }
4381 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: returning $et_vect_widen_mult_qi_to_hi_pattern_saved" 2
4382 return $et_vect_widen_mult_qi_to_hi_pattern_saved
4383 }
4384
4385 # Return 1 if the target plus current options supports a vector
4386 # widening multiplication of *short* args into *int* result, 0 otherwise.
4387 #
4388 # This won't change for different subtargets so cache the result.
4389
4390 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
4391 global et_vect_widen_mult_hi_to_si_pattern
4392
4393 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved] {
4394 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: using cached result" 2
4395 } else {
4396 set et_vect_widen_mult_hi_to_si_pattern_saved 0
4397 if { [istarget powerpc*-*-*]
4398 || [istarget spu-*-*]
4399 || [istarget ia64-*-*]
4400 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4401 || ([istarget arm*-*-*]
4402 && [check_effective_target_arm_neon_ok]
4403 && [check_effective_target_arm_little_endian]) } {
4404 set et_vect_widen_mult_hi_to_si_pattern_saved 1
4405 }
4406 }
4407 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: returning $et_vect_widen_mult_hi_to_si_pattern_saved" 2
4408 return $et_vect_widen_mult_hi_to_si_pattern_saved
4409 }
4410
4411 # Return 1 if the target plus current options supports a vector
4412 # widening multiplication of *int* args into *long* result, 0 otherwise.
4413 #
4414 # This won't change for different subtargets so cache the result.
4415
4416 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
4417 global et_vect_widen_mult_si_to_di_pattern
4418
4419 if [info exists et_vect_widen_mult_si_to_di_pattern_saved] {
4420 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: using cached result" 2
4421 } else {
4422 set et_vect_widen_mult_si_to_di_pattern_saved 0
4423 if {[istarget ia64-*-*]
4424 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4425 set et_vect_widen_mult_si_to_di_pattern_saved 1
4426 }
4427 }
4428 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: returning $et_vect_widen_mult_si_to_di_pattern_saved" 2
4429 return $et_vect_widen_mult_si_to_di_pattern_saved
4430 }
4431
4432 # Return 1 if the target plus current options supports a vector
4433 # widening shift, 0 otherwise.
4434 #
4435 # This won't change for different subtargets so cache the result.
4436
4437 proc check_effective_target_vect_widen_shift { } {
4438 global et_vect_widen_shift_saved
4439
4440 if [info exists et_vect_shift_saved] {
4441 verbose "check_effective_target_vect_widen_shift: using cached result" 2
4442 } else {
4443 set et_vect_widen_shift_saved 0
4444 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4445 set et_vect_widen_shift_saved 1
4446 }
4447 }
4448 verbose "check_effective_target_vect_widen_shift: returning $et_vect_widen_shift_saved" 2
4449 return $et_vect_widen_shift_saved
4450 }
4451
4452 # Return 1 if the target plus current options supports a vector
4453 # dot-product of signed chars, 0 otherwise.
4454 #
4455 # This won't change for different subtargets so cache the result.
4456
4457 proc check_effective_target_vect_sdot_qi { } {
4458 global et_vect_sdot_qi
4459
4460 if [info exists et_vect_sdot_qi_saved] {
4461 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
4462 } else {
4463 set et_vect_sdot_qi_saved 0
4464 if { [istarget ia64-*-*] } {
4465 set et_vect_udot_qi_saved 1
4466 }
4467 }
4468 verbose "check_effective_target_vect_sdot_qi: returning $et_vect_sdot_qi_saved" 2
4469 return $et_vect_sdot_qi_saved
4470 }
4471
4472 # Return 1 if the target plus current options supports a vector
4473 # dot-product of unsigned chars, 0 otherwise.
4474 #
4475 # This won't change for different subtargets so cache the result.
4476
4477 proc check_effective_target_vect_udot_qi { } {
4478 global et_vect_udot_qi
4479
4480 if [info exists et_vect_udot_qi_saved] {
4481 verbose "check_effective_target_vect_udot_qi: using cached result" 2
4482 } else {
4483 set et_vect_udot_qi_saved 0
4484 if { [istarget powerpc*-*-*]
4485 || [istarget ia64-*-*] } {
4486 set et_vect_udot_qi_saved 1
4487 }
4488 }
4489 verbose "check_effective_target_vect_udot_qi: returning $et_vect_udot_qi_saved" 2
4490 return $et_vect_udot_qi_saved
4491 }
4492
4493 # Return 1 if the target plus current options supports a vector
4494 # dot-product of signed shorts, 0 otherwise.
4495 #
4496 # This won't change for different subtargets so cache the result.
4497
4498 proc check_effective_target_vect_sdot_hi { } {
4499 global et_vect_sdot_hi
4500
4501 if [info exists et_vect_sdot_hi_saved] {
4502 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
4503 } else {
4504 set et_vect_sdot_hi_saved 0
4505 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4506 || [istarget ia64-*-*]
4507 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4508 set et_vect_sdot_hi_saved 1
4509 }
4510 }
4511 verbose "check_effective_target_vect_sdot_hi: returning $et_vect_sdot_hi_saved" 2
4512 return $et_vect_sdot_hi_saved
4513 }
4514
4515 # Return 1 if the target plus current options supports a vector
4516 # dot-product of unsigned shorts, 0 otherwise.
4517 #
4518 # This won't change for different subtargets so cache the result.
4519
4520 proc check_effective_target_vect_udot_hi { } {
4521 global et_vect_udot_hi
4522
4523 if [info exists et_vect_udot_hi_saved] {
4524 verbose "check_effective_target_vect_udot_hi: using cached result" 2
4525 } else {
4526 set et_vect_udot_hi_saved 0
4527 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) } {
4528 set et_vect_udot_hi_saved 1
4529 }
4530 }
4531 verbose "check_effective_target_vect_udot_hi: returning $et_vect_udot_hi_saved" 2
4532 return $et_vect_udot_hi_saved
4533 }
4534
4535 # Return 1 if the target plus current options supports a vector
4536 # sad operation of unsigned chars, 0 otherwise.
4537 #
4538 # This won't change for different subtargets so cache the result.
4539
4540 proc check_effective_target_vect_usad_char { } {
4541 global et_vect_usad_char
4542
4543 if [info exists et_vect_usad_char_saved] {
4544 verbose "check_effective_target_vect_usad_char: using cached result" 2
4545 } else {
4546 set et_vect_usad_char_saved 0
4547 if { ([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
4548 set et_vect_usad_char_saved 1
4549 }
4550 }
4551 verbose "check_effective_target_vect_usad_char: returning $et_vect_usad_char_saved" 2
4552 return $et_vect_usad_char_saved
4553 }
4554
4555 # Return 1 if the target plus current options supports a vector
4556 # demotion (packing) of shorts (to chars) and ints (to shorts)
4557 # using modulo arithmetic, 0 otherwise.
4558 #
4559 # This won't change for different subtargets so cache the result.
4560
4561 proc check_effective_target_vect_pack_trunc { } {
4562 global et_vect_pack_trunc
4563
4564 if [info exists et_vect_pack_trunc_saved] {
4565 verbose "check_effective_target_vect_pack_trunc: using cached result" 2
4566 } else {
4567 set et_vect_pack_trunc_saved 0
4568 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4569 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4570 || [istarget aarch64*-*-*]
4571 || [istarget spu-*-*]
4572 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4573 && [check_effective_target_arm_little_endian]) } {
4574 set et_vect_pack_trunc_saved 1
4575 }
4576 }
4577 verbose "check_effective_target_vect_pack_trunc: returning $et_vect_pack_trunc_saved" 2
4578 return $et_vect_pack_trunc_saved
4579 }
4580
4581 # Return 1 if the target plus current options supports a vector
4582 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
4583 #
4584 # This won't change for different subtargets so cache the result.
4585
4586 proc check_effective_target_vect_unpack { } {
4587 global et_vect_unpack
4588
4589 if [info exists et_vect_unpack_saved] {
4590 verbose "check_effective_target_vect_unpack: using cached result" 2
4591 } else {
4592 set et_vect_unpack_saved 0
4593 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
4594 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4595 || [istarget spu-*-*]
4596 || [istarget ia64-*-*]
4597 || [istarget aarch64*-*-*]
4598 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4599 && [check_effective_target_arm_little_endian]) } {
4600 set et_vect_unpack_saved 1
4601 }
4602 }
4603 verbose "check_effective_target_vect_unpack: returning $et_vect_unpack_saved" 2
4604 return $et_vect_unpack_saved
4605 }
4606
4607 # Return 1 if the target plus current options does not guarantee
4608 # that its STACK_BOUNDARY is >= the reguired vector alignment.
4609 #
4610 # This won't change for different subtargets so cache the result.
4611
4612 proc check_effective_target_unaligned_stack { } {
4613 global et_unaligned_stack_saved
4614
4615 if [info exists et_unaligned_stack_saved] {
4616 verbose "check_effective_target_unaligned_stack: using cached result" 2
4617 } else {
4618 set et_unaligned_stack_saved 0
4619 }
4620 verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
4621 return $et_unaligned_stack_saved
4622 }
4623
4624 # Return 1 if the target plus current options does not support a vector
4625 # alignment mechanism, 0 otherwise.
4626 #
4627 # This won't change for different subtargets so cache the result.
4628
4629 proc check_effective_target_vect_no_align { } {
4630 global et_vect_no_align_saved
4631
4632 if [info exists et_vect_no_align_saved] {
4633 verbose "check_effective_target_vect_no_align: using cached result" 2
4634 } else {
4635 set et_vect_no_align_saved 0
4636 if { [istarget mipsisa64*-*-*]
4637 || [istarget mips-sde-elf]
4638 || [istarget sparc*-*-*]
4639 || [istarget ia64-*-*]
4640 || [check_effective_target_arm_vect_no_misalign]
4641 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
4642 || ([istarget mips*-*-*]
4643 && [check_effective_target_mips_loongson]) } {
4644 set et_vect_no_align_saved 1
4645 }
4646 }
4647 verbose "check_effective_target_vect_no_align: returning $et_vect_no_align_saved" 2
4648 return $et_vect_no_align_saved
4649 }
4650
4651 # Return 1 if the target supports a vector misalign access, 0 otherwise.
4652 #
4653 # This won't change for different subtargets so cache the result.
4654
4655 proc check_effective_target_vect_hw_misalign { } {
4656 global et_vect_hw_misalign_saved
4657
4658 if [info exists et_vect_hw_misalign_saved] {
4659 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
4660 } else {
4661 set et_vect_hw_misalign_saved 0
4662 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4663 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
4664 || [istarget aarch64*-*-*] } {
4665 set et_vect_hw_misalign_saved 1
4666 }
4667 }
4668 verbose "check_effective_target_vect_hw_misalign: returning $et_vect_hw_misalign_saved" 2
4669 return $et_vect_hw_misalign_saved
4670 }
4671
4672
4673 # Return 1 if arrays are aligned to the vector alignment
4674 # boundary, 0 otherwise.
4675 #
4676 # This won't change for different subtargets so cache the result.
4677
4678 proc check_effective_target_vect_aligned_arrays { } {
4679 global et_vect_aligned_arrays
4680
4681 if [info exists et_vect_aligned_arrays_saved] {
4682 verbose "check_effective_target_vect_aligned_arrays: using cached result" 2
4683 } else {
4684 set et_vect_aligned_arrays_saved 0
4685 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
4686 if { ([is-effective-target lp64]
4687 && ( ![check_avx_available]
4688 || [check_prefer_avx128])) } {
4689 set et_vect_aligned_arrays_saved 1
4690 }
4691 }
4692 if [istarget spu-*-*] {
4693 set et_vect_aligned_arrays_saved 1
4694 }
4695 }
4696 verbose "check_effective_target_vect_aligned_arrays: returning $et_vect_aligned_arrays_saved" 2
4697 return $et_vect_aligned_arrays_saved
4698 }
4699
4700 # Return 1 if types of size 32 bit or less are naturally aligned
4701 # (aligned to their type-size), 0 otherwise.
4702 #
4703 # This won't change for different subtargets so cache the result.
4704
4705 proc check_effective_target_natural_alignment_32 { } {
4706 global et_natural_alignment_32
4707
4708 if [info exists et_natural_alignment_32_saved] {
4709 verbose "check_effective_target_natural_alignment_32: using cached result" 2
4710 } else {
4711 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
4712 set et_natural_alignment_32_saved 1
4713 if { ([istarget *-*-darwin*] && [is-effective-target lp64]) } {
4714 set et_natural_alignment_32_saved 0
4715 }
4716 }
4717 verbose "check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
4718 return $et_natural_alignment_32_saved
4719 }
4720
4721 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
4722 # type-size), 0 otherwise.
4723 #
4724 # This won't change for different subtargets so cache the result.
4725
4726 proc check_effective_target_natural_alignment_64 { } {
4727 global et_natural_alignment_64
4728
4729 if [info exists et_natural_alignment_64_saved] {
4730 verbose "check_effective_target_natural_alignment_64: using cached result" 2
4731 } else {
4732 set et_natural_alignment_64_saved 0
4733 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
4734 || [istarget spu-*-*] } {
4735 set et_natural_alignment_64_saved 1
4736 }
4737 }
4738 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
4739 return $et_natural_alignment_64_saved
4740 }
4741
4742 # Return 1 if all vector types are naturally aligned (aligned to their
4743 # type-size), 0 otherwise.
4744 #
4745 # This won't change for different subtargets so cache the result.
4746
4747 proc check_effective_target_vect_natural_alignment { } {
4748 global et_vect_natural_alignment
4749
4750 if [info exists et_vect_natural_alignment_saved] {
4751 verbose "check_effective_target_vect_natural_alignment: using cached result" 2
4752 } else {
4753 set et_vect_natural_alignment_saved 1
4754 if { [check_effective_target_arm_eabi]
4755 || [istarget nvptx-*-*]
4756 || [istarget s390*-*-*] } {
4757 set et_vect_natural_alignment_saved 0
4758 }
4759 }
4760 verbose "check_effective_target_vect_natural_alignment: returning $et_vect_natural_alignment_saved" 2
4761 return $et_vect_natural_alignment_saved
4762 }
4763
4764 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
4765 #
4766 # This won't change for different subtargets so cache the result.
4767
4768 proc check_effective_target_vector_alignment_reachable { } {
4769 global et_vector_alignment_reachable
4770
4771 if [info exists et_vector_alignment_reachable_saved] {
4772 verbose "check_effective_target_vector_alignment_reachable: using cached result" 2
4773 } else {
4774 if { [check_effective_target_vect_aligned_arrays]
4775 || [check_effective_target_natural_alignment_32] } {
4776 set et_vector_alignment_reachable_saved 1
4777 } else {
4778 set et_vector_alignment_reachable_saved 0
4779 }
4780 }
4781 verbose "check_effective_target_vector_alignment_reachable: returning $et_vector_alignment_reachable_saved" 2
4782 return $et_vector_alignment_reachable_saved
4783 }
4784
4785 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
4786 #
4787 # This won't change for different subtargets so cache the result.
4788
4789 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
4790 global et_vector_alignment_reachable_for_64bit
4791
4792 if [info exists et_vector_alignment_reachable_for_64bit_saved] {
4793 verbose "check_effective_target_vector_alignment_reachable_for_64bit: using cached result" 2
4794 } else {
4795 if { [check_effective_target_vect_aligned_arrays]
4796 || [check_effective_target_natural_alignment_64] } {
4797 set et_vector_alignment_reachable_for_64bit_saved 1
4798 } else {
4799 set et_vector_alignment_reachable_for_64bit_saved 0
4800 }
4801 }
4802 verbose "check_effective_target_vector_alignment_reachable_for_64bit: returning $et_vector_alignment_reachable_for_64bit_saved" 2
4803 return $et_vector_alignment_reachable_for_64bit_saved
4804 }
4805
4806 # Return 1 if the target only requires element alignment for vector accesses
4807
4808 proc check_effective_target_vect_element_align { } {
4809 global et_vect_element_align
4810
4811 if [info exists et_vect_element_align] {
4812 verbose "check_effective_target_vect_element_align: using cached result" 2
4813 } else {
4814 set et_vect_element_align 0
4815 if { ([istarget arm*-*-*]
4816 && ![check_effective_target_arm_vect_no_misalign])
4817 || [check_effective_target_vect_hw_misalign] } {
4818 set et_vect_element_align 1
4819 }
4820 }
4821
4822 verbose "check_effective_target_vect_element_align: returning $et_vect_element_align" 2
4823 return $et_vect_element_align
4824 }
4825
4826 # Return 1 if the target supports vector conditional operations, 0 otherwise.
4827
4828 proc check_effective_target_vect_condition { } {
4829 global et_vect_cond_saved
4830
4831 if [info exists et_vect_cond_saved] {
4832 verbose "check_effective_target_vect_cond: using cached result" 2
4833 } else {
4834 set et_vect_cond_saved 0
4835 if { [istarget aarch64*-*-*]
4836 || [istarget powerpc*-*-*]
4837 || [istarget ia64-*-*]
4838 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4839 || [istarget spu-*-*]
4840 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4841 set et_vect_cond_saved 1
4842 }
4843 }
4844
4845 verbose "check_effective_target_vect_cond: returning $et_vect_cond_saved" 2
4846 return $et_vect_cond_saved
4847 }
4848
4849 # Return 1 if the target supports vector conditional operations where
4850 # the comparison has different type from the lhs, 0 otherwise.
4851
4852 proc check_effective_target_vect_cond_mixed { } {
4853 global et_vect_cond_mixed_saved
4854
4855 if [info exists et_vect_cond_mixed_saved] {
4856 verbose "check_effective_target_vect_cond_mixed: using cached result" 2
4857 } else {
4858 set et_vect_cond_mixed_saved 0
4859 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4860 || [istarget powerpc*-*-*] } {
4861 set et_vect_cond_mixed_saved 1
4862 }
4863 }
4864
4865 verbose "check_effective_target_vect_cond_mixed: returning $et_vect_cond_mixed_saved" 2
4866 return $et_vect_cond_mixed_saved
4867 }
4868
4869 # Return 1 if the target supports vector char multiplication, 0 otherwise.
4870
4871 proc check_effective_target_vect_char_mult { } {
4872 global et_vect_char_mult_saved
4873
4874 if [info exists et_vect_char_mult_saved] {
4875 verbose "check_effective_target_vect_char_mult: using cached result" 2
4876 } else {
4877 set et_vect_char_mult_saved 0
4878 if { [istarget aarch64*-*-*]
4879 || [istarget ia64-*-*]
4880 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4881 || [check_effective_target_arm32]
4882 || [check_effective_target_powerpc_altivec] } {
4883 set et_vect_char_mult_saved 1
4884 }
4885 }
4886
4887 verbose "check_effective_target_vect_char_mult: returning $et_vect_char_mult_saved" 2
4888 return $et_vect_char_mult_saved
4889 }
4890
4891 # Return 1 if the target supports vector short multiplication, 0 otherwise.
4892
4893 proc check_effective_target_vect_short_mult { } {
4894 global et_vect_short_mult_saved
4895
4896 if [info exists et_vect_short_mult_saved] {
4897 verbose "check_effective_target_vect_short_mult: using cached result" 2
4898 } else {
4899 set et_vect_short_mult_saved 0
4900 if { [istarget ia64-*-*]
4901 || [istarget spu-*-*]
4902 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4903 || [istarget powerpc*-*-*]
4904 || [istarget aarch64*-*-*]
4905 || [check_effective_target_arm32]
4906 || ([istarget mips*-*-*]
4907 && [check_effective_target_mips_loongson]) } {
4908 set et_vect_short_mult_saved 1
4909 }
4910 }
4911
4912 verbose "check_effective_target_vect_short_mult: returning $et_vect_short_mult_saved" 2
4913 return $et_vect_short_mult_saved
4914 }
4915
4916 # Return 1 if the target supports vector int multiplication, 0 otherwise.
4917
4918 proc check_effective_target_vect_int_mult { } {
4919 global et_vect_int_mult_saved
4920
4921 if [info exists et_vect_int_mult_saved] {
4922 verbose "check_effective_target_vect_int_mult: using cached result" 2
4923 } else {
4924 set et_vect_int_mult_saved 0
4925 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4926 || [istarget spu-*-*]
4927 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4928 || [istarget ia64-*-*]
4929 || [istarget aarch64*-*-*]
4930 || [check_effective_target_arm32] } {
4931 set et_vect_int_mult_saved 1
4932 }
4933 }
4934
4935 verbose "check_effective_target_vect_int_mult: returning $et_vect_int_mult_saved" 2
4936 return $et_vect_int_mult_saved
4937 }
4938
4939 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
4940
4941 proc check_effective_target_vect_extract_even_odd { } {
4942 global et_vect_extract_even_odd_saved
4943
4944 if [info exists et_vect_extract_even_odd_saved] {
4945 verbose "check_effective_target_vect_extract_even_odd: using cached result" 2
4946 } else {
4947 set et_vect_extract_even_odd_saved 0
4948 if { [istarget aarch64*-*-*]
4949 || [istarget powerpc*-*-*]
4950 || [is-effective-target arm_neon_ok]
4951 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4952 || [istarget ia64-*-*]
4953 || [istarget spu-*-*]
4954 || ([istarget mips*-*-*]
4955 && [check_effective_target_mpaired_single]) } {
4956 set et_vect_extract_even_odd_saved 1
4957 }
4958 }
4959
4960 verbose "check_effective_target_vect_extract_even_odd: returning $et_vect_extract_even_odd_saved" 2
4961 return $et_vect_extract_even_odd_saved
4962 }
4963
4964 # Return 1 if the target supports vector interleaving, 0 otherwise.
4965
4966 proc check_effective_target_vect_interleave { } {
4967 global et_vect_interleave_saved
4968
4969 if [info exists et_vect_interleave_saved] {
4970 verbose "check_effective_target_vect_interleave: using cached result" 2
4971 } else {
4972 set et_vect_interleave_saved 0
4973 if { [istarget aarch64*-*-*]
4974 || [istarget powerpc*-*-*]
4975 || [is-effective-target arm_neon_ok]
4976 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4977 || [istarget ia64-*-*]
4978 || [istarget spu-*-*]
4979 || ([istarget mips*-*-*]
4980 && [check_effective_target_mpaired_single]) } {
4981 set et_vect_interleave_saved 1
4982 }
4983 }
4984
4985 verbose "check_effective_target_vect_interleave: returning $et_vect_interleave_saved" 2
4986 return $et_vect_interleave_saved
4987 }
4988
4989 foreach N {2 3 4 8} {
4990 eval [string map [list N $N] {
4991 # Return 1 if the target supports 2-vector interleaving
4992 proc check_effective_target_vect_stridedN { } {
4993 global et_vect_stridedN_saved
4994
4995 if [info exists et_vect_stridedN_saved] {
4996 verbose "check_effective_target_vect_stridedN: using cached result" 2
4997 } else {
4998 set et_vect_stridedN_saved 0
4999 if { (N & -N) == N
5000 && [check_effective_target_vect_interleave]
5001 && [check_effective_target_vect_extract_even_odd] } {
5002 set et_vect_stridedN_saved 1
5003 }
5004 if { ([istarget arm*-*-*]
5005 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
5006 set et_vect_stridedN_saved 1
5007 }
5008 }
5009
5010 verbose "check_effective_target_vect_stridedN: returning $et_vect_stridedN_saved" 2
5011 return $et_vect_stridedN_saved
5012 }
5013 }]
5014 }
5015
5016 # Return 1 if the target supports multiple vector sizes
5017
5018 proc check_effective_target_vect_multiple_sizes { } {
5019 global et_vect_multiple_sizes_saved
5020
5021 set et_vect_multiple_sizes_saved 0
5022 if { ([istarget aarch64*-*-*]
5023 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])) } {
5024 set et_vect_multiple_sizes_saved 1
5025 }
5026 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
5027 if { ([check_avx_available] && ![check_prefer_avx128]) } {
5028 set et_vect_multiple_sizes_saved 1
5029 }
5030 }
5031
5032 verbose "check_effective_target_vect_multiple_sizes: returning $et_vect_multiple_sizes_saved" 2
5033 return $et_vect_multiple_sizes_saved
5034 }
5035
5036 # Return 1 if the target supports vectors of 64 bits.
5037
5038 proc check_effective_target_vect64 { } {
5039 global et_vect64_saved
5040
5041 if [info exists et_vect64_saved] {
5042 verbose "check_effective_target_vect64: using cached result" 2
5043 } else {
5044 set et_vect64_saved 0
5045 if { ([istarget arm*-*-*]
5046 && [check_effective_target_arm_neon_ok]
5047 && [check_effective_target_arm_little_endian])
5048 || [istarget aarch64*-*-*]
5049 || [istarget sparc*-*-*] } {
5050 set et_vect64_saved 1
5051 }
5052 }
5053
5054 verbose "check_effective_target_vect64: returning $et_vect64_saved" 2
5055 return $et_vect64_saved
5056 }
5057
5058 # Return 1 if the target supports vector copysignf calls.
5059
5060 proc check_effective_target_vect_call_copysignf { } {
5061 global et_vect_call_copysignf_saved
5062
5063 if [info exists et_vect_call_copysignf_saved] {
5064 verbose "check_effective_target_vect_call_copysignf: using cached result" 2
5065 } else {
5066 set et_vect_call_copysignf_saved 0
5067 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5068 || [istarget powerpc*-*-*] } {
5069 set et_vect_call_copysignf_saved 1
5070 }
5071 }
5072
5073 verbose "check_effective_target_vect_call_copysignf: returning $et_vect_call_copysignf_saved" 2
5074 return $et_vect_call_copysignf_saved
5075 }
5076
5077 # Return 1 if the target supports hardware square root instructions.
5078
5079 proc check_effective_target_sqrt_insn { } {
5080 global et_sqrt_insn_saved
5081
5082 if [info exists et_sqrt_insn_saved] {
5083 verbose "check_effective_target_hw_sqrt: using cached result" 2
5084 } else {
5085 set et_sqrt_insn_saved 0
5086 if { [istarget x86_64-*-*]
5087 || [istarget powerpc*-*-*]
5088 || [istarget aarch64*-*-*]
5089 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok]) } {
5090 set et_sqrt_insn_saved 1
5091 }
5092 }
5093
5094 verbose "check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2
5095 return $et_sqrt_insn_saved
5096 }
5097
5098 # Return 1 if the target supports vector sqrtf calls.
5099
5100 proc check_effective_target_vect_call_sqrtf { } {
5101 global et_vect_call_sqrtf_saved
5102
5103 if [info exists et_vect_call_sqrtf_saved] {
5104 verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
5105 } else {
5106 set et_vect_call_sqrtf_saved 0
5107 if { [istarget aarch64*-*-*]
5108 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5109 || ([istarget powerpc*-*-*] && [check_vsx_hw_available]) } {
5110 set et_vect_call_sqrtf_saved 1
5111 }
5112 }
5113
5114 verbose "check_effective_target_vect_call_sqrtf: returning $et_vect_call_sqrtf_saved" 2
5115 return $et_vect_call_sqrtf_saved
5116 }
5117
5118 # Return 1 if the target supports vector lrint calls.
5119
5120 proc check_effective_target_vect_call_lrint { } {
5121 set et_vect_call_lrint 0
5122 if { ([istarget i?86-*-*] || [istarget x86_64-*-*])
5123 && [check_effective_target_ilp32] } {
5124 set et_vect_call_lrint 1
5125 }
5126
5127 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
5128 return $et_vect_call_lrint
5129 }
5130
5131 # Return 1 if the target supports vector btrunc calls.
5132
5133 proc check_effective_target_vect_call_btrunc { } {
5134 global et_vect_call_btrunc_saved
5135
5136 if [info exists et_vect_call_btrunc_saved] {
5137 verbose "check_effective_target_vect_call_btrunc: using cached result" 2
5138 } else {
5139 set et_vect_call_btrunc_saved 0
5140 if { [istarget aarch64*-*-*] } {
5141 set et_vect_call_btrunc_saved 1
5142 }
5143 }
5144
5145 verbose "check_effective_target_vect_call_btrunc: returning $et_vect_call_btrunc_saved" 2
5146 return $et_vect_call_btrunc_saved
5147 }
5148
5149 # Return 1 if the target supports vector btruncf calls.
5150
5151 proc check_effective_target_vect_call_btruncf { } {
5152 global et_vect_call_btruncf_saved
5153
5154 if [info exists et_vect_call_btruncf_saved] {
5155 verbose "check_effective_target_vect_call_btruncf: using cached result" 2
5156 } else {
5157 set et_vect_call_btruncf_saved 0
5158 if { [istarget aarch64*-*-*] } {
5159 set et_vect_call_btruncf_saved 1
5160 }
5161 }
5162
5163 verbose "check_effective_target_vect_call_btruncf: returning $et_vect_call_btruncf_saved" 2
5164 return $et_vect_call_btruncf_saved
5165 }
5166
5167 # Return 1 if the target supports vector ceil calls.
5168
5169 proc check_effective_target_vect_call_ceil { } {
5170 global et_vect_call_ceil_saved
5171
5172 if [info exists et_vect_call_ceil_saved] {
5173 verbose "check_effective_target_vect_call_ceil: using cached result" 2
5174 } else {
5175 set et_vect_call_ceil_saved 0
5176 if { [istarget aarch64*-*-*] } {
5177 set et_vect_call_ceil_saved 1
5178 }
5179 }
5180
5181 verbose "check_effective_target_vect_call_ceil: returning $et_vect_call_ceil_saved" 2
5182 return $et_vect_call_ceil_saved
5183 }
5184
5185 # Return 1 if the target supports vector ceilf calls.
5186
5187 proc check_effective_target_vect_call_ceilf { } {
5188 global et_vect_call_ceilf_saved
5189
5190 if [info exists et_vect_call_ceilf_saved] {
5191 verbose "check_effective_target_vect_call_ceilf: using cached result" 2
5192 } else {
5193 set et_vect_call_ceilf_saved 0
5194 if { [istarget aarch64*-*-*] } {
5195 set et_vect_call_ceilf_saved 1
5196 }
5197 }
5198
5199 verbose "check_effective_target_vect_call_ceilf: returning $et_vect_call_ceilf_saved" 2
5200 return $et_vect_call_ceilf_saved
5201 }
5202
5203 # Return 1 if the target supports vector floor calls.
5204
5205 proc check_effective_target_vect_call_floor { } {
5206 global et_vect_call_floor_saved
5207
5208 if [info exists et_vect_call_floor_saved] {
5209 verbose "check_effective_target_vect_call_floor: using cached result" 2
5210 } else {
5211 set et_vect_call_floor_saved 0
5212 if { [istarget aarch64*-*-*] } {
5213 set et_vect_call_floor_saved 1
5214 }
5215 }
5216
5217 verbose "check_effective_target_vect_call_floor: returning $et_vect_call_floor_saved" 2
5218 return $et_vect_call_floor_saved
5219 }
5220
5221 # Return 1 if the target supports vector floorf calls.
5222
5223 proc check_effective_target_vect_call_floorf { } {
5224 global et_vect_call_floorf_saved
5225
5226 if [info exists et_vect_call_floorf_saved] {
5227 verbose "check_effective_target_vect_call_floorf: using cached result" 2
5228 } else {
5229 set et_vect_call_floorf_saved 0
5230 if { [istarget aarch64*-*-*] } {
5231 set et_vect_call_floorf_saved 1
5232 }
5233 }
5234
5235 verbose "check_effective_target_vect_call_floorf: returning $et_vect_call_floorf_saved" 2
5236 return $et_vect_call_floorf_saved
5237 }
5238
5239 # Return 1 if the target supports vector lceil calls.
5240
5241 proc check_effective_target_vect_call_lceil { } {
5242 global et_vect_call_lceil_saved
5243
5244 if [info exists et_vect_call_lceil_saved] {
5245 verbose "check_effective_target_vect_call_lceil: using cached result" 2
5246 } else {
5247 set et_vect_call_lceil_saved 0
5248 if { [istarget aarch64*-*-*] } {
5249 set et_vect_call_lceil_saved 1
5250 }
5251 }
5252
5253 verbose "check_effective_target_vect_call_lceil: returning $et_vect_call_lceil_saved" 2
5254 return $et_vect_call_lceil_saved
5255 }
5256
5257 # Return 1 if the target supports vector lfloor calls.
5258
5259 proc check_effective_target_vect_call_lfloor { } {
5260 global et_vect_call_lfloor_saved
5261
5262 if [info exists et_vect_call_lfloor_saved] {
5263 verbose "check_effective_target_vect_call_lfloor: using cached result" 2
5264 } else {
5265 set et_vect_call_lfloor_saved 0
5266 if { [istarget aarch64*-*-*] } {
5267 set et_vect_call_lfloor_saved 1
5268 }
5269 }
5270
5271 verbose "check_effective_target_vect_call_lfloor: returning $et_vect_call_lfloor_saved" 2
5272 return $et_vect_call_lfloor_saved
5273 }
5274
5275 # Return 1 if the target supports vector nearbyint calls.
5276
5277 proc check_effective_target_vect_call_nearbyint { } {
5278 global et_vect_call_nearbyint_saved
5279
5280 if [info exists et_vect_call_nearbyint_saved] {
5281 verbose "check_effective_target_vect_call_nearbyint: using cached result" 2
5282 } else {
5283 set et_vect_call_nearbyint_saved 0
5284 if { [istarget aarch64*-*-*] } {
5285 set et_vect_call_nearbyint_saved 1
5286 }
5287 }
5288
5289 verbose "check_effective_target_vect_call_nearbyint: returning $et_vect_call_nearbyint_saved" 2
5290 return $et_vect_call_nearbyint_saved
5291 }
5292
5293 # Return 1 if the target supports vector nearbyintf calls.
5294
5295 proc check_effective_target_vect_call_nearbyintf { } {
5296 global et_vect_call_nearbyintf_saved
5297
5298 if [info exists et_vect_call_nearbyintf_saved] {
5299 verbose "check_effective_target_vect_call_nearbyintf: using cached result" 2
5300 } else {
5301 set et_vect_call_nearbyintf_saved 0
5302 if { [istarget aarch64*-*-*] } {
5303 set et_vect_call_nearbyintf_saved 1
5304 }
5305 }
5306
5307 verbose "check_effective_target_vect_call_nearbyintf: returning $et_vect_call_nearbyintf_saved" 2
5308 return $et_vect_call_nearbyintf_saved
5309 }
5310
5311 # Return 1 if the target supports vector round calls.
5312
5313 proc check_effective_target_vect_call_round { } {
5314 global et_vect_call_round_saved
5315
5316 if [info exists et_vect_call_round_saved] {
5317 verbose "check_effective_target_vect_call_round: using cached result" 2
5318 } else {
5319 set et_vect_call_round_saved 0
5320 if { [istarget aarch64*-*-*] } {
5321 set et_vect_call_round_saved 1
5322 }
5323 }
5324
5325 verbose "check_effective_target_vect_call_round: returning $et_vect_call_round_saved" 2
5326 return $et_vect_call_round_saved
5327 }
5328
5329 # Return 1 if the target supports vector roundf calls.
5330
5331 proc check_effective_target_vect_call_roundf { } {
5332 global et_vect_call_roundf_saved
5333
5334 if [info exists et_vect_call_roundf_saved] {
5335 verbose "check_effective_target_vect_call_roundf: using cached result" 2
5336 } else {
5337 set et_vect_call_roundf_saved 0
5338 if { [istarget aarch64*-*-*] } {
5339 set et_vect_call_roundf_saved 1
5340 }
5341 }
5342
5343 verbose "check_effective_target_vect_call_roundf: returning $et_vect_call_roundf_saved" 2
5344 return $et_vect_call_roundf_saved
5345 }
5346
5347 # Return 1 if the target supports section-anchors
5348
5349 proc check_effective_target_section_anchors { } {
5350 global et_section_anchors_saved
5351
5352 if [info exists et_section_anchors_saved] {
5353 verbose "check_effective_target_section_anchors: using cached result" 2
5354 } else {
5355 set et_section_anchors_saved 0
5356 if { [istarget powerpc*-*-*]
5357 || [istarget arm*-*-*] } {
5358 set et_section_anchors_saved 1
5359 }
5360 }
5361
5362 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
5363 return $et_section_anchors_saved
5364 }
5365
5366 # Return 1 if the target supports atomic operations on "int_128" values.
5367
5368 proc check_effective_target_sync_int_128 { } {
5369 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
5370 && ![is-effective-target ia32] } {
5371 return 1
5372 } elseif { [istarget spu-*-*] } {
5373 return 1
5374 } else {
5375 return 0
5376 }
5377 }
5378
5379 # Return 1 if the target supports atomic operations on "int_128" values
5380 # and can execute them.
5381
5382 proc check_effective_target_sync_int_128_runtime { } {
5383 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
5384 && ![is-effective-target ia32] } {
5385 return [check_cached_effective_target sync_int_128_available {
5386 check_runtime_nocache sync_int_128_available {
5387 #include "cpuid.h"
5388 int main ()
5389 {
5390 unsigned int eax, ebx, ecx, edx;
5391 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
5392 return !(ecx & bit_CMPXCHG16B);
5393 return 1;
5394 }
5395 } ""
5396 }]
5397 } elseif { [istarget spu-*-*] } {
5398 return 1
5399 } else {
5400 return 0
5401 }
5402 }
5403
5404 # Return 1 if the target supports atomic operations on "long long".
5405 #
5406 # Note: 32bit x86 targets require -march=pentium in dg-options.
5407
5408 proc check_effective_target_sync_long_long { } {
5409 if { [istarget x86_64-*-*] || [istarget i?86-*-*])
5410 || [istarget aarch64*-*-*]
5411 || [istarget arm*-*-*]
5412 || [istarget alpha*-*-*]
5413 || ([istarget sparc*-*-*] && [check_effective_target_lp64])
5414 || [istarget spu-*-*] } {
5415 return 1
5416 } else {
5417 return 0
5418 }
5419 }
5420
5421 # Return 1 if the target supports atomic operations on "long long"
5422 # and can execute them.
5423 #
5424 # Note: 32bit x86 targets require -march=pentium in dg-options.
5425
5426 proc check_effective_target_sync_long_long_runtime { } {
5427 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
5428 return [check_cached_effective_target sync_long_long_available {
5429 check_runtime_nocache sync_long_long_available {
5430 #include "cpuid.h"
5431 int main ()
5432 {
5433 unsigned int eax, ebx, ecx, edx;
5434 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
5435 return !(edx & bit_CMPXCHG8B);
5436 return 1;
5437 }
5438 } ""
5439 }]
5440 } elseif { [istarget aarch64*-*-*] } {
5441 return 1
5442 } elseif { [istarget arm*-*-linux-*] } {
5443 return [check_runtime sync_longlong_runtime {
5444 #include <stdlib.h>
5445 int main ()
5446 {
5447 long long l1;
5448
5449 if (sizeof (long long) != 8)
5450 exit (1);
5451
5452 /* Just check for native; checking for kernel fallback is tricky. */
5453 asm volatile ("ldrexd r0,r1, [%0]" : : "r" (&l1) : "r0", "r1");
5454
5455 exit (0);
5456 }
5457 } "" ]
5458 } elseif { [istarget alpha*-*-*] } {
5459 return 1
5460 } elseif { ([istarget sparc*-*-*]
5461 && [check_effective_target_lp64]
5462 && [check_effective_target_ultrasparc_hw]) } {
5463 return 1
5464 } elseif { [istarget spu-*-*] } {
5465 return 1
5466 } elseif { [istarget powerpc*-*-*] && [check_effective_target_lp64] } {
5467 return 1
5468 } else {
5469 return 0
5470 }
5471 }
5472
5473 # Return 1 if the target supports byte swap instructions.
5474
5475 proc check_effective_target_bswap { } {
5476 global et_bswap_saved
5477
5478 if [info exists et_bswap_saved] {
5479 verbose "check_effective_target_bswap: using cached result" 2
5480 } else {
5481 set et_bswap_saved 0
5482 if { [istarget aarch64*-*-*]
5483 || [istarget alpha*-*-*]
5484 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5485 || [istarget m68k-*-*]
5486 || [istarget powerpc*-*-*]
5487 || [istarget rs6000-*-*]
5488 || [istarget s390*-*-*] } {
5489 set et_bswap_saved 1
5490 } else {
5491 if { [istarget arm*-*-*]
5492 && [check_no_compiler_messages_nocache arm_v6_or_later object {
5493 #if __ARM_ARCH < 6
5494 #error not armv6 or later
5495 #endif
5496 int i;
5497 } ""] } {
5498 set et_bswap_saved 1
5499 }
5500 }
5501 }
5502
5503 verbose "check_effective_target_bswap: returning $et_bswap_saved" 2
5504 return $et_bswap_saved
5505 }
5506
5507 # Return 1 if the target supports 16-bit byte swap instructions.
5508
5509 proc check_effective_target_bswap16 { } {
5510 global et_bswap16_saved
5511
5512 if [info exists et_bswap16_saved] {
5513 verbose "check_effective_target_bswap16: using cached result" 2
5514 } else {
5515 set et_bswap16_saved 0
5516 if { [is-effective-target bswap]
5517 && ![istarget alpha*-*-*]
5518 && !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
5519 set et_bswap16_saved 1
5520 }
5521 }
5522
5523 verbose "check_effective_target_bswap16: returning $et_bswap16_saved" 2
5524 return $et_bswap16_saved
5525 }
5526
5527 # Return 1 if the target supports 32-bit byte swap instructions.
5528
5529 proc check_effective_target_bswap32 { } {
5530 global et_bswap32_saved
5531
5532 if [info exists et_bswap32_saved] {
5533 verbose "check_effective_target_bswap32: using cached result" 2
5534 } else {
5535 set et_bswap32_saved 0
5536 if { [is-effective-target bswap] } {
5537 set et_bswap32_saved 1
5538 }
5539 }
5540
5541 verbose "check_effective_target_bswap32: returning $et_bswap32_saved" 2
5542 return $et_bswap32_saved
5543 }
5544
5545 # Return 1 if the target supports 64-bit byte swap instructions.
5546
5547 proc check_effective_target_bswap64 { } {
5548 global et_bswap64_saved
5549
5550 # expand_unop can expand 64-bit byte swap on 32-bit targets
5551 if { [is-effective-target bswap] && [is-effective-target int32plus] } {
5552 return 1
5553 }
5554 return 0
5555 }
5556
5557 # Return 1 if the target supports atomic operations on "int" and "long".
5558
5559 proc check_effective_target_sync_int_long { } {
5560 global et_sync_int_long_saved
5561
5562 if [info exists et_sync_int_long_saved] {
5563 verbose "check_effective_target_sync_int_long: using cached result" 2
5564 } else {
5565 set et_sync_int_long_saved 0
5566 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
5567 # load-reserved/store-conditional instructions.
5568 if { [istarget ia64-*-*]
5569 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5570 || [istarget aarch64*-*-*]
5571 || [istarget alpha*-*-*]
5572 || [istarget arm*-*-linux-*]
5573 || [istarget bfin*-*linux*]
5574 || [istarget hppa*-*linux*]
5575 || [istarget s390*-*-*]
5576 || [istarget powerpc*-*-*]
5577 || [istarget crisv32-*-*] || [istarget cris-*-*]
5578 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
5579 || [istarget spu-*-*]
5580 || [check_effective_target_mips_llsc] } {
5581 set et_sync_int_long_saved 1
5582 }
5583 }
5584
5585 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
5586 return $et_sync_int_long_saved
5587 }
5588
5589 # Return 1 if the target supports atomic operations on "char" and "short".
5590
5591 proc check_effective_target_sync_char_short { } {
5592 global et_sync_char_short_saved
5593
5594 if [info exists et_sync_char_short_saved] {
5595 verbose "check_effective_target_sync_char_short: using cached result" 2
5596 } else {
5597 set et_sync_char_short_saved 0
5598 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
5599 # load-reserved/store-conditional instructions.
5600 if { [istarget aarch64*-*-*]
5601 || [istarget ia64-*-*]
5602 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5603 || [istarget alpha*-*-*]
5604 || [istarget arm*-*-linux-*]
5605 || [istarget hppa*-*linux*]
5606 || [istarget s390*-*-*]
5607 || [istarget powerpc*-*-*]
5608 || [istarget crisv32-*-*] || [istarget cris-*-*]
5609 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
5610 || [istarget spu-*-*]
5611 || [check_effective_target_mips_llsc] } {
5612 set et_sync_char_short_saved 1
5613 }
5614 }
5615
5616 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
5617 return $et_sync_char_short_saved
5618 }
5619
5620 # Return 1 if the target uses a ColdFire FPU.
5621
5622 proc check_effective_target_coldfire_fpu { } {
5623 return [check_no_compiler_messages coldfire_fpu assembly {
5624 #ifndef __mcffpu__
5625 #error !__mcffpu__
5626 #endif
5627 }]
5628 }
5629
5630 # Return true if this is a uClibc target.
5631
5632 proc check_effective_target_uclibc {} {
5633 return [check_no_compiler_messages uclibc object {
5634 #include <features.h>
5635 #if !defined (__UCLIBC__)
5636 #error !__UCLIBC__
5637 #endif
5638 }]
5639 }
5640
5641 # Return true if this is a uclibc target and if the uclibc feature
5642 # described by __$feature__ is not present.
5643
5644 proc check_missing_uclibc_feature {feature} {
5645 return [check_no_compiler_messages $feature object "
5646 #include <features.h>
5647 #if !defined (__UCLIBC) || defined (__${feature}__)
5648 #error FOO
5649 #endif
5650 "]
5651 }
5652
5653 # Return true if this is a Newlib target.
5654
5655 proc check_effective_target_newlib {} {
5656 return [check_no_compiler_messages newlib object {
5657 #include <newlib.h>
5658 }]
5659 }
5660
5661 # Return true if this is NOT a Bionic target.
5662
5663 proc check_effective_target_non_bionic {} {
5664 return [check_no_compiler_messages non_bionic object {
5665 #include <ctype.h>
5666 #if defined (__BIONIC__)
5667 #error FOO
5668 #endif
5669 }]
5670 }
5671
5672 # Return true if this target has error.h header.
5673
5674 proc check_effective_target_error_h {} {
5675 return [check_no_compiler_messages error_h object {
5676 #include <error.h>
5677 }]
5678 }
5679
5680 # Return true if this target has tgmath.h header.
5681
5682 proc check_effective_target_tgmath_h {} {
5683 return [check_no_compiler_messages tgmath_h object {
5684 #include <tgmath.h>
5685 }]
5686 }
5687
5688 # Return true if target's libc supports complex functions.
5689
5690 proc check_effective_target_libc_has_complex_functions {} {
5691 return [check_no_compiler_messages libc_has_complex_functions object {
5692 #include <complex.h>
5693 }]
5694 }
5695
5696 # Return 1 if
5697 # (a) an error of a few ULP is expected in string to floating-point
5698 # conversion functions; and
5699 # (b) overflow is not always detected correctly by those functions.
5700
5701 proc check_effective_target_lax_strtofp {} {
5702 # By default, assume that all uClibc targets suffer from this.
5703 return [check_effective_target_uclibc]
5704 }
5705
5706 # Return 1 if this is a target for which wcsftime is a dummy
5707 # function that always returns 0.
5708
5709 proc check_effective_target_dummy_wcsftime {} {
5710 # By default, assume that all uClibc targets suffer from this.
5711 return [check_effective_target_uclibc]
5712 }
5713
5714 # Return 1 if constructors with initialization priority arguments are
5715 # supposed on this target.
5716
5717 proc check_effective_target_init_priority {} {
5718 return [check_no_compiler_messages init_priority assembly "
5719 void f() __attribute__((constructor (1000)));
5720 void f() \{\}
5721 "]
5722 }
5723
5724 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
5725 # This can be used with any check_* proc that takes no argument and
5726 # returns only 1 or 0. It could be used with check_* procs that take
5727 # arguments with keywords that pass particular arguments.
5728
5729 proc is-effective-target { arg } {
5730 set selected 0
5731 if { [info procs check_effective_target_${arg}] != [list] } {
5732 set selected [check_effective_target_${arg}]
5733 } else {
5734 switch $arg {
5735 "vmx_hw" { set selected [check_vmx_hw_available] }
5736 "vsx_hw" { set selected [check_vsx_hw_available] }
5737 "p8vector_hw" { set selected [check_p8vector_hw_available] }
5738 "p9vector_hw" { set selected [check_p9vector_hw_available] }
5739 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
5740 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
5741 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
5742 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
5743 "dfp_hw" { set selected [check_dfp_hw_available] }
5744 "htm_hw" { set selected [check_htm_hw_available] }
5745 "named_sections" { set selected [check_named_sections_available] }
5746 "gc_sections" { set selected [check_gc_sections_available] }
5747 "cxa_atexit" { set selected [check_cxa_atexit_available] }
5748 default { error "unknown effective target keyword `$arg'" }
5749 }
5750 }
5751 verbose "is-effective-target: $arg $selected" 2
5752 return $selected
5753 }
5754
5755 # Return 1 if the argument is an effective-target keyword, 0 otherwise.
5756
5757 proc is-effective-target-keyword { arg } {
5758 if { [info procs check_effective_target_${arg}] != [list] } {
5759 return 1
5760 } else {
5761 # These have different names for their check_* procs.
5762 switch $arg {
5763 "vmx_hw" { return 1 }
5764 "vsx_hw" { return 1 }
5765 "p8vector_hw" { return 1 }
5766 "p9vector_hw" { return 1 }
5767 "p9modulo_hw" { return 1 }
5768 "ppc_float128_sw" { return 1 }
5769 "ppc_float128_hw" { return 1 }
5770 "ppc_recip_hw" { return 1 }
5771 "dfp_hw" { return 1 }
5772 "htm_hw" { return 1 }
5773 "named_sections" { return 1 }
5774 "gc_sections" { return 1 }
5775 "cxa_atexit" { return 1 }
5776 default { return 0 }
5777 }
5778 }
5779 }
5780
5781 # Return 1 if target default to short enums
5782
5783 proc check_effective_target_short_enums { } {
5784 return [check_no_compiler_messages short_enums assembly {
5785 enum foo { bar };
5786 int s[sizeof (enum foo) == 1 ? 1 : -1];
5787 }]
5788 }
5789
5790 # Return 1 if target supports merging string constants at link time.
5791
5792 proc check_effective_target_string_merging { } {
5793 return [check_no_messages_and_pattern string_merging \
5794 "rodata\\.str" assembly {
5795 const char *var = "String";
5796 } {-O2}]
5797 }
5798
5799 # Return 1 if target has the basic signed and unsigned types in
5800 # <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
5801 # working <stdint.h> for all targets.
5802
5803 proc check_effective_target_stdint_types { } {
5804 return [check_no_compiler_messages stdint_types assembly {
5805 #include <stdint.h>
5806 int8_t a; int16_t b; int32_t c; int64_t d;
5807 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
5808 }]
5809 }
5810
5811 # Return 1 if target has the basic signed and unsigned types in
5812 # <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
5813 # these types agree with those in the header, as some systems have
5814 # only <inttypes.h>.
5815
5816 proc check_effective_target_inttypes_types { } {
5817 return [check_no_compiler_messages inttypes_types assembly {
5818 #include <inttypes.h>
5819 int8_t a; int16_t b; int32_t c; int64_t d;
5820 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
5821 }]
5822 }
5823
5824 # Return 1 if programs are intended to be run on a simulator
5825 # (i.e. slowly) rather than hardware (i.e. fast).
5826
5827 proc check_effective_target_simulator { } {
5828
5829 # All "src/sim" simulators set this one.
5830 if [board_info target exists is_simulator] {
5831 return [board_info target is_simulator]
5832 }
5833
5834 # The "sid" simulators don't set that one, but at least they set
5835 # this one.
5836 if [board_info target exists slow_simulator] {
5837 return [board_info target slow_simulator]
5838 }
5839
5840 return 0
5841 }
5842
5843 # Return 1 if programs are intended to be run on hardware rather than
5844 # on a simulator
5845
5846 proc check_effective_target_hw { } {
5847
5848 # All "src/sim" simulators set this one.
5849 if [board_info target exists is_simulator] {
5850 if [board_info target is_simulator] {
5851 return 0
5852 } else {
5853 return 1
5854 }
5855 }
5856
5857 # The "sid" simulators don't set that one, but at least they set
5858 # this one.
5859 if [board_info target exists slow_simulator] {
5860 if [board_info target slow_simulator] {
5861 return 0
5862 } else {
5863 return 1
5864 }
5865 }
5866
5867 return 1
5868 }
5869
5870 # Return 1 if the target is a VxWorks kernel.
5871
5872 proc check_effective_target_vxworks_kernel { } {
5873 return [check_no_compiler_messages vxworks_kernel assembly {
5874 #if !defined __vxworks || defined __RTP__
5875 #error NO
5876 #endif
5877 }]
5878 }
5879
5880 # Return 1 if the target is a VxWorks RTP.
5881
5882 proc check_effective_target_vxworks_rtp { } {
5883 return [check_no_compiler_messages vxworks_rtp assembly {
5884 #if !defined __vxworks || !defined __RTP__
5885 #error NO
5886 #endif
5887 }]
5888 }
5889
5890 # Return 1 if the target is expected to provide wide character support.
5891
5892 proc check_effective_target_wchar { } {
5893 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
5894 return 0
5895 }
5896 return [check_no_compiler_messages wchar assembly {
5897 #include <wchar.h>
5898 }]
5899 }
5900
5901 # Return 1 if the target has <pthread.h>.
5902
5903 proc check_effective_target_pthread_h { } {
5904 return [check_no_compiler_messages pthread_h assembly {
5905 #include <pthread.h>
5906 }]
5907 }
5908
5909 # Return 1 if the target can truncate a file from a file-descriptor,
5910 # as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
5911 # chsize. We test for a trivially functional truncation; no stubs.
5912 # As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
5913 # different function to be used.
5914
5915 proc check_effective_target_fd_truncate { } {
5916 set prog {
5917 #define _FILE_OFFSET_BITS 64
5918 #include <unistd.h>
5919 #include <stdio.h>
5920 #include <stdlib.h>
5921 #include <string.h>
5922 int main ()
5923 {
5924 FILE *f = fopen ("tst.tmp", "wb");
5925 int fd;
5926 const char t[] = "test writing more than ten characters";
5927 char s[11];
5928 int status = 0;
5929 fd = fileno (f);
5930 write (fd, t, sizeof (t) - 1);
5931 lseek (fd, 0, 0);
5932 if (ftruncate (fd, 10) != 0)
5933 status = 1;
5934 close (fd);
5935 fclose (f);
5936 if (status)
5937 {
5938 unlink ("tst.tmp");
5939 exit (status);
5940 }
5941 f = fopen ("tst.tmp", "rb");
5942 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
5943 status = 1;
5944 fclose (f);
5945 unlink ("tst.tmp");
5946 exit (status);
5947 }
5948 }
5949
5950 if { [check_runtime ftruncate $prog] } {
5951 return 1;
5952 }
5953
5954 regsub "ftruncate" $prog "chsize" prog
5955 return [check_runtime chsize $prog]
5956 }
5957
5958 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
5959
5960 proc add_options_for_c99_runtime { flags } {
5961 if { [istarget *-*-solaris2*] } {
5962 return "$flags -std=c99"
5963 }
5964 if { [istarget powerpc-*-darwin*] } {
5965 return "$flags -mmacosx-version-min=10.3"
5966 }
5967 return $flags
5968 }
5969
5970 # Add to FLAGS all the target-specific flags needed to enable
5971 # full IEEE compliance mode.
5972
5973 proc add_options_for_ieee { flags } {
5974 if { [istarget alpha*-*-*]
5975 || [istarget sh*-*-*] } {
5976 return "$flags -mieee"
5977 }
5978 if { [istarget rx-*-*] } {
5979 return "$flags -mnofpu"
5980 }
5981 return $flags
5982 }
5983
5984 if {![info exists flags_to_postpone]} {
5985 set flags_to_postpone ""
5986 }
5987
5988 # Add to FLAGS the flags needed to enable functions to bind locally
5989 # when using pic/PIC passes in the testsuite.
5990 proc add_options_for_bind_pic_locally { flags } {
5991 global flags_to_postpone
5992
5993 # Instead of returning 'flags' with the -fPIE or -fpie appended, we save it
5994 # in 'flags_to_postpone' and append it later in gcc_target_compile procedure in
5995 # order to make sure that the multilib_flags doesn't override this.
5996
5997 if {[check_no_compiler_messages using_pic2 assembly {
5998 #if __PIC__ != 2
5999 #error __PIC__ != 2
6000 #endif
6001 }]} {
6002 set flags_to_postpone "-fPIE"
6003 return $flags
6004 }
6005 if {[check_no_compiler_messages using_pic1 assembly {
6006 #if __PIC__ != 1
6007 #error __PIC__ != 1
6008 #endif
6009 }]} {
6010 set flags_to_postpone "-fpie"
6011 return $flags
6012 }
6013 return $flags
6014 }
6015
6016 # Add to FLAGS the flags needed to enable 64-bit vectors.
6017
6018 proc add_options_for_double_vectors { flags } {
6019 if [is-effective-target arm_neon_ok] {
6020 return "$flags -mvectorize-with-neon-double"
6021 }
6022
6023 return $flags
6024 }
6025
6026 # Return 1 if the target provides a full C99 runtime.
6027
6028 proc check_effective_target_c99_runtime { } {
6029 return [check_cached_effective_target c99_runtime {
6030 global srcdir
6031
6032 set file [open "$srcdir/gcc.dg/builtins-config.h"]
6033 set contents [read $file]
6034 close $file
6035 append contents {
6036 #ifndef HAVE_C99_RUNTIME
6037 #error !HAVE_C99_RUNTIME
6038 #endif
6039 }
6040 check_no_compiler_messages_nocache c99_runtime assembly \
6041 $contents [add_options_for_c99_runtime ""]
6042 }]
6043 }
6044
6045 # Return 1 if target wchar_t is at least 4 bytes.
6046
6047 proc check_effective_target_4byte_wchar_t { } {
6048 return [check_no_compiler_messages 4byte_wchar_t object {
6049 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
6050 }]
6051 }
6052
6053 # Return 1 if the target supports automatic stack alignment.
6054
6055 proc check_effective_target_automatic_stack_alignment { } {
6056 # Ordinarily x86 supports automatic stack alignment ...
6057 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
6058 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
6059 # ... except Win64 SEH doesn't. Succeed for Win32 though.
6060 return [check_effective_target_ilp32];
6061 }
6062 return 1;
6063 }
6064 return 0;
6065 }
6066
6067 # Return true if we are compiling for AVX target.
6068
6069 proc check_avx_available { } {
6070 if { [check_no_compiler_messages avx_available assembly {
6071 #ifndef __AVX__
6072 #error unsupported
6073 #endif
6074 } ""] } {
6075 return 1;
6076 }
6077 return 0;
6078 }
6079
6080 # Return true if 32- and 16-bytes vectors are available.
6081
6082 proc check_effective_target_vect_sizes_32B_16B { } {
6083 if { [check_avx_available] && ![check_prefer_avx128] } {
6084 return 1;
6085 } else {
6086 return 0;
6087 }
6088 }
6089
6090 # Return true if 128-bits vectors are preferred even if 256-bits vectors
6091 # are available.
6092
6093 proc check_prefer_avx128 { } {
6094 if ![check_avx_available] {
6095 return 0;
6096 }
6097 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
6098 float a[1024],b[1024],c[1024];
6099 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
6100 } "-O2 -ftree-vectorize"]
6101 }
6102
6103
6104 # Return 1 if avx512f instructions can be compiled.
6105
6106 proc check_effective_target_avx512f { } {
6107 return [check_no_compiler_messages avx512f object {
6108 typedef double __m512d __attribute__ ((__vector_size__ (64)));
6109
6110 __m512d _mm512_add (__m512d a)
6111 {
6112 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
6113 }
6114 } "-O2 -mavx512f" ]
6115 }
6116
6117 # Return 1 if avx instructions can be compiled.
6118
6119 proc check_effective_target_avx { } {
6120 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
6121 return 0
6122 }
6123 return [check_no_compiler_messages avx object {
6124 void _mm256_zeroall (void)
6125 {
6126 __builtin_ia32_vzeroall ();
6127 }
6128 } "-O2 -mavx" ]
6129 }
6130
6131 # Return 1 if avx2 instructions can be compiled.
6132 proc check_effective_target_avx2 { } {
6133 return [check_no_compiler_messages avx2 object {
6134 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
6135 __v4di
6136 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
6137 {
6138 return __builtin_ia32_andnotsi256 (__X, __Y);
6139 }
6140 } "-O0 -mavx2" ]
6141 }
6142
6143 # Return 1 if sse instructions can be compiled.
6144 proc check_effective_target_sse { } {
6145 return [check_no_compiler_messages sse object {
6146 int main ()
6147 {
6148 __builtin_ia32_stmxcsr ();
6149 return 0;
6150 }
6151 } "-O2 -msse" ]
6152 }
6153
6154 # Return 1 if sse2 instructions can be compiled.
6155 proc check_effective_target_sse2 { } {
6156 return [check_no_compiler_messages sse2 object {
6157 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
6158
6159 __m128i _mm_srli_si128 (__m128i __A, int __N)
6160 {
6161 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
6162 }
6163 } "-O2 -msse2" ]
6164 }
6165
6166 # Return 1 if F16C instructions can be compiled.
6167
6168 proc check_effective_target_f16c { } {
6169 return [check_no_compiler_messages f16c object {
6170 #include "immintrin.h"
6171 float
6172 foo (unsigned short val)
6173 {
6174 return _cvtsh_ss (val);
6175 }
6176 } "-O2 -mf16c" ]
6177 }
6178
6179 # Return 1 if C wchar_t type is compatible with char16_t.
6180
6181 proc check_effective_target_wchar_t_char16_t_compatible { } {
6182 return [check_no_compiler_messages wchar_t_char16_t object {
6183 __WCHAR_TYPE__ wc;
6184 __CHAR16_TYPE__ *p16 = &wc;
6185 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
6186 }]
6187 }
6188
6189 # Return 1 if C wchar_t type is compatible with char32_t.
6190
6191 proc check_effective_target_wchar_t_char32_t_compatible { } {
6192 return [check_no_compiler_messages wchar_t_char32_t object {
6193 __WCHAR_TYPE__ wc;
6194 __CHAR32_TYPE__ *p32 = &wc;
6195 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
6196 }]
6197 }
6198
6199 # Return 1 if pow10 function exists.
6200
6201 proc check_effective_target_pow10 { } {
6202 return [check_runtime pow10 {
6203 #include <math.h>
6204 int main () {
6205 double x;
6206 x = pow10 (1);
6207 return 0;
6208 }
6209 } "-lm" ]
6210 }
6211
6212 # Return 1 if current options generate DFP instructions, 0 otherwise.
6213
6214 proc check_effective_target_hard_dfp {} {
6215 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
6216 typedef float d64 __attribute__((mode(DD)));
6217 d64 x, y, z;
6218 void foo (void) { z = x + y; }
6219 }]
6220 }
6221
6222 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
6223 # for strchr etc. functions.
6224
6225 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
6226 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
6227 #include <string.h>
6228 #include <wchar.h>
6229 #if !defined(__cplusplus) \
6230 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
6231 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
6232 ISO C++ correct string.h and wchar.h protos not supported.
6233 #else
6234 int i;
6235 #endif
6236 }]
6237 }
6238
6239 # Return 1 if GNU as is used.
6240
6241 proc check_effective_target_gas { } {
6242 global use_gas_saved
6243 global tool
6244
6245 if {![info exists use_gas_saved]} {
6246 # Check if the as used by gcc is GNU as.
6247 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
6248 # Provide /dev/null as input, otherwise gas times out reading from
6249 # stdin.
6250 set status [remote_exec host "$gcc_as" "-v /dev/null"]
6251 set as_output [lindex $status 1]
6252 if { [ string first "GNU" $as_output ] >= 0 } {
6253 set use_gas_saved 1
6254 } else {
6255 set use_gas_saved 0
6256 }
6257 }
6258 return $use_gas_saved
6259 }
6260
6261 # Return 1 if GNU ld is used.
6262
6263 proc check_effective_target_gld { } {
6264 global use_gld_saved
6265 global tool
6266
6267 if {![info exists use_gld_saved]} {
6268 # Check if the ld used by gcc is GNU ld.
6269 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
6270 set status [remote_exec host "$gcc_ld" "--version"]
6271 set ld_output [lindex $status 1]
6272 if { [ string first "GNU" $ld_output ] >= 0 } {
6273 set use_gld_saved 1
6274 } else {
6275 set use_gld_saved 0
6276 }
6277 }
6278 return $use_gld_saved
6279 }
6280
6281 # Return 1 if the compiler has been configure with link-time optimization
6282 # (LTO) support.
6283
6284 proc check_effective_target_lto { } {
6285 if { [istarget nvptx-*-*] } {
6286 return 0;
6287 }
6288 return [check_no_compiler_messages lto object {
6289 void foo (void) { }
6290 } "-flto"]
6291 }
6292
6293 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
6294
6295 proc check_effective_target_maybe_x32 { } {
6296 return [check_no_compiler_messages maybe_x32 object {
6297 void foo (void) {}
6298 } "-mx32 -maddress-mode=short"]
6299 }
6300
6301 # Return 1 if this target supports the -fsplit-stack option, 0
6302 # otherwise.
6303
6304 proc check_effective_target_split_stack {} {
6305 return [check_no_compiler_messages split_stack object {
6306 void foo (void) { }
6307 } "-fsplit-stack"]
6308 }
6309
6310 # Return 1 if this target supports the -masm=intel option, 0
6311 # otherwise
6312
6313 proc check_effective_target_masm_intel {} {
6314 return [check_no_compiler_messages masm_intel object {
6315 extern void abort (void);
6316 } "-masm=intel"]
6317 }
6318
6319 # Return 1 if the language for the compiler under test is C.
6320
6321 proc check_effective_target_c { } {
6322 global tool
6323 if [string match $tool "gcc"] {
6324 return 1
6325 }
6326 return 0
6327 }
6328
6329 # Return 1 if the language for the compiler under test is C++.
6330
6331 proc check_effective_target_c++ { } {
6332 global tool
6333 if [string match $tool "g++"] {
6334 return 1
6335 }
6336 return 0
6337 }
6338
6339 set cxx_default "c++14"
6340 # Check whether the current active language standard supports the features
6341 # of C++11/C++14 by checking for the presence of one of the -std flags.
6342 # This assumes that the default for the compiler is $cxx_default, and that
6343 # there will never be multiple -std= arguments on the command line.
6344 proc check_effective_target_c++11_only { } {
6345 global cxx_default
6346 if ![check_effective_target_c++] {
6347 return 0
6348 }
6349 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
6350 return 1
6351 }
6352 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
6353 return 1
6354 }
6355 return 0
6356 }
6357 proc check_effective_target_c++11 { } {
6358 if [check_effective_target_c++11_only] {
6359 return 1
6360 }
6361 return [check_effective_target_c++14]
6362 }
6363 proc check_effective_target_c++11_down { } {
6364 if ![check_effective_target_c++] {
6365 return 0
6366 }
6367 return [expr ![check_effective_target_c++14] ]
6368 }
6369
6370 proc check_effective_target_c++14_only { } {
6371 global cxx_default
6372 if ![check_effective_target_c++] {
6373 return 0
6374 }
6375 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
6376 return 1
6377 }
6378 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
6379 return 1
6380 }
6381 return 0
6382 }
6383
6384 proc check_effective_target_c++14 { } {
6385 if [check_effective_target_c++14_only] {
6386 return 1
6387 }
6388 return [check_effective_target_c++1z]
6389 }
6390 proc check_effective_target_c++14_down { } {
6391 if ![check_effective_target_c++] {
6392 return 0
6393 }
6394 return [expr ![check_effective_target_c++1z] ]
6395 }
6396
6397 proc check_effective_target_c++98_only { } {
6398 global cxx_default
6399 if ![check_effective_target_c++] {
6400 return 0
6401 }
6402 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
6403 return 1
6404 }
6405 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
6406 return 1
6407 }
6408 return 0
6409 }
6410
6411 proc check_effective_target_c++1z_only { } {
6412 global cxx_default
6413 if ![check_effective_target_c++] {
6414 return 0
6415 }
6416 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
6417 return 1
6418 }
6419 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
6420 return 1
6421 }
6422 return 0
6423 }
6424 proc check_effective_target_c++1z { } {
6425 return [check_effective_target_c++1z_only]
6426 }
6427
6428 # Return 1 if expensive testcases should be run.
6429
6430 proc check_effective_target_run_expensive_tests { } {
6431 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
6432 return 1
6433 }
6434 return 0
6435 }
6436
6437 # Returns 1 if "mempcpy" is available on the target system.
6438
6439 proc check_effective_target_mempcpy {} {
6440 return [check_function_available "mempcpy"]
6441 }
6442
6443 # Returns 1 if "stpcpy" is available on the target system.
6444
6445 proc check_effective_target_stpcpy {} {
6446 return [check_function_available "stpcpy"]
6447 }
6448
6449 # Check whether the vectorizer tests are supported by the target and
6450 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
6451 # Set dg-do-what-default to either compile or run, depending on target
6452 # capabilities. Return 1 if vectorizer tests are supported by
6453 # target, 0 otherwise.
6454
6455 proc check_vect_support_and_set_flags { } {
6456 global DEFAULT_VECTCFLAGS
6457 global dg-do-what-default
6458
6459 if [istarget powerpc-*paired*] {
6460 lappend DEFAULT_VECTCFLAGS "-mpaired"
6461 if [check_750cl_hw_available] {
6462 set dg-do-what-default run
6463 } else {
6464 set dg-do-what-default compile
6465 }
6466 } elseif [istarget powerpc*-*-*] {
6467 # Skip targets not supporting -maltivec.
6468 if ![is-effective-target powerpc_altivec_ok] {
6469 return 0
6470 }
6471
6472 lappend DEFAULT_VECTCFLAGS "-maltivec"
6473 if [check_p9vector_hw_available] {
6474 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
6475 } elseif [check_p8vector_hw_available] {
6476 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
6477 } elseif [check_vsx_hw_available] {
6478 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
6479 }
6480
6481 if [check_vmx_hw_available] {
6482 set dg-do-what-default run
6483 } else {
6484 if [is-effective-target ilp32] {
6485 # Specify a cpu that supports VMX for compile-only tests.
6486 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
6487 }
6488 set dg-do-what-default compile
6489 }
6490 } elseif { [istarget spu-*-*] } {
6491 set dg-do-what-default run
6492 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
6493 lappend DEFAULT_VECTCFLAGS "-msse2"
6494 if { [check_effective_target_sse2_runtime] } {
6495 set dg-do-what-default run
6496 } else {
6497 set dg-do-what-default compile
6498 }
6499 } elseif { [istarget mips*-*-*]
6500 && ([check_effective_target_mpaired_single]
6501 || [check_effective_target_mips_loongson])
6502 && [check_effective_target_nomips16] } {
6503 if { [check_effective_target_mpaired_single] } {
6504 lappend DEFAULT_VECTCFLAGS "-mpaired-single"
6505 }
6506 set dg-do-what-default run
6507 } elseif [istarget sparc*-*-*] {
6508 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
6509 if [check_effective_target_ultrasparc_hw] {
6510 set dg-do-what-default run
6511 } else {
6512 set dg-do-what-default compile
6513 }
6514 } elseif [istarget alpha*-*-*] {
6515 # Alpha's vectorization capabilities are extremely limited.
6516 # It's more effort than its worth disabling all of the tests
6517 # that it cannot pass. But if you actually want to see what
6518 # does work, command out the return.
6519 return 0
6520
6521 lappend DEFAULT_VECTCFLAGS "-mmax"
6522 if [check_alpha_max_hw_available] {
6523 set dg-do-what-default run
6524 } else {
6525 set dg-do-what-default compile
6526 }
6527 } elseif [istarget ia64-*-*] {
6528 set dg-do-what-default run
6529 } elseif [is-effective-target arm_neon_ok] {
6530 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
6531 # NEON does not support denormals, so is not used for vectorization by
6532 # default to avoid loss of precision. We must pass -ffast-math to test
6533 # vectorization of float operations.
6534 lappend DEFAULT_VECTCFLAGS "-ffast-math"
6535 if [is-effective-target arm_neon_hw] {
6536 set dg-do-what-default run
6537 } else {
6538 set dg-do-what-default compile
6539 }
6540 } elseif [istarget "aarch64*-*-*"] {
6541 set dg-do-what-default run
6542 } else {
6543 return 0
6544 }
6545
6546 return 1
6547 }
6548
6549 # Return 1 if the target does *not* require strict alignment.
6550
6551 proc check_effective_target_non_strict_align {} {
6552
6553 # On ARM, the default is to use STRICT_ALIGNMENT, but there
6554 # are interfaces defined for misaligned access and thus
6555 # depending on the architecture levels unaligned access is
6556 # available.
6557 if [istarget "arm*-*-*"] {
6558 return [check_effective_target_arm_unaligned]
6559 }
6560
6561 return [check_no_compiler_messages non_strict_align assembly {
6562 char *y;
6563 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
6564 c *z;
6565 void foo(void) { z = (c *) y; }
6566 } "-Wcast-align"]
6567 }
6568
6569 # Return 1 if the target has <ucontext.h>.
6570
6571 proc check_effective_target_ucontext_h { } {
6572 return [check_no_compiler_messages ucontext_h assembly {
6573 #include <ucontext.h>
6574 }]
6575 }
6576
6577 proc check_effective_target_aarch64_tiny { } {
6578 if { [istarget aarch64*-*-*] } {
6579 return [check_no_compiler_messages aarch64_tiny object {
6580 #ifdef __AARCH64_CMODEL_TINY__
6581 int dummy;
6582 #else
6583 #error target not AArch64 tiny code model
6584 #endif
6585 }]
6586 } else {
6587 return 0
6588 }
6589 }
6590
6591 proc check_effective_target_aarch64_small { } {
6592 if { [istarget aarch64*-*-*] } {
6593 return [check_no_compiler_messages aarch64_small object {
6594 #ifdef __AARCH64_CMODEL_SMALL__
6595 int dummy;
6596 #else
6597 #error target not AArch64 small code model
6598 #endif
6599 }]
6600 } else {
6601 return 0
6602 }
6603 }
6604
6605 proc check_effective_target_aarch64_large { } {
6606 if { [istarget aarch64*-*-*] } {
6607 return [check_no_compiler_messages aarch64_large object {
6608 #ifdef __AARCH64_CMODEL_LARGE__
6609 int dummy;
6610 #else
6611 #error target not AArch64 large code model
6612 #endif
6613 }]
6614 } else {
6615 return 0
6616 }
6617 }
6618
6619 # Return 1 if <fenv.h> is available with all the standard IEEE
6620 # exceptions and floating-point exceptions are raised by arithmetic
6621 # operations. (If the target requires special options for "inexact"
6622 # exceptions, those need to be specified in the testcases.)
6623
6624 proc check_effective_target_fenv_exceptions {} {
6625 return [check_runtime fenv_exceptions {
6626 #include <fenv.h>
6627 #include <stdlib.h>
6628 #ifndef FE_DIVBYZERO
6629 # error Missing FE_DIVBYZERO
6630 #endif
6631 #ifndef FE_INEXACT
6632 # error Missing FE_INEXACT
6633 #endif
6634 #ifndef FE_INVALID
6635 # error Missing FE_INVALID
6636 #endif
6637 #ifndef FE_OVERFLOW
6638 # error Missing FE_OVERFLOW
6639 #endif
6640 #ifndef FE_UNDERFLOW
6641 # error Missing FE_UNDERFLOW
6642 #endif
6643 volatile float a = 0.0f, r;
6644 int
6645 main (void)
6646 {
6647 r = a / a;
6648 if (fetestexcept (FE_INVALID))
6649 exit (0);
6650 else
6651 abort ();
6652 }
6653 } [add_options_for_ieee "-std=gnu99"]]
6654 }
6655
6656 proc check_effective_target_tiny {} {
6657 global et_target_tiny_saved
6658
6659 if [info exists et_target_tine_saved] {
6660 verbose "check_effective_target_tiny: using cached result" 2
6661 } else {
6662 set et_target_tiny_saved 0
6663 if { [istarget aarch64*-*-*]
6664 && [check_effective_target_aarch64_tiny] } {
6665 set et_target_tiny_saved 1
6666 }
6667 }
6668
6669 return $et_target_tiny_saved
6670 }
6671
6672 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
6673
6674 proc check_effective_target_logical_op_short_circuit {} {
6675 if { [istarget mips*-*-*]
6676 || [istarget arc*-*-*]
6677 || [istarget avr*-*-*]
6678 || [istarget crisv32-*-*] || [istarget cris-*-*]
6679 || [istarget mmix-*-*]
6680 || [istarget s390*-*-*]
6681 || [istarget powerpc*-*-*]
6682 || [istarget nios2*-*-*]
6683 || [istarget visium-*-*]
6684 || [check_effective_target_arm_cortex_m] } {
6685 return 1
6686 }
6687 return 0
6688 }
6689
6690 # Record that dg-final test TEST requires convential compilation.
6691
6692 proc force_conventional_output_for { test } {
6693 if { [info proc $test] == "" } {
6694 perror "$test does not exist"
6695 exit 1
6696 }
6697 proc ${test}_required_options {} {
6698 global gcc_force_conventional_output
6699 return $gcc_force_conventional_output
6700 }
6701 }
6702
6703 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
6704 # otherwise. Cache the result.
6705
6706 proc check_effective_target_pie_copyreloc { } {
6707 global pie_copyreloc_available_saved
6708 global tool
6709 global GCC_UNDER_TEST
6710
6711 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
6712 return 0
6713 }
6714
6715 # Need auto-host.h to check linker support.
6716 if { ![file exists ../../auto-host.h ] } {
6717 return 0
6718 }
6719
6720 if [info exists pie_copyreloc_available_saved] {
6721 verbose "check_effective_target_pie_copyreloc returning saved $pie_copyreloc_available_saved" 2
6722 } else {
6723 # Set up and compile to see if linker supports PIE with copy
6724 # reloc. Include the current process ID in the file names to
6725 # prevent conflicts with invocations for multiple testsuites.
6726
6727 set src pie[pid].c
6728 set obj pie[pid].o
6729
6730 set f [open $src "w"]
6731 puts $f "#include \"../../auto-host.h\""
6732 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
6733 puts $f "# error Linker does not support PIE with copy reloc."
6734 puts $f "#endif"
6735 close $f
6736
6737 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
6738 set lines [${tool}_target_compile $src $obj object ""]
6739
6740 file delete $src
6741 file delete $obj
6742
6743 if [string match "" $lines] then {
6744 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
6745 set pie_copyreloc_available_saved 1
6746 } else {
6747 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
6748 set pie_copyreloc_available_saved 0
6749 }
6750 }
6751
6752 return $pie_copyreloc_available_saved
6753 }
6754
6755 # Return 1 if the target uses comdat groups.
6756
6757 proc check_effective_target_comdat_group {} {
6758 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat" assembly {
6759 // C++
6760 inline int foo () { return 1; }
6761 int (*fn) () = foo;
6762 }]
6763 }
6764
6765 # Return 1 if target supports __builtin_eh_return
6766 proc check_effective_target_builtin_eh_return { } {
6767 return [check_no_compiler_messages builtin_eh_return object {
6768 void test (long l, void *p)
6769 {
6770 __builtin_eh_return (l, p);
6771 }
6772 } "" ]
6773 }
6774
6775 # Return 1 if the target supports max reduction for vectors.
6776
6777 proc check_effective_target_vect_max_reduc { } {
6778 if { [istarget aarch64*-*-*] || [istarget arm*-*-*] } {
6779 return 1
6780 }
6781 return 0
6782 }
6783
6784 # Return 1 if there is an nvptx offload compiler.
6785
6786 proc check_effective_target_offload_nvptx { } {
6787 return [check_no_compiler_messages offload_nvptx object {
6788 int main () {return 0;}
6789 } "-foffload=nvptx-none" ]
6790 }