include/configs/devkit3250.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Embest/Timll DevKit3250 board configuration file
   4  *
   5  * Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com>
   6  */
   7
   8 #ifndef __CONFIG_DEVKIT3250_H__
   9 #define __CONFIG_DEVKIT3250_H__
  10
  11 /* SoC and board defines */
  12 #include <linux/sizes.h>
  13 #include <asm/arch/cpu.h>
  14
  15 #define CONFIG_MACH_TYPE                MACH_TYPE_DEVKIT3250
  16
  17 #if !defined(CONFIG_SPL_BUILD)
  18 #define CONFIG_SKIP_LOWLEVEL_INIT
  19 #endif
  20
  21 /*
  22  * Memory configurations
  23  */
  24 #define CONFIG_SYS_MALLOC_LEN           SZ_1M
  25 #define CONFIG_SYS_SDRAM_BASE           EMC_DYCS0_BASE
  26 #define CONFIG_SYS_SDRAM_SIZE           SZ_64M
  27
  28 #define CONFIG_SYS_LOAD_ADDR            (CONFIG_SYS_SDRAM_BASE + SZ_32K)
  29
  30 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + SZ_4K \
  31                                          - GENERATED_GBL_DATA_SIZE)
  32
  33 /*
  34  * DMA
  35  */
  36 #if !defined(CONFIG_SPL_BUILD)
  37 #define CONFIG_DMA_LPC32XX
  38 #endif
  39
  40 /*
  41  * I2C
  42  */
  43 #define CONFIG_SYS_I2C_LEGACY
  44 #define CONFIG_SYS_I2C_SPEED            100000
  45
  46 /*
  47  * GPIO
  48  */
  49 #define CONFIG_LPC32XX_GPIO
  50
  51 /*
  52  * Ethernet
  53  */
  54 #define CONFIG_RMII
  55 #define CONFIG_LPC32XX_ETH
  56 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  57
  58 /*
  59  * NOR Flash
  60  */
  61 #define CONFIG_SYS_MAX_FLASH_BANKS      1
  62 #define CONFIG_SYS_MAX_FLASH_SECT       71
  63 #define CONFIG_SYS_FLASH_BASE           EMC_CS0_BASE
  64 #define CONFIG_SYS_FLASH_SIZE           SZ_4M
  65
  66 /*
  67  * NAND controller
  68  */
  69 #define CONFIG_SYS_NAND_BASE            SLC_NAND_BASE
  70 #define CONFIG_SYS_MAX_NAND_DEVICE      1
  71 #define CONFIG_SYS_NAND_BASE_LIST       { CONFIG_SYS_NAND_BASE }
  72
  73 /*
  74  * NAND chip timings
  75  */
  76 #define CONFIG_LPC32XX_NAND_SLC_WDR_CLKS        14
  77 #define CONFIG_LPC32XX_NAND_SLC_WWIDTH          66666666
  78 #define CONFIG_LPC32XX_NAND_SLC_WHOLD           200000000
  79 #define CONFIG_LPC32XX_NAND_SLC_WSETUP          50000000
  80 #define CONFIG_LPC32XX_NAND_SLC_RDR_CLKS        14
  81 #define CONFIG_LPC32XX_NAND_SLC_RWIDTH          66666666
  82 #define CONFIG_LPC32XX_NAND_SLC_RHOLD           200000000
  83 #define CONFIG_LPC32XX_NAND_SLC_RSETUP          50000000
  84
  85 #define CONFIG_SYS_NAND_BLOCK_SIZE              0x20000
  86 #define CONFIG_SYS_NAND_PAGE_SIZE               NAND_LARGE_BLOCK_PAGE_SIZE
  87
  88 /*
  89  * USB
  90  */
  91 #define CONFIG_USB_OHCI_LPC32XX
  92 #define CONFIG_USB_ISP1301_I2C_ADDR             0x2d
  93
  94 /*
  95  * U-Boot General Configurations
  96  */
  97 #define CONFIG_SYS_CBSIZE               1024
  98 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
  99
 100 /*
 101  * Pass open firmware flat tree
 102  */
 103
 104 /*
 105  * Environment
 106  */
 107
 108 #define CONFIG_BOOTCOMMAND                      \
 109         "dhcp; "                                \
 110         "tftp ${loadaddr} ${serverip}:${tftpdir}/${bootfile}; "         \
 111         "tftp ${dtbaddr} ${serverip}:${tftpdir}/devkit3250.dtb; "       \
 112         "setenv nfsargs ip=dhcp root=/dev/nfs nfsroot=${serverip}:${nfsroot},tcp; "     \
 113         "setenv bootargs ${bootargs} ${nfsargs} ${userargs}; "                  \
 114         "bootm ${loadaddr} - ${dtbaddr}"
 115
 116 #define CONFIG_EXTRA_ENV_SETTINGS               \
 117         "autoload=no\0"                         \
 118         "ethaddr=00:01:90:00:C0:81\0"           \
 119         "dtbaddr=0x81000000\0"                  \
 120         "nfsroot=/opt/projects/images/vladimir/oe/devkit3250/rootfs\0"  \
 121         "tftpdir=vladimir/oe/devkit3250\0"      \
 122         "userargs=oops=panic\0"
 123
 124 /*
 125  * U-Boot Commands
 126  */
 127
 128 /*
 129  * Boot Linux
 130  */
 131 #define CONFIG_CMDLINE_TAG
 132 #define CONFIG_SETUP_MEMORY_TAGS
 133
 134 #define CONFIG_BOOTFILE                 "uImage"
 135 #define CONFIG_LOADADDR                 0x80008000
 136
 137 /*
 138  * SPL specific defines
 139  */
 140 /* SPL will be executed at offset 0 */
 141
 142 /* SPL will use SRAM as stack */
 143 #define CONFIG_SPL_STACK                0x0000FFF8
 144
 145 /* Use the framework and generic lib */
 146
 147 /* SPL will use serial */
 148
 149 /* SPL loads an image from NAND */
 150 #define CONFIG_SPL_NAND_RAW_ONLY
 151
 152 #define CONFIG_SPL_NAND_SOFTECC
 153
 154 #define CONFIG_SPL_MAX_SIZE             0x20000
 155 #define CONFIG_SPL_PAD_TO               CONFIG_SPL_MAX_SIZE
 156
 157 /* U-Boot will be 0x60000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */
 158 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x40000
 159 #define CONFIG_SYS_NAND_U_BOOT_SIZE     0x60000
 160
 161 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 162 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
 163
 164 /* See common/spl/spl.c  spl_set_header_raw_uboot() */
 165 #define CONFIG_SYS_MONITOR_LEN          CONFIG_SYS_NAND_U_BOOT_SIZE
 166
 167 /*
 168  * Include SoC specific configuration
 169  */
 170 #include <asm/arch/config.h>
 171
 172 #endif  /* __CONFIG_DEVKIT3250_H__*/