]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
i2c: Rename CONFIG_SYS_I2C to CONFIG_SYS_I2C_LEGACY
authorSimon Glass <sjg@chromium.org>
Sun, 11 Jul 2021 03:14:32 +0000 (21:14 -0600)
committerTom Rini <trini@konsulko.com>
Wed, 28 Jul 2021 18:29:37 +0000 (14:29 -0400)
It is quite confusing that CONFIG_SYS_I2C selects the legacy I2C and
CONFIG_DM_I2C selects the current I2C. The deadline to migrate I2C is less
than a year away.

Also we want to have a CONFIG_I2C for U-Boot proper just like we have
CONFIG_SPL_I2C for SPL, so we can simplify the Makefile rules.

Rename this symbol so it is clear it is going away.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
110 files changed:
README
arch/arm/cpu/armv8/fsl-layerscape/soc.c
arch/arm/cpu/armv8/fsl-layerscape/spl.c
arch/arm/include/asm/arch-fsl-layerscape/config.h
arch/arm/mach-kirkwood/include/mach/config.h
board/Arcturus/ucp1020/spl.c
board/compulab/common/Makefile
board/compulab/common/eeprom.h
board/freescale/p1_p2_rdb_pc/spl.c
board/renesas/draak/draak.c
board/renesas/salvator-x/salvator-x.c
board/renesas/ulcb/ulcb.c
board/somlabs/visionsom-6ull/visionsom-6ull.c
board/tqc/tqma6/tqma6.c
cmd/date.c
cmd/eeprom.c
cmd/i2c.c
common/board_f.c
common/stdio.c
drivers/i2c/Makefile
include/asm-generic/global_data.h
include/config_fallbacks.h
include/configs/M5208EVBE.h
include/configs/M5235EVB.h
include/configs/M5253DEMO.h
include/configs/M5275EVB.h
include/configs/M53017EVB.h
include/configs/M5329EVB.h
include/configs/M5373EVB.h
include/configs/MPC8349EMDS.h
include/configs/MPC8349EMDS_SDRAM.h
include/configs/MPC837XERDB.h
include/configs/MPC8540ADS.h
include/configs/MPC8548CDS.h
include/configs/MPC8560ADS.h
include/configs/P1010RDB.h
include/configs/P2041RDB.h
include/configs/T102xRDB.h
include/configs/T104xRDB.h
include/configs/T208xQDS.h
include/configs/T208xRDB.h
include/configs/T4240RDB.h
include/configs/UCP1020.h
include/configs/astro_mcf5373l.h
include/configs/bur_am335x_common.h
include/configs/cl-som-imx7.h
include/configs/cm_fx6.h
include/configs/colibri_pxa270.h
include/configs/corenet_ds.h
include/configs/db-88f6720.h
include/configs/db-88f6820-gp.h
include/configs/db-mv784mp-gp.h
include/configs/devkit3250.h
include/configs/ds414.h
include/configs/eb_cpu5282.h
include/configs/edminiv2.h
include/configs/el6x_common.h
include/configs/embestmx6boards.h
include/configs/ethernut5.h
include/configs/flea3.h
include/configs/gw_ventana.h
include/configs/ids8313.h
include/configs/imx8mp_evk.h
include/configs/imx8mq_evk.h
include/configs/imx8mq_phanbell.h
include/configs/km/km-mpc83xx.h
include/configs/km/km_arm.h
include/configs/km/pg-wcom-ls102xa.h
include/configs/kzm9g.h
include/configs/legoev3.h
include/configs/ls1012a_common.h
include/configs/ls1021aiot.h
include/configs/ls1021aqds.h
include/configs/ls1021atsn.h
include/configs/ls1021atwr.h
include/configs/ls1028a_common.h
include/configs/ls1043a_common.h
include/configs/ls1046a_common.h
include/configs/ls1088a_common.h
include/configs/ls2080a_common.h
include/configs/m53menlo.h
include/configs/maxbcm.h
include/configs/mx53loco.h
include/configs/mx6sabreauto.h
include/configs/mx6sabresd.h
include/configs/nitrogen6x.h
include/configs/novena.h
include/configs/p1_p2_rdb_pc.h
include/configs/phycore_imx8mp.h
include/configs/pico-imx7d.h
include/configs/pico-imx8mq.h
include/configs/siemens-am33x-common.h
include/configs/snapper9260.h
include/configs/sniper.h
include/configs/sunxi-common.h
include/configs/t4qds.h
include/configs/tam3517-common.h
include/configs/theadorable.h
include/configs/ti_armv7_common.h
include/configs/ti_omap4_common.h
include/configs/tqma6_wru4.h
include/configs/udoo_neo.h
include/configs/usbarmory.h
include/configs/vf610twr.h
include/configs/vining_2000.h
include/configs/warp.h
include/configs/work_92105.h
include/configs/xpress.h
include/i2c.h
scripts/config_whitelist.txt

diff --git a/README b/README
index 63ac8d3fcf6c04777a70cca5e844cfe837940642..4fdc49fbb9c06f7b907c6a34860288ea2ff29783 100644 (file)
--- a/README
+++ b/README
@@ -1461,9 +1461,12 @@ The following options need to be configured:
                In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
                with a list of GPIO LEDs that have inverted polarity.
 
-- I2C Support: CONFIG_SYS_I2C
+- I2C Support: CONFIG_SYS_I2C_LEGACY
 
-               This enable the NEW i2c subsystem, and will allow you to use
+               Note: This is deprecated in favour of driver model. Use
+               CONFIG_DM_I2C instead.
+
+               This enable the legacy i2c subsystem, and will allow you to use
                i2c commands at the u-boot command line (as long as you set
                    CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE
                    for defining speed and slave address
index c3cd6c7ac7fd114459a4dd1201e49f2f9b3e7e96..0562d287058132db71acb6bb5623a6af90c5c803 100644 (file)
@@ -329,7 +329,7 @@ static void erratum_rcw_src(void)
 #ifdef CONFIG_SYS_FSL_ERRATUM_A009203
 static void erratum_a009203(void)
 {
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
        u8 __iomem *ptr;
 #ifdef I2C1_BASE_ADDR
        ptr = (u8 __iomem *)(I2C1_BASE_ADDR + I2C_DEBUG_REG);
index b3f1148f9dfd6df1ced6e0c42f1a111d6037d6a2..b24e137955c0471f1a4b2e3a6cfcaf01bd2df333 100644 (file)
@@ -88,7 +88,7 @@ void board_init_f(ulong dummy)
        preloader_console_init();
        spl_set_bd();
 
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
 #ifdef CONFIG_SPL_I2C_SUPPORT
        i2c_init_all();
 #endif
index da7ca0587cdbba03095eafe1ac5a40ec795950f0..3675ce763d1dd70d69dd8a7e21d29fa74a21370d 100644 (file)
 #define TZPC_BASE                              0x02200000
 #define TZPCDECPROT_0_SET_BASE                 (TZPC_BASE + 0x804)
 #if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_EARLY_INIT
 #endif
 #define SRDS_MAX_LANES  8
index f5538f4a903b4fb86ebf097c478effab13157594..a4b5630c46f624fce7a17bb03f9101b126904dce 100644 (file)
@@ -96,7 +96,7 @@
  */
 #if defined(CONFIG_CMD_I2C) && !CONFIG_IS_ENABLED(DM_I2C)
 #ifndef CONFIG_SYS_I2C_SOFT
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MVTWSI
 #endif
 #define CONFIG_SYS_I2C_SLAVE           0x0
index 437e975fdf7d04f41d5d6061f96db59419dfb424..f7c4960da7c9973bac3c87006a34cd505e93c990 100644 (file)
@@ -106,7 +106,7 @@ void board_init_r(gd_t *gd, ulong dest_addr)
        env_relocate();
 #endif
 
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
        i2c_init_all();
 #else
        i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
index 7ba92f5db0308da0e6a32421845215a5da6e30a2..842fb3b6a62632bc4b92dbb68656deab26d00f4e 100644 (file)
@@ -5,6 +5,6 @@
 # Author: Igor Grinberg <grinberg@compulab.co.il>
 
 obj-y                          += common.o
-obj-$(CONFIG_SYS_I2C)          += eeprom.o
+obj-$(CONFIG_SYS_I2C_LEGACY)           += eeprom.o
 obj-$(CONFIG_LCD)              += omap3_display.o
 obj-$(CONFIG_SMC911X)          += omap3_smc911x.o
index a9c0203b81a4c565057ec1944cf088af0ef9b39c..51c8acf3b82d563a5119ab2336eb39c34361237a 100644 (file)
@@ -10,7 +10,7 @@
 #define _EEPROM_
 #include <errno.h>
 
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
 int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus);
 u32 cl_eeprom_get_board_rev(uint eeprom_bus);
 int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus);
index 010f4639ee16606acd00d7e0f342bebaddbf345e..90188b099a9bfdf04cf3d15f6ea009fac850b403 100644 (file)
@@ -99,7 +99,7 @@ void board_init_r(gd_t *gd, ulong dest_addr)
        env_relocate();
 #endif
 
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
        i2c_init_all();
 #else
        i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
index 1d76f95aedf7f7f145f6b65c8d5f18cf131aad74..0aaae815c01cf8f9882e07126b467d51779b71f4 100644 (file)
@@ -38,7 +38,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int board_early_init_f(void)
 {
-#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
+#if defined(CONFIG_SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
        /* DVFS for reset */
        mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
 #endif
index 071076a336ac54e182481495f6935503a12fae4b..1802547bbfbca4b153187fedae59d79278f52ee4 100644 (file)
@@ -37,7 +37,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int board_early_init_f(void)
 {
-#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
+#if defined(CONFIG_SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
        /* DVFS for reset */
        mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
 #endif
@@ -78,7 +78,7 @@ int board_init(void)
 
 void reset_cpu(void)
 {
-#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
+#if defined(CONFIG_SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
        i2c_reg_write(CONFIG_SYS_I2C_POWERIC_ADDR, 0x20, 0x80);
 #else
        /* only CA57 ? */
index 7ba1948659f96b72d6f88ed284da29750e29d01b..ffc4eb9ff326646f1542bcbb8e0806bd987a9f4b 100644 (file)
@@ -35,7 +35,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int board_early_init_f(void)
 {
-#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
+#if defined(CONFIG_SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
        /* DVFS for reset */
        mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
 #endif
index 076c641d8a90e9ad0f4c410874d8c9d7ca5ec97c..c26e7b0555ea922060bd18be96fb2111b8af00cf 100644 (file)
@@ -104,7 +104,7 @@ int board_init(void)
        /* Address of boot parameters */
        gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
        setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
 #endif
 
index 26d557cece942e376f209bab3380f6228457cf6f..4f86a9290167dffd5bb9751a883fb289c0c26aad 100644 (file)
@@ -171,7 +171,7 @@ int board_spi_cs_gpio(unsigned bus, unsigned cs)
 #endif
 #endif
 
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
 static struct i2c_pads_info tqma6_i2c3_pads = {
        /* I2C3: on board LM75, M24C64,  */
        .scl = {
@@ -216,7 +216,7 @@ int board_init(void)
 #ifndef CONFIG_DM_SPI
        tqma6_iomuxc_spi();
 #endif
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
        tqma6_setup_i2c();
 #endif
 
index 0e1189475313d16eb9572c5d4de1068d0a1a92cd..e377cfe165e3dd5701148b9999981559d1921860 100644 (file)
@@ -46,7 +46,7 @@ static int do_date(struct cmd_tbl *cmdtp, int flag, int argc,
                printf("Cannot find RTC: err=%d\n", rcode);
                return CMD_RET_FAILURE;
        }
-#elif defined(CONFIG_SYS_I2C)
+#elif defined(CONFIG_SYS_I2C_LEGACY)
        old_bus = i2c_get_bus_num();
        i2c_set_bus_num(CONFIG_SYS_RTC_BUS_NUM);
 #else
@@ -119,7 +119,7 @@ static int do_date(struct cmd_tbl *cmdtp, int flag, int argc,
        }
 
        /* switch back to original I2C bus */
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
        i2c_set_bus_num(old_bus);
 #elif !defined(CONFIG_DM_RTC)
        I2C_SET_BUS(old_bus);
index b3fd37c8274b39567be1e6cf5a620e7faaca0e26..efd6f3ac0325888df060356d972c57553d8f2c09 100644 (file)
@@ -75,7 +75,7 @@ void eeprom_init(int bus)
        /* I2C EEPROM */
 #if CONFIG_IS_ENABLED(DM_I2C)
        eeprom_i2c_bus = bus;
-#elif defined(CONFIG_SYS_I2C)
+#elif defined(CONFIG_SYS_I2C_LEGACY)
        if (bus >= 0)
                i2c_set_bus_num(bus);
        i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
index 5d0e207874f53fc19ea01f36d52451ff138f601e..0e1895ad65d491c08a17311a85b0d199b079684a 100644 (file)
--- a/cmd/i2c.c
+++ b/cmd/i2c.c
@@ -98,7 +98,7 @@ static uint   i2c_mm_last_alen;
  * pairs.  The following macros take care of this */
 
 #if defined(CONFIG_SYS_I2C_NOPROBES)
-#if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
+#if defined(CONFIG_SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS)
 static struct
 {
        uchar   bus;
@@ -114,7 +114,7 @@ static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
 #define COMPARE_BUS(b,i)       ((b) == 0)      /* Make compiler happy */
 #define COMPARE_ADDR(a,i)      (i2c_no_probes[(i)] == (a))
 #define NO_PROBE_ADDR(i)       i2c_no_probes[(i)]
-#endif /* defined(CONFIG_SYS_I2C) */
+#endif /* defined(CONFIG_SYS_I2C_LEGACY) */
 #endif
 
 #define DISP_LINE_LEN  16
@@ -209,7 +209,7 @@ void i2c_init_board(void)
  *
  * Returns I2C bus speed in Hz.
  */
-#if !defined(CONFIG_SYS_I2C) && !CONFIG_IS_ENABLED(DM_I2C)
+#if !defined(CONFIG_SYS_I2C_LEGACY) && !CONFIG_IS_ENABLED(DM_I2C)
 /*
  * TODO: Implement architecture-specific get/set functions
  * Should go away, if we switched completely to new multibus support
@@ -1725,7 +1725,7 @@ static void show_bus(struct udevice *bus)
  *
  * Returns zero always.
  */
-#if defined(CONFIG_SYS_I2C) || CONFIG_IS_ENABLED(DM_I2C)
+#if defined(CONFIG_SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
 static int do_i2c_show_bus(struct cmd_tbl *cmdtp, int flag, int argc,
                           char *const argv[])
 {
@@ -1811,7 +1811,7 @@ static int do_i2c_show_bus(struct cmd_tbl *cmdtp, int flag, int argc,
  * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  * on error.
  */
-#if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) || \
+#if defined(CONFIG_SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS) || \
                CONFIG_IS_ENABLED(DM_I2C)
 static int do_i2c_bus_num(struct cmd_tbl *cmdtp, int flag, int argc,
                          char *const argv[])
@@ -1834,7 +1834,7 @@ static int do_i2c_bus_num(struct cmd_tbl *cmdtp, int flag, int argc,
                printf("Current bus is %d\n", bus_no);
        } else {
                bus_no = simple_strtoul(argv[1], NULL, 10);
-#if defined(CONFIG_SYS_I2C)
+#if defined(CONFIG_SYS_I2C_LEGACY)
                if (bus_no >= CONFIG_SYS_NUM_I2C_BUSES) {
                        printf("Invalid bus %d\n", bus_no);
                        return -1;
@@ -1852,7 +1852,7 @@ static int do_i2c_bus_num(struct cmd_tbl *cmdtp, int flag, int argc,
 
        return ret ? CMD_RET_FAILURE : 0;
 }
-#endif  /* defined(CONFIG_SYS_I2C) */
+#endif  /* defined(CONFIG_SYS_I2C_LEGACY) */
 
 /**
  * do_i2c_bus_speed() - Handle the "i2c speed" command-line command
@@ -1951,7 +1951,7 @@ static int do_i2c_reset(struct cmd_tbl *cmdtp, int flag, int argc,
                printf("Error: Not supported by the driver\n");
                return CMD_RET_FAILURE;
        }
-#elif defined(CONFIG_SYS_I2C)
+#elif defined(CONFIG_SYS_I2C_LEGACY)
        i2c_init(I2C_ADAP->speed, I2C_ADAP->slaveaddr);
 #else
        i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
@@ -1960,11 +1960,11 @@ static int do_i2c_reset(struct cmd_tbl *cmdtp, int flag, int argc,
 }
 
 static struct cmd_tbl cmd_i2c_sub[] = {
-#if defined(CONFIG_SYS_I2C) || CONFIG_IS_ENABLED(DM_I2C)
+#if defined(CONFIG_SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
        U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_show_bus, "", ""),
 #endif
        U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""),
-#if defined(CONFIG_SYS_I2C) || \
+#if defined(CONFIG_SYS_I2C_LEGACY) || \
        defined(CONFIG_I2C_MULTI_BUS) || CONFIG_IS_ENABLED(DM_I2C)
        U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""),
 #endif  /* CONFIG_I2C_MULTI_BUS */
@@ -2036,12 +2036,12 @@ static int do_i2c(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 /***************************************************/
 #ifdef CONFIG_SYS_LONGHELP
 static char i2c_help_text[] =
-#if defined(CONFIG_SYS_I2C) || CONFIG_IS_ENABLED(DM_I2C)
+#if defined(CONFIG_SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
        "bus [muxtype:muxaddr:muxchannel] - show I2C bus info\n"
        "i2c " /* That's the prefix for the crc32 command below. */
 #endif
        "crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
-#if defined(CONFIG_SYS_I2C) || \
+#if defined(CONFIG_SYS_I2C_LEGACY) || \
        defined(CONFIG_I2C_MULTI_BUS) || CONFIG_IS_ENABLED(DM_I2C)
        "i2c dev [dev] - show or set current I2C bus\n"
 #endif  /* CONFIG_I2C_MULTI_BUS */
index c1b8e63e5601200176ade479c055b2cb8b6f1989..f2746537c96b1f8a044370e7e2d4700cdce213e0 100644 (file)
@@ -244,7 +244,7 @@ __weak int dram_init_banksize(void)
        return 0;
 }
 
-#if defined(CONFIG_SYS_I2C)
+#if defined(CONFIG_SYS_I2C_LEGACY)
 static int init_func_i2c(void)
 {
        puts("I2C:   ");
@@ -871,7 +871,7 @@ static const init_fnc_t init_sequence_f[] = {
        misc_init_f,
 #endif
        INIT_FUNC_WATCHDOG_RESET
-#if defined(CONFIG_SYS_I2C)
+#if defined(CONFIG_SYS_I2C_LEGACY)
        init_func_i2c,
 #endif
 #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
index d4acc5256c1a4f4709028b027cb719b5b5d75e05..4083e4edb8f86ef527ce6b4a73db33b16a316397 100644 (file)
@@ -336,7 +336,7 @@ int stdio_add_devices(void)
                                       dev->name);
                }
        }
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
        i2c_init_all();
 #endif
        if (IS_ENABLED(CONFIG_DM_VIDEO)) {
index 06a1150f03d870bb4b356fe14c0e746979a65a69..c2eb24e0f7b194b2a8d42c9ebfae8b669c617953 100644 (file)
@@ -11,7 +11,7 @@ obj-$(CONFIG_$(SPL_)I2C_CROS_EC_TUNNEL) += cros_ec_tunnel.o
 obj-$(CONFIG_$(SPL_)I2C_CROS_EC_LDO) += cros_ec_ldo.o
 
 obj-$(CONFIG_I2C_MV) += mv_i2c.o
-obj-$(CONFIG_SYS_I2C) += i2c_core.o
+obj-$(CONFIG_SYS_I2C_LEGACY) += i2c_core.o
 obj-$(CONFIG_SYS_I2C_ASPEED) += ast_i2c.o
 obj-$(CONFIG_SYS_I2C_AT91) += at91_i2c.o
 obj-$(CONFIG_SYS_I2C_CADENCE) += i2c-cdns.o
index 5fed4db23f1ba22d3a9371199ab556f020204bdc..e55070303fef18ad283ba73267d5973236ec386e 100644 (file)
@@ -277,7 +277,7 @@ struct global_data {
         */
        void *trace_buff;
 #endif
-#if defined(CONFIG_SYS_I2C)
+#if defined(CONFIG_SYS_I2C_LEGACY)
        /**
         * @cur_i2c_bus: currently used I2C bus
         */
index a318926fe8e3e96e3c34e9d351862284fa84a0f2..aaf016c0459c31f8d9748742d518e24c478e5139 100644 (file)
@@ -47,8 +47,8 @@
 #endif
 
 #if CONFIG_IS_ENABLED(DM_I2C)
-# ifdef CONFIG_SYS_I2C
-#  error "Cannot define CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
+# ifdef CONFIG_SYS_I2C_LEGACY
+#  error "Cannot define CONFIG_SYS_I2C_LEGACY when CONFIG_DM_I2C is used"
 # endif
 #endif
 
index fc389b8e87f76ad39521ced2d8b58ec261b4bb00..1b8312bbc07db5489c66d52de2b787d35dc8771e 100644 (file)
@@ -40,7 +40,7 @@
 #define CONFIG_MCFTMR
 
 /* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SPEED       80000
 #define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
index 4ab3d4831c7651b4097875059a7048ac93753cae..d061f4587082dfc2dc563f19b1c4b46542136b30 100644 (file)
@@ -49,7 +49,7 @@
 #define CONFIG_MCFTMR
 
 /* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_i2C_FSL
 #define CONFIG_SYS_FSL_I2C_SPEED       80000
 #define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
index 54f6fa7c167d436e36529687453075c672182c28..8ac0086629dabbd6b43c4d6765c82e12725c9cad 100644 (file)
@@ -70,7 +70,7 @@
 #define CONFIG_HOSTNAME                "M5253DEMO"
 
 /* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SPEED       80000
 #define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
index ed93f4ad78a54bc21a7ba9fd4288b41bd582ccdd..eb7823a98a58e24734278b771935049f2b62ce0b 100644 (file)
@@ -59,7 +59,7 @@
 #endif
 
 /* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SPEED       80000
 #define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
index b934dc1388979d0ec07f0a60244f90a05d31a06c..a063b92a643fdaa77f58cdfb6525a852e97753b9 100644 (file)
@@ -55,7 +55,7 @@
 #define CONFIG_MCFTMR
 
 /* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SPEED       80000
 #define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
index 5c88f09f64fbfbf70fe23f6e7fd722cc7176a7d8..4fc6d38192497a04d1e8886bb6ded494a75b4fc9 100644 (file)
@@ -49,7 +49,7 @@
 #define CONFIG_MCFTMR
 
 /* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SPEED       80000
 #define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
index f94cc02905d771e578e6547eac91322b7e0313c8..7a9240a5717111d12589e2ad61aef9a13dbf1c9a 100644 (file)
@@ -51,7 +51,7 @@
 #define CONFIG_MCFTMR
 
 /* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SPEED       80000
 #define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
index 2cf2e2de5e65a02daa9b2310aaecccae9435669e..4dad6a58ff53260c52a6f528ed1525f674b3328e 100644 (file)
 #define CONFIG_SYS_NS16550_COM2        (CONFIG_SYS_IMMR+0x4600)
 
 /* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SPEED       400000
 #define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
index cfec59e8605003040f71f705c623e7d4e78f4a8e..f7c13d417f8f034b47a1615a97001e1c8f46dd0a 100644 (file)
 #define CONFIG_SYS_NS16550_COM2        (CONFIG_SYS_IMMR+0x4600)
 
 /* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SPEED       400000
 #define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
index ae368a1f1e3029286aef4675f4ee2dd6554e2a73..e16a5930ad83fec0def0fa3e1f0999ec44c24ff8 100644 (file)
 #define CONFIG_FSL_SERDES2     0xe3100
 
 /* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SPEED       400000
 #define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
index af90fe167a73dc2fe9811737ca8240818a9abd38..d843ba1ff78ce21cc0c1b493520ab5eb774e9778 100644 (file)
 /*
  * I2C
  */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SPEED       400000
 #define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
index 9f83931bed54c9d6d458179aa8275dcf0bf0978f..2046bf215b2c601b14c5e7f53da1868b17fe8cf0 100644 (file)
@@ -295,7 +295,7 @@ extern unsigned long get_clock_freq(void);
  * I2C
  */
 #if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_FSL_I2C_SPEED       400000
 #define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
 #define CONFIG_SYS_FSL_I2C_OFFSET      0x3000
index 5e1bef8f3b06fcd9f7410963c069cbf85f14146b..464e7c72844f09fd8d5443fd3444c7ba2fcd0a41 100644 (file)
 /*
  * I2C
  */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SPEED       400000
 #define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
index 1b68fd1072829d42274f58d55569c94905c190c8..f5209e179641348aa1bd7e225947a4e269171c29 100644 (file)
@@ -526,7 +526,7 @@ extern unsigned long get_sdram_size(void);
 
 /* I2C */
 #if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_FSL_I2C_SPEED       400000
 #define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
 #define CONFIG_SYS_FSL_I2C_OFFSET      0x3000
index 715154a0ddf39c3fd2cda1ea61f9eb10cd71cd76..b5b159406a42e777a72879e6352d2857ba4207ec 100644 (file)
@@ -260,7 +260,7 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 
 /* I2C */
 #if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_FSL_I2C_SPEED       400000
 #define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
 #define CONFIG_SYS_FSL_I2C_OFFSET      0x118000
index 35b11ad88a80712366f4844433f59a68d92bc5ca..1b4720db5c83b59277a8689fdf6dff33909e4c5a 100644 (file)
@@ -423,7 +423,7 @@ unsigned long get_board_ddr_clk(void);
 
 /* I2C */
 #if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_FSL_I2C_SPEED       50000   /* I2C speed in Hz */
 #define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
 #define CONFIG_SYS_FSL_I2C2_SPEED      50000   /* I2C speed in Hz */
index ea239f74c147861c64b262b5e6c4420b31317e26..57a0bf5287ec6821fed7cd0a9600177d9bbe89c8 100644 (file)
@@ -453,7 +453,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
 
 /* I2C */
 #if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_FSL_I2C_SPEED       400000  /* I2C speed in Hz */
 #define CONFIG_SYS_FSL_I2C2_SPEED      400000
 #define CONFIG_SYS_FSL_I2C3_SPEED      400000
index 7bc792b8d198ee1371f440e0381a491b620fedec..b8d1693017ef0494dae1b2f7cdbe6342e4b2a235 100644 (file)
@@ -371,7 +371,7 @@ unsigned long get_board_ddr_clk(void);
  * I2C
  */
 #if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_FSL_I2C_SLAVE   0x7F
 #define CONFIG_SYS_FSL_I2C2_SLAVE  0x7F
 #define CONFIG_SYS_FSL_I2C3_SLAVE  0x7F
index 9449e30bfca623b1aae26a6fd10faaedd9b432d9..a04a49d0339c510502dab9c00034f7b98bc0c75a 100644 (file)
@@ -323,7 +323,7 @@ unsigned long get_board_ddr_clk(void);
  * I2C
  */
 #if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_FSL_I2C_SLAVE   0x7F
 #define CONFIG_SYS_FSL_I2C2_SLAVE  0x7F
 #define CONFIG_SYS_FSL_I2C3_SLAVE  0x7F
index 139beae08db9f5f9a913ff4cf337f8e0eaceddc4..aa185be74113142b6746fe1c5715ac2146e893f2 100644 (file)
 
 /* I2C */
 #if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
 #define CONFIG_SYS_FSL_I2C_OFFSET      0x118000
 #define CONFIG_SYS_FSL_I2C2_SLAVE      0x7F
index c3cc72e13f7f6e871746195c721c0bdfce432507..d9a777ea1a0ea2acef2ce256f1e892c11c2b6e41 100644 (file)
 #define CONFIG_SYS_NS16550_COM2        (CONFIG_SYS_CCSRBAR + 0x4600)
 
 /* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SPEED       400000
 #define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
index 891240c7e228a90a11d6ed881c5e5e57f8c24e5c..2ea33e5eff22db30c1627bef24d990c41e2983e7 100644 (file)
@@ -58,7 +58,7 @@
 #define CONFIG_MCFTMR
 
 /* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SPEED       80000
 #define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
index 42e3e568be7866b65f7b89c77b98990a2e7205e6..042cb4637ba797316ba059f04d65572c31aef515 100644 (file)
@@ -20,7 +20,7 @@
 #define CONFIG_SYS_NS16550_COM1                0x44e09000
 
 #define CONFIG_I2C
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 
 #endif /* CONFIG_DM */
 
index 0ef55b77133b5e629d583819466e1c62c43f001c..b8928ba6c41b6a9930972d2be27f6df1b467385d 100644 (file)
@@ -31,7 +31,7 @@
 #define CONFIG_POWER_PFUZE3000_I2C_ADDR        0x08
 
 /* I2C configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MXC
 #define CONFIG_SYS_I2C_MXC_I2C2                /* Enable I2C bus 2 */
 #define CONFIG_SYS_I2C_SPEED           100000
index 9892fb881708bf3fea35137c28858b7d9afc020f..a496a80e02e5567acdfde6dff147fe044258cad1 100644 (file)
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET       /* For OTG port */
 
 /* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MXC
 #define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
 #define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
index 3dedcdaad28d72100156aa86e4b8935d11e20267..6889e8b4e5581f749e98afa85ab8cfbba623195b 100644 (file)
@@ -41,7 +41,7 @@
  */
 
 /* I2C support */
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_PXA
 #define CONFIG_PXA_STD_I2C
 #define CONFIG_PXA_PWR_I2C
index d0843c284e6394df6896e5c27b9006c390824782..924093e6b059cb66be1dcc70c8b50af6d69c3f17 100644 (file)
 
 /* I2C */
 #if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_FSL_I2C_SPEED       400000
 #define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
 #define CONFIG_SYS_FSL_I2C_OFFSET      0x118000
index 213883ef0f416cf8706ee55184a9e1797faeefe0..83c173243c26fdf66db6b82be83a1546b9df118c 100644 (file)
@@ -18,7 +18,7 @@
 #define CONFIG_SYS_TCLK                200000000       /* 200MHz */
 
 /* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MVTWSI
 #define CONFIG_I2C_MVTWSI_BASE0                MVEBU_TWSI_BASE
 #define CONFIG_SYS_I2C_SLAVE           0x0
index ed851bc67046c3710e52eed3320335f59452d23d..5a6b42854c419171b2134a9f627295539ab9c9c9 100644 (file)
@@ -13,7 +13,7 @@
 #define CONFIG_SYS_TCLK                250000000       /* 250MHz */
 
 /* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MVTWSI
 #define CONFIG_I2C_MVTWSI_BASE0                MVEBU_TWSI_BASE
 #define CONFIG_SYS_I2C_SLAVE           0x0
index 3e20516e94b325d7746107a84f95cb192285d1e2..319a291a92a2ce88cd72a566130bd5b9f30d9ab7 100644 (file)
@@ -19,7 +19,7 @@
 #define CONFIG_SYS_TCLK                250000000       /* 250MHz */
 
 /* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MVTWSI
 #define CONFIG_I2C_MVTWSI_BASE0                MVEBU_TWSI_BASE
 #define CONFIG_SYS_I2C_SLAVE           0x0
index 465d9ce8e99dc6a83a4f3fbcf1748233d5951ee2..33d71a7042ba58a4f15a50a44e61f0070ebf8ce8 100644 (file)
@@ -40,7 +40,7 @@
 /*
  * I2C
  */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_SPEED           100000
 
 /*
index c8b45066cc75a57e7f9555ebcdf59fe0330d3f52..80fd148f712a51dc2883f2f64f6e6420520eca41 100644 (file)
@@ -21,7 +21,7 @@
 #define CONFIG_SYS_TCLK                250000000       /* 250MHz */
 
 /* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MVTWSI
 #define CONFIG_I2C_MVTWSI_BASE0                MVEBU_TWSI_BASE
 #define CONFIG_SYS_I2C_SLAVE           0x0
index ab9daa4074ac12a9c8815b55a3156ba9d5e692a2..77584fa7a5d239dcf01e9c48408f4c41143df03f 100644 (file)
  * I2C
  */
 
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_FSL
 
 #define CONFIG_SYS_FSL_I2C_OFFSET      0x00000300
index 949ff55624d62adb8fdcae884460b6a0699ec849..7e0a0ea89909afa4df47c8298cff7187187f02da 100644 (file)
  * I2C related stuff
  */
 #ifdef CONFIG_CMD_I2C
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MVTWSI
 #define CONFIG_I2C_MVTWSI_BASE0                ORION5X_TWSI_BASE
 #define CONFIG_SYS_I2C_SLAVE           0x0
index 9ee7fee2d72dbcd8c8700740d426cca02e7b6709..b11717637a17080a5b44e7654743c1e481749023 100644 (file)
@@ -26,7 +26,7 @@
 #define CONFIG_SYS_FSL_USDHC_NUM       2
 
 /* I2C config */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MXC
 #define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
 #define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
index a29eec00ae6797de8f40931d844966a5ef8c20c4..401b50d51be16d9b0c18c2fba2846ae5a7e579bd 100644 (file)
@@ -21,7 +21,7 @@
 #define CONFIG_SYS_MALLOC_LEN          (10 * SZ_1M)
 
 /* I2C Configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MXC
 #define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
 #define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
index ca249d9d2b50cc3cd0cbbfa8fbc998f009a8d202..3f266543b92bd87240d540191ba5ad5ec931c3e2 100644 (file)
@@ -97,7 +97,7 @@
 /* I2C */
 #define CONFIG_SYS_MAX_I2C_BUS 1
 
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_SOFT                    /* I2C bit-banged */
 #define CONFIG_SYS_I2C_SOFT_SPEED      100000
 #define CONFIG_SYS_I2C_SOFT_SLAVE      0
index f4753cf7c51b2bc36eaccaf9ac858c0e0b4d2a58..c345fb253d55ee38e9441b53c485de35bc64258d 100644 (file)
@@ -36,7 +36,7 @@
 /*
  * Hardware drivers
  */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MXC
 #define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
 #define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
index f80a3094a18acecccdb4d361c3789498f67b260b..4f2727363477d84ffaa78b7b27bc41a11d5d58cf 100644 (file)
@@ -42,7 +42,7 @@
 #define CONFIG_SYS_BOOTM_LEN           (64 << 20)
 
 /* I2C Configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MXC
 #define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
 #define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
index 362e2892d198712c1fc95c3bc217c4417c4d2271..19d3fbff9c2b08aa5ee4857b8d35bc8c5884ad74 100644 (file)
 /*
  * I2C setup
  */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SPEED       400000
 #define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
index d1bc09e825109e8578573359e53238a92abf9695..a6569d5566ead61cb9b9f4dbcf450f138566a1cd 100644 (file)
@@ -37,7 +37,7 @@
 #define CONFIG_POWER_I2C
 #define CONFIG_POWER_PCA9450
 
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 
 #endif
 
index 1e286050bc6389d9c4680a1018d0b2d0f4ac4a82..844b16ce05c130be8e99e58a5f1ae7d6626846c8 100644 (file)
@@ -44,7 +44,7 @@
 #undef CONFIG_DM_PMIC
 #undef CONFIG_DM_PMIC_PFUZE100
 
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
 #define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
 #define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
index daee09468815aef37ac683918d83d0f9f3a8c872..70d2da14a09931c0a04231931673d422343fbba1 100644 (file)
@@ -41,7 +41,7 @@
 #undef CONFIG_DM_PMIC
 #undef CONFIG_DM_PMIC_PFUZE100
 
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
 #define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
 #define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
index 7aacd37c8a75963cb4c2c8fddd877bdbe4aebcba..ecf4378bf1cc381e7540b6058e9ad77b467e7afa 100644 (file)
@@ -62,7 +62,7 @@
 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
 
 /* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_NUM_I2C_BUSES       4
 #define CONFIG_SYS_I2C_MAX_HOPS                1
 #define CONFIG_SYS_I2C_FSL
index 4115906c5d7fcfbe3c210215c653a3efae704b40..179e145b5ffc8b11dc7cbdc39b89bb50f0f08bdd 100644 (file)
@@ -90,7 +90,7 @@
  * I2C related stuff
  */
 #undef CONFIG_I2C_MVTWSI
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define        CONFIG_SYS_I2C_SOFT     /* I2C bit-banged       */
 #define CONFIG_SYS_I2C_INIT_BOARD
 
index eb480a34a677b2962ac18db94a4073959cf88d63..a4cc4777290df352ca20c45db26c65a91479f674 100644 (file)
 /*
  * I2C
  */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_INIT_BOARD
 #define CONFIG_SYS_I2C_SPEED           100000
 
index 0724df154e99786a075a2cfed6a1ccee477d107c..059c54e21ed56e7b3c1d245fa321f76cc0123fcb 100644 (file)
@@ -83,7 +83,7 @@
 #define CONFIG_NFS_TIMEOUT 10000UL
 
 /* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_SH
 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 5
 #define CONFIG_SYS_I2C_SH_BASE0        0xE6820000
index ca96683a3a6c7eec1d2a0ee7dd6ec5dd346f8dc6..8c2c8e110d807048da380cd9eead01c3969964e2 100644 (file)
@@ -47,7 +47,7 @@
 /*
  * I2C Configuration
  */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_DAVINCI_I2C_SPEED           400000
 #define CONFIG_SYS_DAVINCI_I2C_SLAVE   10 /* Bogus, master-only in U-Boot */
 
index 6f55acc7db11f60c88c8eade19125d304767b7e9..670b55de26b1cbc84954184f15d9d28459380d6e 100644 (file)
@@ -56,7 +56,7 @@
 
 /* I2C */
 #if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #else
 #define CONFIG_I2C_SET_DEFAULT_BUS_NUM
 #define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
index cc227c3b4b1e6891fe2c55878b566f9139f10054..7f4523870e4d1d42e410887d6cd2bd519e8c5871 100644 (file)
@@ -99,7 +99,7 @@
  */
 
 #if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #else
 #define CONFIG_I2C_SET_DEFAULT_BUS_NUM
 #define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
index 7f658452835f9b7983615e51ec50a029dfbe3b82..598f6c67a1b21ddba783fd988975fbd2165e4ecd 100644 (file)
@@ -331,7 +331,7 @@ unsigned long get_board_ddr_clk(void);
  * I2C
  */
 #if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #else
 #define CONFIG_I2C_SET_DEFAULT_BUS_NUM
 #define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
index f76d5a1bd751f8b7b3a61b2d808344fe0475006a..58c2d97a327f70dbd1b7daa48ebd9fc97a243b0c 100644 (file)
 
 /* I2C */
 #if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #else
 #define CONFIG_I2C_SET_DEFAULT_BUS_NUM
 #define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
index d6783db2c25c1b9fe6cc31722e7e8b588e2eae5a..ba308c514b9d806cc399f9f898b4eb977c733490 100644 (file)
  * I2C
  */
 #if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #else
 #define CONFIG_I2C_SET_DEFAULT_BUS_NUM
 #define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
index 5900b8f0e30c2f11d77950ed86f060d8d2f90033..cbcf30e9686f2dfe1f7cd77e8cb876d6e641a1cc 100644 (file)
@@ -45,7 +45,7 @@
 
 /* I2C */
 #if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #endif
 
 /* Serial Port */
index 65d63e2fc996f01beb4175b0cde8f73dc2dc511e..834c3e6780af1e9ed8aa26465b93f0c5e77c518f 100644 (file)
 
 /* I2C */
 #if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
 #define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
 #define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
index 6d927b1ec06c26e5b657e227222ee5f36c9a91ac..f49766b36d3ce5d13e0608a4402a76b28f579287 100644 (file)
 
 /* I2C */
 #if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
 #define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
 #define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
index d574e7e592cf5c11188b4ef9dfddde4261accaa5..3f0679cf05ad7f11bb5b0803ebf4d2036a9a9255 100644 (file)
@@ -62,7 +62,7 @@
 
 /* I2C */
 #if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #endif
 
 
index 2ed6584073c71bf183f2165cb67d37dd29f05882..45273364cf39346ed90498c4203b44259827d048 100644 (file)
@@ -75,7 +75,7 @@
 
 /* I2C */
 #if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #endif
 
 /* Serial Port */
index 52c95de5231a5404339e55297b1d1e4a5cc19688..bd117daf063f9df24465160417e5dac9fcf296fa 100644 (file)
@@ -88,7 +88,7 @@
  * I2C
  */
 #ifdef CONFIG_CMD_I2C
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MXC
 #define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
 #define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
index 0c2185c529f7c880fa96178a233d277336bca8a1..c456921ea19624905861fb0f258b3cc76d91c99b 100644 (file)
@@ -18,7 +18,7 @@
 #define CONFIG_SYS_TCLK                250000000       /* 250MHz */
 
 /* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MVTWSI
 #define CONFIG_I2C_MVTWSI_BASE0                MVEBU_TWSI_BASE
 #define CONFIG_SYS_I2C_SLAVE           0x0
index e5dc9ac1d9e2191cf6a6404e2af2ca35da3813bb..e69130d520851862d73cc89fa20190cd4bbbda62 100644 (file)
@@ -36,7 +36,7 @@
 #define CONFIG_MXC_USB_FLAGS   0
 
 /* I2C Configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MXC
 #define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
 #define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
index 11896777182ddaf722347f43c062932a2070ed6f..626dbd55d7992c2ac2281ce91dd195c5da551323 100644 (file)
@@ -51,7 +51,7 @@
 #define CONFIG_SYS_FSL_USDHC_NUM       2
 
 /* I2C Configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MXC
 #define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
 #define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
index e8f52cee202eb48c036ca3b2c0b360fe5bcd5d98..9546887182bd1cb3133bca246b12aa929e0d1c7d 100644 (file)
@@ -38,7 +38,7 @@
 #endif
 
 /* I2C Configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MXC
 #define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
 #define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
index 6448ea891f8657ac01b80313dd766cb61e2434d7..0c407503517dae9f1b7b64b6efb61b4fc7465801 100644 (file)
@@ -21,7 +21,7 @@
 #define CONFIG_MXC_UART_BASE          UART2_BASE
 
 /* I2C Configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MXC
 #define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
 #define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
index 2b0a7631c8c2980c5cf4a817b441c8c402b49b21..3876412ee6eedd2a672ba4e9ad150a89496aa079 100644 (file)
@@ -52,7 +52,7 @@
 #endif
 
 /* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MXC
 #define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
 #define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
index 066311a97e4000c3d5dcdfe9af486819a11836ab..ba5b649b9715d2788cd859e4d17d4f0741a4042f 100644 (file)
 
 /* I2C */
 #if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_FSL_I2C_SPEED       400000
 #define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
 #define CONFIG_SYS_FSL_I2C_OFFSET      0x3000
index 75f84e60f5da22e7fbd7b6cd7e11e9d6e705463d..58ead45941c5c9b795c007551f90126964b87790 100644 (file)
@@ -33,7 +33,7 @@
 #define CONFIG_POWER_I2C
 #define CONFIG_POWER_PCA9450
 
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 
 #endif
 
index 80de1158ad10d06a8ed7460a10c24ccfe2c97b8b..f5d2c23400da2b8d1e15d1b03ba938b5c8aae58c 100644 (file)
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
 /* I2C configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MXC
 #define CONFIG_SYS_I2C_MXC_I2C1
 #define CONFIG_SYS_I2C_MXC_I2C2
index 97cb60c91d2f41b5b555b671bc5bb4485ab6f9f8..e4a4a3f291ac9a1fbf2bcd401efa97d742726d81 100644 (file)
@@ -40,7 +40,7 @@
 #undef CONFIG_DM_MMC
 #undef CONFIG_DM_PMIC
 
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
 #define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
 #define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
index f96dd774b178db4b9b618d4dcdec9923d0e0eb7c..abd5e2bacfd569903aa56749c20b543a01368eeb 100644 (file)
@@ -74,7 +74,7 @@
 
 /* I2C Configuration */
 #define CONFIG_I2C
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 
 /* Defines for SPL */
 #define CONFIG_SPL_MAX_SIZE            (SRAM_SCRATCH_SPACE_ADDR - \
index 34a0041617ea4b10ae5ca1aea03bb279d252646f..529976efee01d57f9b363ea4a1477edd4123f0bf 100644 (file)
@@ -73,7 +73,7 @@
 #endif
 
 /* I2C - Bit-bashed */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_SOFT            /* I2C bit-banged */
 #define CONFIG_SYS_I2C_SOFT_SPEED      100000
 #define CONFIG_SYS_I2C_SOFT_SLAVE      0x7F
index 4747e74b6815d1363aaa7a0942bc9ca2c10a2ce1..6ef96df0c0e844eefc6e0642864577ab4993ab2f 100644 (file)
@@ -53,7 +53,7 @@
  * I2C
  */
 
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_I2C_MULTI_BUS
 
 /*
index 9e37e996847641664234b3817a480429284efc9e..958b850da4a857f7da44f392481a4520da2e4439 100644 (file)
     defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
 #define CONFIG_SYS_I2C_MVTWSI
 #if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_SPEED           400000
 #define CONFIG_SYS_I2C_SLAVE           0x7f
 #endif
index a5cbb112f38bf8928a9109add66ca11b7cb0ecbe..b62ddc7075b78f35886c58c3ba76f194f2ae2ee3 100644 (file)
 #define CONFIG_SYS_NS16550_COM4        (CONFIG_SYS_CCSRBAR+0x11D600)
 
 /* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
 #define CONFIG_SYS_FSL_I2C_OFFSET      0x118000
index afc9adbe127e45b7be916654c541db01eb2d72c9..41efb64752b183018ff8ff47e70a6ce3fe6d90a9 100644 (file)
@@ -56,7 +56,7 @@
 /* EHCI */
 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO       25
 
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50            /* base address */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1               /* bytes of address */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW    0x07
index 587b134a1b36ea851141e8196a490767b2969f70..70dd15115bfb4039a44b688ac2ce505ffe28864a 100644 (file)
@@ -24,7 +24,7 @@
  */
 
 /* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MVTWSI
 #define CONFIG_I2C_MVTWSI_BASE0                MVEBU_TWSI_BASE
 #define CONFIG_I2C_MVTWSI_BASE1                MVEBU_TWSI1_BASE
index f13e9e52641a050de4c324beea0873675702ee85..fe4689cf1da24a1bf7b33bc1f02569f5e72266ef 100644 (file)
@@ -89,7 +89,7 @@
 /* If DM_I2C, enable non-DM I2C support */
 #if !CONFIG_IS_ENABLED(DM_I2C)
 #define CONFIG_I2C
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #endif
 
 /*
index d0eddcce1bb3ffe7aa7950a2ec3bed0052fb3054..1e6f03893b06ee377afaaa0116dcfccf012e67e8 100644 (file)
 
 #ifdef CONFIG_SPL_BUILD
 /* No need for i2c in SPL mode as we will use SRI2C for PMIC access on OMAP4 */
-#undef CONFIG_SYS_I2C
+#undef CONFIG_SYS_I2C_LEGACY
 #endif
 
 #endif /* __CONFIG_TI_OMAP4_COMMON_H */
index 4c4a1a0ee6d0181db622ff615acdfbad1fd2ddc8..aa98a51d961c0f94e28f27462dc43d9f69f858e3 100644 (file)
@@ -30,6 +30,6 @@
 #define CONFIG_SYS_BOOTCOUNT_BE
 
 /* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 
 #endif /* __CONFIG_TQMA6_WRU4_H */
index b6f75c9262fed351f830d147252e392f062e59fe..813e743bb8dc16d0df7f501229a6d1830e712bb0 100644 (file)
@@ -71,7 +71,7 @@
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
 /* I2C configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MXC
 #define CONFIG_SYS_I2C_MXC_I2C1
 #define CONFIG_SYS_I2C_SPEED           100000
index 27053c067fcafc5c37c5d200fed566421168f43f..648232bad333dd8883e9d936017f906fe610c5ce 100644 (file)
@@ -32,7 +32,7 @@
 #define CONFIG_MXC_USB_FLAGS   0
 
 /* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MXC
 #define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
 #define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
index fd4c749d96b80b11b9d231942640ed4f1797dd9f..4f11018e6d34c0e33ff4b2470987433f72720bdc 100644 (file)
@@ -42,7 +42,7 @@
 #define CONFIG_FEC_MXC_PHYADDR          0
 
 /* I2C Configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MXC
 #define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
 #define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
index f97431f13543b3cf2f717d8e816d5bef2c3d657c..e90eaf320387a24670ed625f973907e65836a28d 100644 (file)
@@ -43,7 +43,7 @@
 #define CONFIG_SYS_FSL_ESDHC_ADDR      USDHC4_BASE_ADDR
 
 /* I2C Configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MXC
 #define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
 #define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
index bda8ff9a34f318b03d8868c800670d77cc4e209a..e3beee0447bdecddec93304a8fe11922c8acf265 100644 (file)
@@ -53,7 +53,7 @@
 #define DFU_DEFAULT_POLL_TIMEOUT 300
 
 /* I2C Configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MXC
 #define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
 #define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
index d498c8f3bc6aeb22c9e9908d3667fa96f6bc9122..f96178bce99b8f63d0dcb7198a5c3356137c1846 100644 (file)
@@ -47,7 +47,7 @@
  * I2C driver
  */
 
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_SPEED 350000
 
 /*
index e7a26589d67eccc5654be8b3bd5c9b28d4b64199..e4678e31dc9256816a0e67c1115d3a67843e17a1 100644 (file)
@@ -22,7 +22,7 @@
 #define CONFIG_SYS_FSL_ESDHC_ADDR      USDHC2_BASE_ADDR
 
 /* I2C configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
 #define CONFIG_SYS_I2C_MXC
 #define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
 #define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
index c0fe94c1f333c215a6e283ba471a38146c4c1b1c..8db34a67fee6e338bf78f15d0c47ea0c4226b8da 100644 (file)
@@ -20,7 +20,7 @@
 
 /*
  * For now there are essentially two parts to this file - driver model
- * here at the top, and the older code below (with CONFIG_SYS_I2C being
+ * here at the top, and the older code below (with CONFIG_SYS_I2C_LEGACY being
  * most recent). The plan is to migrate everything to driver model.
  * The driver model structures and API are separate as they are different
  * enough as to be incompatible for compilation purposes.
@@ -748,7 +748,7 @@ void i2c_early_init_f(void);
 void i2c_init(int speed, int slaveaddr);
 void i2c_init_board(void);
 
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
 /*
  * i2c_get_bus_num:
  *
@@ -922,13 +922,13 @@ int i2c_set_bus_speed(unsigned int);
  */
 
 unsigned int i2c_get_bus_speed(void);
-#endif /* CONFIG_SYS_I2C */
+#endif /* CONFIG_SYS_I2C_LEGACY */
 
 /*
  * only for backwardcompatibility, should go away if we switched
  * completely to new multibus support.
  */
-#if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
+#if defined(CONFIG_SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS)
 # if !defined(CONFIG_SYS_MAX_I2C_BUS)
 #  define CONFIG_SYS_MAX_I2C_BUS               2
 # endif
index 9b35e1cf15878b073c464c8c3cbd67421cb566dd..91da5d57933cdf17c4874769b80231cfd4340645 100644 (file)
@@ -2297,7 +2297,6 @@ CONFIG_SYS_HMI_BASE
 CONFIG_SYS_HRCW_HIGH
 CONFIG_SYS_HRCW_LOW
 CONFIG_SYS_HZ_CLOCK
-CONFIG_SYS_I2C
 CONFIG_SYS_I2C2_FSL_OFFSET
 CONFIG_SYS_I2C2_OFFSET
 CONFIG_SYS_I2C2_PINMUX_CLR
@@ -2352,6 +2351,7 @@ CONFIG_SYS_I2C_IHS_SPEED_3
 CONFIG_SYS_I2C_IHS_SPEED_3_1
 CONFIG_SYS_I2C_INIT_BOARD
 CONFIG_SYS_I2C_LDI_ADDR
+CONFIG_SYS_I2C_LEGACY
 CONFIG_SYS_I2C_LPC32XX_SLAVE
 CONFIG_SYS_I2C_LPC32XX_SPEED
 CONFIG_SYS_I2C_MAC1_BUS