libgcc/config/gcn/lib2-vec_divmod-di.c

   1 /* Copyright (C) 2012-2024 Free Software Foundation, Inc.
   2    Contributed by Altera and Mentor Graphics, Inc.
   3
   4 This file is free software; you can redistribute it and/or modify it
   5 under the terms of the GNU General Public License as published by the
   6 Free Software Foundation; either version 3, or (at your option) any
   7 later version.
   8
   9 This file is distributed in the hope that it will be useful, but
  10 WITHOUT ANY WARRANTY; without even the implied warranty of
  11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  12 General Public License for more details.
  13
  14 Under Section 7 of GPL version 3, you are granted additional
  15 permissions described in the GCC Runtime Library Exception, version
  16 3.1, as published by the Free Software Foundation.
  17
  18 You should have received a copy of the GNU General Public License and
  19 a copy of the GCC Runtime Library Exception along with this program;
  20 see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
  21 <http://www.gnu.org/licenses/>.  */
  22
  23 #include "lib2-gcn.h"
  24
  25 /* 64-bit V64SI divide and modulo as used in gcn.
  26    This is a simple conversion from lib2-divmod.c.  */
  27
  28 #define MASKMODE v64di
  29 #include "amdgcn_veclib.h"
  30
  31 static v64uti
  32 __udivmodv64di4_aux (v64udi num, v64udi den, v64di __mask)
  33 {
  34   v64udi bit = VECTOR_INIT (1UL);
  35   v64udi res = VECTOR_INIT (0UL);
  36
  37   VECTOR_WHILE ((den < num) & (bit != 0) & ((den & (1L<<31)) == 0),
  38                 cond, NO_COND)
  39     VECTOR_COND_MOVE (den, den << 1, cond);
  40     VECTOR_COND_MOVE (bit, bit << 1, cond);
  41   VECTOR_ENDWHILE
  42   VECTOR_WHILE (bit != 0, loopcond, NO_COND)
  43     VECTOR_IF2 (num >= den, ifcond, loopcond)
  44       VECTOR_COND_MOVE (num, num - den, ifcond);
  45       VECTOR_COND_MOVE (res, res | bit, ifcond);
  46     VECTOR_ENDIF
  47     VECTOR_COND_MOVE (bit, bit >> 1, loopcond);
  48     VECTOR_COND_MOVE (den, den >> 1, loopcond);
  49   VECTOR_ENDWHILE
  50
  51   return PACK_DI_PAIR (res, num);
  52 }
  53
  54 static v64uti
  55 __divmodv64di4_aux (v64di a, v64di b, v64di __mask)
  56 {
  57   v64di nega = VECTOR_INIT (0L);
  58   v64di negb = VECTOR_INIT (0L);
  59
  60   VECTOR_IF (a < 0, cond)
  61     VECTOR_COND_MOVE (a, -a, cond);
  62     nega = cond;
  63   VECTOR_ENDIF
  64
  65   VECTOR_IF (b < 0, cond)
  66     VECTOR_COND_MOVE (b, -b, cond);
  67     negb = cond;
  68   VECTOR_ENDIF
  69
  70   v64udi ua = __builtin_convertvector (a, v64udi);
  71   v64udi ub = __builtin_convertvector (b, v64udi);
  72   v64uti pair = __udivmodv64di4_aux (ua, ub, __mask);
  73
  74   v64di quot = UNPACK_DI_LOW (v64di, pair);
  75   v64di rem = UNPACK_DI_HIGH (v64di, pair);
  76   VECTOR_COND_MOVE (quot, -quot, nega ^ negb);
  77   VECTOR_COND_MOVE (rem, -rem, nega);
  78   pair = PACK_DI_PAIR (quot, rem);
  79
  80   return pair;
  81 }
  82
  83
  84 static inline v64di
  85 __divv64di3_aux (v64di a, v64di b, v64di __mask)
  86 {
  87   v64uti pair = __divmodv64di4_aux (a, b, __mask);
  88   return UNPACK_DI_LOW (v64di, pair);
  89 }
  90
  91 static inline v64di
  92 __modv64di3_aux (v64di a, v64di b, v64di __mask)
  93 {
  94   v64uti pair = __divmodv64di4_aux (a, b, __mask);
  95   return UNPACK_DI_HIGH (v64di, pair);
  96 }
  97
  98
  99 static inline v64udi
 100 __udivv64di3_aux (v64udi a, v64udi b, v64di __mask)
 101 {
 102   v64uti pair = __udivmodv64di4_aux (a, b, __mask);
 103   return UNPACK_DI_LOW (v64udi, pair);
 104 }
 105
 106 static inline v64udi
 107 __umodv64di3_aux (v64udi a, v64udi b, v64di __mask)
 108 {
 109   v64uti pair = __udivmodv64di4_aux (a, b, __mask);
 110   return UNPACK_DI_HIGH (v64udi, pair);
 111 }
 112
 113 DEF_VARIANTS (__div, di3, di)
 114 DEF_VARIANTS (__mod, di3, di)
 115 DEF_VARIANTS_B (__divmod, di4, uti, di)
 116 DEF_VARIANTS (__udiv, di3, udi)
 117 DEF_VARIANTS (__umod, di3, udi)
 118 DEF_VARIANTS_B (__udivmod, di4, uti, udi)