libgcc/config/i386/crtfastmath.c

   1 /*
   2  * Copyright (C) 2005-2014 Free Software Foundation, Inc.
   3  *
   4  * This file is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License as published by the
   6  * Free Software Foundation; either version 3, or (at your option) any
   7  * later version.
   8  *
   9  * This file is distributed in the hope that it will be useful, but
  10  * WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  12  * General Public License for more details.
  13  *
  14  * Under Section 7 of GPL version 3, you are granted additional
  15  * permissions described in the GCC Runtime Library Exception, version
  16  * 3.1, as published by the Free Software Foundation.
  17  *
  18  * You should have received a copy of the GNU General Public License and
  19  * a copy of the GCC Runtime Library Exception along with this program;
  20  * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
  21  * <http://www.gnu.org/licenses/>.
  22  */
  23
  24 #ifndef _SOFT_FLOAT
  25 #define MXCSR_DAZ (1 << 6)      /* Enable denormals are zero mode */
  26 #define MXCSR_FTZ (1 << 15)     /* Enable flush to zero mode */
  27
  28 #ifndef __x86_64__
  29 /* All 64-bit targets have SSE and DAZ;
  30    only check them explicitly for 32-bit ones. */
  31 #include "cpuid.h"
  32 #endif
  33
  34 #if !defined __x86_64__ && defined __sun__ && defined __svr4__
  35 #include <signal.h>
  36 #include <ucontext.h>
  37
  38 static volatile sig_atomic_t sigill_caught;
  39
  40 static void
  41 sigill_hdlr (int sig __attribute((unused)),
  42              siginfo_t *sip __attribute__((unused)),
  43              ucontext_t *ucp)
  44 {
  45   sigill_caught = 1;
  46   /* Set PC to the instruction after the faulting one to skip over it,
  47      otherwise we enter an infinite loop.  3 is the size of the movaps
  48      instruction.  */
  49   ucp->uc_mcontext.gregs[EIP] += 3;
  50   setcontext (ucp);
  51 }
  52 #endif
  53
  54 static void __attribute__((constructor))
  55 #ifndef __x86_64__
  56 /* The i386 ABI only requires 4-byte stack alignment, so this is necessary
  57    to make sure the fxsave struct gets correct alignment.
  58    See PR27537 and PR28621.  */
  59 __attribute__ ((force_align_arg_pointer))
  60 #endif
  61 set_fast_math (void)
  62 {
  63 #ifndef __x86_64__
  64   unsigned int eax, ebx, ecx, edx;
  65
  66   if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
  67     return;
  68
  69   if (edx & bit_SSE)
  70     {
  71       unsigned int mxcsr;
  72
  73       if (edx & bit_FXSAVE)
  74         {
  75           /* Check if DAZ is available.  */
  76           struct
  77             {
  78               unsigned short cwd;
  79               unsigned short swd;
  80               unsigned short twd;
  81               unsigned short fop;
  82               unsigned int fip;
  83               unsigned int fcs;
  84               unsigned int foo;
  85               unsigned int fos;
  86               unsigned int mxcsr;
  87               unsigned int mxcsr_mask;
  88               unsigned int st_space[32];
  89               unsigned int xmm_space[32];
  90               unsigned int padding[56];
  91             } __attribute__ ((aligned (16))) fxsave;
  92
  93           /* This is necessary since some implementations of FXSAVE
  94              do not modify reserved areas within the image.  */
  95           fxsave.mxcsr_mask = 0;
  96
  97           __builtin_ia32_fxsave (&fxsave);
  98
  99           mxcsr = fxsave.mxcsr;
 100
 101           if (fxsave.mxcsr_mask & MXCSR_DAZ)
 102             mxcsr |= MXCSR_DAZ;
 103         }
 104       else
 105         mxcsr = __builtin_ia32_stmxcsr ();
 106
 107       mxcsr |= MXCSR_FTZ;
 108       __builtin_ia32_ldmxcsr (mxcsr);
 109     }
 110 #else
 111   unsigned int mxcsr = __builtin_ia32_stmxcsr ();
 112   mxcsr |= MXCSR_DAZ | MXCSR_FTZ;
 113   __builtin_ia32_ldmxcsr (mxcsr);
 114 #endif
 115 }
 116 #endif