]> git.ipfire.org Git - thirdparty/pciutils.git/blob - lspci.c
Various PCIutils changes accumulated over last two weeks:
[thirdparty/pciutils.git] / lspci.c
1 /*
2 * $Id: lspci.c,v 1.27 1999/07/07 11:23:04 mj Exp $
3 *
4 * Linux PCI Utilities -- List All PCI Devices
5 *
6 * Copyright (c) 1997--1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
7 *
8 * Can be freely distributed and used under the terms of the GNU GPL.
9 */
10
11 #include <stdio.h>
12 #include <string.h>
13 #include <stdlib.h>
14 #include <stdarg.h>
15 #include <unistd.h>
16
17 #include "pciutils.h"
18
19 /* Options */
20
21 static int verbose; /* Show detailed information */
22 static int buscentric_view; /* Show bus addresses/IRQ's instead of CPU-visible ones */
23 static int show_hex; /* Show contents of config space as hexadecimal numbers */
24 static struct pci_filter filter; /* Device filter */
25 static int show_tree; /* Show bus tree */
26 static int machine_readable; /* Generate machine-readable output */
27 static int map_mode; /* Bus mapping mode enabled */
28
29 static char options[] = "nvbxs:d:ti:mgM" GENERIC_OPTIONS ;
30
31 static char help_msg[] = "\
32 Usage: lspci [<switches>]\n\
33 \n\
34 -v\t\tBe verbose\n\
35 -n\t\tShow numeric ID's\n\
36 -b\t\tBus-centric view (PCI addresses and IRQ's instead of those seen by the CPU)\n\
37 -x\t\tShow hex-dump of config space\n\
38 -s [[<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n\
39 -d [<vendor>]:[<device>]\tShow only selected devices\n\
40 -t\t\tShow bus tree\n\
41 -m\t\tProduce machine-readable output\n\
42 -i <file>\tUse specified ID database instead of %s\n\
43 -M\t\tEnable `bus mapping' mode (dangerous; root only)\n"
44 GENERIC_HELP
45 ;
46
47 /* Communication with libpci */
48
49 static struct pci_access *pacc;
50
51 /* Format strings used for IRQ numbers and memory addresses */
52
53 #ifdef ARCH_SPARC64
54 #define IRQ_FORMAT "%08x"
55 #else
56 #define IRQ_FORMAT "%d"
57 #endif
58
59 #ifdef HAVE_64BIT_ADDRESS
60 #ifdef HAVE_LONG_ADDRESS
61 #define ADDR_FORMAT "%016Lx"
62 #else
63 #define ADDR_FORMAT "%016lx"
64 #endif
65 #else
66 #define ADDR_FORMAT "%08lx"
67 #endif
68
69 #ifdef ARCH_SPARC64
70 #define IO_FORMAT "%016Lx"
71 #elif defined(HAVE_64BIT_ADDRESS)
72 #define IO_FORMAT "%04Lx"
73 #else
74 #define IO_FORMAT "%04lx"
75 #endif
76
77 /* Our view of the PCI bus */
78
79 struct device {
80 struct device *next;
81 struct pci_dev *dev;
82 unsigned int config_cnt;
83 byte config[256];
84 };
85
86 static struct device *first_dev;
87
88 static struct device *
89 scan_device(struct pci_dev *p)
90 {
91 int how_much = (show_hex > 2) ? 256 : 64;
92 struct device *d;
93
94 if (!pci_filter_match(&filter, p))
95 return NULL;
96 d = xmalloc(sizeof(struct device));
97 bzero(d, sizeof(*d));
98 d->dev = p;
99 if (!pci_read_block(p, 0, d->config, how_much))
100 die("Unable to read %d bytes of configuration space.", how_much);
101 if (how_much < 128 && (d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS)
102 {
103 /* For cardbus bridges, we need to fetch 64 bytes more to get the full standard header... */
104 if (!pci_read_block(p, 0, d->config+64, 64))
105 die("Unable to read cardbus bridge extension data.");
106 how_much = 128;
107 }
108 d->config_cnt = how_much;
109 pci_setup_cache(p, d->config, d->config_cnt);
110 pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES);
111 return d;
112 }
113
114 static void
115 scan_devices(void)
116 {
117 struct device *d;
118 struct pci_dev *p;
119
120 pci_scan_bus(pacc);
121 for(p=pacc->devices; p; p=p->next)
122 if (d = scan_device(p))
123 {
124 d->next = first_dev;
125 first_dev = d;
126 }
127 }
128
129 static int
130 check_root(void)
131 {
132 static int is_root = -1;
133
134 if (is_root < 0)
135 is_root = !geteuid();
136 return is_root;
137 }
138
139 static int
140 config_fetch(struct device *d, unsigned int pos, unsigned int len)
141 {
142 if (pos + len < d->config_cnt)
143 return 1;
144 if (pacc->method != PCI_ACCESS_DUMP && !check_root())
145 return 0;
146 return pci_read_block(d->dev, pos, d->config + pos, len);
147 }
148
149 /* Config space accesses */
150
151 static inline byte
152 get_conf_byte(struct device *d, unsigned int pos)
153 {
154 return d->config[pos];
155 }
156
157 static word
158 get_conf_word(struct device *d, unsigned int pos)
159 {
160 return d->config[pos] | (d->config[pos+1] << 8);
161 }
162
163 static u32
164 get_conf_long(struct device *d, unsigned int pos)
165 {
166 return d->config[pos] |
167 (d->config[pos+1] << 8) |
168 (d->config[pos+2] << 16) |
169 (d->config[pos+3] << 24);
170 }
171
172 /* Sorting */
173
174 static int
175 compare_them(const void *A, const void *B)
176 {
177 const struct pci_dev *a = (*(const struct device **)A)->dev;
178 const struct pci_dev *b = (*(const struct device **)B)->dev;
179
180 if (a->bus < b->bus)
181 return -1;
182 if (a->bus > b->bus)
183 return 1;
184 if (a->dev < b->dev)
185 return -1;
186 if (a->dev > b->dev)
187 return 1;
188 if (a->func < b->func)
189 return -1;
190 if (a->func > b->func)
191 return 1;
192 return 0;
193 }
194
195 static void
196 sort_them(void)
197 {
198 struct device **index, **h, **last_dev;
199 int cnt;
200 struct device *d;
201
202 cnt = 0;
203 for(d=first_dev; d; d=d->next)
204 cnt++;
205 h = index = alloca(sizeof(struct device *) * cnt);
206 for(d=first_dev; d; d=d->next)
207 *h++ = d;
208 qsort(index, cnt, sizeof(struct device *), compare_them);
209 last_dev = &first_dev;
210 h = index;
211 while (cnt--)
212 {
213 *last_dev = *h;
214 last_dev = &(*h)->next;
215 h++;
216 }
217 *last_dev = NULL;
218 }
219
220 /* Normal output */
221
222 #define FLAG(x,y) ((x & y) ? '+' : '-')
223
224 static void
225 show_terse(struct device *d)
226 {
227 int c;
228 struct pci_dev *p = d->dev;
229 byte classbuf[128], devbuf[128];
230
231 printf("%02x:%02x.%x %s: %s",
232 p->bus,
233 p->dev,
234 p->func,
235 pci_lookup_name(pacc, classbuf, sizeof(classbuf),
236 PCI_LOOKUP_CLASS,
237 get_conf_word(d, PCI_CLASS_DEVICE), 0),
238 pci_lookup_name(pacc, devbuf, sizeof(devbuf),
239 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
240 p->vendor_id, p->device_id));
241 if (c = get_conf_byte(d, PCI_REVISION_ID))
242 printf(" (rev %02x)", c);
243 if (verbose && (c = get_conf_byte(d, PCI_CLASS_PROG)))
244 printf(" (prog-if %02x)", c);
245 putchar('\n');
246 }
247
248 static void
249 show_size(pciaddr_t x)
250 {
251 printf(" [size=");
252 if (x < 1024)
253 printf("%d", (int) x);
254 else if (x < 1048576)
255 printf("%dK", (int)(x / 1024));
256 else if (x < 0x80000000)
257 printf("%dM", (int)(x / 1048576));
258 else
259 printf(ADDR_FORMAT, x);
260 putchar(']');
261 }
262
263 static void
264 show_bases(struct device *d, int cnt)
265 {
266 struct pci_dev *p = d->dev;
267 word cmd = get_conf_word(d, PCI_COMMAND);
268 int i;
269
270 for(i=0; i<cnt; i++)
271 {
272 pciaddr_t pos = p->base_addr[i];
273 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->size[i] : 0;
274 u32 flg = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
275 if (flg == 0xffffffff)
276 flg = 0;
277 if (!pos && !flg && !len)
278 continue;
279 if (verbose > 1)
280 printf("\tRegion %d: ", i);
281 else
282 putchar('\t');
283 if (pos && !flg) /* Reported by the OS, but not by the device */
284 {
285 printf("[virtual] ");
286 flg = pos;
287 }
288 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
289 {
290 pciaddr_t a = pos & PCI_BASE_ADDRESS_IO_MASK;
291 printf("I/O ports at ");
292 if (a)
293 printf(IO_FORMAT, a);
294 else if (flg & PCI_BASE_ADDRESS_IO_MASK)
295 printf("<ignored>");
296 else
297 printf("<unassigned>");
298 if (!(cmd & PCI_COMMAND_IO))
299 printf(" [disabled]");
300 }
301 else
302 {
303 int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
304 pciaddr_t a = pos & PCI_ADDR_MEM_MASK;
305 int done = 0;
306 u32 z = 0;
307
308 printf("Memory at ");
309 if (t == PCI_BASE_ADDRESS_MEM_TYPE_64)
310 {
311 if (i >= cnt - 1)
312 {
313 printf("<invalid-64bit-slot>");
314 done = 1;
315 }
316 else
317 {
318 i++;
319 z = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
320 if (buscentric_view)
321 {
322 if (a || z)
323 printf("%08x" ADDR_FORMAT, z, a);
324 else
325 printf("<unassigned>");
326 done = 1;
327 }
328 }
329 }
330 if (!done)
331 {
332 if (a)
333 printf(ADDR_FORMAT, a);
334 else
335 printf(((flg & PCI_BASE_ADDRESS_MEM_MASK) || z) ? "<ignored>" : "<unassigned>");
336 }
337 printf(" (%s, %sprefetchable)",
338 (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" :
339 (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" :
340 (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M" : "type 3",
341 (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
342 if (!(cmd & PCI_COMMAND_MEMORY))
343 printf(" [disabled]");
344 }
345 if (len)
346 show_size(len);
347 putchar('\n');
348 }
349 }
350
351 static void
352 show_pm(struct device *d, int where, int cap)
353 {
354 int t;
355
356 printf("Power Management version %d\n", cap & PCI_PM_CAP_VER_MASK);
357 if (verbose < 2)
358 return;
359 printf("\t\tFlags: PMEClk%c AuxPwr%c DSI%c D1%c D2%c PME%c\n",
360 FLAG(cap, PCI_PM_CAP_PME_CLOCK),
361 FLAG(cap, PCI_PM_CAP_AUX_POWER),
362 FLAG(cap, PCI_PM_CAP_DSI),
363 FLAG(cap, PCI_PM_CAP_D1),
364 FLAG(cap, PCI_PM_CAP_D2),
365 FLAG(cap, PCI_PM_CAP_PME));
366 config_fetch(d, where + PCI_PM_CTRL, PCI_PM_SIZEOF - PCI_PM_CTRL);
367 t = get_conf_word(d, where + PCI_PM_CTRL);
368 printf("\t\tStatus: D%d PME-Enable%c DSel=%x DScale=%x PME%c\n",
369 t & PCI_PM_CTRL_STATE_MASK,
370 FLAG(t, PCI_PM_CTRL_PME_ENABLE),
371 (t & PCI_PM_CTRL_DATA_SEL_MASK) >> 9,
372 (t & PCI_PM_CTRL_DATA_SCALE_MASK) >> 13,
373 FLAG(t, PCI_PM_CTRL_PME_STATUS));
374 }
375
376 static void
377 show_agp(struct device *d, int where, int cap)
378 {
379 u32 t;
380
381 t = cap & 0xff;
382 printf("AGP version %x.%x\n", cap/16, cap%16);
383 if (verbose < 2)
384 return;
385 config_fetch(d, where + PCI_AGP_STATUS, PCI_AGP_SIZEOF - PCI_AGP_STATUS);
386 t = get_conf_long(d, where + PCI_AGP_STATUS);
387 printf("\t\tStatus: RQ=%d SBA%c 64bit%c FW%c Rate=%s%s%s\n",
388 (t & PCI_AGP_STATUS_RQ_MASK) >> 24U,
389 FLAG(t, PCI_AGP_STATUS_SBA),
390 FLAG(t, PCI_AGP_STATUS_64BIT),
391 FLAG(t, PCI_AGP_STATUS_FW),
392 (t & PCI_AGP_STATUS_RATE4) ? "4" : "",
393 (t & PCI_AGP_STATUS_RATE2) ? "2" : "",
394 (t & PCI_AGP_STATUS_RATE1) ? "1" : "");
395 t = get_conf_long(d, where + PCI_AGP_COMMAND);
396 printf("\t\tCommand: RQ=%d SBA%c AGP%c 64bit%c FW%c Rate=%s%s%s\n",
397 (t & PCI_AGP_COMMAND_RQ_MASK) >> 24U,
398 FLAG(t, PCI_AGP_COMMAND_SBA),
399 FLAG(t, PCI_AGP_COMMAND_AGP),
400 FLAG(t, PCI_AGP_COMMAND_64BIT),
401 FLAG(t, PCI_AGP_COMMAND_FW),
402 (t & PCI_AGP_COMMAND_RATE4) ? "4" : "",
403 (t & PCI_AGP_COMMAND_RATE2) ? "2" : "",
404 (t & PCI_AGP_COMMAND_RATE1) ? "1" : "");
405 }
406
407 static void
408 show_rom(struct device *d)
409 {
410 struct pci_dev *p = d->dev;
411 pciaddr_t rom = p->rom_base_addr;
412 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->rom_size : 0;
413
414 if (!rom && !len)
415 return;
416 printf("\tExpansion ROM at ");
417 if (rom & PCI_ROM_ADDRESS_MASK)
418 printf(ADDR_FORMAT, rom & PCI_ROM_ADDRESS_MASK);
419 else
420 printf("<unassigned>");
421 if (!(rom & PCI_ROM_ADDRESS_ENABLE))
422 printf(" [disabled]");
423 show_size(len);
424 putchar('\n');
425 }
426
427 static void
428 show_msi(struct device *d, int where, int cap)
429 {
430 int is64;
431 u32 t;
432 u16 w;
433
434 printf("Message Signalled Interrupts: 64bit%c Queue=%d/%d Enable%c\n",
435 FLAG(cap, PCI_MSI_FLAGS_64BIT),
436 (cap & PCI_MSI_FLAGS_QSIZE) >> 4,
437 (cap & PCI_MSI_FLAGS_QMASK) >> 1,
438 FLAG(cap, PCI_MSI_FLAGS_ENABLE));
439 if (verbose < 2)
440 return;
441 is64 = cap & PCI_MSI_FLAGS_64BIT;
442 config_fetch(d, where + PCI_MSI_ADDRESS_LO, (is64 ? PCI_MSI_DATA_64 : PCI_MSI_DATA_32) + 2 - PCI_MSI_ADDRESS_LO);
443 printf("\t\tAddress: ");
444 if (is64)
445 {
446 t = get_conf_long(d, where + PCI_MSI_ADDRESS_HI);
447 w = get_conf_word(d, where + PCI_MSI_DATA_64);
448 printf("%08x", t);
449 }
450 else
451 w = get_conf_word(d, where + PCI_MSI_DATA_32);
452 t = get_conf_long(d, where + PCI_MSI_ADDRESS_LO);
453 printf("%08x Data: %04x\n", t, w);
454 }
455
456 static void
457 show_slotid(int cap)
458 {
459 int esr = cap & 0xff;
460 int chs = cap >> 8;
461
462 printf("Slot ID: %d slots, First%c, chassis %02x\n",
463 esr & PCI_SID_ESR_NSLOTS,
464 FLAG(esr, PCI_SID_ESR_FIC),
465 chs);
466 }
467
468 static void
469 show_caps(struct device *d)
470 {
471 if (get_conf_word(d, PCI_STATUS) & PCI_STATUS_CAP_LIST)
472 {
473 int where = get_conf_byte(d, PCI_CAPABILITY_LIST) & ~3;
474 while (where)
475 {
476 int id, next, cap;
477 printf("\tCapabilities: ");
478 if (!config_fetch(d, where, 4))
479 {
480 puts("<available only to root>");
481 break;
482 }
483 id = get_conf_byte(d, where + PCI_CAP_LIST_ID);
484 next = get_conf_byte(d, where + PCI_CAP_LIST_NEXT) & ~3;
485 cap = get_conf_word(d, where + PCI_CAP_FLAGS);
486 printf("[%02x] ", where);
487 if (id == 0xff)
488 {
489 printf("<chain broken>\n");
490 break;
491 }
492 switch (id)
493 {
494 case PCI_CAP_ID_PM:
495 show_pm(d, where, cap);
496 break;
497 case PCI_CAP_ID_AGP:
498 show_agp(d, where, cap);
499 break;
500 case PCI_CAP_ID_VPD:
501 printf("Vital Product Data\n");
502 break;
503 case PCI_CAP_ID_SLOTID:
504 show_slotid(cap);
505 break;
506 case PCI_CAP_ID_MSI:
507 show_msi(d, where, cap);
508 break;
509 default:
510 printf("#%02x [%04x]\n", id, cap);
511 }
512 where = next;
513 }
514 }
515 }
516
517 static void
518 show_htype0(struct device *d)
519 {
520 show_bases(d, 6);
521 show_rom(d);
522 show_caps(d);
523 }
524
525 static void
526 show_htype1(struct device *d)
527 {
528 u32 io_base = get_conf_byte(d, PCI_IO_BASE);
529 u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT);
530 u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK;
531 u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE);
532 u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT);
533 u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK;
534 u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE);
535 u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT);
536 u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK;
537 word brc = get_conf_word(d, PCI_BRIDGE_CONTROL);
538
539 show_bases(d, 2);
540 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
541 get_conf_byte(d, PCI_PRIMARY_BUS),
542 get_conf_byte(d, PCI_SECONDARY_BUS),
543 get_conf_byte(d, PCI_SUBORDINATE_BUS),
544 get_conf_byte(d, PCI_SEC_LATENCY_TIMER));
545
546 if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) ||
547 (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32))
548 printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit);
549 else
550 {
551 io_base = (io_base & PCI_IO_RANGE_MASK) << 8;
552 io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8;
553 if (io_type == PCI_IO_RANGE_TYPE_32)
554 {
555 io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16);
556 io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16);
557 }
558 if (io_base)
559 printf("\tI/O behind bridge: %08x-%08x\n", io_base, io_limit+0xfff);
560 }
561
562 if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) ||
563 mem_type)
564 printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit);
565 else if (mem_base)
566 {
567 mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16;
568 mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16;
569 printf("\tMemory behind bridge: %08x-%08x\n", mem_base, mem_limit + 0xfffff);
570 }
571
572 if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) ||
573 (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64))
574 printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit);
575 else if (pref_base)
576 {
577 pref_base = (pref_base & PCI_PREF_RANGE_MASK) << 16;
578 pref_limit = (pref_limit & PCI_PREF_RANGE_MASK) << 16;
579 if (pref_type == PCI_PREF_RANGE_TYPE_32)
580 printf("\tPrefetchable memory behind bridge: %08x-%08x\n", pref_base, pref_limit + 0xfffff);
581 else
582 printf("\tPrefetchable memory behind bridge: %08x%08x-%08x%08x\n",
583 get_conf_long(d, PCI_PREF_BASE_UPPER32),
584 pref_base,
585 get_conf_long(d, PCI_PREF_LIMIT_UPPER32),
586 pref_limit);
587 }
588
589 if (get_conf_word(d, PCI_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
590 printf("\tSecondary status: SERR\n");
591
592 show_rom(d);
593
594 if (verbose > 1)
595 printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c MAbort%c >Reset%c FastB2B%c\n",
596 FLAG(brc, PCI_BRIDGE_CTL_PARITY),
597 FLAG(brc, PCI_BRIDGE_CTL_SERR),
598 FLAG(brc, PCI_BRIDGE_CTL_NO_ISA),
599 FLAG(brc, PCI_BRIDGE_CTL_VGA),
600 FLAG(brc, PCI_BRIDGE_CTL_MASTER_ABORT),
601 FLAG(brc, PCI_BRIDGE_CTL_BUS_RESET),
602 FLAG(brc, PCI_BRIDGE_CTL_FAST_BACK));
603
604 show_caps(d);
605 }
606
607 static void
608 show_htype2(struct device *d)
609 {
610 int i;
611 word cmd = get_conf_word(d, PCI_COMMAND);
612 word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL);
613 word exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE);
614
615 show_bases(d, 1);
616 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
617 get_conf_byte(d, PCI_CB_PRIMARY_BUS),
618 get_conf_byte(d, PCI_CB_CARD_BUS),
619 get_conf_byte(d, PCI_CB_SUBORDINATE_BUS),
620 get_conf_byte(d, PCI_CB_LATENCY_TIMER));
621 for(i=0; i<2; i++)
622 {
623 int p = 8*i;
624 u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p);
625 u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p);
626 if (limit > base)
627 printf("Memory window %d: %08x-%08x%s%s\n", i, base, limit,
628 (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]",
629 (brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : "");
630 }
631 for(i=0; i<2; i++)
632 {
633 int p = 8*i;
634 u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p);
635 u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p);
636 if (!(base & PCI_IO_RANGE_TYPE_32))
637 {
638 base &= 0xffff;
639 limit &= 0xffff;
640 }
641 base &= PCI_CB_IO_RANGE_MASK;
642 if (!base)
643 continue;
644 limit = (limit & PCI_CB_IO_RANGE_MASK) + 3;
645 printf("I/O window %d: %08x-%08x%s\n", i, base, limit,
646 (cmd & PCI_COMMAND_IO) ? "" : " [disabled]");
647 }
648
649 if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
650 printf("\tSecondary status: SERR\n");
651 if (verbose > 1)
652 printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n",
653 FLAG(brc, PCI_CB_BRIDGE_CTL_PARITY),
654 FLAG(brc, PCI_CB_BRIDGE_CTL_SERR),
655 FLAG(brc, PCI_CB_BRIDGE_CTL_ISA),
656 FLAG(brc, PCI_CB_BRIDGE_CTL_VGA),
657 FLAG(brc, PCI_CB_BRIDGE_CTL_MASTER_ABORT),
658 FLAG(brc, PCI_CB_BRIDGE_CTL_CB_RESET),
659 FLAG(brc, PCI_CB_BRIDGE_CTL_16BIT_INT),
660 FLAG(brc, PCI_CB_BRIDGE_CTL_POST_WRITES));
661 if (exca)
662 printf("\t16-bit legacy interface ports at %04x\n", exca);
663 }
664
665 static void
666 show_verbose(struct device *d)
667 {
668 struct pci_dev *p = d->dev;
669 word status = get_conf_word(d, PCI_STATUS);
670 word cmd = get_conf_word(d, PCI_COMMAND);
671 word class = get_conf_word(d, PCI_CLASS_DEVICE);
672 byte bist = get_conf_byte(d, PCI_BIST);
673 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
674 byte latency = get_conf_byte(d, PCI_LATENCY_TIMER);
675 byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE);
676 byte max_lat, min_gnt;
677 byte int_pin = get_conf_byte(d, PCI_INTERRUPT_PIN);
678 unsigned int irq = p->irq;
679 word subsys_v, subsys_d;
680 char ssnamebuf[256];
681
682 show_terse(d);
683
684 switch (htype)
685 {
686 case PCI_HEADER_TYPE_NORMAL:
687 if (class == PCI_CLASS_BRIDGE_PCI)
688 {
689 badhdr:
690 printf("\t!!! Header type %02x doesn't match class code %04x\n", htype, class);
691 return;
692 }
693 max_lat = get_conf_byte(d, PCI_MAX_LAT);
694 min_gnt = get_conf_byte(d, PCI_MIN_GNT);
695 subsys_v = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
696 subsys_d = get_conf_word(d, PCI_SUBSYSTEM_ID);
697 break;
698 case PCI_HEADER_TYPE_BRIDGE:
699 if (class != PCI_CLASS_BRIDGE_PCI)
700 goto badhdr;
701 irq = int_pin = min_gnt = max_lat = 0;
702 subsys_v = subsys_d = 0;
703 break;
704 case PCI_HEADER_TYPE_CARDBUS:
705 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
706 goto badhdr;
707 min_gnt = max_lat = 0;
708 subsys_v = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
709 subsys_d = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
710 break;
711 default:
712 printf("\t!!! Unknown header type %02x\n", htype);
713 return;
714 }
715
716 if (verbose && subsys_v && subsys_v != 0xffff)
717 printf("\tSubsystem: %s\n",
718 pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf),
719 PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
720 subsys_v, subsys_d));
721
722 if (verbose > 1)
723 {
724 printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c\n",
725 FLAG(cmd, PCI_COMMAND_IO),
726 FLAG(cmd, PCI_COMMAND_MEMORY),
727 FLAG(cmd, PCI_COMMAND_MASTER),
728 FLAG(cmd, PCI_COMMAND_SPECIAL),
729 FLAG(cmd, PCI_COMMAND_INVALIDATE),
730 FLAG(cmd, PCI_COMMAND_VGA_PALETTE),
731 FLAG(cmd, PCI_COMMAND_PARITY),
732 FLAG(cmd, PCI_COMMAND_WAIT),
733 FLAG(cmd, PCI_COMMAND_SERR),
734 FLAG(cmd, PCI_COMMAND_FAST_BACK));
735 printf("\tStatus: Cap%c 66Mhz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c\n",
736 FLAG(status, PCI_STATUS_CAP_LIST),
737 FLAG(status, PCI_STATUS_66MHZ),
738 FLAG(status, PCI_STATUS_UDF),
739 FLAG(status, PCI_STATUS_FAST_BACK),
740 FLAG(status, PCI_STATUS_PARITY),
741 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
742 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
743 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
744 FLAG(status, PCI_STATUS_SIG_TARGET_ABORT),
745 FLAG(status, PCI_STATUS_REC_TARGET_ABORT),
746 FLAG(status, PCI_STATUS_REC_MASTER_ABORT),
747 FLAG(status, PCI_STATUS_SIG_SYSTEM_ERROR),
748 FLAG(status, PCI_STATUS_DETECTED_PARITY));
749 if (cmd & PCI_COMMAND_MASTER)
750 {
751 printf("\tLatency: ");
752 if (min_gnt)
753 printf("%d min, ", min_gnt);
754 if (max_lat)
755 printf("%d max, ", max_lat);
756 printf("%d set", latency);
757 if (cache_line)
758 printf(", cache line size %02x", cache_line);
759 putchar('\n');
760 }
761 if (int_pin || irq)
762 printf("\tInterrupt: pin %c routed to IRQ " IRQ_FORMAT "\n",
763 (int_pin ? 'A' + int_pin - 1 : '?'), irq);
764 }
765 else
766 {
767 printf("\tFlags: ");
768 if (cmd & PCI_COMMAND_MASTER)
769 printf("bus master, ");
770 if (cmd & PCI_COMMAND_VGA_PALETTE)
771 printf("VGA palette snoop, ");
772 if (cmd & PCI_COMMAND_WAIT)
773 printf("stepping, ");
774 if (cmd & PCI_COMMAND_FAST_BACK)
775 printf("fast Back2Back, ");
776 if (status & PCI_STATUS_66MHZ)
777 printf("66Mhz, ");
778 if (status & PCI_STATUS_UDF)
779 printf("user-definable features, ");
780 printf("%s devsel",
781 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
782 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
783 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??");
784 if (cmd & PCI_COMMAND_MASTER)
785 printf(", latency %d", latency);
786 if (irq)
787 printf(", IRQ " IRQ_FORMAT, irq);
788 putchar('\n');
789 }
790
791 if (bist & PCI_BIST_CAPABLE)
792 {
793 if (bist & PCI_BIST_START)
794 printf("\tBIST is running\n");
795 else
796 printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK);
797 }
798
799 switch (htype)
800 {
801 case PCI_HEADER_TYPE_NORMAL:
802 show_htype0(d);
803 break;
804 case PCI_HEADER_TYPE_BRIDGE:
805 show_htype1(d);
806 break;
807 case PCI_HEADER_TYPE_CARDBUS:
808 show_htype2(d);
809 break;
810 }
811 }
812
813 static void
814 show_hex_dump(struct device *d)
815 {
816 unsigned int i;
817
818 for(i=0; i<d->config_cnt; i++)
819 {
820 if (! (i & 15))
821 printf("%02x:", i);
822 printf(" %02x", get_conf_byte(d, i));
823 if ((i & 15) == 15)
824 putchar('\n');
825 }
826 }
827
828 static void
829 show_machine(struct device *d)
830 {
831 struct pci_dev *p = d->dev;
832 int c;
833 word sv_id=0, sd_id=0;
834 char classbuf[128], vendbuf[128], devbuf[128], svbuf[128], sdbuf[128];
835
836 switch (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f)
837 {
838 case PCI_HEADER_TYPE_NORMAL:
839 sv_id = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
840 sd_id = get_conf_word(d, PCI_SUBSYSTEM_ID);
841 break;
842 case PCI_HEADER_TYPE_CARDBUS:
843 sv_id = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
844 sd_id = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
845 break;
846 }
847
848 if (verbose)
849 {
850 printf("Device:\t%02x:%02x.%x\n", p->bus, p->dev, p->func);
851 printf("Class:\t%s\n",
852 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, get_conf_word(d, PCI_CLASS_DEVICE), 0));
853 printf("Vendor:\t%s\n",
854 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id));
855 printf("Device:\t%s\n",
856 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id));
857 if (sv_id && sv_id != 0xffff)
858 {
859 printf("SVendor:\t%s\n",
860 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id, sd_id));
861 printf("SDevice:\t%s\n",
862 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, sv_id, sd_id));
863 }
864 if (c = get_conf_byte(d, PCI_REVISION_ID))
865 printf("Rev:\t%02x\n", c);
866 if (c = get_conf_byte(d, PCI_CLASS_PROG))
867 printf("ProgIf:\t%02x\n", c);
868 }
869 else
870 {
871 printf("%02x:%02x.%x ", p->bus, p->dev, p->func);
872 printf("\"%s\" \"%s\" \"%s\"",
873 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS,
874 get_conf_word(d, PCI_CLASS_DEVICE), 0),
875 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR,
876 p->vendor_id, p->device_id),
877 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE,
878 p->vendor_id, p->device_id));
879 if (c = get_conf_byte(d, PCI_REVISION_ID))
880 printf(" -r%02x", c);
881 if (c = get_conf_byte(d, PCI_CLASS_PROG))
882 printf(" -p%02x", c);
883 if (sv_id && sv_id != 0xffff)
884 printf(" \"%s\" \"%s\"",
885 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id, sd_id),
886 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, sv_id, sd_id));
887 else
888 printf(" \"\" \"\"");
889 putchar('\n');
890 }
891 }
892
893 static void
894 show_device(struct device *d)
895 {
896 if (machine_readable)
897 show_machine(d);
898 else if (verbose)
899 show_verbose(d);
900 else
901 show_terse(d);
902 if (show_hex)
903 show_hex_dump(d);
904 if (verbose || show_hex)
905 putchar('\n');
906 }
907
908 static void
909 show(void)
910 {
911 struct device *d;
912
913 for(d=first_dev; d; d=d->next)
914 show_device(d);
915 }
916
917 /* Tree output */
918
919 struct bridge {
920 struct bridge *chain; /* Single-linked list of bridges */
921 struct bridge *next, *child; /* Tree of bridges */
922 struct bus *first_bus; /* List of busses connected to this bridge */
923 unsigned int primary, secondary, subordinate; /* Bus numbers */
924 struct device *br_dev;
925 };
926
927 struct bus {
928 unsigned int number;
929 struct bus *sibling;
930 struct device *first_dev, **last_dev;
931 };
932
933 static struct bridge host_bridge = { NULL, NULL, NULL, NULL, ~0, 0, ~0, NULL };
934
935 static struct bus *
936 find_bus(struct bridge *b, unsigned int n)
937 {
938 struct bus *bus;
939
940 for(bus=b->first_bus; bus; bus=bus->sibling)
941 if (bus->number == n)
942 break;
943 return bus;
944 }
945
946 static struct bus *
947 new_bus(struct bridge *b, unsigned int n)
948 {
949 struct bus *bus = xmalloc(sizeof(struct bus));
950
951 bus = xmalloc(sizeof(struct bus));
952 bus->number = n;
953 bus->sibling = b->first_bus;
954 bus->first_dev = NULL;
955 bus->last_dev = &bus->first_dev;
956 b->first_bus = bus;
957 return bus;
958 }
959
960 static void
961 insert_dev(struct device *d, struct bridge *b)
962 {
963 struct pci_dev *p = d->dev;
964 struct bus *bus;
965
966 if (! (bus = find_bus(b, p->bus)))
967 {
968 struct bridge *c;
969 for(c=b->child; c; c=c->next)
970 if (c->secondary <= p->bus && p->bus <= c->subordinate)
971 return insert_dev(d, c);
972 bus = new_bus(b, p->bus);
973 }
974 /* Simple insertion at the end _does_ guarantee the correct order as the
975 * original device list was sorted by (bus, devfn) lexicographically
976 * and all devices on the new list have the same bus number.
977 */
978 *bus->last_dev = d;
979 bus->last_dev = &d->next;
980 d->next = NULL;
981 }
982
983 static void
984 grow_tree(void)
985 {
986 struct device *d, *d2;
987 struct bridge **last_br, *b;
988
989 /* Build list of bridges */
990
991 last_br = &host_bridge.chain;
992 for(d=first_dev; d; d=d->next)
993 {
994 word class = get_conf_word(d, PCI_CLASS_DEVICE);
995 byte ht = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
996 if (class == PCI_CLASS_BRIDGE_PCI &&
997 (ht == PCI_HEADER_TYPE_BRIDGE || ht == PCI_HEADER_TYPE_CARDBUS))
998 {
999 b = xmalloc(sizeof(struct bridge));
1000 if (ht == PCI_HEADER_TYPE_BRIDGE)
1001 {
1002 b->primary = get_conf_byte(d, PCI_CB_PRIMARY_BUS);
1003 b->secondary = get_conf_byte(d, PCI_CB_CARD_BUS);
1004 b->subordinate = get_conf_byte(d, PCI_CB_SUBORDINATE_BUS);
1005 }
1006 else
1007 {
1008 b->primary = get_conf_byte(d, PCI_PRIMARY_BUS);
1009 b->secondary = get_conf_byte(d, PCI_SECONDARY_BUS);
1010 b->subordinate = get_conf_byte(d, PCI_SUBORDINATE_BUS);
1011 }
1012 *last_br = b;
1013 last_br = &b->chain;
1014 b->next = b->child = NULL;
1015 b->first_bus = NULL;
1016 b->br_dev = d;
1017 }
1018 }
1019 *last_br = NULL;
1020
1021 /* Create a bridge tree */
1022
1023 for(b=&host_bridge; b; b=b->chain)
1024 {
1025 struct bridge *c, *best;
1026 best = NULL;
1027 for(c=&host_bridge; c; c=c->chain)
1028 if (c != b && b->primary >= c->secondary && b->primary <= c->subordinate &&
1029 (!best || best->subordinate - best->primary > c->subordinate - c->primary))
1030 best = c;
1031 if (best)
1032 {
1033 b->next = best->child;
1034 best->child = b;
1035 }
1036 }
1037
1038 /* Insert secondary bus for each bridge */
1039
1040 for(b=&host_bridge; b; b=b->chain)
1041 if (!find_bus(b, b->secondary))
1042 new_bus(b, b->secondary);
1043
1044 /* Create bus structs and link devices */
1045
1046 for(d=first_dev; d;)
1047 {
1048 d2 = d->next;
1049 insert_dev(d, &host_bridge);
1050 d = d2;
1051 }
1052 }
1053
1054 static void
1055 print_it(byte *line, byte *p)
1056 {
1057 *p++ = '\n';
1058 *p = 0;
1059 fputs(line, stdout);
1060 for(p=line; *p; p++)
1061 if (*p == '+' || *p == '|')
1062 *p = '|';
1063 else
1064 *p = ' ';
1065 }
1066
1067 static void show_tree_bridge(struct bridge *, byte *, byte *);
1068
1069 static void
1070 show_tree_dev(struct device *d, byte *line, byte *p)
1071 {
1072 struct pci_dev *q = d->dev;
1073 struct bridge *b;
1074 char namebuf[256];
1075
1076 p += sprintf(p, "%02x.%x", q->dev, q->func);
1077 for(b=&host_bridge; b; b=b->chain)
1078 if (b->br_dev == d)
1079 {
1080 if (b->secondary == b->subordinate)
1081 p += sprintf(p, "-[%02x]-", b->secondary);
1082 else
1083 p += sprintf(p, "-[%02x-%02x]-", b->secondary, b->subordinate);
1084 show_tree_bridge(b, line, p);
1085 return;
1086 }
1087 if (verbose)
1088 p += sprintf(p, " %s",
1089 pci_lookup_name(pacc, namebuf, sizeof(namebuf),
1090 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
1091 q->vendor_id, q->device_id));
1092 print_it(line, p);
1093 }
1094
1095 static void
1096 show_tree_bus(struct bus *b, byte *line, byte *p)
1097 {
1098 if (!b->first_dev)
1099 print_it(line, p);
1100 else if (!b->first_dev->next)
1101 {
1102 *p++ = '-';
1103 *p++ = '-';
1104 show_tree_dev(b->first_dev, line, p);
1105 }
1106 else
1107 {
1108 struct device *d = b->first_dev;
1109 while (d->next)
1110 {
1111 p[0] = '+';
1112 p[1] = '-';
1113 show_tree_dev(d, line, p+2);
1114 d = d->next;
1115 }
1116 p[0] = '\\';
1117 p[1] = '-';
1118 show_tree_dev(d, line, p+2);
1119 }
1120 }
1121
1122 static void
1123 show_tree_bridge(struct bridge *b, byte *line, byte *p)
1124 {
1125 *p++ = '-';
1126 if (!b->first_bus->sibling)
1127 {
1128 if (b == &host_bridge)
1129 p += sprintf(p, "[%02x]-", b->first_bus->number);
1130 show_tree_bus(b->first_bus, line, p);
1131 }
1132 else
1133 {
1134 struct bus *u = b->first_bus;
1135 byte *k;
1136
1137 while (u->sibling)
1138 {
1139 k = p + sprintf(p, "+-[%02x]-", u->number);
1140 show_tree_bus(u, line, k);
1141 u = u->sibling;
1142 }
1143 k = p + sprintf(p, "\\-[%02x]-", u->number);
1144 show_tree_bus(u, line, k);
1145 }
1146 }
1147
1148 static void
1149 show_forest(void)
1150 {
1151 char line[256];
1152
1153 grow_tree();
1154 show_tree_bridge(&host_bridge, line, line);
1155 }
1156
1157 /* Bus mapping mode */
1158
1159 struct bus_bridge {
1160 struct bus_bridge *next;
1161 byte this, dev, func, first, last, bug;
1162 };
1163
1164 struct bus_info {
1165 byte exists;
1166 byte guestbook;
1167 struct bus_bridge *bridges, *via;
1168 };
1169
1170 static struct bus_info *bus_info;
1171
1172 static void
1173 map_bridge(struct bus_info *bi, struct device *d, int np, int ns, int nl)
1174 {
1175 struct bus_bridge *b = xmalloc(sizeof(struct bus_bridge));
1176 struct pci_dev *p = d->dev;
1177
1178 b->next = bi->bridges;
1179 bi->bridges = b;
1180 b->this = get_conf_byte(d, np);
1181 b->dev = p->dev;
1182 b->func = p->func;
1183 b->first = get_conf_byte(d, ns);
1184 b->last = get_conf_byte(d, nl);
1185 printf("## %02x.%02x:%d is a bridge from %02x to %02x-%02x\n",
1186 p->bus, p->dev, p->func, b->this, b->first, b->last);
1187 if (b->this != p->bus)
1188 printf("!!! Bridge points to invalid primary bus.\n");
1189 if (b->first > b->last)
1190 {
1191 printf("!!! Bridge points to invalid bus range.\n");
1192 b->last = b->first;
1193 }
1194 }
1195
1196 static void
1197 do_map_bus(int bus)
1198 {
1199 int dev, func;
1200 int verbose = pacc->debugging;
1201 struct bus_info *bi = bus_info + bus;
1202 struct device *d;
1203
1204 if (verbose)
1205 printf("Mapping bus %02x\n", bus);
1206 for(dev = 0; dev < 32; dev++)
1207 if (filter.slot < 0 || filter.slot == dev)
1208 {
1209 int func_limit = 1;
1210 for(func = 0; func < func_limit; func++)
1211 if (filter.func < 0 || filter.func == func)
1212 {
1213 struct pci_dev *p = pci_get_dev(pacc, bus, dev, func);
1214 u16 vendor = pci_read_word(p, PCI_VENDOR_ID);
1215 if (vendor && vendor != 0xffff)
1216 {
1217 if (!func && (pci_read_byte(p, PCI_HEADER_TYPE) & 0x80))
1218 func_limit = 8;
1219 if (verbose)
1220 printf("Discovered device %02x:%02x.%d\n", bus, dev, func);
1221 bi->exists = 1;
1222 if (d = scan_device(p))
1223 {
1224 show_device(d);
1225 switch (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f)
1226 {
1227 case PCI_HEADER_TYPE_BRIDGE:
1228 map_bridge(bi, d, PCI_PRIMARY_BUS, PCI_SECONDARY_BUS, PCI_SUBORDINATE_BUS);
1229 break;
1230 case PCI_HEADER_TYPE_CARDBUS:
1231 map_bridge(bi, d, PCI_CB_PRIMARY_BUS, PCI_CB_CARD_BUS, PCI_CB_SUBORDINATE_BUS);
1232 break;
1233 }
1234 free(d);
1235 }
1236 else if (verbose)
1237 printf("But it was filtered out.\n");
1238 }
1239 pci_free_dev(p);
1240 }
1241 }
1242 }
1243
1244 static void
1245 do_map_bridges(int bus, int min, int max)
1246 {
1247 struct bus_info *bi = bus_info + bus;
1248 struct bus_bridge *b;
1249
1250 bi->guestbook = 1;
1251 for(b=bi->bridges; b; b=b->next)
1252 {
1253 if (bus_info[b->first].guestbook)
1254 b->bug = 1;
1255 else if (b->first < min || b->last > max)
1256 b->bug = 2;
1257 else
1258 {
1259 bus_info[b->first].via = b;
1260 do_map_bridges(b->first, b->first, b->last);
1261 }
1262 }
1263 }
1264
1265 static void
1266 map_bridges(void)
1267 {
1268 int i;
1269
1270 printf("\nSummary of buses:\n\n");
1271 for(i=0; i<256; i++)
1272 if (bus_info[i].exists && !bus_info[i].guestbook)
1273 do_map_bridges(i, 0, 255);
1274 for(i=0; i<256; i++)
1275 {
1276 struct bus_info *bi = bus_info + i;
1277 struct bus_bridge *b = bi->via;
1278
1279 if (bi->exists)
1280 {
1281 printf("%02x: ", i);
1282 if (b)
1283 printf("Entered via %02x:%02x.%d\n", b->this, b->dev, b->func);
1284 else if (!i)
1285 printf("Primary host bus\n");
1286 else
1287 printf("Secondary host bus (?)\n");
1288 }
1289 for(b=bi->bridges; b; b=b->next)
1290 {
1291 printf("\t%02x.%d Bridge to %02x-%02x", b->dev, b->func, b->first, b->last);
1292 switch (b->bug)
1293 {
1294 case 1:
1295 printf(" <overlap bug>");
1296 break;
1297 case 2:
1298 printf(" <crossing bug>");
1299 break;
1300 }
1301 putchar('\n');
1302 }
1303 }
1304 }
1305
1306 static void
1307 map_the_bus(void)
1308 {
1309 if (pacc->method == PCI_ACCESS_PROC_BUS_PCI ||
1310 pacc->method == PCI_ACCESS_DUMP)
1311 printf("WARNING: Bus mapping can be reliable only with direct hardware access enabled.\n\n");
1312 else if (!check_root())
1313 die("Only root can map the bus.");
1314 bus_info = xmalloc(sizeof(struct bus_info) * 256);
1315 bzero(bus_info, sizeof(struct bus_info) * 256);
1316 if (filter.bus >= 0)
1317 do_map_bus(filter.bus);
1318 else
1319 {
1320 int bus;
1321 for(bus=0; bus<256; bus++)
1322 do_map_bus(bus);
1323 }
1324 map_bridges();
1325 }
1326
1327 /* Main */
1328
1329 int
1330 main(int argc, char **argv)
1331 {
1332 int i;
1333 char *msg;
1334
1335 if (argc == 2 && !strcmp(argv[1], "--version"))
1336 {
1337 puts("lspci version " PCIUTILS_VERSION);
1338 return 0;
1339 }
1340
1341 pacc = pci_alloc();
1342 pacc->error = die;
1343 pci_filter_init(pacc, &filter);
1344
1345 while ((i = getopt(argc, argv, options)) != -1)
1346 switch (i)
1347 {
1348 case 'n':
1349 pacc->numeric_ids = 1;
1350 break;
1351 case 'v':
1352 verbose++;
1353 break;
1354 case 'b':
1355 pacc->buscentric = 1;
1356 buscentric_view = 1;
1357 break;
1358 case 's':
1359 if (msg = pci_filter_parse_slot(&filter, optarg))
1360 die("-f: %s", msg);
1361 break;
1362 case 'd':
1363 if (msg = pci_filter_parse_id(&filter, optarg))
1364 die("-d: %s", msg);
1365 break;
1366 case 'x':
1367 show_hex++;
1368 break;
1369 case 't':
1370 show_tree++;
1371 break;
1372 case 'i':
1373 pacc->id_file_name = optarg;
1374 break;
1375 case 'm':
1376 machine_readable++;
1377 break;
1378 case 'M':
1379 map_mode++;
1380 break;
1381 default:
1382 if (parse_generic_option(i, pacc, optarg))
1383 break;
1384 bad:
1385 fprintf(stderr, help_msg, pacc->id_file_name);
1386 return 1;
1387 }
1388 if (optind < argc)
1389 goto bad;
1390
1391 pci_init(pacc);
1392 if (map_mode)
1393 map_the_bus();
1394 else
1395 {
1396 scan_devices();
1397 sort_them();
1398 if (show_tree)
1399 show_forest();
1400 else
1401 show();
1402 }
1403 pci_cleanup(pacc);
1404
1405 return 0;
1406 }