]>
git.ipfire.org Git - thirdparty/pciutils.git/blob - setpci.c
2 * The PCI Utilities -- Manipulate PCI Configuration Registers
4 * Copyright (c) 1998--2020 Martin Mares <mj@ucw.cz>
6 * Can be freely distributed and used under the terms of the GNU GPL v2+.
8 * SPDX-License-Identifier: GPL-2.0-or-later
17 #define PCIUTILS_SETPCI
20 static int force
; /* Don't complain if no devices match */
21 static int verbose
; /* Verbosity level */
22 static int demo_mode
; /* Only show */
23 static int allow_raw_access
;
25 const char program_name
[] = "setpci";
27 static struct pci_access
*pacc
;
36 u16 cap_type
; /* PCI_CAP_xxx or 0 */
39 unsigned int hdr_type_mask
;
41 unsigned int width
; /* Byte width of the access */
42 unsigned int num_values
; /* Number of values to write; 0=read */
43 unsigned int number
; /* The n-th capability of that id */
44 struct value values
[0];
49 struct pci_filter filter
;
54 static struct group
*first_group
, **last_group
= &first_group
;
55 static int need_bus_scan
;
56 static unsigned int max_values
[] = { 0, 0xff, 0xffff, 0, 0xffffffff };
59 matches_single_device(struct group
*group
)
61 struct pci_filter
*f
= &group
->filter
;
62 return (f
->domain
>= 0 && f
->bus
>= 0 && f
->slot
>= 0 && f
->func
>= 0);
65 static struct pci_dev
**
66 select_devices(struct group
*group
)
68 struct pci_filter
*f
= &group
->filter
;
70 if (!need_bus_scan
&& matches_single_device(group
))
72 struct pci_dev
**devs
= xmalloc(sizeof(struct device
*) * 2);
73 struct pci_dev
*dev
= pci_get_dev(pacc
, f
->domain
, f
->bus
, f
->slot
, f
->func
);
75 if (pci_filter_match(f
, dev
))
82 struct pci_dev
**devs
, *dev
;
86 for (dev
= pacc
->devices
; dev
; dev
= dev
->next
)
87 if (pci_filter_match(f
, dev
))
90 devs
= xmalloc(sizeof(struct device
*) * cnt
);
92 for (dev
= pacc
->devices
; dev
; dev
= dev
->next
)
93 if (pci_filter_match(f
, dev
))
101 static void PCI_PRINTF(1,2)
102 trace(const char *fmt
, ...)
112 exec_op(struct op
*op
, struct pci_dev
*dev
)
114 const char * const formats
[] = { NULL
, " %02x", " %04x", NULL
, " %08x" };
115 const char * const mask_formats
[] = { NULL
, " %02x->(%02x:%02x)->%02x", " %04x->(%04x:%04x)->%04x", NULL
, " %08x->(%08x:%08x)->%08x" };
116 unsigned int i
, x
, y
;
118 int width
= op
->width
;
121 sprintf(slot
, "%04x:%02x:%02x.%x", dev
->domain
, dev
->bus
, dev
->dev
, dev
->func
);
126 unsigned int cap_nr
= op
->number
;
127 cap
= pci_find_cap_nr(dev
, op
->cap_id
, op
->cap_type
, &cap_nr
);
130 else if (cap_nr
== 0)
131 die("%s: Instance #%d of %s %04x not found - there are no capabilities with that id.", slot
,
132 op
->number
, ((op
->cap_type
== PCI_CAP_NORMAL
) ? "Capability" : "Extended capability"),
135 die("%s: Instance #%d of %s %04x not found - there %s only %d %s with that id.", slot
,
136 op
->number
, ((op
->cap_type
== PCI_CAP_NORMAL
) ? "Capability" : "Extended capability"),
137 op
->cap_id
, ((cap_nr
== 1) ? "is" : "are"), cap_nr
,
138 ((cap_nr
== 1) ? "capability" : "capabilities"));
140 trace(((op
->cap_type
== PCI_CAP_NORMAL
) ? "(cap %02x @%02x) " : "(ecap %04x @%03x) "), op
->cap_id
, addr
);
143 trace("@%02x", addr
);
145 /* We have already checked it when parsing, but addressing relative to capabilities can change the address. */
146 if (addr
& (width
-1))
147 die("%s: Unaligned access of width %d to register %04x", slot
, width
, addr
);
148 if (addr
+ width
> 0x1000)
149 die("%s: Access of width %d to register %04x out of range", slot
, width
, addr
);
151 if (op
->hdr_type_mask
)
153 unsigned int hdr_type
= pci_read_byte(dev
, PCI_HEADER_TYPE
) & 0x7f;
154 if (hdr_type
> 2 || !((1 << hdr_type
) & op
->hdr_type_mask
))
155 die("%s: Does not have register %s.", slot
, op
->name
);
160 for (i
=0; i
<op
->num_values
; i
++)
162 if ((op
->values
[i
].mask
& max_values
[width
]) == max_values
[width
])
164 x
= op
->values
[i
].value
;
165 trace(formats
[width
], op
->values
[i
].value
);
172 y
= pci_read_byte(dev
, addr
);
175 y
= pci_read_word(dev
, addr
);
178 y
= pci_read_long(dev
, addr
);
181 x
= (y
& ~op
->values
[i
].mask
) | op
->values
[i
].value
;
182 trace(mask_formats
[width
], y
, op
->values
[i
].value
, op
->values
[i
].mask
, x
);
189 pci_write_byte(dev
, addr
, x
);
192 pci_write_word(dev
, addr
, x
);
195 pci_write_long(dev
, addr
, x
);
209 x
= pci_read_byte(dev
, addr
);
212 x
= pci_read_word(dev
, addr
);
215 x
= pci_read_long(dev
, addr
);
218 printf(formats
[width
]+1, x
);
229 for (group
= first_group
; group
; group
= group
->next
)
231 struct pci_dev
**vec
= select_devices(group
);
236 if (!vec
[0] && !force
)
237 fprintf(stderr
, "setpci: Warning: No devices selected for operation group %d.\n", group_cnt
);
239 for (i
= 0; dev
= vec
[i
]; i
++)
242 for (op
= group
->first_op
; op
; op
= op
->next
)
256 for (group
= first_group
; group
; group
= group
->next
)
257 for (op
= group
->first_op
; op
; op
= op
->next
)
259 if (op
->num_values
&& !demo_mode
)
261 if (!matches_single_device(group
) || !allow_raw_access
)
270 unsigned int hdr_type_mask
;
274 static const struct reg_name pci_reg_names
[] = {
275 { 0, 0x00, 2, 0x0, "VENDOR_ID" },
276 { 0, 0x02, 2, 0x0, "DEVICE_ID" },
277 { 0, 0x04, 2, 0x0, "COMMAND" },
278 { 0, 0x06, 2, 0x0, "STATUS" },
279 { 0, 0x08, 1, 0x0, "REVISION" },
280 { 0, 0x09, 1, 0x0, "CLASS_PROG" },
281 { 0, 0x0a, 2, 0x0, "CLASS_DEVICE" },
282 { 0, 0x0c, 1, 0x0, "CACHE_LINE_SIZE" },
283 { 0, 0x0d, 1, 0x0, "LATENCY_TIMER" },
284 { 0, 0x0e, 1, 0x0, "HEADER_TYPE" },
285 { 0, 0x0f, 1, 0x0, "BIST" },
286 { 0, 0x10, 4, 0x3, "BASE_ADDRESS_0" },
287 { 0, 0x14, 4, 0x3, "BASE_ADDRESS_1" },
288 { 0, 0x18, 4, 0x1, "BASE_ADDRESS_2" },
289 { 0, 0x1c, 4, 0x1, "BASE_ADDRESS_3" },
290 { 0, 0x20, 4, 0x1, "BASE_ADDRESS_4" },
291 { 0, 0x24, 4, 0x1, "BASE_ADDRESS_5" },
292 { 0, 0x28, 4, 0x1, "CARDBUS_CIS" },
293 { 0, 0x2c, 2, 0x1, "SUBSYSTEM_VENDOR_ID" },
294 { 0, 0x2e, 2, 0x1, "SUBSYSTEM_ID" },
295 { 0, 0x30, 4, 0x1, "ROM_ADDRESS" },
296 { 0, 0x34, 1, 0x3, "CAPABILITIES" },
297 { 0, 0x3c, 1, 0x3, "INTERRUPT_LINE" },
298 { 0, 0x3d, 1, 0x3, "INTERRUPT_PIN" },
299 { 0, 0x3e, 1, 0x1, "MIN_GNT" },
300 { 0, 0x3f, 1, 0x1, "MAX_LAT" },
301 { 0, 0x18, 1, 0x2, "PRIMARY_BUS" },
302 { 0, 0x19, 1, 0x2, "SECONDARY_BUS" },
303 { 0, 0x1a, 1, 0x2, "SUBORDINATE_BUS" },
304 { 0, 0x1b, 1, 0x2, "SEC_LATENCY_TIMER" },
305 { 0, 0x1c, 1, 0x2, "IO_BASE" },
306 { 0, 0x1d, 1, 0x2, "IO_LIMIT" },
307 { 0, 0x1e, 2, 0x2, "SEC_STATUS" },
308 { 0, 0x20, 2, 0x2, "MEMORY_BASE" },
309 { 0, 0x22, 2, 0x2, "MEMORY_LIMIT" },
310 { 0, 0x24, 2, 0x2, "PREF_MEMORY_BASE" },
311 { 0, 0x26, 2, 0x2, "PREF_MEMORY_LIMIT" },
312 { 0, 0x28, 4, 0x2, "PREF_BASE_UPPER32" },
313 { 0, 0x2c, 4, 0x2, "PREF_LIMIT_UPPER32" },
314 { 0, 0x30, 2, 0x2, "IO_BASE_UPPER16" },
315 { 0, 0x32, 2, 0x2, "IO_LIMIT_UPPER16" },
316 { 0, 0x38, 4, 0x2, "BRIDGE_ROM_ADDRESS" },
317 { 0, 0x3e, 2, 0x2, "BRIDGE_CONTROL" },
318 { 0, 0x10, 4, 0x4, "CB_CARDBUS_BASE" },
319 { 0, 0x14, 2, 0x4, "CB_CAPABILITIES" },
320 { 0, 0x16, 2, 0x4, "CB_SEC_STATUS" },
321 { 0, 0x18, 1, 0x4, "CB_BUS_NUMBER" },
322 { 0, 0x19, 1, 0x4, "CB_CARDBUS_NUMBER" },
323 { 0, 0x1a, 1, 0x4, "CB_SUBORDINATE_BUS" },
324 { 0, 0x1b, 1, 0x4, "CB_CARDBUS_LATENCY" },
325 { 0, 0x1c, 4, 0x4, "CB_MEMORY_BASE_0" },
326 { 0, 0x20, 4, 0x4, "CB_MEMORY_LIMIT_0" },
327 { 0, 0x24, 4, 0x4, "CB_MEMORY_BASE_1" },
328 { 0, 0x28, 4, 0x4, "CB_MEMORY_LIMIT_1" },
329 { 0, 0x2c, 2, 0x4, "CB_IO_BASE_0" },
330 { 0, 0x2e, 2, 0x4, "CB_IO_BASE_0_HI" },
331 { 0, 0x30, 2, 0x4, "CB_IO_LIMIT_0" },
332 { 0, 0x32, 2, 0x4, "CB_IO_LIMIT_0_HI" },
333 { 0, 0x34, 2, 0x4, "CB_IO_BASE_1" },
334 { 0, 0x36, 2, 0x4, "CB_IO_BASE_1_HI" },
335 { 0, 0x38, 2, 0x4, "CB_IO_LIMIT_1" },
336 { 0, 0x3a, 2, 0x4, "CB_IO_LIMIT_1_HI" },
337 { 0, 0x40, 2, 0x4, "CB_SUBSYSTEM_VENDOR_ID" },
338 { 0, 0x42, 2, 0x4, "CB_SUBSYSTEM_ID" },
339 { 0, 0x44, 4, 0x4, "CB_LEGACY_MODE_BASE" },
340 { 0x10001, 0, 0, 0x0, "CAP_PM" },
341 { 0x10002, 0, 0, 0x0, "CAP_AGP" },
342 { 0x10003, 0, 0, 0x0, "CAP_VPD" },
343 { 0x10004, 0, 0, 0x0, "CAP_SLOTID" },
344 { 0x10005, 0, 0, 0x0, "CAP_MSI" },
345 { 0x10006, 0, 0, 0x0, "CAP_CHSWP" },
346 { 0x10007, 0, 0, 0x0, "CAP_PCIX" },
347 { 0x10008, 0, 0, 0x0, "CAP_HT" },
348 { 0x10009, 0, 0, 0x0, "CAP_VNDR" },
349 { 0x1000a, 0, 0, 0x0, "CAP_DBG" },
350 { 0x1000b, 0, 0, 0x0, "CAP_CCRC" },
351 { 0x1000c, 0, 0, 0x0, "CAP_HOTPLUG" },
352 { 0x1000d, 0, 0, 0x0, "CAP_SSVID" },
353 { 0x1000e, 0, 0, 0x0, "CAP_AGP3" },
354 { 0x1000f, 0, 0, 0x0, "CAP_SECURE" },
355 { 0x10010, 0, 0, 0x0, "CAP_EXP" },
356 { 0x10011, 0, 0, 0x0, "CAP_MSIX" },
357 { 0x10012, 0, 0, 0x0, "CAP_SATA" },
358 { 0x10013, 0, 0, 0x0, "CAP_AF" },
359 { 0x10014, 0, 0, 0x0, "CAP_EA" },
360 { 0x20001, 0, 0, 0x0, "ECAP_AER" },
361 { 0x20002, 0, 0, 0x0, "ECAP_VC" },
362 { 0x20003, 0, 0, 0x0, "ECAP_DSN" },
363 { 0x20004, 0, 0, 0x0, "ECAP_PB" },
364 { 0x20005, 0, 0, 0x0, "ECAP_RCLINK" },
365 { 0x20006, 0, 0, 0x0, "ECAP_RCILINK" },
366 { 0x20007, 0, 0, 0x0, "ECAP_RCEC" },
367 { 0x20008, 0, 0, 0x0, "ECAP_MFVC" },
368 { 0x20009, 0, 0, 0x0, "ECAP_VC2" },
369 { 0x2000a, 0, 0, 0x0, "ECAP_RBCB" },
370 { 0x2000b, 0, 0, 0x0, "ECAP_VNDR" },
371 { 0x2000d, 0, 0, 0x0, "ECAP_ACS" },
372 { 0x2000e, 0, 0, 0x0, "ECAP_ARI" },
373 { 0x2000f, 0, 0, 0x0, "ECAP_ATS" },
374 { 0x20010, 0, 0, 0x0, "ECAP_SRIOV" },
375 { 0x20011, 0, 0, 0x0, "ECAP_MRIOV" },
376 { 0x20012, 0, 0, 0x0, "ECAP_MCAST" },
377 { 0x20013, 0, 0, 0x0, "ECAP_PRI" },
378 { 0x20015, 0, 0, 0x0, "ECAP_REBAR" },
379 { 0x20016, 0, 0, 0x0, "ECAP_DPA" },
380 { 0x20017, 0, 0, 0x0, "ECAP_TPH" },
381 { 0x20018, 0, 0, 0x0, "ECAP_LTR" },
382 { 0x20019, 0, 0, 0x0, "ECAP_SECPCI" },
383 { 0x2001a, 0, 0, 0x0, "ECAP_PMUX" },
384 { 0x2001b, 0, 0, 0x0, "ECAP_PASID" },
385 { 0x2001c, 0, 0, 0x0, "ECAP_LNR" },
386 { 0x2001d, 0, 0, 0x0, "ECAP_DPC" },
387 { 0x2001e, 0, 0, 0x0, "ECAP_L1PM" },
388 { 0x2001f, 0, 0, 0x0, "ECAP_PTM" },
389 { 0x20020, 0, 0, 0x0, "ECAP_M_PCIE" },
390 { 0x20021, 0, 0, 0x0, "ECAP_FRS" },
391 { 0x20022, 0, 0, 0x0, "ECAP_RTR" },
392 { 0x20023, 0, 0, 0x0, "ECAP_DVSEC" },
393 { 0x20024, 0, 0, 0x0, "ECAP_VF_REBAR" },
394 { 0x20025, 0, 0, 0x0, "ECAP_DLNK" },
395 { 0x20026, 0, 0, 0x0, "ECAP_16GT" },
396 { 0x20027, 0, 0, 0x0, "ECAP_LMR" },
397 { 0x20028, 0, 0, 0x0, "ECAP_HIER_ID" },
398 { 0x20029, 0, 0, 0x0, "ECAP_NPEM" },
399 { 0, 0, 0, 0x0, NULL
}
405 const struct reg_name
*r
;
407 printf("cap pos w name\n");
408 for (r
= pci_reg_names
; r
->name
; r
++)
410 if (r
->cap
>= 0x20000)
411 printf("%04x", r
->cap
- 0x20000);
413 printf(" %02x", r
->cap
- 0x10000);
416 printf(" %02x %c %s\n", r
->offset
, "-BW?L"[r
->width
], r
->name
);
424 "Usage: setpci [<options>] (<device>+ <reg>[=<values>]*)*\n"
427 "-f\t\tDon't complain if there's nothing to do\n"
429 "-D\t\tList changes, don't commit them\n"
430 "-r\t\tUse raw access without bus scan if possible\n"
431 "--dumpregs\tDump all known register names and exit\n"
433 "PCI access options:\n"
436 "Setting commands:\n"
437 "<device>:\t-s [[[<domain>]:][<bus>]:][<slot>][.[<func>]]\n"
438 "\t\t-d [<vendor>]:[<device>]\n"
439 "<reg>:\t\t<base>[+<offset>][.(B|W|L)][@<number>]\n"
440 "<base>:\t\t<address>\n"
441 "\t\t<named-register>\n"
442 "\t\t[E]CAP_<capability-name>\n"
443 "\t\t[E]CAP<capability-number>\n"
444 "<values>:\t<value>[,<value>...]\n"
446 "\t\t<hex>:<mask>\n");
450 static void NONRET
PCI_PRINTF(1,2)
451 parse_err(const char *msg
, ...)
455 fprintf(stderr
, "setpci: ");
456 vfprintf(stderr
, msg
, args
);
457 fprintf(stderr
, ".\nTry `setpci --help' for more information.\n");
462 parse_options(int argc
, char **argv
)
464 const char opts
[] = GENERIC_OPTIONS
;
469 if (!strcmp(argv
[1], "--help"))
471 if (!strcmp(argv
[1], "--version"))
473 puts("setpci version " PCIUTILS_VERSION
);
476 if (!strcmp(argv
[1], "--dumpregs"))
483 while (i
< argc
&& argv
[i
][0] == '-')
485 char *c
= argv
[i
++] + 1;
510 if (e
= strchr(opts
, *c
))
521 parse_err("Option -%c requires an argument", *e
);
526 if (!parse_generic_option(*e
, pacc
, arg
))
527 parse_err("Unable to parse option -%c", *e
);
532 parse_err("Invalid or misplaced option -%c", *c
);
541 static int parse_filter(int argc
, char **argv
, int i
, struct group
*group
)
546 if (!c
[1] || !strchr("sd", c
[1]))
547 parse_err("Invalid option -%c", c
[1]);
549 d
= (c
[2] == '=') ? c
+3 : c
+2;
553 parse_err("Option -%c requires an argument", c
[1]);
557 if (d
= pci_filter_parse_slot(&group
->filter
, d
))
558 parse_err("Unable to parse filter -s %s", d
);
561 if (d
= pci_filter_parse_id(&group
->filter
, d
))
562 parse_err("Unable to parse filter -d %s", d
);
565 parse_err("Unknown filter option -%c", c
[1]);
571 static const struct reg_name
*parse_reg_name(char *name
)
573 const struct reg_name
*r
;
575 for (r
= pci_reg_names
; r
->name
; r
++)
576 if (!strcasecmp(r
->name
, name
))
581 static int parse_x32(char *c
, char **stopp
, unsigned int *resp
)
589 l
= strtoul(c
, &stop
, 16);
609 static void parse_register(struct op
*op
, char *base
)
611 const struct reg_name
*r
;
614 op
->cap_type
= op
->cap_id
= 0;
615 if (parse_x32(base
, NULL
, &op
->addr
) > 0)
617 else if (r
= parse_reg_name(base
))
619 switch (r
->cap
& 0xff0000)
622 op
->cap_type
= PCI_CAP_NORMAL
;
625 op
->cap_type
= PCI_CAP_EXTENDED
;
628 op
->cap_id
= r
->cap
& 0xffff;
629 op
->addr
= r
->offset
;
630 op
->hdr_type_mask
= r
->hdr_type_mask
;
632 if (r
->width
&& !op
->width
)
633 op
->width
= r
->width
;
636 else if (!strncasecmp(base
, "CAP", 3))
638 if (parse_x32(base
+3, NULL
, &cap
) > 0 && cap
< 0x100)
640 op
->cap_type
= PCI_CAP_NORMAL
;
646 else if (!strncasecmp(base
, "ECAP", 4))
648 if (parse_x32(base
+4, NULL
, &cap
) > 0 && cap
< 0x1000)
650 op
->cap_type
= PCI_CAP_EXTENDED
;
656 parse_err("Unknown register \"%s\"", base
);
659 static void parse_op(char *c
, struct group
*group
)
661 char *base
, *offset
, *width
, *value
, *number
;
666 /* Split the argument */
668 if (value
= strchr(base
, '='))
670 if (number
= strchr(base
, '@'))
672 if (width
= strchr(base
, '.'))
674 if (offset
= strchr(base
, '+'))
677 /* Look for setting of values and count how many */
682 parse_err("Missing value");
684 for (e
=value
; *e
; e
++)
689 /* Allocate the operation */
690 op
= xmalloc(sizeof(struct op
) + n
*sizeof(struct value
));
691 memset(op
, 0, sizeof(struct op
));
692 *group
->last_op
= op
;
693 group
->last_op
= &op
->next
;
696 /* What is the width suffix? */
700 parse_err("Invalid width \"%s\"", width
);
701 switch (*width
& 0xdf)
704 op
->width
= 1; break;
706 op
->width
= 2; break;
708 op
->width
= 4; break;
710 parse_err("Invalid width \"%c\"", *width
);
716 /* Check which n-th capability of the same id we want */
720 if (parse_x32(number
, NULL
, &num
) <= 0 || (int) num
< 0)
721 parse_err("Invalid number \"%s\"", number
);
728 /* Find the register */
729 parse_register(op
, base
);
731 parse_err("Missing width");
737 if (parse_x32(offset
, NULL
, &off
) <= 0 || off
>= 0x1000)
738 parse_err("Invalid offset \"%s\"", offset
);
743 if (op
->addr
>= 0x1000 || op
->addr
+ op
->width
*(n
? n
: 1) > 0x1000)
744 parse_err("Register number %02x out of range", op
->addr
);
745 if (op
->addr
& (op
->width
- 1))
746 parse_err("Unaligned register address %02x", op
->addr
);
748 /* Parse the values */
751 unsigned int ll
, lim
;
752 e
= strchr(value
, ',');
755 if (parse_x32(value
, &f
, &ll
) < 0 || f
&& *f
!= ':')
756 parse_err("Invalid value \"%s\"", value
);
757 lim
= max_values
[op
->width
];
758 if (ll
> lim
&& ll
< ~0U - lim
)
759 parse_err("Value \"%s\" is out of range", value
);
760 op
->values
[j
].value
= ll
;
763 if (parse_x32(f
+1, NULL
, &ll
) <= 0)
764 parse_err("Invalid mask \"%s\"", f
+1);
765 if (ll
> lim
&& ll
< ~0U - lim
)
766 parse_err("Mask \"%s\" is out of range", f
+1);
767 op
->values
[j
].mask
= ll
;
768 op
->values
[j
].value
&= ll
;
771 op
->values
[j
].mask
= ~0U;
776 static struct group
*new_group(void)
778 struct group
*g
= xmalloc(sizeof(*g
));
780 memset(g
, 0, sizeof(*g
));
781 pci_filter_init(pacc
, &g
->filter
);
782 g
->last_op
= &g
->first_op
;
785 last_group
= &g
->next
;
789 static void parse_ops(int argc
, char **argv
, int i
)
791 struct group
*group
= NULL
;
799 if (!group
|| group
->first_op
)
801 i
= parse_filter(argc
, argv
, i
-1, group
);
806 parse_err("Filter specification expected");
811 parse_err("No operation specified");
815 main(int argc
, char **argv
)
821 i
= parse_options(argc
, argv
);
825 parse_ops(argc
, argv
, i
);