1 diff --git a/drivers/net/wireless/ath/ath5k/ath5k.h b/drivers/net/wireless/ath/ath5k/ath5k.h
2 index 66bcb50..ad4d446 100644
3 --- a/drivers/net/wireless/ath/ath5k/ath5k.h
4 +++ b/drivers/net/wireless/ath/ath5k/ath5k.h
5 @@ -535,7 +535,7 @@ struct ath5k_txq_info {
6 u32 tqi_cbr_period; /* Constant bit rate period */
7 u32 tqi_cbr_overflow_limit;
9 - u32 tqi_ready_time; /* Not used */
10 + u32 tqi_ready_time; /* Time queue waits after an event */
14 diff --git a/drivers/net/wireless/ath/ath5k/base.c b/drivers/net/wireless/ath/ath5k/base.c
15 index b501537..535a6af 100644
16 --- a/drivers/net/wireless/ath/ath5k/base.c
17 +++ b/drivers/net/wireless/ath/ath5k/base.c
18 @@ -1516,7 +1516,8 @@ ath5k_beaconq_config(struct ath5k_softc *sc)
20 ret = ath5k_hw_get_tx_queueprops(ah, sc->bhalq, &qi);
25 if (sc->opmode == NL80211_IFTYPE_AP ||
26 sc->opmode == NL80211_IFTYPE_MESH_POINT) {
28 @@ -1543,10 +1544,25 @@ ath5k_beaconq_config(struct ath5k_softc *sc)
30 ATH5K_ERR(sc, "%s: unable to update parameters for beacon "
31 "hardware queue!\n", __func__);
35 + ret = ath5k_hw_reset_tx_queue(ah, sc->bhalq); /* push to h/w */
39 - return ath5k_hw_reset_tx_queue(ah, sc->bhalq); /* push to h/w */;
40 + /* reconfigure cabq with ready time to 80% of beacon_interval */
41 + ret = ath5k_hw_get_tx_queueprops(ah, AR5K_TX_QUEUE_ID_CAB, &qi);
45 + qi.tqi_ready_time = (sc->bintval * 80) / 100;
46 + ret = ath5k_hw_set_tx_queueprops(ah, AR5K_TX_QUEUE_ID_CAB, &qi);
50 + ret = ath5k_hw_reset_tx_queue(ah, AR5K_TX_QUEUE_ID_CAB);
56 diff --git a/drivers/net/wireless/ath/ath5k/qcu.c b/drivers/net/wireless/ath/ath5k/qcu.c
57 index abe36c0..9122a85 100644
58 --- a/drivers/net/wireless/ath/ath5k/qcu.c
59 +++ b/drivers/net/wireless/ath/ath5k/qcu.c
60 @@ -408,12 +408,13 @@ int ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue)
63 case AR5K_TX_QUEUE_CAB:
64 + /* XXX: use BCN_SENT_GT, if we can figure out how */
65 AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_MISC(queue),
66 - AR5K_QCU_MISC_FRSHED_BCN_SENT_GT |
67 + AR5K_QCU_MISC_FRSHED_DBA_GT |
68 AR5K_QCU_MISC_CBREXP_DIS |
69 AR5K_QCU_MISC_CBREXP_BCN_DIS);
71 - ath5k_hw_reg_write(ah, ((AR5K_TUNE_BEACON_INTERVAL -
72 + ath5k_hw_reg_write(ah, ((tq->tqi_ready_time -
73 (AR5K_TUNE_SW_BEACON_RESP -
74 AR5K_TUNE_DMA_BEACON_RESP) -
75 AR5K_TUNE_ADDITIONAL_SWBA_BACKOFF) * 1024) |