1 2011-03-02 Harsha Jagasia <harsha.jagasia@amd.com>
2 Ulrich Drepper <drepper@gmail.com>
4 * sysdeps/x86_64/memset.S: After aligning destination, code
5 branches to different locations depending on the value of
6 misalignment, when multiarch is enabled. Fix this.
8 2011-03-02 Harsha Jagasia <harsha.jagasia@amd.com>
10 * sysdeps/x86_64/cacheinfo.c (init_cacheinfo):
11 Set _x86_64_preferred_memory_instruction for AMD processsors.
12 * sysdeps/x86_64/multiarch/init-arch.c (__init_cpu_features):
13 Set bit_Prefer_SSE_for_memop for AMD processors.
15 2010-11-07 H.J. Lu <hongjiu.lu@intel.com>
17 * sysdeps/x86_64/memset.S: Check USE_MULTIARCH and USE_SSE2 for
19 * sysdeps/x86_64/multiarch/Makefile (sysdep_routines): Add
21 * sysdeps/x86_64/multiarch/bzero.S: New file.
22 * sysdeps/x86_64/multiarch/cacheinfo.c: New file.
23 * sysdeps/x86_64/multiarch/memset-x86-64.S: New file.
24 * sysdeps/x86_64/multiarch/memset.S: New file.
25 * sysdeps/x86_64/multiarch/memset_chk.S: New file.
26 * sysdeps/x86_64/multiarch/init-arch.c (__init_cpu_features):
27 Set bit_Prefer_SSE_for_memop for Intel processors.
28 * sysdeps/x86_64/multiarch/init-arch.h (bit_Prefer_SSE_for_memop):
30 (index_Prefer_SSE_for_memop): Define.
31 (HAS_PREFER_SSE_FOR_MEMOP): Define.
33 Index: glibc-2.12-2-gc4ccff1/sysdeps/x86_64/cacheinfo.c
34 ===================================================================
35 --- glibc-2.12-2-gc4ccff1.orig/sysdeps/x86_64/cacheinfo.c
36 +++ glibc-2.12-2-gc4ccff1/sysdeps/x86_64/cacheinfo.c
37 @@ -613,6 +613,25 @@ init_cacheinfo (void)
38 long int core = handle_amd (_SC_LEVEL2_CACHE_SIZE);
39 shared = handle_amd (_SC_LEVEL3_CACHE_SIZE);
41 +#ifndef DISABLE_PREFERRED_MEMORY_INSTRUCTION
42 +# ifdef USE_MULTIARCH
43 + eax = __cpu_features.cpuid[COMMON_CPUID_INDEX_1].eax;
44 + ebx = __cpu_features.cpuid[COMMON_CPUID_INDEX_1].ebx;
45 + ecx = __cpu_features.cpuid[COMMON_CPUID_INDEX_1].ecx;
46 + edx = __cpu_features.cpuid[COMMON_CPUID_INDEX_1].edx;
48 + __cpuid (1, eax, ebx, ecx, edx);
51 + /* AMD prefers SSSE3 instructions for memory/string routines
52 + if they are avaiable, otherwise it prefers integer
55 + __x86_64_preferred_memory_instruction = 3;
57 + __x86_64_preferred_memory_instruction = 0;
60 /* Get maximum extended function. */
61 __cpuid (0x80000000, max_cpuid_ex, ebx, ecx, edx);
63 Index: glibc-2.12-2-gc4ccff1/sysdeps/x86_64/memset.S
64 ===================================================================
65 --- glibc-2.12-2-gc4ccff1.orig/sysdeps/x86_64/memset.S
66 +++ glibc-2.12-2-gc4ccff1/sysdeps/x86_64/memset.S
68 #define __STOS_UPPER_BOUNDARY $65536
72 +#if !defined NOT_IN_libc && !defined USE_MULTIARCH
74 mov %rsi,%rdx /* Adjust parameter. */
75 xorl %esi,%esi /* Fill with 0s. */
76 @@ -34,10 +34,10 @@ weak_alias (__bzero, bzero)
79 #if defined PIC && !defined NOT_IN_libc
81 +ENTRY_CHK (__memset_chk)
83 jb HIDDEN_JUMPTARGET (__chk_fail)
85 +END_CHK (__memset_chk)
89 @@ -591,157 +591,15 @@ L(A6Q1): mov %dx,-0xe(%rdi)
90 L(A7Q0): mov %dl,-0x7(%rdi)
91 L(A6Q0): mov %dx,-0x6(%rdi)
98 - cmpl $0x1,__x86_64_preferred_memory_instruction(%rip)
102 - cmpq __STOS_LOWER_BOUNDARY,%r8
103 - jae L(8byte_stos_try)
109 - jz L(8byte_move_skip)
117 - movq %rdx, 8 (%rdi)
118 - movq %rdx, 16 (%rdi)
119 - movq %rdx, 24 (%rdi)
120 - movq %rdx, 32 (%rdi)
121 - movq %rdx, 40 (%rdi)
122 - movq %rdx, 48 (%rdi)
123 - movq %rdx, 56 (%rdi)
124 - movq %rdx, 64 (%rdi)
125 - movq %rdx, 72 (%rdi)
126 - movq %rdx, 80 (%rdi)
127 - movq %rdx, 88 (%rdi)
128 - movq %rdx, 96 (%rdi)
129 - movq %rdx, 104 (%rdi)
130 - movq %rdx, 112 (%rdi)
131 - movq %rdx, 120 (%rdi)
133 - leaq 128 (%rdi),%rdi
135 - jnz L(8byte_move_loop)
139 - lea (%rdi,%r8,1),%rdi
142 - lea L(setPxQx)(%rip),%r11
143 - jmpq *(%r11,%r8,8) # old scheme remained for nonPIC
145 - lea L(Got0)(%rip),%r11
146 - lea L(setPxQx)(%rip),%rcx
147 - movswq (%rcx,%r8,2),%rcx
148 - lea (%rcx,%r11,1),%r11
154 - mov __x86_64_shared_cache_size(%rip),%r9d // ck largest cache size
155 - cmpq %r8,%r9 // calculate the lesser of remaining
156 - cmovaq %r8,%r9 // bytes and largest cache size
159 -L(8byte_move_reuse_try):
160 - cmp __STOS_UPPER_BOUNDARY,%r8
169 - jz L(8byte_stos_skip)
180 - ja L(8byte_nt_move)
183 - lea (%rdi,%r8,1),%rdi
185 - lea L(setPxQx)(%rip),%r11
186 - jmpq *(%r11,%r8,8) # old scheme remained for nonPIC
188 - lea L(Got0)(%rip),%r11
189 - lea L(setPxQx)(%rip),%rcx
190 - movswq (%rcx,%r8,2),%rcx
191 - lea (%rcx,%r11,1),%r11
199 - jz L(8byte_nt_move_skip)
202 -L(8byte_nt_move_loop):
205 - movntiq %rdx, (%rdi)
206 - movntiq %rdx, 8 (%rdi)
207 - movntiq %rdx, 16 (%rdi)
208 - movntiq %rdx, 24 (%rdi)
209 - movntiq %rdx, 32 (%rdi)
210 - movntiq %rdx, 40 (%rdi)
211 - movntiq %rdx, 48 (%rdi)
212 - movntiq %rdx, 56 (%rdi)
213 - movntiq %rdx, 64 (%rdi)
214 - movntiq %rdx, 72 (%rdi)
215 - movntiq %rdx, 80 (%rdi)
216 - movntiq %rdx, 88 (%rdi)
217 - movntiq %rdx, 96 (%rdi)
218 - movntiq %rdx, 104 (%rdi)
219 - movntiq %rdx, 112 (%rdi)
220 - movntiq %rdx, 120 (%rdi)
222 - leaq 128 (%rdi),%rdi
224 - jnz L(8byte_nt_move_loop)
228 -L(8byte_nt_move_skip):
230 +#ifndef USE_MULTIARCH
233 - lea (%rdi,%r8,1),%rdi
235 - lea L(setPxQx)(%rip),%r11
236 - jmpq *(%r11,%r8,8) # old scheme remained for nonPIC
239 - lea L(Got0)(%rip),%r11
240 - lea L(setPxQx)(%rip),%rcx
241 - movswq (%rcx,%r8,2),%rcx
242 - lea (%rcx,%r11,1),%r11
248 +#if !defined USE_MULTIARCH || defined USE_SSE2
249 # fill RegXMM0 with the pattern
251 punpcklqdq %xmm0,%xmm0
252 @@ -1342,11 +1200,162 @@ L(SSExDx):
253 .short L(SSE15QB)-L(SSE0Q0)
256 +#endif /* !defined USE_MULTIARCH || defined USE_SSE2 */
259 +#ifndef USE_MULTIARCH
262 + cmpl $0x1,__x86_64_preferred_memory_instruction(%rip)
264 +#endif /* USE_MULTIARCH */
267 + cmpq __STOS_LOWER_BOUNDARY,%r8
268 + jae L(8byte_stos_try)
274 + jz L(8byte_move_skip)
282 + movq %rdx, 8 (%rdi)
283 + movq %rdx, 16 (%rdi)
284 + movq %rdx, 24 (%rdi)
285 + movq %rdx, 32 (%rdi)
286 + movq %rdx, 40 (%rdi)
287 + movq %rdx, 48 (%rdi)
288 + movq %rdx, 56 (%rdi)
289 + movq %rdx, 64 (%rdi)
290 + movq %rdx, 72 (%rdi)
291 + movq %rdx, 80 (%rdi)
292 + movq %rdx, 88 (%rdi)
293 + movq %rdx, 96 (%rdi)
294 + movq %rdx, 104 (%rdi)
295 + movq %rdx, 112 (%rdi)
296 + movq %rdx, 120 (%rdi)
298 + leaq 128 (%rdi),%rdi
300 + jnz L(8byte_move_loop)
304 + lea (%rdi,%r8,1),%rdi
307 + lea L(setPxQx)(%rip),%r11
308 + jmpq *(%r11,%r8,8) # old scheme remained for nonPIC
310 + lea L(Got0)(%rip),%r11
311 + lea L(setPxQx)(%rip),%rcx
312 + movswq (%rcx,%r8,2),%rcx
313 + lea (%rcx,%r11,1),%r11
319 + mov __x86_64_shared_cache_size(%rip),%r9d // ck largest cache size
320 + cmpq %r8,%r9 // calculate the lesser of remaining
321 + cmovaq %r8,%r9 // bytes and largest cache size
324 +L(8byte_move_reuse_try):
325 + cmp __STOS_UPPER_BOUNDARY,%r8
334 + jz L(8byte_stos_skip)
345 + ja L(8byte_nt_move)
348 + lea (%rdi,%r8,1),%rdi
350 + lea L(setPxQx)(%rip),%r11
351 + jmpq *(%r11,%r8,8) # old scheme remained for nonPIC
353 + lea L(Got0)(%rip),%r11
354 + lea L(setPxQx)(%rip),%rcx
355 + movswq (%rcx,%r8,2),%rcx
356 + lea (%rcx,%r11,1),%r11
364 + jz L(8byte_nt_move_skip)
367 +L(8byte_nt_move_loop):
370 + movntiq %rdx, (%rdi)
371 + movntiq %rdx, 8 (%rdi)
372 + movntiq %rdx, 16 (%rdi)
373 + movntiq %rdx, 24 (%rdi)
374 + movntiq %rdx, 32 (%rdi)
375 + movntiq %rdx, 40 (%rdi)
376 + movntiq %rdx, 48 (%rdi)
377 + movntiq %rdx, 56 (%rdi)
378 + movntiq %rdx, 64 (%rdi)
379 + movntiq %rdx, 72 (%rdi)
380 + movntiq %rdx, 80 (%rdi)
381 + movntiq %rdx, 88 (%rdi)
382 + movntiq %rdx, 96 (%rdi)
383 + movntiq %rdx, 104 (%rdi)
384 + movntiq %rdx, 112 (%rdi)
385 + movntiq %rdx, 120 (%rdi)
387 + leaq 128 (%rdi),%rdi
389 + jnz L(8byte_nt_move_loop)
393 +L(8byte_nt_move_skip):
396 + lea (%rdi,%r8,1),%rdi
398 + lea L(setPxQx)(%rip),%r11
399 + jmpq *(%r11,%r8,8) # old scheme remained for nonPIC
401 + lea L(Got0)(%rip),%r11
402 + lea L(setPxQx)(%rip),%rcx
403 + movswq (%rcx,%r8,2),%rcx
404 + lea (%rcx,%r11,1),%r11
409 libc_hidden_builtin_def (memset)
411 -#if defined PIC && !defined NOT_IN_libc
412 +#if defined PIC && !defined NOT_IN_libc && !defined USE_MULTIARCH
413 strong_alias (__memset_chk, __memset_zero_constant_len_parameter)
414 .section .gnu.warning.__memset_zero_constant_len_parameter
415 .string "memset used with constant zero length parameter; this could be due to transposed parameters"
416 Index: glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/Makefile
417 ===================================================================
418 --- glibc-2.12-2-gc4ccff1.orig/sysdeps/x86_64/multiarch/Makefile
419 +++ glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/Makefile
420 @@ -7,7 +7,8 @@ ifeq ($(subdir),string)
421 sysdep_routines += stpncpy-c strncpy-c strcmp-ssse3 strncmp-ssse3 \
422 strend-sse4 memcmp-sse4 \
423 strcasestr-nonascii strcasecmp_l-ssse3 \
427 ifeq (yes,$(config-cflags-sse4))
428 sysdep_routines += strcspn-c strpbrk-c strspn-c strstr-c strcasestr-c
429 CFLAGS-strcspn-c.c += -msse4
430 Index: glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/bzero.S
431 ===================================================================
433 +++ glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/bzero.S
435 +/* Multiple versions of bzero
436 + Copyright (C) 2010 Free Software Foundation, Inc.
437 + This file is part of the GNU C Library.
439 + The GNU C Library is free software; you can redistribute it and/or
440 + modify it under the terms of the GNU Lesser General Public
441 + License as published by the Free Software Foundation; either
442 + version 2.1 of the License, or (at your option) any later version.
444 + The GNU C Library is distributed in the hope that it will be useful,
445 + but WITHOUT ANY WARRANTY; without even the implied warranty of
446 + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
447 + Lesser General Public License for more details.
449 + You should have received a copy of the GNU Lesser General Public
450 + License along with the GNU C Library; if not, write to the Free
451 + Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
455 +#include <init-arch.h>
459 + .type __bzero, @gnu_indirect_function
460 + cmpl $0, __cpu_features+KIND_OFFSET(%rip)
462 + call __init_cpu_features
463 +1: leaq __bzero_x86_64(%rip), %rax
464 + testl $bit_Prefer_SSE_for_memop, __cpu_features+FEATURE_OFFSET+index_Prefer_SSE_for_memop(%rip)
466 + leaq __bzero_sse2(%rip), %rax
470 + .type __bzero_sse2, @function
474 + mov %rsi,%rdx /* Adjust parameter. */
475 + xorl %esi,%esi /* Fill with 0s. */
478 + .size __bzero_sse2, .-__bzero_sse2
480 + .type __bzero_x86_64, @function
484 + mov %rsi,%rdx /* Adjust parameter. */
485 + xorl %esi,%esi /* Fill with 0s. */
486 + jmp __memset_x86_64
488 + .size __bzero_x86_64, .-__bzero_x86_64
490 +weak_alias (__bzero, bzero)
491 Index: glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/cacheinfo.c
492 ===================================================================
494 +++ glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/cacheinfo.c
496 +#define DISABLE_PREFERRED_MEMORY_INSTRUCTION
497 +#include "../cacheinfo.c"
498 Index: glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/init-arch.c
499 ===================================================================
500 --- glibc-2.12-2-gc4ccff1.orig/sysdeps/x86_64/multiarch/init-arch.c
501 +++ glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/init-arch.c
502 @@ -59,6 +59,11 @@ __init_cpu_features (void)
504 get_common_indeces (&family, &model);
506 + /* Intel processors prefer SSE instruction for memory/string
507 + routines if they are avaiable. */
508 + __cpu_features.feature[index_Prefer_SSE_for_memop]
509 + |= bit_Prefer_SSE_for_memop;
511 unsigned int eax = __cpu_features.cpuid[COMMON_CPUID_INDEX_1].eax;
512 unsigned int extended_family = (eax >> 20) & 0xff;
513 unsigned int extended_model = (eax >> 12) & 0xf0;
514 @@ -92,6 +97,14 @@ __init_cpu_features (void)
515 kind = arch_kind_amd;
517 get_common_indeces (&family, &model);
519 + unsigned int ecx = __cpu_features.cpuid[COMMON_CPUID_INDEX_1].ecx;
521 + /* AMD processors prefer SSE instructions for memory/string routines
522 + if they are available, otherwise they prefer integer instructions. */
524 + __cpu_features.feature[index_Prefer_SSE_for_memop]
525 + |= bit_Prefer_SSE_for_memop;
528 kind = arch_kind_other;
529 Index: glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/init-arch.h
530 ===================================================================
531 --- glibc-2.12-2-gc4ccff1.orig/sysdeps/x86_64/multiarch/init-arch.h
532 +++ glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/init-arch.h
534 Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
537 -#define bit_Fast_Rep_String (1 << 0)
538 +#define bit_Fast_Rep_String (1 << 0)
539 +#define bit_Prefer_SSE_for_memop (1 << 3)
544 # define index_SSE4_2 COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET
546 #define index_Fast_Rep_String FEATURE_INDEX_1*FEATURE_SIZE
547 +# define index_Prefer_SSE_for_memop FEATURE_INDEX_1*FEATURE_SIZE
549 #else /* __ASSEMBLER__ */
551 @@ -103,5 +105,12 @@ extern const struct cpu_features *__get_
552 # define HAS_FMA HAS_CPU_FEATURE (COMMON_CPUID_INDEX_1, ecx, 12)
554 # define index_Fast_Rep_String FEATURE_INDEX_1
555 +# define index_Prefer_SSE_for_memop FEATURE_INDEX_1
557 +#define HAS_ARCH_FEATURE(idx, bit) \
558 + ((__get_cpu_features ()->feature[idx] & (bit)) != 0)
560 +#define HAS_PREFER_SSE_FOR_MEMOP \
561 + HAS_ARCH_FEATURE (index_Prefer_SSE_for_memop, bit_Prefer_SSE_for_memop)
563 #endif /* __ASSEMBLER__ */
564 Index: glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/memset-x86-64.S
565 ===================================================================
567 +++ glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/memset-x86-64.S
573 +# define ENTRY_CHK(name) \
574 + .type __memset_chk_x86_64, @function; \
575 + .globl __memset_chk_x86_64; \
577 + __memset_chk_x86_64: cfi_startproc; \
580 +# define END_CHK(name) \
581 + cfi_endproc; .size __memset_chk_x86_64, .-__memset_chk_x86_64
583 +# define libc_hidden_builtin_def(name)
584 +# define memset __memset_x86_64
585 +# include "../memset.S"
587 Index: glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/memset.S
588 ===================================================================
590 +++ glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/memset.S
592 +/* Multiple versions of memset
593 + Copyright (C) 2010 Free Software Foundation, Inc.
594 + This file is part of the GNU C Library.
596 + The GNU C Library is free software; you can redistribute it and/or
597 + modify it under the terms of the GNU Lesser General Public
598 + License as published by the Free Software Foundation; either
599 + version 2.1 of the License, or (at your option) any later version.
601 + The GNU C Library is distributed in the hope that it will be useful,
602 + but WITHOUT ANY WARRANTY; without even the implied warranty of
603 + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
604 + Lesser General Public License for more details.
606 + You should have received a copy of the GNU Lesser General Public
607 + License along with the GNU C Library; if not, write to the Free
608 + Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
612 +#include <init-arch.h>
614 +/* Define multiple versions only for the definition in lib. */
617 + .type memset, @gnu_indirect_function
618 + cmpl $0, __cpu_features+KIND_OFFSET(%rip)
620 + call __init_cpu_features
621 +1: leaq __memset_x86_64(%rip), %rax
622 + testl $bit_Prefer_SSE_for_memop, __cpu_features+FEATURE_OFFSET+index_Prefer_SSE_for_memop(%rip)
624 + leaq __memset_sse2(%rip), %rax
631 +# define ENTRY(name) \
632 + .type __memset_sse2, @function; \
633 + .globl __memset_sse2; \
635 + __memset_sse2: cfi_startproc; \
638 +# define END(name) \
639 + cfi_endproc; .size __memset_sse2, .-__memset_sse2
642 +# define ENTRY_CHK(name) \
643 + .type __memset_chk_sse2, @function; \
644 + .globl __memset_chk_sse2; \
646 + __memset_chk_sse2: cfi_startproc; \
649 +# define END_CHK(name) \
650 + cfi_endproc; .size __memset_chk_sse2, .-__memset_chk_sse2
653 +# undef libc_hidden_builtin_def
654 +/* It doesn't make sense to send libc-internal memset calls through a PLT.
655 + The speedup we get from using GPR instruction is likely eaten away
656 + by the indirect call in the PLT. */
657 +# define libc_hidden_builtin_def(name) \
658 + .globl __GI_memset; __GI_memset = __memset_sse2
661 +# undef strong_alias
662 +# define strong_alias(original, alias)
665 +#include "../memset.S"
666 Index: glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/memset_chk.S
667 ===================================================================
669 +++ glibc-2.12-2-gc4ccff1/sysdeps/x86_64/multiarch/memset_chk.S
671 +/* Multiple versions of __memset_chk
672 + Copyright (C) 2010 Free Software Foundation, Inc.
673 + This file is part of the GNU C Library.
675 + The GNU C Library is free software; you can redistribute it and/or
676 + modify it under the terms of the GNU Lesser General Public
677 + License as published by the Free Software Foundation; either
678 + version 2.1 of the License, or (at your option) any later version.
680 + The GNU C Library is distributed in the hope that it will be useful,
681 + but WITHOUT ANY WARRANTY; without even the implied warranty of
682 + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
683 + Lesser General Public License for more details.
685 + You should have received a copy of the GNU Lesser General Public
686 + License along with the GNU C Library; if not, write to the Free
687 + Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
691 +#include <init-arch.h>
693 +/* Define multiple versions only for the definition in lib. */
697 + .type __memset_chk, @gnu_indirect_function
698 + cmpl $0, __cpu_features+KIND_OFFSET(%rip)
700 + call __init_cpu_features
701 +1: leaq __memset_chk_x86_64(%rip), %rax
702 + testl $bit_Prefer_SSE_for_memop, __cpu_features+FEATURE_OFFSET+index_Prefer_SSE_for_memop(%rip)
704 + leaq __memset_chk_sse2(%rip), %rax
708 +strong_alias (__memset_chk, __memset_zero_constant_len_parameter)
709 + .section .gnu.warning.__memset_zero_constant_len_parameter
710 + .string "memset used with constant zero length parameter; this could be due to transposed parameters"
712 +# include "../memset_chk.S"