1 From c314138bd045e050432158ab021160de3ba51c5e Mon Sep 17 00:00:00 2001
2 From: Russell King <rmk+kernel@armlinux.org.uk>
3 Date: Thu, 30 Jan 2020 22:42:38 +0000
4 Subject: [PATCH 2/4] net: dpaa2-mac: add support for more 10G modes
6 Phylink documentation says:
7 * Note that the PHY may be able to transform from one connection
8 * technology to another, so, eg, don't clear 1000BaseX just
9 * because the MAC is unable to BaseX mode. This is more about
10 * clearing unsupported speeds and duplex settings. The port modes
11 * should not be cleared; phylink_set_port_modes() will help with this.
13 So add the missing 10G modes.
15 Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
17 drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c | 6 ++++++
18 1 file changed, 6 insertions(+)
20 diff --git a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
21 index 8fe32ed4f6dc..3be849cee47b 100644
22 --- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
23 +++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
24 @@ -140,6 +140,12 @@ static void dpaa2_mac_validate(struct phylink_config *config,
25 case PHY_INTERFACE_MODE_10GBASER:
26 case PHY_INTERFACE_MODE_USXGMII:
27 phylink_set(mask, 10000baseT_Full);
28 + phylink_set(mask, 10000baseKR_Full);
29 + phylink_set(mask, 10000baseCR_Full);
30 + phylink_set(mask, 10000baseSR_Full);
31 + phylink_set(mask, 10000baseLR_Full);
32 + phylink_set(mask, 10000baseLRM_Full);
33 + phylink_set(mask, 10000baseER_Full);
34 if (state->interface == PHY_INTERFACE_MODE_10GBASER)
36 phylink_set(mask, 5000baseT_Full);