1 From: Takashi Iwai <tiwai@suse.de>
2 Subject: ALSA: hda - Always sync writes in single_cmd mode
6 In the single_cmd mode, the hardware cannot store the multiple replies
7 like on RIRB, thus each verb has to sync and wait for the response no
8 matter whether the return value is needed or not. Otherwise it may
9 result in a wrong return value from the previous verb.
11 Signed-off-by: Takashi Iwai <tiwai@suse.de>
14 sound/pci/hda/hda_intel.c | 36 +++++++++++++++++++++++-------------
15 1 file changed, 23 insertions(+), 13 deletions(-)
17 --- a/sound/pci/hda/hda_intel.c
18 +++ b/sound/pci/hda/hda_intel.c
20 * I left the codes, however, for debugging/testing purposes.
23 +/* receive a response */
24 +static int azx_single_wait_for_response(struct azx *chip)
29 + /* check IRV busy bit */
30 + if (azx_readw(chip, IRS) & ICH6_IRS_VALID) {
31 + /* reuse rirb.res as the response return value */
32 + chip->rirb.res = azx_readl(chip, IR);
37 + if (printk_ratelimit())
38 + snd_printd(SFX "get_response timeout: IRS=0x%x\n",
39 + azx_readw(chip, IRS));
40 + chip->rirb.res = -1;
45 static int azx_single_send_cmd(struct hda_bus *bus, u32 val)
48 azx_writel(chip, IC, val);
49 azx_writew(chip, IRS, azx_readw(chip, IRS) |
52 + return azx_single_wait_for_response(chip);
57 static unsigned int azx_single_get_response(struct hda_bus *bus)
59 struct azx *chip = bus->private_data;
63 - /* check IRV busy bit */
64 - if (azx_readw(chip, IRS) & ICH6_IRS_VALID)
65 - return azx_readl(chip, IR);
68 - if (printk_ratelimit())
69 - snd_printd(SFX "get_response timeout: IRS=0x%x\n",
70 - azx_readw(chip, IRS));
71 - return (unsigned int)-1;
72 + return chip->rirb.res;