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git.ipfire.org Git - thirdparty/glibc.git/blob - sysdeps/microblaze/atomic-machine.h
1 /* Copyright (C) 2003-2019 Free Software Foundation, Inc.
3 This file is part of the GNU C Library.
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Lesser General Public
7 License as published by the Free Software Foundation; either
8 version 2.1 of the License, or (at your option) any later version.
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Lesser General Public License for more details.
15 You should have received a copy of the GNU Lesser General Public
16 License along with the GNU C Library. If not, see
17 <https://www.gnu.org/licenses/>. */
23 typedef int8_t atomic8_t
;
24 typedef uint8_t uatomic8_t
;
25 typedef int_fast8_t atomic_fast8_t
;
26 typedef uint_fast8_t uatomic_fast8_t
;
28 typedef int32_t atomic32_t
;
29 typedef uint32_t uatomic32_t
;
30 typedef int_fast32_t atomic_fast32_t
;
31 typedef uint_fast32_t uatomic_fast32_t
;
33 typedef intptr_t atomicptr_t
;
34 typedef uintptr_t uatomicptr_t
;
35 typedef intmax_t atomic_max_t
;
36 typedef uintmax_t uatomic_max_t
;
38 #define __HAVE_64B_ATOMICS 0
39 #define USE_ATOMIC_COMPILER_BUILTINS 0
41 /* XXX Is this actually correct? */
42 #define ATOMIC_EXCHANGE_USES_CAS 1
45 /* Microblaze does not have byte and halfword forms of load and reserve and
46 store conditional. So for microblaze we stub out the 8- and 16-bit forms. */
47 #define __arch_compare_and_exchange_bool_8_acq(mem, newval, oldval) \
50 #define __arch_compare_and_exchange_bool_16_acq(mem, newval, oldval) \
53 #define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
55 __typeof (*(mem)) __tmp; \
56 __typeof (mem) __memp = (mem); \
60 "1: lwx %0, %3, r0;" \
79 #define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
80 (abort (), (__typeof (*mem)) 0)
82 #define atomic_compare_and_exchange_val_acq(mem, newval, oldval) \
84 __typeof (*(mem)) __result; \
85 if (sizeof (*mem) == 4) \
86 __result = __arch_compare_and_exchange_val_32_acq (mem, newval, oldval); \
87 else if (sizeof (*mem) == 8) \
88 __result = __arch_compare_and_exchange_val_64_acq (mem, newval, oldval); \
94 #define atomic_compare_and_exchange_val_rel(mem, newval, oldval) \
96 __typeof (*(mem)) __result; \
97 if (sizeof (*mem) == 4) \
98 __result = __arch_compare_and_exchange_val_32_acq (mem, newval, oldval); \
99 else if (sizeof (*mem) == 8) \
100 __result = __arch_compare_and_exchange_val_64_acq (mem, newval, oldval); \
106 #define __arch_atomic_exchange_32_acq(mem, value) \
108 __typeof (*(mem)) __tmp; \
109 __typeof (mem) __memp = (mem); \
112 " addc r0, r0, r0;" \
113 "1: lwx %0, %4, r0;" \
114 " addic %1, r0, 0;" \
117 " addic %1, r0, 0;" \
128 #define __arch_atomic_exchange_64_acq(mem, newval) \
129 (abort (), (__typeof (*mem)) 0)
131 #define atomic_exchange_acq(mem, value) \
133 __typeof (*(mem)) __result; \
134 if (sizeof (*mem) == 4) \
135 __result = __arch_atomic_exchange_32_acq (mem, value); \
136 else if (sizeof (*mem) == 8) \
137 __result = __arch_atomic_exchange_64_acq (mem, value); \
143 #define atomic_exchange_rel(mem, value) \
145 __typeof (*(mem)) __result; \
146 if (sizeof (*mem) == 4) \
147 __result = __arch_atomic_exchange_32_acq (mem, value); \
148 else if (sizeof (*mem) == 8) \
149 __result = __arch_atomic_exchange_64_acq (mem, value); \
155 #define __arch_atomic_exchange_and_add_32(mem, value) \
157 __typeof (*(mem)) __tmp; \
158 __typeof (mem) __memp = (mem); \
161 " addc r0, r0, r0;" \
162 "1: lwx %0, %4, r0;" \
163 " addic %1, r0, 0;" \
167 " addic %1, r0, 0;" \
178 #define __arch_atomic_exchange_and_add_64(mem, value) \
179 (abort (), (__typeof (*mem)) 0)
181 #define atomic_exchange_and_add(mem, value) \
183 __typeof (*(mem)) __result; \
184 if (sizeof (*mem) == 4) \
185 __result = __arch_atomic_exchange_and_add_32 (mem, value); \
186 else if (sizeof (*mem) == 8) \
187 __result = __arch_atomic_exchange_and_add_64 (mem, value); \
193 #define __arch_atomic_increment_val_32(mem) \
195 __typeof (*(mem)) __val; \
198 " addc r0, r0, r0;" \
199 "1: lwx %0, %3, r0;" \
200 " addic %1, r0, 0;" \
204 " addic %1, r0, 0;" \
215 #define __arch_atomic_increment_val_64(mem) \
216 (abort (), (__typeof (*mem)) 0)
218 #define atomic_increment_val(mem) \
220 __typeof (*(mem)) __result; \
221 if (sizeof (*(mem)) == 4) \
222 __result = __arch_atomic_increment_val_32 (mem); \
223 else if (sizeof (*(mem)) == 8) \
224 __result = __arch_atomic_increment_val_64 (mem); \
230 #define atomic_increment(mem) ({ atomic_increment_val (mem); (void) 0; })
232 #define __arch_atomic_decrement_val_32(mem) \
234 __typeof (*(mem)) __val; \
237 " addc r0, r0, r0;" \
238 "1: lwx %0, %3, r0;" \
239 " addic %1, r0, 0;" \
241 " rsubi %0, %0, 1;" \
243 " addic %1, r0, 0;" \
254 #define __arch_atomic_decrement_val_64(mem) \
255 (abort (), (__typeof (*mem)) 0)
257 #define atomic_decrement_val(mem) \
259 __typeof (*(mem)) __result; \
260 if (sizeof (*(mem)) == 4) \
261 __result = __arch_atomic_decrement_val_32 (mem); \
262 else if (sizeof (*(mem)) == 8) \
263 __result = __arch_atomic_decrement_val_64 (mem); \
269 #define atomic_decrement(mem) ({ atomic_decrement_val (mem); (void) 0; })