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1 /* Copyright (C) 1997, 1998, 2002, 2003 Free Software Foundation, Inc.
2 This file is part of the GNU C Library.
3 Contributed by Ralf Baechle <ralf@gnu.org>.
4
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Lesser General Public
7 License as published by the Free Software Foundation; either
8 version 2.1 of the License, or (at your option) any later version.
9
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Lesser General Public License for more details.
14
15 You should have received a copy of the GNU Lesser General Public
16 License along with the GNU C Library; if not, write to the Free
17 Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
18 02111-1307 USA. */
19
20 #ifndef _SYS_ASM_H
21 #define _SYS_ASM_H
22
23 #include <sgidefs.h>
24
25 #ifndef CAT
26 # ifdef __STDC__
27 # define __CAT(str1,str2) str1##str2
28 # else
29 # define __CAT(str1,str2) str1/**/str2
30 # endif
31 # define CAT(str1,str2) __CAT(str1,str2)
32 #endif
33
34 /*
35 * Macros to handle different pointer/register sizes for 32/64-bit code
36 *
37 * 64 bit address space isn't used yet, so we may use the R3000 32 bit
38 * defines for now.
39 */
40 #if (_MIPS_SIM == _MIPS_SIM_ABI32) || (_MIPS_SIM == _MIPS_SIM_NABI32)
41 # define PTR .word
42 # define PTRSIZE 4
43 # define PTRLOG 2
44 #elif (_MIPS_SIM == _MIPS_SIM_ABI64)
45 # define PTR .dword
46 # define PTRSIZE 8
47 # define PTRLOG 3
48 #endif
49
50 /*
51 * PIC specific declarations
52 */
53 #if (_MIPS_SIM == _MIPS_SIM_ABI32)
54 # ifdef __PIC__
55 # define CPRESTORE(register) \
56 .cprestore register
57 # define CPLOAD(register) \
58 .cpload register
59 # else
60 # define CPRESTORE(register)
61 # define CPLOAD(register)
62 # endif
63
64 # define CPADD(register) \
65 .cpadd register
66
67 /*
68 * Set gp when at 1st instruction
69 */
70 # define SETUP_GP \
71 .set noreorder; \
72 .cpload $25; \
73 .set reorder
74 /* Set gp when not at 1st instruction */
75 # define SETUP_GPX(r) \
76 .set noreorder; \
77 move r, $31; /* Save old ra. */ \
78 bal 10f; /* Find addr of cpload. */ \
79 nop; \
80 10: \
81 .cpload $31; \
82 move $31, r; \
83 .set reorder
84 # define SETUP_GPX_L(r, l) \
85 .set noreorder; \
86 move r, $31; /* Save old ra. */ \
87 bal l; /* Find addr of cpload. */ \
88 nop; \
89 l: \
90 .cpload $31; \
91 move $31, r; \
92 .set reorder
93 # define SAVE_GP(x) \
94 .cprestore x /* Save gp trigger t9/jalr conversion. */
95 # define SETUP_GP64(a, b)
96 # define SETUP_GPX64(a, b)
97 # define SETUP_GPX64_L(cp_reg, ra_save, l)
98 # define RESTORE_GP64
99 # define USE_ALT_CP(a)
100 #else /* (_MIPS_SIM == _MIPS_SIM_ABI64) || (_MIPS_SIM == _MIPS_SIM_NABI32) */
101 /*
102 * For callee-saved gp calling convention:
103 */
104 # define SETUP_GP
105 # define SETUP_GPX(r)
106 # define SETUP_GPX_L(r, l)
107 # define SAVE_GP(x)
108
109 # define SETUP_GP64(gpoffset, proc) \
110 .cpsetup $25, gpoffset, proc
111 # define SETUP_GPX64(cp_reg, ra_save) \
112 move ra_save, $31; /* Save old ra. */ \
113 .set noreorder; \
114 bal 10f; /* Find addr of .cpsetup. */ \
115 nop; \
116 10: \
117 .set reorder; \
118 .cpsetup $31, cp_reg, 10b; \
119 move $31, ra_save
120 # define SETUP_GPX64_L(cp_reg, ra_save, l) \
121 move ra_save, $31; /* Save old ra. */ \
122 .set noreorder; \
123 bal l; /* Find addr of .cpsetup. */ \
124 nop; \
125 l: \
126 .set reorder; \
127 .cpsetup $31, cp_reg, l; \
128 move $31, ra_save
129 # define RESTORE_GP64 \
130 .cpreturn
131 /* Use alternate register for context pointer. */
132 # define USE_ALT_CP(reg) \
133 .cplocal reg
134 #endif /* _MIPS_SIM != _MIPS_SIM_ABI32 */
135
136 /*
137 * Stack Frame Definitions
138 */
139 #if (_MIPS_SIM == _MIPS_SIM_ABI32)
140 # define NARGSAVE 4 /* Space for 4 argument registers must be allocated. */
141 #endif
142 #if (_MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32)
143 # define NARGSAVE 0 /* No caller responsibilities. */
144 #endif
145
146
147 /*
148 * LEAF - declare leaf routine
149 */
150 #define LEAF(symbol) \
151 .globl symbol; \
152 .align 2; \
153 .type symbol,@function; \
154 .ent symbol,0; \
155 symbol: .frame sp,0,ra
156
157 /*
158 * NESTED - declare nested routine entry point
159 */
160 #define NESTED(symbol, framesize, rpc) \
161 .globl symbol; \
162 .align 2; \
163 .type symbol,@function; \
164 .ent symbol,0; \
165 symbol: .frame sp, framesize, rpc
166
167 /*
168 * END - mark end of function
169 */
170 #ifndef END
171 # define END(function) \
172 .end function; \
173 .size function,.-function
174 #endif
175
176 /*
177 * EXPORT - export definition of symbol
178 */
179 #define EXPORT(symbol) \
180 .globl symbol; \
181 symbol:
182
183 /*
184 * ABS - export absolute symbol
185 */
186 #define ABS(symbol,value) \
187 .globl symbol; \
188 symbol = value
189
190 #define PANIC(msg) \
191 .set push; \
192 .set reorder; \
193 la a0,8f; \
194 jal panic; \
195 9: b 9b; \
196 .set pop; \
197 TEXT(msg)
198
199 /*
200 * Print formated string
201 */
202 #define PRINT(string) \
203 .set push; \
204 .set reorder; \
205 la a0,8f; \
206 jal printk; \
207 .set pop; \
208 TEXT(string)
209
210 #define TEXT(msg) \
211 .data; \
212 8: .asciiz msg; \
213 .previous;
214
215 /*
216 * Build text tables
217 */
218 #define TTABLE(string) \
219 .text; \
220 .word 1f; \
221 .previous; \
222 .data; \
223 1: .asciz string; \
224 .previous
225
226 /*
227 * MIPS IV pref instruction.
228 * Use with .set noreorder only!
229 *
230 * MIPS IV implementations are free to treat this as a nop. The R5000
231 * is one of them. So we should have an option not to use this instruction.
232 */
233 #if (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5)
234 # define PREF(hint,addr) \
235 pref hint,addr
236 # define PREFX(hint,addr) \
237 prefx hint,addr
238 #else
239 # define PREF
240 # define PREFX
241 #endif
242
243 /*
244 * MIPS ISA IV/V movn/movz instructions and equivalents for older CPUs.
245 */
246 #if _MIPS_ISA == _MIPS_ISA_MIPS1
247 # define MOVN(rd,rs,rt) \
248 .set push; \
249 .set reorder; \
250 beqz rt,9f; \
251 move rd,rs; \
252 .set pop; \
253 9:
254 # define MOVZ(rd,rs,rt) \
255 .set push; \
256 .set reorder; \
257 bnez rt,9f; \
258 move rd,rt; \
259 .set pop; \
260 9:
261 #endif /* _MIPS_ISA == _MIPS_ISA_MIPS1 */
262 #if (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3)
263 # define MOVN(rd,rs,rt) \
264 .set push; \
265 .set noreorder; \
266 bnezl rt,9f; \
267 move rd,rs; \
268 .set pop; \
269 9:
270 # define MOVZ(rd,rs,rt) \
271 .set push; \
272 .set noreorder; \
273 beqzl rt,9f; \
274 movz rd,rs; \
275 .set pop; \
276 9:
277 #endif /* (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3) */
278 #if (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5)
279 # define MOVN(rd,rs,rt) \
280 movn rd,rs,rt
281 # define MOVZ(rd,rs,rt) \
282 movz rd,rs,rt
283 #endif /* (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5) */
284
285 /*
286 * Stack alignment
287 */
288 #if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2)
289 # define ALSZ 7
290 # define ALMASK ~7
291 #endif
292 #if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \
293 (_MIPS_ISA == _MIPS_ISA_MIPS5)
294 # define ALSZ 15
295 # define ALMASK ~15
296 #endif
297
298 /*
299 * Size of a register
300 */
301 #ifdef __mips64
302 # define SZREG 8
303 #else
304 # define SZREG 4
305 #endif
306
307 /*
308 * Use the following macros in assemblercode to load/store registers,
309 * pointers etc.
310 */
311 #if (_MIPS_SIM == _MIPS_SIM_ABI32)
312 # define REG_S sw
313 # define REG_L lw
314 #else
315 # define REG_S sd
316 # define REG_L ld
317 #endif
318
319 /*
320 * How to add/sub/load/store/shift C int variables.
321 */
322 #if (_MIPS_SZINT == 32)
323 # define INT_ADD add
324 # define INT_ADDI addi
325 # define INT_ADDU addu
326 # define INT_ADDIU addiu
327 # define INT_SUB add
328 # define INT_SUBI subi
329 # define INT_SUBU subu
330 # define INT_SUBIU subu
331 # define INT_L lw
332 # define INT_S sw
333 #endif
334
335 #if (_MIPS_SZINT == 64)
336 # define INT_ADD dadd
337 # define INT_ADDI daddi
338 # define INT_ADDU daddu
339 # define INT_ADDIU daddiu
340 # define INT_SUB dadd
341 # define INT_SUBI dsubi
342 # define INT_SUBU dsubu
343 # define INT_SUBIU dsubu
344 # define INT_L ld
345 # define INT_S sd
346 #endif
347
348 /*
349 * How to add/sub/load/store/shift C long variables.
350 */
351 #if (_MIPS_SZLONG == 32)
352 # define LONG_ADD add
353 # define LONG_ADDI addi
354 # define LONG_ADDU addu
355 # define LONG_ADDIU addiu
356 # define LONG_SUB add
357 # define LONG_SUBI subi
358 # define LONG_SUBU subu
359 # define LONG_SUBIU subu
360 # define LONG_L lw
361 # define LONG_S sw
362 # define LONG_SLL sll
363 # define LONG_SLLV sllv
364 # define LONG_SRL srl
365 # define LONG_SRLV srlv
366 # define LONG_SRA sra
367 # define LONG_SRAV srav
368 #endif
369
370 #if (_MIPS_SZLONG == 64)
371 # define LONG_ADD dadd
372 # define LONG_ADDI daddi
373 # define LONG_ADDU daddu
374 # define LONG_ADDIU daddiu
375 # define LONG_SUB dadd
376 # define LONG_SUBI dsubi
377 # define LONG_SUBU dsubu
378 # define LONG_SUBIU dsubu
379 # define LONG_L ld
380 # define LONG_S sd
381 # define LONG_SLL dsll
382 # define LONG_SLLV dsllv
383 # define LONG_SRL dsrl
384 # define LONG_SRLV dsrlv
385 # define LONG_SRA dsra
386 # define LONG_SRAV dsrav
387 #endif
388
389 /*
390 * How to add/sub/load/store/shift pointers.
391 */
392 #if (_MIPS_SIM == _MIPS_SIM_ABI32 && _MIPS_SZLONG == 32)
393 # define PTR_ADD add
394 # define PTR_ADDI addi
395 # define PTR_ADDU addu
396 # define PTR_ADDIU addiu
397 # define PTR_SUB add
398 # define PTR_SUBI subi
399 # define PTR_SUBU subu
400 # define PTR_SUBIU subu
401 # define PTR_L lw
402 # define PTR_LA la
403 # define PTR_S sw
404 # define PTR_SLL sll
405 # define PTR_SLLV sllv
406 # define PTR_SRL srl
407 # define PTR_SRLV srlv
408 # define PTR_SRA sra
409 # define PTR_SRAV srav
410
411 # define PTR_SCALESHIFT 2
412 #endif
413
414 #if _MIPS_SIM == _MIPS_SIM_NABI32
415 # define PTR_ADD add
416 # define PTR_ADDI addi
417 # define PTR_ADDU add /* no u */
418 # define PTR_ADDIU addi /* no u */
419 # define PTR_SUB add
420 # define PTR_SUBI subi
421 # define PTR_SUBU sub /* no u */
422 # define PTR_SUBIU sub /* no u */
423 # define PTR_L lw
424 # define PTR_LA la
425 # define PTR_S sw
426 # define PTR_SLL sll
427 # define PTR_SLLV sllv
428 # define PTR_SRL srl
429 # define PTR_SRLV srlv
430 # define PTR_SRA sra
431 # define PTR_SRAV srav
432
433 # define PTR_SCALESHIFT 2
434 #endif
435
436 #if (_MIPS_SIM == _MIPS_SIM_ABI32 && _MIPS_SZLONG == 64) \
437 || _MIPS_SIM == _MIPS_SIM_ABI64
438 # define PTR_ADD dadd
439 # define PTR_ADDI daddi
440 # define PTR_ADDU daddu
441 # define PTR_ADDIU daddiu
442 # define PTR_SUB dadd
443 # define PTR_SUBI dsubi
444 # define PTR_SUBU dsubu
445 # define PTR_SUBIU dsubu
446 # define PTR_L ld
447 # define PTR_LA dla
448 # define PTR_S sd
449 # define PTR_SLL dsll
450 # define PTR_SLLV dsllv
451 # define PTR_SRL dsrl
452 # define PTR_SRLV dsrlv
453 # define PTR_SRA dsra
454 # define PTR_SRAV dsrav
455
456 # define PTR_SCALESHIFT 3
457 #endif
458
459 /*
460 * Some cp0 registers were extended to 64bit for MIPS III.
461 */
462 #if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2)
463 # define MFC0 mfc0
464 # define MTC0 mtc0
465 #endif
466 #if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \
467 (_MIPS_ISA == _MIPS_ISA_MIPS5)
468 # define MFC0 dmfc0
469 # define MTC0 dmtc0
470 #endif
471
472 #endif /* sys/asm.h */