]> git.ipfire.org Git - thirdparty/glibc.git/blob - sysdeps/powerpc/powerpc32/dl-machine.c
2003-04-24 Jakub Jelinek <jakub@redhat.com>
[thirdparty/glibc.git] / sysdeps / powerpc / powerpc32 / dl-machine.c
1 /* Machine-dependent ELF dynamic relocation functions. PowerPC version.
2 Copyright (C) 1995-2001,2002,2003 Free Software Foundation, Inc.
3 This file is part of the GNU C Library.
4
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Lesser General Public
7 License as published by the Free Software Foundation; either
8 version 2.1 of the License, or (at your option) any later version.
9
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Lesser General Public License for more details.
14
15 You should have received a copy of the GNU Lesser General Public
16 License along with the GNU C Library; if not, write to the Free
17 Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
18 02111-1307 USA. */
19
20 #include <unistd.h>
21 #include <string.h>
22 #include <sys/param.h>
23 #include <link.h>
24 #include <ldsodefs.h>
25 #include <elf/dynamic-link.h>
26 #include <dl-machine.h>
27 #include <stdio-common/_itoa.h>
28
29 /* Because ld.so is now versioned, these functions can be in their own file;
30 no relocations need to be done to call them.
31 Of course, if ld.so is not versioned... */
32 #if defined SHARED && !(DO_VERSIONING - 0)
33 #error This will not work with versioning turned off, sorry.
34 #endif
35
36
37 /* Stuff for the PLT. */
38 #define PLT_INITIAL_ENTRY_WORDS 18
39 #define PLT_LONGBRANCH_ENTRY_WORDS 0
40 #define PLT_TRAMPOLINE_ENTRY_WORDS 6
41 #define PLT_DOUBLE_SIZE (1<<13)
42 #define PLT_ENTRY_START_WORDS(entry_number) \
43 (PLT_INITIAL_ENTRY_WORDS + (entry_number)*2 \
44 + ((entry_number) > PLT_DOUBLE_SIZE \
45 ? ((entry_number) - PLT_DOUBLE_SIZE)*2 \
46 : 0))
47 #define PLT_DATA_START_WORDS(num_entries) PLT_ENTRY_START_WORDS(num_entries)
48
49 /* Macros to build PowerPC opcode words. */
50 #define OPCODE_ADDI(rd,ra,simm) \
51 (0x38000000 | (rd) << 21 | (ra) << 16 | ((simm) & 0xffff))
52 #define OPCODE_ADDIS(rd,ra,simm) \
53 (0x3c000000 | (rd) << 21 | (ra) << 16 | ((simm) & 0xffff))
54 #define OPCODE_ADD(rd,ra,rb) \
55 (0x7c000214 | (rd) << 21 | (ra) << 16 | (rb) << 11)
56 #define OPCODE_B(target) (0x48000000 | ((target) & 0x03fffffc))
57 #define OPCODE_BA(target) (0x48000002 | ((target) & 0x03fffffc))
58 #define OPCODE_BCTR() 0x4e800420
59 #define OPCODE_LWZ(rd,d,ra) \
60 (0x80000000 | (rd) << 21 | (ra) << 16 | ((d) & 0xffff))
61 #define OPCODE_LWZU(rd,d,ra) \
62 (0x84000000 | (rd) << 21 | (ra) << 16 | ((d) & 0xffff))
63 #define OPCODE_MTCTR(rd) (0x7C0903A6 | (rd) << 21)
64 #define OPCODE_RLWINM(ra,rs,sh,mb,me) \
65 (0x54000000 | (rs) << 21 | (ra) << 16 | (sh) << 11 | (mb) << 6 | (me) << 1)
66
67 #define OPCODE_LI(rd,simm) OPCODE_ADDI(rd,0,simm)
68 #define OPCODE_ADDIS_HI(rd,ra,value) \
69 OPCODE_ADDIS(rd,ra,((value) + 0x8000) >> 16)
70 #define OPCODE_LIS_HI(rd,value) OPCODE_ADDIS_HI(rd,0,value)
71 #define OPCODE_SLWI(ra,rs,sh) OPCODE_RLWINM(ra,rs,sh,0,31-sh)
72
73
74 #define PPC_DCBST(where) asm volatile ("dcbst 0,%0" : : "r"(where) : "memory")
75 #define PPC_SYNC asm volatile ("sync" : : : "memory")
76 #define PPC_ISYNC asm volatile ("sync; isync" : : : "memory")
77 #define PPC_ICBI(where) asm volatile ("icbi 0,%0" : : "r"(where) : "memory")
78 #define PPC_DIE asm volatile ("tweq 0,0")
79
80 /* Use this when you've modified some code, but it won't be in the
81 instruction fetch queue (or when it doesn't matter if it is). */
82 #define MODIFIED_CODE_NOQUEUE(where) \
83 do { PPC_DCBST(where); PPC_SYNC; PPC_ICBI(where); } while (0)
84 /* Use this when it might be in the instruction queue. */
85 #define MODIFIED_CODE(where) \
86 do { PPC_DCBST(where); PPC_SYNC; PPC_ICBI(where); PPC_ISYNC; } while (0)
87
88
89 /* The idea here is that to conform to the ABI, we are supposed to try
90 to load dynamic objects between 0x10000 (we actually use 0x40000 as
91 the lower bound, to increase the chance of a memory reference from
92 a null pointer giving a segfault) and the program's load address;
93 this may allow us to use a branch instruction in the PLT rather
94 than a computed jump. The address is only used as a preference for
95 mmap, so if we get it wrong the worst that happens is that it gets
96 mapped somewhere else. */
97
98 ElfW(Addr)
99 __elf_preferred_address(struct link_map *loader, size_t maplength,
100 ElfW(Addr) mapstartpref)
101 {
102 ElfW(Addr) low, high;
103 struct link_map *l;
104
105 /* If the object has a preference, load it there! */
106 if (mapstartpref != 0)
107 return mapstartpref;
108
109 /* Otherwise, quickly look for a suitable gap between 0x3FFFF and
110 0x70000000. 0x3FFFF is so that references off NULL pointers will
111 cause a segfault, 0x70000000 is just paranoia (it should always
112 be superceded by the program's load address). */
113 low = 0x0003FFFF;
114 high = 0x70000000;
115 for (l = GL(dl_loaded); l; l = l->l_next)
116 {
117 ElfW(Addr) mapstart, mapend;
118 mapstart = l->l_map_start & ~(GL(dl_pagesize) - 1);
119 mapend = l->l_map_end | (GL(dl_pagesize) - 1);
120 assert (mapend > mapstart);
121
122 /* Prefer gaps below the main executable, note that l ==
123 _dl_loaded does not work for static binaries loading
124 e.g. libnss_*.so. */
125 if ((mapend >= high || l->l_type == lt_executable)
126 && high >= mapstart)
127 high = mapstart;
128 else if (mapend >= low && low >= mapstart)
129 low = mapend;
130 else if (high >= mapend && mapstart >= low)
131 {
132 if (high - mapend >= mapstart - low)
133 low = mapend;
134 else
135 high = mapstart;
136 }
137 }
138
139 high -= 0x10000; /* Allow some room between objects. */
140 maplength = (maplength | (GL(dl_pagesize) - 1)) + 1;
141 if (high <= low || high - low < maplength )
142 return 0;
143 return high - maplength; /* Both high and maplength are page-aligned. */
144 }
145
146 /* Set up the loaded object described by L so its unrelocated PLT
147 entries will jump to the on-demand fixup code in dl-runtime.c.
148 Also install a small trampoline to be used by entries that have
149 been relocated to an address too far away for a single branch. */
150
151 /* There are many kinds of PLT entries:
152
153 (1) A direct jump to the actual routine, either a relative or
154 absolute branch. These are set up in __elf_machine_fixup_plt.
155
156 (2) Short lazy entries. These cover the first 8192 slots in
157 the PLT, and look like (where 'index' goes from 0 to 8191):
158
159 li %r11, index*4
160 b &plt[PLT_TRAMPOLINE_ENTRY_WORDS+1]
161
162 (3) Short indirect jumps. These replace (2) when a direct jump
163 wouldn't reach. They look the same except that the branch
164 is 'b &plt[PLT_LONGBRANCH_ENTRY_WORDS]'.
165
166 (4) Long lazy entries. These cover the slots when a short entry
167 won't fit ('index*4' overflows its field), and look like:
168
169 lis %r11, %hi(index*4 + &plt[PLT_DATA_START_WORDS])
170 lwzu %r12, %r11, %lo(index*4 + &plt[PLT_DATA_START_WORDS])
171 b &plt[PLT_TRAMPOLINE_ENTRY_WORDS]
172 bctr
173
174 (5) Long indirect jumps. These replace (4) when a direct jump
175 wouldn't reach. They look like:
176
177 lis %r11, %hi(index*4 + &plt[PLT_DATA_START_WORDS])
178 lwz %r12, %r11, %lo(index*4 + &plt[PLT_DATA_START_WORDS])
179 mtctr %r12
180 bctr
181
182 (6) Long direct jumps. These are used when thread-safety is not
183 required. They look like:
184
185 lis %r12, %hi(finaladdr)
186 addi %r12, %r12, %lo(finaladdr)
187 mtctr %r12
188 bctr
189
190
191 The lazy entries, (2) and (4), are set up here in
192 __elf_machine_runtime_setup. (1), (3), and (5) are set up in
193 __elf_machine_fixup_plt. (1), (3), and (6) can also be constructed
194 in __process_machine_rela.
195
196 The reason for the somewhat strange construction of the long
197 entries, (4) and (5), is that we need to ensure thread-safety. For
198 (1) and (3), this is obvious because only one instruction is
199 changed and the PPC architecture guarantees that aligned stores are
200 atomic. For (5), this is more tricky. When changing (4) to (5),
201 the `b' instruction is first changed to to `mtctr'; this is safe
202 and is why the `lwzu' instruction is not just a simple `addi'.
203 Once this is done, and is visible to all processors, the `lwzu' can
204 safely be changed to a `lwz'. */
205 int
206 __elf_machine_runtime_setup (struct link_map *map, int lazy, int profile)
207 {
208 if (map->l_info[DT_JMPREL])
209 {
210 Elf32_Word i;
211 Elf32_Word *plt = (Elf32_Word *) D_PTR (map, l_info[DT_PLTGOT]);
212 Elf32_Word num_plt_entries = (map->l_info[DT_PLTRELSZ]->d_un.d_val
213 / sizeof (Elf32_Rela));
214 Elf32_Word rel_offset_words = PLT_DATA_START_WORDS (num_plt_entries);
215 Elf32_Word data_words = (Elf32_Word) (plt + rel_offset_words);
216 Elf32_Word size_modified;
217
218 extern void _dl_runtime_resolve (void);
219 extern void _dl_prof_resolve (void);
220
221 /* Convert the index in r11 into an actual address, and get the
222 word at that address. */
223 plt[PLT_LONGBRANCH_ENTRY_WORDS] = OPCODE_ADDIS_HI (11, 11, data_words);
224 plt[PLT_LONGBRANCH_ENTRY_WORDS + 1] = OPCODE_LWZ (11, data_words, 11);
225
226 /* Call the procedure at that address. */
227 plt[PLT_LONGBRANCH_ENTRY_WORDS + 2] = OPCODE_MTCTR (11);
228 plt[PLT_LONGBRANCH_ENTRY_WORDS + 3] = OPCODE_BCTR ();
229
230 if (lazy)
231 {
232 Elf32_Word *tramp = plt + PLT_TRAMPOLINE_ENTRY_WORDS;
233 Elf32_Word dlrr = (Elf32_Word)(profile
234 ? _dl_prof_resolve
235 : _dl_runtime_resolve);
236 Elf32_Word offset;
237
238 if (profile && _dl_name_match_p (GL(dl_profile), map))
239 /* This is the object we are looking for. Say that we really
240 want profiling and the timers are started. */
241 GL(dl_profile_map) = map;
242
243 /* For the long entries, subtract off data_words. */
244 tramp[0] = OPCODE_ADDIS_HI (11, 11, -data_words);
245 tramp[1] = OPCODE_ADDI (11, 11, -data_words);
246
247 /* Multiply index of entry by 3 (in r11). */
248 tramp[2] = OPCODE_SLWI (12, 11, 1);
249 tramp[3] = OPCODE_ADD (11, 12, 11);
250 if (dlrr <= 0x01fffffc || dlrr >= 0xfe000000)
251 {
252 /* Load address of link map in r12. */
253 tramp[4] = OPCODE_LI (12, (Elf32_Word) map);
254 tramp[5] = OPCODE_ADDIS_HI (12, 12, (Elf32_Word) map);
255
256 /* Call _dl_runtime_resolve. */
257 tramp[6] = OPCODE_BA (dlrr);
258 }
259 else
260 {
261 /* Get address of _dl_runtime_resolve in CTR. */
262 tramp[4] = OPCODE_LI (12, dlrr);
263 tramp[5] = OPCODE_ADDIS_HI (12, 12, dlrr);
264 tramp[6] = OPCODE_MTCTR (12);
265
266 /* Load address of link map in r12. */
267 tramp[7] = OPCODE_LI (12, (Elf32_Word) map);
268 tramp[8] = OPCODE_ADDIS_HI (12, 12, (Elf32_Word) map);
269
270 /* Call _dl_runtime_resolve. */
271 tramp[9] = OPCODE_BCTR ();
272 }
273
274 /* Set up the lazy PLT entries. */
275 offset = PLT_INITIAL_ENTRY_WORDS;
276 i = 0;
277 while (i < num_plt_entries && i < PLT_DOUBLE_SIZE)
278 {
279 plt[offset ] = OPCODE_LI (11, i * 4);
280 plt[offset+1] = OPCODE_B ((PLT_TRAMPOLINE_ENTRY_WORDS + 2
281 - (offset+1))
282 * 4);
283 i++;
284 offset += 2;
285 }
286 while (i < num_plt_entries)
287 {
288 plt[offset ] = OPCODE_LIS_HI (11, i * 4 + data_words);
289 plt[offset+1] = OPCODE_LWZU (12, i * 4 + data_words, 11);
290 plt[offset+2] = OPCODE_B ((PLT_TRAMPOLINE_ENTRY_WORDS
291 - (offset+2))
292 * 4);
293 plt[offset+3] = OPCODE_BCTR ();
294 i++;
295 offset += 4;
296 }
297 }
298
299 /* Now, we've modified code. We need to write the changes from
300 the data cache to a second-level unified cache, then make
301 sure that stale data in the instruction cache is removed.
302 (In a multiprocessor system, the effect is more complex.)
303 Most of the PLT shouldn't be in the instruction cache, but
304 there may be a little overlap at the start and the end.
305
306 Assumes that dcbst and icbi apply to lines of 16 bytes or
307 more. Current known line sizes are 16, 32, and 128 bytes. */
308
309 size_modified = lazy ? rel_offset_words : 6;
310 for (i = 0; i < size_modified; i += 4)
311 PPC_DCBST (plt + i);
312 PPC_DCBST (plt + size_modified - 1);
313 PPC_SYNC;
314 PPC_ICBI (plt);
315 PPC_ICBI (plt + size_modified - 1);
316 PPC_ISYNC;
317 }
318
319 return lazy;
320 }
321
322 Elf32_Addr
323 __elf_machine_fixup_plt(struct link_map *map, const Elf32_Rela *reloc,
324 Elf32_Addr *reloc_addr, Elf32_Addr finaladdr)
325 {
326 Elf32_Sword delta = finaladdr - (Elf32_Word) reloc_addr;
327 if (delta << 6 >> 6 == delta)
328 *reloc_addr = OPCODE_B (delta);
329 else if (finaladdr <= 0x01fffffc || finaladdr >= 0xfe000000)
330 *reloc_addr = OPCODE_BA (finaladdr);
331 else
332 {
333 Elf32_Word *plt, *data_words;
334 Elf32_Word index, offset, num_plt_entries;
335
336 num_plt_entries = (map->l_info[DT_PLTRELSZ]->d_un.d_val
337 / sizeof(Elf32_Rela));
338 plt = (Elf32_Word *) D_PTR (map, l_info[DT_PLTGOT]);
339 offset = reloc_addr - plt;
340 index = (offset - PLT_INITIAL_ENTRY_WORDS)/2;
341 data_words = plt + PLT_DATA_START_WORDS (num_plt_entries);
342
343 reloc_addr += 1;
344
345 if (index < PLT_DOUBLE_SIZE)
346 {
347 data_words[index] = finaladdr;
348 PPC_SYNC;
349 *reloc_addr = OPCODE_B ((PLT_LONGBRANCH_ENTRY_WORDS - (offset+1))
350 * 4);
351 }
352 else
353 {
354 index -= (index - PLT_DOUBLE_SIZE)/2;
355
356 data_words[index] = finaladdr;
357 PPC_SYNC;
358
359 reloc_addr[1] = OPCODE_MTCTR (12);
360 MODIFIED_CODE_NOQUEUE (reloc_addr + 1);
361 PPC_SYNC;
362
363 reloc_addr[0] = OPCODE_LWZ (12,
364 (Elf32_Word) (data_words + index), 11);
365 }
366 }
367 MODIFIED_CODE (reloc_addr);
368 return finaladdr;
369 }
370
371 void
372 _dl_reloc_overflow (struct link_map *map,
373 const char *name,
374 Elf32_Addr *const reloc_addr,
375 const Elf32_Sym *sym,
376 const Elf32_Sym *refsym)
377 {
378 char buffer[128];
379 char *t;
380 const Elf32_Sym *errsym = sym ?: refsym;
381 t = stpcpy (buffer, name);
382 t = stpcpy (t, " relocation at 0x00000000");
383 _itoa_word ((unsigned) reloc_addr, t, 16, 0);
384 if (errsym)
385 {
386 const char *strtab;
387
388 strtab = (const void *) D_PTR (map, l_info[DT_STRTAB]);
389 t = stpcpy (t, " for symbol `");
390 t = stpcpy (t, strtab + errsym->st_name);
391 t = stpcpy (t, "'");
392 }
393 t = stpcpy (t, " out of range");
394 _dl_signal_error (0, map->l_name, NULL, buffer);
395 }
396
397 void
398 __process_machine_rela (struct link_map *map,
399 const Elf32_Rela *reloc,
400 struct link_map *sym_map,
401 const Elf32_Sym *sym,
402 const Elf32_Sym *refsym,
403 Elf32_Addr *const reloc_addr,
404 Elf32_Addr const finaladdr,
405 int rinfo)
406 {
407 switch (rinfo)
408 {
409 case R_PPC_NONE:
410 return;
411
412 case R_PPC_ADDR32:
413 case R_PPC_GLOB_DAT:
414 case R_PPC_RELATIVE:
415 *reloc_addr = finaladdr;
416 return;
417
418 case R_PPC_UADDR32:
419 ((char *) reloc_addr)[0] = finaladdr >> 24;
420 ((char *) reloc_addr)[1] = finaladdr >> 16;
421 ((char *) reloc_addr)[2] = finaladdr >> 8;
422 ((char *) reloc_addr)[3] = finaladdr;
423 break;
424
425 case R_PPC_ADDR24:
426 if (__builtin_expect (finaladdr > 0x01fffffc && finaladdr < 0xfe000000, 0))
427 _dl_reloc_overflow (map, "R_PPC_ADDR24", reloc_addr, sym, refsym);
428 *reloc_addr = (*reloc_addr & 0xfc000003) | (finaladdr & 0x3fffffc);
429 break;
430
431 case R_PPC_ADDR16:
432 if (__builtin_expect (finaladdr > 0x7fff && finaladdr < 0xffff8000, 0))
433 _dl_reloc_overflow (map, "R_PPC_ADDR16", reloc_addr, sym, refsym);
434 *(Elf32_Half*) reloc_addr = finaladdr;
435 break;
436
437 case R_PPC_UADDR16:
438 if (__builtin_expect (finaladdr > 0x7fff && finaladdr < 0xffff8000, 0))
439 _dl_reloc_overflow (map, "R_PPC_UADDR16", reloc_addr, sym, refsym);
440 ((char *) reloc_addr)[0] = finaladdr >> 8;
441 ((char *) reloc_addr)[1] = finaladdr;
442 break;
443
444 case R_PPC_ADDR16_LO:
445 *(Elf32_Half*) reloc_addr = finaladdr;
446 break;
447
448 case R_PPC_ADDR16_HI:
449 *(Elf32_Half*) reloc_addr = finaladdr >> 16;
450 break;
451
452 case R_PPC_ADDR16_HA:
453 *(Elf32_Half*) reloc_addr = (finaladdr + 0x8000) >> 16;
454 break;
455
456 case R_PPC_ADDR14:
457 case R_PPC_ADDR14_BRTAKEN:
458 case R_PPC_ADDR14_BRNTAKEN:
459 if (__builtin_expect (finaladdr > 0x7fff && finaladdr < 0xffff8000, 0))
460 _dl_reloc_overflow (map, "R_PPC_ADDR14", reloc_addr, sym, refsym);
461 *reloc_addr = (*reloc_addr & 0xffff0003) | (finaladdr & 0xfffc);
462 if (rinfo != R_PPC_ADDR14)
463 *reloc_addr = ((*reloc_addr & 0xffdfffff)
464 | ((rinfo == R_PPC_ADDR14_BRTAKEN)
465 ^ (finaladdr >> 31)) << 21);
466 break;
467
468 case R_PPC_REL24:
469 {
470 Elf32_Sword delta = finaladdr - (Elf32_Word) reloc_addr;
471 if (delta << 6 >> 6 != delta)
472 _dl_reloc_overflow (map, "R_PPC_REL24", reloc_addr, sym, refsym);
473 *reloc_addr = (*reloc_addr & 0xfc000003) | (delta & 0x3fffffc);
474 }
475 break;
476
477 case R_PPC_COPY:
478 if (sym == NULL)
479 /* This can happen in trace mode when an object could not be
480 found. */
481 return;
482 if (sym->st_size > refsym->st_size
483 || (GL(dl_verbose) && sym->st_size < refsym->st_size))
484 {
485 const char *strtab;
486
487 strtab = (const void *) D_PTR (map, l_info[DT_STRTAB]);
488 _dl_error_printf ("\
489 %s: Symbol `%s' has different size in shared object, onsider re-linking\n",
490 rtld_progname ?: "<program name unknown>",
491 strtab + refsym->st_name);
492 }
493 memcpy (reloc_addr, (char *) finaladdr, MIN (sym->st_size,
494 refsym->st_size));
495 return;
496
497 case R_PPC_REL32:
498 *reloc_addr = finaladdr - (Elf32_Word) reloc_addr;
499 return;
500
501 case R_PPC_JMP_SLOT:
502 /* It used to be that elf_machine_fixup_plt was used here,
503 but that doesn't work when ld.so relocates itself
504 for the second time. On the bright side, there's
505 no need to worry about thread-safety here. */
506 {
507 Elf32_Sword delta = finaladdr - (Elf32_Word) reloc_addr;
508 if (delta << 6 >> 6 == delta)
509 *reloc_addr = OPCODE_B (delta);
510 else if (finaladdr <= 0x01fffffc || finaladdr >= 0xfe000000)
511 *reloc_addr = OPCODE_BA (finaladdr);
512 else
513 {
514 Elf32_Word *plt, *data_words;
515 Elf32_Word index, offset, num_plt_entries;
516
517 plt = (Elf32_Word *) D_PTR (map, l_info[DT_PLTGOT]);
518 offset = reloc_addr - plt;
519
520 if (offset < PLT_DOUBLE_SIZE*2 + PLT_INITIAL_ENTRY_WORDS)
521 {
522 index = (offset - PLT_INITIAL_ENTRY_WORDS)/2;
523 num_plt_entries = (map->l_info[DT_PLTRELSZ]->d_un.d_val
524 / sizeof(Elf32_Rela));
525 data_words = plt + PLT_DATA_START_WORDS (num_plt_entries);
526 data_words[index] = finaladdr;
527 reloc_addr[0] = OPCODE_LI (11, index * 4);
528 reloc_addr[1] = OPCODE_B ((PLT_LONGBRANCH_ENTRY_WORDS
529 - (offset+1))
530 * 4);
531 MODIFIED_CODE_NOQUEUE (reloc_addr + 1);
532 }
533 else
534 {
535 reloc_addr[0] = OPCODE_LIS_HI (12, finaladdr);
536 reloc_addr[1] = OPCODE_ADDI (12, 12, finaladdr);
537 reloc_addr[2] = OPCODE_MTCTR (12);
538 reloc_addr[3] = OPCODE_BCTR ();
539 MODIFIED_CODE_NOQUEUE (reloc_addr + 3);
540 }
541 }
542 }
543 break;
544
545 #ifdef USE_TLS
546 #define CHECK_STATIC_TLS(map, sym_map) \
547 do { \
548 if (__builtin_expect ((sym_map)->l_tls_offset == NO_TLS_OFFSET, 0)) \
549 _dl_allocate_static_tls (sym_map); \
550 } while (0)
551 # define DO_TLS_RELOC(suffix) \
552 case R_PPC_DTPREL##suffix: \
553 /* During relocation all TLS symbols are defined and used. \
554 Therefore the offset is already correct. */ \
555 if (sym_map != NULL) \
556 do_reloc##suffix ("R_PPC_DTPREL"#suffix, \
557 TLS_DTPREL_VALUE (sym, reloc)); \
558 break; \
559 case R_PPC_TPREL##suffix: \
560 if (sym_map != NULL) \
561 { \
562 CHECK_STATIC_TLS (map, sym_map); \
563 do_reloc##suffix ("R_PPC_TPREL"#suffix, \
564 TLS_TPREL_VALUE (sym_map, sym, reloc)); \
565 } \
566 break;
567
568 inline void do_reloc16 (const char *r_name, Elf32_Addr value)
569 {
570 if (__builtin_expect (value > 0x7fff && value < 0xffff8000, 0))
571 _dl_reloc_overflow (map, r_name, reloc_addr, sym, refsym);
572 *(Elf32_Half *) reloc_addr = value;
573 }
574 inline void do_reloc16_LO (const char *r_name, Elf32_Addr value)
575 {
576 *(Elf32_Half *) reloc_addr = value;
577 }
578 inline void do_reloc16_HI (const char *r_name, Elf32_Addr value)
579 {
580 *(Elf32_Half *) reloc_addr = value >> 16;
581 }
582 inline void do_reloc16_HA (const char *r_name, Elf32_Addr value)
583 {
584 *(Elf32_Half *) reloc_addr = (value + 0x8000) >> 16;
585 }
586 DO_TLS_RELOC (16)
587 DO_TLS_RELOC (16_LO)
588 DO_TLS_RELOC (16_HI)
589 DO_TLS_RELOC (16_HA)
590 #endif
591
592 default:
593 _dl_reloc_bad_type (map, rinfo, 0);
594 return;
595 }
596
597 MODIFIED_CODE_NOQUEUE (reloc_addr);
598 }