1 /* Optimized memcpy implementation for PowerPC64.
2 Copyright (C) 2003-2013 Free Software Foundation, Inc.
3 This file is part of the GNU C Library.
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Lesser General Public
7 License as published by the Free Software Foundation; either
8 version 2.1 of the License, or (at your option) any later version.
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Lesser General Public License for more details.
15 You should have received a copy of the GNU Lesser General Public
16 License along with the GNU C Library; if not, see
17 <http://www.gnu.org/licenses/>. */
23 /* __ptr_t [r3] memcpy (__ptr_t dst [r3], __ptr_t src [r4], size_t len [r5]);
26 Memcpy handles short copies (< 32-bytes) using a binary move blocks
27 (no loops) of lwz/stw. The tail (remaining 1-3) bytes is handled
28 with the appropriate combination of byte and halfword load/stores.
29 There is minimal effort to optimize the alignment of short moves.
30 The 64-bit implementations of POWER3 and POWER4 do a reasonable job
31 of handling unaligned load/stores that do not cross 32-byte boundaries.
33 Longer moves (>= 32-bytes) justify the effort to get at least the
34 destination doubleword (8-byte) aligned. Further optimization is
35 possible when both source and destination are doubleword aligned.
36 Each case has a optimized unrolled loop.
38 For POWER6 unaligned loads will take a 20+ cycle hiccup for any
39 L1 cache miss that crosses a 32- or 128-byte boundary. Store
40 is more forgiving and does not take a hiccup until page or
41 segment boundaries. So we require doubleword alignment for
42 the source but may take a risk and only require word alignment
43 for the destination. */
46 EALIGN (BP_SYM (memcpy), 7, 0)
53 andi. 11,3,7 /* check alignment of dst. */
54 clrldi 0,0,61 /* Number of bytes until the 1st doubleword of dst. */
55 clrldi 10,4,61 /* check alignment of src. */
57 ble- cr1,.L2 /* If move < 32 bytes use short move code. */
60 srdi 9,5,3 /* Number of full double words remaining. */
64 /* Move 0-7 bytes as needed to get the destination doubleword aligned.
65 Duplicate some code to maximize fall-through and minimize agen delays. */
94 /* Add the number of bytes until the 1st doubleword of dst to src and dst. */
98 clrldi 10,4,61 /* check alignment of src again. */
99 srdi 9,5,3 /* Number of full double words remaining. */
101 /* Copy doublewords from source to destination, assuming the
102 destination is aligned on a doubleword boundary.
104 At this point we know there are at least 25 bytes left (32-7) to copy.
105 The next step is to determine if the source is also doubleword aligned.
106 If not branch to the unaligned move code at .L6. which uses
107 a load, shift, store strategy.
109 Otherwise source and destination are doubleword aligned, and we can
110 the optimized doubleword copy loop. */
115 srdi 12,5,7 /* Number of 128-byte blocks to move. */
116 cmpldi cr1,11,0 /* If the tail is 0 bytes */
117 bne- cr6,.L6 /* If source is not DW aligned. */
119 /* Move doublewords where destination and source are DW aligned.
120 Use a unrolled loop to copy 16 doublewords (128-bytes) per iteration.
121 If the copy is not an exact multiple of 128 bytes, 1-15
122 doublewords are copied as needed to set up the main loop. After
123 the main loop exits there may be a tail of 1-7 bytes. These byte
124 are copied a word/halfword/byte at a time as needed to preserve
127 For POWER6 the L1 is store-through and the L2 is store-in. The
128 L2 is clocked at half CPU clock so we can store 16 bytes every
129 other cycle. POWER6 also has a load/store bypass so we can do
130 load, load, store, store every 2 cycles.
132 The following code is sensitive to cache line alignment. Do not
133 make any change with out first making sure they don't result in
134 splitting ld/std pairs across a cache line. */
275 ble cr5,L(das_loop_e)
321 /* Check of a 1-7 byte tail, return if none. */
323 /* Return original dst pointer. */
331 /* At this point we have a tail of 0-7 bytes and we know that the
332 destination is double word aligned. */
360 /* Return original dst pointer. */
364 /* Copy up to 31 bytes. This divided into two cases 0-8 bytes and 9-31
365 bytes. Each case is handled without loops, using binary (1,2,4,8)
368 In the short (0-8 byte) case no attempt is made to force alignment
369 of either source or destination. The hardware will handle the
370 unaligned load/stores with small delays for crossing 32- 128-byte,
371 and 4096-byte boundaries. Since these short moves are unlikely to be
372 unaligned or cross these boundaries, the overhead to force
373 alignment is not justified.
375 The longer (9-31 byte) move is more likely to cross 32- or 128-byte
376 boundaries. Since only loads are sensitive to the 32-/128-byte
377 boundaries it is more important to align the source then the
378 destination. If the source is not already word aligned, we first
379 move 1-3 bytes as needed. Since we are only word aligned we don't
380 use double word load/stores to insure that all loads are aligned.
381 While the destination and stores may still be unaligned, this
382 is only an issue for page (4096 byte boundary) crossing, which
383 should be rare for these short moves. The hardware handles this
384 case automatically with a small (~20 cycle) delay. */
391 ble cr6,.LE8 /* Handle moves of 0-8 bytes. */
392 /* At least 9 bytes left. Get the source word aligned. */
397 beq L(dus_tail) /* If the source is already word aligned skip this. */
398 /* Copy 1-3 bytes to get source address word aligned. */
421 /* At least 6 bytes left and the source is word aligned. This allows
422 some speculative loads up front. */
423 /* We need to special case the fall-through because the biggest delays
424 are due to address computation not being ready in time for the
430 L(dus_tail16): /* Move 16 bytes. */
437 /* Move 8 bytes more. */
438 bf 28,L(dus_tail16p8)
444 /* Move 4 bytes more. */
445 bf 29,L(dus_tail16p4)
451 /* exactly 28 bytes. Return original dst pointer and exit. */
455 L(dus_tail16p8): /* less then 8 bytes left. */
456 beq cr1,L(dus_tailX) /* exactly 16 bytes, early exit. */
458 bf 29,L(dus_tail16p2)
459 /* Move 4 bytes more. */
465 /* exactly 20 bytes. Return original dst pointer and exit. */
469 L(dus_tail16p4): /* less then 4 bytes left. */
473 /* exactly 24 bytes. Return original dst pointer and exit. */
477 L(dus_tail16p2): /* 16 bytes moved, less then 4 bytes left. */
483 L(dus_tail8): /* Move 8 bytes. */
484 /* r6, r7 already loaded speculatively. */
491 /* Move 4 bytes more. */
498 /* exactly 12 bytes. Return original dst pointer and exit. */
502 L(dus_tail8p4): /* less then 4 bytes left. */
506 /* exactly 8 bytes. Return original dst pointer and exit. */
511 L(dus_tail4): /* Move 4 bytes. */
512 /* r6 already loaded speculatively. If we are here we know there is
513 more then 4 bytes left. So there is no need to test. */
517 L(dus_tail2): /* Move 2-3 bytes. */
526 L(dus_tail1): /* Move 1 byte. */
531 /* Return original dst pointer. */
535 /* Special case to copy 0-8 bytes. */
540 /* Exactly 8 bytes. We may cross a 32-/128-byte boundary and take a ~20
541 cycle delay. This case should be rare and any attempt to avoid this
542 would take most of 20 cycles any way. */
545 /* Return original dst pointer. */
567 /* Return original dst pointer. */
576 /* Copy doublewords where the destination is aligned but the source is
577 not. Use aligned doubleword loads from the source, shifted to realign
578 the data, to allow aligned destination stores. */
579 addi 11,9,-1 /* loop DW count is one less than total */
580 subf 5,10,12 /* Move source addr to previous full double word. */
584 srdi 8,11,2 /* calculate the 32 byte loop count */
585 ld 6,0(5) /* pre load 1st full doubleword. */
589 ld 7,8(5) /* pre load 2nd full doubleword. */
599 /* there are at least two DWs to copy */
612 blt cr6,L(du1_fini) /* if total DWs = 3, then bypass loop */
614 /* there is a third DW to copy */
623 beq cr6,L(du1_fini) /* if total DWs = 4, then bypass loop */
638 /* copy 32 bytes at a time */
665 /* calculate and store the final DW */
676 /* there are at least two DWs to copy */
689 blt cr6,L(du2_fini) /* if total DWs = 3, then bypass loop */
691 /* there is a third DW to copy */
700 beq cr6,L(du2_fini) /* if total DWs = 4, then bypass loop */
715 /* copy 32 bytes at a time */
742 /* calculate and store the final DW */
753 /* there are at least two DWs to copy */
766 blt cr6,L(du3_fini) /* if total DWs = 3, then bypass loop */
768 /* there is a third DW to copy */
777 beq cr6,L(du3_fini) /* if total DWs = 4, then bypass loop */
792 /* copy 32 bytes at a time */
819 /* calculate and store the final DW */
836 /* there are at least two DWs to copy */
849 blt cr6,L(du4_fini) /* if total DWs = 3, then bypass loop */
851 /* there is a third DW to copy */
860 beq cr6,L(du4_fini) /* if total DWs = 4, then bypass loop */
875 /* copy 32 bytes at a time */
902 /* calculate and store the final DW */
913 /* there are at least two DWs to copy */
926 blt cr6,L(du5_fini) /* if total DWs = 3, then bypass loop */
928 /* there is a third DW to copy */
937 beq cr6,L(du5_fini) /* if total DWs = 4, then bypass loop */
952 /* copy 32 bytes at a time */
979 /* calculate and store the final DW */
990 /* there are at least two DWs to copy */
1003 blt cr6,L(du6_fini) /* if total DWs = 3, then bypass loop */
1005 /* there is a third DW to copy */
1014 beq cr6,L(du6_fini) /* if total DWs = 4, then bypass loop */
1029 /* copy 32 bytes at a time */
1056 /* calculate and store the final DW */
1067 /* there are at least two DWs to copy */
1080 blt cr6,L(du7_fini) /* if total DWs = 3, then bypass loop */
1082 /* there is a third DW to copy */
1091 beq cr6,L(du7_fini) /* if total DWs = 4, then bypass loop */
1106 /* copy 32 bytes at a time */
1133 /* calculate and store the final DW */
1144 beq cr1,0f /* If the tail is 0 bytes we are done! */
1148 /* At this point we have a tail of 0-7 bytes and we know that the
1149 destination is double word aligned. */
1164 /* Return original dst pointer. */
1168 END_GEN_TB (BP_SYM (memcpy),TB_TOCLESS)
1169 libc_hidden_builtin_def (memcpy)
projects / thirdparty / glibc.git / blob