1 /* Optimized memcpy implementation for PowerPC64.
2 Copyright (C) 2003-2013 Free Software Foundation, Inc.
3 This file is part of the GNU C Library.
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Lesser General Public
7 License as published by the Free Software Foundation; either
8 version 2.1 of the License, or (at your option) any later version.
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Lesser General Public License for more details.
15 You should have received a copy of the GNU Lesser General Public
16 License along with the GNU C Library; if not, see
17 <http://www.gnu.org/licenses/>. */
21 /* __ptr_t [r3] memcpy (__ptr_t dst [r3], __ptr_t src [r4], size_t len [r5]);
24 Memcpy handles short copies (< 32-bytes) using a binary move blocks
25 (no loops) of lwz/stw. The tail (remaining 1-3) bytes is handled
26 with the appropriate combination of byte and halfword load/stores.
27 There is minimal effort to optimize the alignment of short moves.
28 The 64-bit implementations of POWER3 and POWER4 do a reasonable job
29 of handling unaligned load/stores that do not cross 32-byte boundaries.
31 Longer moves (>= 32-bytes) justify the effort to get at least the
32 destination doubleword (8-byte) aligned. Further optimization is
33 possible when both source and destination are doubleword aligned.
34 Each case has a optimized unrolled loop.
36 For POWER6 unaligned loads will take a 20+ cycle hiccup for any
37 L1 cache miss that crosses a 32- or 128-byte boundary. Store
38 is more forgiving and does not take a hiccup until page or
39 segment boundaries. So we require doubleword alignment for
40 the source but may take a risk and only require word alignment
41 for the destination. */
51 andi. 11,3,7 /* check alignment of dst. */
52 clrldi 0,0,61 /* Number of bytes until the 1st doubleword of dst. */
53 clrldi 10,4,61 /* check alignment of src. */
55 ble- cr1,.L2 /* If move < 32 bytes use short move code. */
58 srdi 9,5,3 /* Number of full double words remaining. */
62 /* Move 0-7 bytes as needed to get the destination doubleword aligned.
63 Duplicate some code to maximize fall-through and minimize agen delays. */
92 /* Add the number of bytes until the 1st doubleword of dst to src and dst. */
96 clrldi 10,4,61 /* check alignment of src again. */
97 srdi 9,5,3 /* Number of full double words remaining. */
99 /* Copy doublewords from source to destination, assuming the
100 destination is aligned on a doubleword boundary.
102 At this point we know there are at least 25 bytes left (32-7) to copy.
103 The next step is to determine if the source is also doubleword aligned.
104 If not branch to the unaligned move code at .L6. which uses
105 a load, shift, store strategy.
107 Otherwise source and destination are doubleword aligned, and we can
108 the optimized doubleword copy loop. */
113 srdi 12,5,7 /* Number of 128-byte blocks to move. */
114 cmpldi cr1,11,0 /* If the tail is 0 bytes */
115 bne- cr6,.L6 /* If source is not DW aligned. */
117 /* Move doublewords where destination and source are DW aligned.
118 Use a unrolled loop to copy 16 doublewords (128-bytes) per iteration.
119 If the copy is not an exact multiple of 128 bytes, 1-15
120 doublewords are copied as needed to set up the main loop. After
121 the main loop exits there may be a tail of 1-7 bytes. These byte
122 are copied a word/halfword/byte at a time as needed to preserve
125 For POWER6 the L1 is store-through and the L2 is store-in. The
126 L2 is clocked at half CPU clock so we can store 16 bytes every
127 other cycle. POWER6 also has a load/store bypass so we can do
128 load, load, store, store every 2 cycles.
130 The following code is sensitive to cache line alignment. Do not
131 make any change with out first making sure they don't result in
132 splitting ld/std pairs across a cache line. */
273 ble cr5,L(das_loop_e)
319 /* Check of a 1-7 byte tail, return if none. */
321 /* Return original dst pointer. */
329 /* At this point we have a tail of 0-7 bytes and we know that the
330 destination is double word aligned. */
358 /* Return original dst pointer. */
362 /* Copy up to 31 bytes. This divided into two cases 0-8 bytes and 9-31
363 bytes. Each case is handled without loops, using binary (1,2,4,8)
366 In the short (0-8 byte) case no attempt is made to force alignment
367 of either source or destination. The hardware will handle the
368 unaligned load/stores with small delays for crossing 32- 128-byte,
369 and 4096-byte boundaries. Since these short moves are unlikely to be
370 unaligned or cross these boundaries, the overhead to force
371 alignment is not justified.
373 The longer (9-31 byte) move is more likely to cross 32- or 128-byte
374 boundaries. Since only loads are sensitive to the 32-/128-byte
375 boundaries it is more important to align the source then the
376 destination. If the source is not already word aligned, we first
377 move 1-3 bytes as needed. Since we are only word aligned we don't
378 use double word load/stores to insure that all loads are aligned.
379 While the destination and stores may still be unaligned, this
380 is only an issue for page (4096 byte boundary) crossing, which
381 should be rare for these short moves. The hardware handles this
382 case automatically with a small (~20 cycle) delay. */
389 ble cr6,.LE8 /* Handle moves of 0-8 bytes. */
390 /* At least 9 bytes left. Get the source word aligned. */
395 beq L(dus_tail) /* If the source is already word aligned skip this. */
396 /* Copy 1-3 bytes to get source address word aligned. */
419 /* At least 6 bytes left and the source is word aligned. This allows
420 some speculative loads up front. */
421 /* We need to special case the fall-through because the biggest delays
422 are due to address computation not being ready in time for the
428 L(dus_tail16): /* Move 16 bytes. */
435 /* Move 8 bytes more. */
436 bf 28,L(dus_tail16p8)
442 /* Move 4 bytes more. */
443 bf 29,L(dus_tail16p4)
449 /* exactly 28 bytes. Return original dst pointer and exit. */
453 L(dus_tail16p8): /* less then 8 bytes left. */
454 beq cr1,L(dus_tailX) /* exactly 16 bytes, early exit. */
456 bf 29,L(dus_tail16p2)
457 /* Move 4 bytes more. */
463 /* exactly 20 bytes. Return original dst pointer and exit. */
467 L(dus_tail16p4): /* less then 4 bytes left. */
471 /* exactly 24 bytes. Return original dst pointer and exit. */
475 L(dus_tail16p2): /* 16 bytes moved, less then 4 bytes left. */
481 L(dus_tail8): /* Move 8 bytes. */
482 /* r6, r7 already loaded speculatively. */
489 /* Move 4 bytes more. */
496 /* exactly 12 bytes. Return original dst pointer and exit. */
500 L(dus_tail8p4): /* less then 4 bytes left. */
504 /* exactly 8 bytes. Return original dst pointer and exit. */
509 L(dus_tail4): /* Move 4 bytes. */
510 /* r6 already loaded speculatively. If we are here we know there is
511 more then 4 bytes left. So there is no need to test. */
515 L(dus_tail2): /* Move 2-3 bytes. */
524 L(dus_tail1): /* Move 1 byte. */
529 /* Return original dst pointer. */
533 /* Special case to copy 0-8 bytes. */
538 /* Exactly 8 bytes. We may cross a 32-/128-byte boundary and take a ~20
539 cycle delay. This case should be rare and any attempt to avoid this
540 would take most of 20 cycles any way. */
543 /* Return original dst pointer. */
565 /* Return original dst pointer. */
574 /* Copy doublewords where the destination is aligned but the source is
575 not. Use aligned doubleword loads from the source, shifted to realign
576 the data, to allow aligned destination stores. */
577 addi 11,9,-1 /* loop DW count is one less than total */
578 subf 5,10,12 /* Move source addr to previous full double word. */
582 srdi 8,11,2 /* calculate the 32 byte loop count */
583 ld 6,0(5) /* pre load 1st full doubleword. */
587 ld 7,8(5) /* pre load 2nd full doubleword. */
597 /* there are at least two DWs to copy */
610 blt cr6,L(du1_fini) /* if total DWs = 3, then bypass loop */
612 /* there is a third DW to copy */
621 beq cr6,L(du1_fini) /* if total DWs = 4, then bypass loop */
636 /* copy 32 bytes at a time */
663 /* calculate and store the final DW */
674 /* there are at least two DWs to copy */
687 blt cr6,L(du2_fini) /* if total DWs = 3, then bypass loop */
689 /* there is a third DW to copy */
698 beq cr6,L(du2_fini) /* if total DWs = 4, then bypass loop */
713 /* copy 32 bytes at a time */
740 /* calculate and store the final DW */
751 /* there are at least two DWs to copy */
764 blt cr6,L(du3_fini) /* if total DWs = 3, then bypass loop */
766 /* there is a third DW to copy */
775 beq cr6,L(du3_fini) /* if total DWs = 4, then bypass loop */
790 /* copy 32 bytes at a time */
817 /* calculate and store the final DW */
834 /* there are at least two DWs to copy */
847 blt cr6,L(du4_fini) /* if total DWs = 3, then bypass loop */
849 /* there is a third DW to copy */
858 beq cr6,L(du4_fini) /* if total DWs = 4, then bypass loop */
873 /* copy 32 bytes at a time */
900 /* calculate and store the final DW */
911 /* there are at least two DWs to copy */
924 blt cr6,L(du5_fini) /* if total DWs = 3, then bypass loop */
926 /* there is a third DW to copy */
935 beq cr6,L(du5_fini) /* if total DWs = 4, then bypass loop */
950 /* copy 32 bytes at a time */
977 /* calculate and store the final DW */
988 /* there are at least two DWs to copy */
1001 blt cr6,L(du6_fini) /* if total DWs = 3, then bypass loop */
1003 /* there is a third DW to copy */
1012 beq cr6,L(du6_fini) /* if total DWs = 4, then bypass loop */
1027 /* copy 32 bytes at a time */
1054 /* calculate and store the final DW */
1065 /* there are at least two DWs to copy */
1078 blt cr6,L(du7_fini) /* if total DWs = 3, then bypass loop */
1080 /* there is a third DW to copy */
1089 beq cr6,L(du7_fini) /* if total DWs = 4, then bypass loop */
1104 /* copy 32 bytes at a time */
1131 /* calculate and store the final DW */
1142 beq cr1,0f /* If the tail is 0 bytes we are done! */
1146 /* At this point we have a tail of 0-7 bytes and we know that the
1147 destination is double word aligned. */
1162 /* Return original dst pointer. */
1166 END_GEN_TB (memcpy,TB_TOCLESS)
1167 libc_hidden_builtin_def (memcpy)
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