1 /* Optimized mempcpy implementation for POWER7.
2 Copyright (C) 2010-2021 Free Software Foundation, Inc.
3 This file is part of the GNU C Library.
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Lesser General Public
7 License as published by the Free Software Foundation; either
8 version 2.1 of the License, or (at your option) any later version.
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Lesser General Public License for more details.
15 You should have received a copy of the GNU Lesser General Public
16 License along with the GNU C Library; if not, see
17 <https://www.gnu.org/licenses/>. */
22 /* void * [r3] __mempcpy (void *dst [r3], void *src [r4], size_t len [r5]);
23 Returns 'dst' + 'len'. */
26 # define MEMPCPY __mempcpy
29 ENTRY_TOCLESS (MEMPCPY, 5)
37 ble cr1,L(copy_LT_32) /* If move < 32 bytes use short move
40 andi. 11,3,7 /* Check alignment of DST. */
43 clrldi 10,4,61 /* Check alignment of SRC. */
44 cmpld cr6,10,11 /* SRC and DST alignments match? */
47 bne cr6,L(copy_GE_32_unaligned)
49 srdi 9,5,3 /* Number of full quadwords remaining. */
51 beq L(copy_GE_32_aligned_cont)
57 /* Get the SRC aligned to 8 bytes. */
75 clrldi 10,12,61 /* Check alignment of SRC again. */
76 srdi 9,31,3 /* Number of full doublewords remaining. */
78 L(copy_GE_32_aligned_cont):
88 /* Copy 1~3 doublewords so the main loop starts
89 at a multiple of 32 bytes. */
108 1: /* Copy 1 doubleword and set the counter. */
117 /* Main aligned copy loop. Copies 32-bytes at a time. */
134 /* Check for tail bytes. */
143 /* At this point we have a tail of 0-7 bytes and we know that the
144 destination is doubleword-aligned. */
145 4: /* Copy 4 bytes. */
152 2: /* Copy 2 bytes. */
159 1: /* Copy 1 byte. */
164 0: /* Return DST + LEN pointer. */
170 /* Handle copies of 0~31 bytes. */
178 /* At least 9 bytes to go. */
184 beq L(copy_LT_32_aligned)
186 /* Force 4-bytes alignment for SRC. */
195 1: bf 31,L(end_4bytes_alignment)
203 L(end_4bytes_alignment):
207 L(copy_LT_32_aligned):
208 /* At least 6 bytes to go, and SRC is word-aligned. */
222 8: /* Copy 8 bytes. */
231 4: /* Copy 4 bytes. */
238 2: /* Copy 2-3 bytes. */
251 1: /* Copy 1 byte. */
256 0: /* Return DST + LEN pointer. */
261 /* Handles copies of 0~8 bytes. */
266 /* Though we could've used ld/std here, they are still
267 slow for unaligned cases. */
273 ld 3,-16(1) /* Return DST + LEN pointer. */
278 4: /* Copies 4~7 bytes. */
294 5: /* Copy 1 byte. */
300 0: /* Return DST + LEN pointer. */
305 /* Handle copies of 32+ bytes where DST is aligned (to quadword) but
306 SRC is not. Use aligned quadword loads from SRC, shifted to realign
307 the data, allowing for aligned DST stores. */
309 L(copy_GE_32_unaligned):
310 clrldi 0,0,60 /* Number of bytes until the 1st
312 andi. 11,3,15 /* Check alignment of DST (against
314 srdi 9,5,4 /* Number of full quadwords remaining. */
316 beq L(copy_GE_32_unaligned_cont)
318 /* SRC is not quadword aligned, get it aligned. */
323 /* Vector instructions work best when proper alignment (16-bytes)
324 is present. Move 0~15 bytes as needed to get DST quadword-aligned. */
325 1: /* Copy 1 byte. */
332 2: /* Copy 2 bytes. */
339 4: /* Copy 4 bytes. */
346 8: /* Copy 8 bytes. */
354 clrldi 10,12,60 /* Check alignment of SRC. */
355 srdi 9,31,4 /* Number of full quadwords remaining. */
357 /* The proper alignment is present, it is OK to copy the bytes now. */
358 L(copy_GE_32_unaligned_cont):
360 /* Setup two indexes to speed up the indexed vector operations. */
362 li 6,16 /* Index for 16-bytes offsets. */
363 li 7,32 /* Index for 32-bytes offsets. */
365 srdi 8,31,5 /* Setup the loop counter. */
370 #ifdef __LITTLE_ENDIAN__
376 bf 31,L(setup_unaligned_loop)
378 /* Copy another 16 bytes to align to 32-bytes due to the loop . */
380 #ifdef __LITTLE_ENDIAN__
390 L(setup_unaligned_loop):
392 ble cr6,L(end_unaligned_loop)
394 /* Copy 32 bytes at a time using vector instructions. */
398 /* Note: vr6/vr10 may contain data that was already copied,
399 but in order to get proper alignment, we may have to copy
400 some portions again. This is faster than having unaligned
401 vector instructions though. */
403 lvx 4,11,6 /* vr4 = r11+16. */
404 #ifdef __LITTLE_ENDIAN__
409 lvx 3,11,7 /* vr3 = r11+32. */
410 #ifdef __LITTLE_ENDIAN__
420 bdnz L(unaligned_loop)
423 L(end_unaligned_loop):
425 /* Check for tail bytes. */
433 /* We have 1~15 tail bytes to copy, and DST is quadword aligned. */
434 8: /* Copy 8 bytes. */
443 4: /* Copy 4 bytes. */
450 2: /* Copy 2~3 bytes. */
457 1: /* Copy 1 byte. */
462 0: /* Return DST + LEN pointer. */
468 END_GEN_TB (MEMPCPY,TB_TOCLESS)
469 libc_hidden_def (__mempcpy)
470 weak_alias (__mempcpy, mempcpy)
471 libc_hidden_builtin_def (mempcpy)