]> git.ipfire.org Git - thirdparty/glibc.git/blob - sysdeps/sparc/sparc32/bits/atomic.h
2.5-18.1
[thirdparty/glibc.git] / sysdeps / sparc / sparc32 / bits / atomic.h
1 /* Atomic operations. sparc32 version.
2 Copyright (C) 2003, 2004, 2006 Free Software Foundation, Inc.
3 This file is part of the GNU C Library.
4 Contributed by Jakub Jelinek <jakub@redhat.com>, 2003.
5
6 The GNU C Library is free software; you can redistribute it and/or
7 modify it under the terms of the GNU Lesser General Public
8 License as published by the Free Software Foundation; either
9 version 2.1 of the License, or (at your option) any later version.
10
11 The GNU C Library is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 Lesser General Public License for more details.
15
16 You should have received a copy of the GNU Lesser General Public
17 License along with the GNU C Library; if not, write to the Free
18 Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
19 02111-1307 USA. */
20
21 #ifndef _BITS_ATOMIC_H
22 #define _BITS_ATOMIC_H 1
23
24 #include <stdint.h>
25
26 typedef int8_t atomic8_t;
27 typedef uint8_t uatomic8_t;
28 typedef int_fast8_t atomic_fast8_t;
29 typedef uint_fast8_t uatomic_fast8_t;
30
31 typedef int16_t atomic16_t;
32 typedef uint16_t uatomic16_t;
33 typedef int_fast16_t atomic_fast16_t;
34 typedef uint_fast16_t uatomic_fast16_t;
35
36 typedef int32_t atomic32_t;
37 typedef uint32_t uatomic32_t;
38 typedef int_fast32_t atomic_fast32_t;
39 typedef uint_fast32_t uatomic_fast32_t;
40
41 typedef int64_t atomic64_t;
42 typedef uint64_t uatomic64_t;
43 typedef int_fast64_t atomic_fast64_t;
44 typedef uint_fast64_t uatomic_fast64_t;
45
46 typedef intptr_t atomicptr_t;
47 typedef uintptr_t uatomicptr_t;
48 typedef intmax_t atomic_max_t;
49 typedef uintmax_t uatomic_max_t;
50
51
52 /* We have no compare and swap, just test and set.
53 The following implementation contends on 64 global locks
54 per library and assumes no variable will be accessed using atomic.h
55 macros from two different libraries. */
56
57 __make_section_unallocated
58 (".gnu.linkonce.b.__sparc32_atomic_locks, \"aw\", %nobits");
59
60 volatile unsigned char __sparc32_atomic_locks[64]
61 __attribute__ ((nocommon, section (".gnu.linkonce.b.__sparc32_atomic_locks"
62 __sec_comment),
63 visibility ("hidden")));
64
65 #define __sparc32_atomic_do_lock(addr) \
66 do \
67 { \
68 unsigned int __old_lock; \
69 unsigned int __idx = (((long) addr >> 2) ^ ((long) addr >> 12)) \
70 & 63; \
71 do \
72 __asm __volatile ("ldstub %1, %0" \
73 : "=r" (__old_lock), \
74 "=m" (__sparc32_atomic_locks[__idx]) \
75 : "m" (__sparc32_atomic_locks[__idx]) \
76 : "memory"); \
77 while (__old_lock); \
78 } \
79 while (0)
80
81 #define __sparc32_atomic_do_unlock(addr) \
82 do \
83 { \
84 __sparc32_atomic_locks[(((long) addr >> 2) \
85 ^ ((long) addr >> 12)) & 63] = 0; \
86 __asm __volatile ("" ::: "memory"); \
87 } \
88 while (0)
89
90 #define __sparc32_atomic_do_lock24(addr) \
91 do \
92 { \
93 unsigned int __old_lock; \
94 do \
95 __asm __volatile ("ldstub %1, %0" \
96 : "=r" (__old_lock), "=m" (*(addr)) \
97 : "m" (*(addr)) \
98 : "memory"); \
99 while (__old_lock); \
100 } \
101 while (0)
102
103 #define __sparc32_atomic_do_unlock24(addr) \
104 do \
105 { \
106 *(char *) (addr) = 0; \
107 __asm __volatile ("" ::: "memory"); \
108 } \
109 while (0)
110
111
112 #ifndef SHARED
113 # define __v9_compare_and_exchange_val_32_acq(mem, newval, oldval) \
114 ({ \
115 register __typeof (*(mem)) __acev_tmp __asm ("%g6"); \
116 register __typeof (mem) __acev_mem __asm ("%g1") = (mem); \
117 register __typeof (*(mem)) __acev_oldval __asm ("%g5"); \
118 __acev_tmp = (newval); \
119 __acev_oldval = (oldval); \
120 /* .word 0xcde05005 is cas [%g1], %g5, %g6. Can't use cas here though, \
121 because as will then mark the object file as V8+ arch. */ \
122 __asm __volatile (".word 0xcde05005" \
123 : "+r" (__acev_tmp), "=m" (*__acev_mem) \
124 : "r" (__acev_oldval), "m" (*__acev_mem), \
125 "r" (__acev_mem) : "memory"); \
126 __acev_tmp; })
127 #endif
128
129 /* The only basic operation needed is compare and exchange. */
130 #define __v7_compare_and_exchange_val_acq(mem, newval, oldval) \
131 ({ __typeof (mem) __acev_memp = (mem); \
132 __typeof (*mem) __acev_ret; \
133 __typeof (*mem) __acev_newval = (newval); \
134 \
135 __sparc32_atomic_do_lock (__acev_memp); \
136 __acev_ret = *__acev_memp; \
137 if (__acev_ret == (oldval)) \
138 *__acev_memp = __acev_newval; \
139 __sparc32_atomic_do_unlock (__acev_memp); \
140 __acev_ret; })
141
142 #define __v7_compare_and_exchange_bool_acq(mem, newval, oldval) \
143 ({ __typeof (mem) __aceb_memp = (mem); \
144 int __aceb_ret; \
145 __typeof (*mem) __aceb_newval = (newval); \
146 \
147 __sparc32_atomic_do_lock (__aceb_memp); \
148 __aceb_ret = 0; \
149 if (*__aceb_memp == (oldval)) \
150 *__aceb_memp = __aceb_newval; \
151 else \
152 __aceb_ret = 1; \
153 __sparc32_atomic_do_unlock (__aceb_memp); \
154 __aceb_ret; })
155
156 #define __v7_exchange_acq(mem, newval) \
157 ({ __typeof (mem) __acev_memp = (mem); \
158 __typeof (*mem) __acev_ret; \
159 __typeof (*mem) __acev_newval = (newval); \
160 \
161 __sparc32_atomic_do_lock (__acev_memp); \
162 __acev_ret = *__acev_memp; \
163 *__acev_memp = __acev_newval; \
164 __sparc32_atomic_do_unlock (__acev_memp); \
165 __acev_ret; })
166
167 #define __v7_exchange_and_add(mem, value) \
168 ({ __typeof (mem) __acev_memp = (mem); \
169 __typeof (*mem) __acev_ret; \
170 \
171 __sparc32_atomic_do_lock (__acev_memp); \
172 __acev_ret = *__acev_memp; \
173 *__acev_memp = __acev_ret + (value); \
174 __sparc32_atomic_do_unlock (__acev_memp); \
175 __acev_ret; })
176
177 /* Special versions, which guarantee that top 8 bits of all values
178 are cleared and use those bits as the ldstub lock. */
179 #define __v7_compare_and_exchange_val_24_acq(mem, newval, oldval) \
180 ({ __typeof (mem) __acev_memp = (mem); \
181 __typeof (*mem) __acev_ret; \
182 __typeof (*mem) __acev_newval = (newval); \
183 \
184 __sparc32_atomic_do_lock24 (__acev_memp); \
185 __acev_ret = *__acev_memp & 0xffffff; \
186 if (__acev_ret == (oldval)) \
187 *__acev_memp = __acev_newval; \
188 else \
189 __sparc32_atomic_do_unlock24 (__acev_memp); \
190 __asm __volatile ("" ::: "memory"); \
191 __acev_ret; })
192
193 #define __v7_exchange_24_rel(mem, newval) \
194 ({ __typeof (mem) __acev_memp = (mem); \
195 __typeof (*mem) __acev_ret; \
196 __typeof (*mem) __acev_newval = (newval); \
197 \
198 __sparc32_atomic_do_lock24 (__acev_memp); \
199 __acev_ret = *__acev_memp & 0xffffff; \
200 *__acev_memp = __acev_newval; \
201 __asm __volatile ("" ::: "memory"); \
202 __acev_ret; })
203
204 #ifdef SHARED
205
206 /* When dynamically linked, we assume pre-v9 libraries are only ever
207 used on pre-v9 CPU. */
208 # define __atomic_is_v9 0
209
210 # define atomic_compare_and_exchange_val_acq(mem, newval, oldval) \
211 __v7_compare_and_exchange_val_acq (mem, newval, oldval)
212
213 # define atomic_compare_and_exchange_bool_acq(mem, newval, oldval) \
214 __v7_compare_and_exchange_bool_acq (mem, newval, oldval)
215
216 # define atomic_exchange_acq(mem, newval) \
217 __v7_exchange_acq (mem, newval)
218
219 # define atomic_exchange_and_add(mem, value) \
220 __v7_exchange_and_add (mem, value)
221
222 # define atomic_compare_and_exchange_val_24_acq(mem, newval, oldval) \
223 ({ \
224 if (sizeof (*mem) != 4) \
225 abort (); \
226 __v7_compare_and_exchange_val_24_acq (mem, newval, oldval); })
227
228 # define atomic_exchange_24_rel(mem, newval) \
229 ({ \
230 if (sizeof (*mem) != 4) \
231 abort (); \
232 __v7_exchange_24_rel (mem, newval); })
233
234 #else
235
236 /* In libc.a/libpthread.a etc. we don't know if we'll be run on
237 pre-v9 or v9 CPU. To be interoperable with dynamically linked
238 apps on v9 CPUs e.g. with process shared primitives, use cas insn
239 on v9 CPUs and ldstub on pre-v9. */
240
241 /* Avoid <ldsodefs.h> include here. */
242 extern uint64_t _dl_hwcap __attribute__((weak));
243 # define __ATOMIC_HWCAP_SPARC_V9 16
244 # define __atomic_is_v9 \
245 (__builtin_expect (&_dl_hwcap != 0, 1) \
246 && __builtin_expect (_dl_hwcap & __ATOMIC_HWCAP_SPARC_V9, \
247 __ATOMIC_HWCAP_SPARC_V9))
248
249 # define atomic_compare_and_exchange_val_acq(mem, newval, oldval) \
250 ({ \
251 __typeof (*mem) __acev_wret; \
252 if (sizeof (*mem) != 4) \
253 abort (); \
254 if (__atomic_is_v9) \
255 __acev_wret \
256 = __v9_compare_and_exchange_val_32_acq (mem, newval, oldval);\
257 else \
258 __acev_wret \
259 = __v7_compare_and_exchange_val_acq (mem, newval, oldval); \
260 __acev_wret; })
261
262 # define atomic_compare_and_exchange_bool_acq(mem, newval, oldval) \
263 ({ \
264 int __acev_wret; \
265 if (sizeof (*mem) != 4) \
266 abort (); \
267 if (__atomic_is_v9) \
268 { \
269 __typeof (oldval) __acev_woldval = (oldval); \
270 __acev_wret \
271 = __v9_compare_and_exchange_val_32_acq (mem, newval, \
272 __acev_woldval) \
273 != __acev_woldval; \
274 } \
275 else \
276 __acev_wret \
277 = __v7_compare_and_exchange_bool_acq (mem, newval, oldval); \
278 __acev_wret; })
279
280 # define atomic_exchange_rel(mem, newval) \
281 ({ \
282 __typeof (*mem) __acev_wret; \
283 if (sizeof (*mem) != 4) \
284 abort (); \
285 if (__atomic_is_v9) \
286 { \
287 __typeof (mem) __acev_wmemp = (mem); \
288 __typeof (*(mem)) __acev_wval = (newval); \
289 do \
290 __acev_wret = *__acev_wmemp; \
291 while (__builtin_expect \
292 (__v9_compare_and_exchange_val_32_acq (__acev_wmemp,\
293 __acev_wval, \
294 __acev_wret) \
295 != __acev_wret, 0)); \
296 } \
297 else \
298 __acev_wret = __v7_exchange_acq (mem, newval); \
299 __acev_wret; })
300
301 # define atomic_compare_and_exchange_val_24_acq(mem, newval, oldval) \
302 ({ \
303 __typeof (*mem) __acev_wret; \
304 if (sizeof (*mem) != 4) \
305 abort (); \
306 if (__atomic_is_v9) \
307 __acev_wret \
308 = __v9_compare_and_exchange_val_32_acq (mem, newval, oldval);\
309 else \
310 __acev_wret \
311 = __v7_compare_and_exchange_val_24_acq (mem, newval, oldval);\
312 __acev_wret; })
313
314 # define atomic_exchange_24_rel(mem, newval) \
315 ({ \
316 __typeof (*mem) __acev_w24ret; \
317 if (sizeof (*mem) != 4) \
318 abort (); \
319 if (__atomic_is_v9) \
320 __acev_w24ret = atomic_exchange_rel (mem, newval); \
321 else \
322 __acev_w24ret = __v7_exchange_24_rel (mem, newval); \
323 __acev_w24ret; })
324
325 #endif
326
327 #endif /* bits/atomic.h */