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1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2014 Charles Manning <cdhmanning@gmail.com>
4 *
5 * Reference documents:
6 * Cyclone V SoC: https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/cyclone-v/cv_5400a.pdf
7 * Arria V SoC: https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/arria-v/av_5400a.pdf
8 * Arria 10 SoC: https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/arria-10/a10_5400a.pdf
9 *
10 * Bootable SoCFPGA image requires a structure of the following format
11 * positioned at offset 0x40 of the bootable image. Endian is LSB.
12 *
13 * There are two versions of the SoCFPGA header format, v0 and v1.
14 * The version 0 is used by Cyclone V SoC and Arria V SoC, while
15 * the version 1 is used by the Arria 10 SoC.
16 *
17 * Version 0:
18 * Offset Length Usage
19 * -----------------------
20 * 0x40 4 Validation word (0x31305341)
21 * 0x44 1 Version (0x0)
22 * 0x45 1 Flags (unused, zero is fine)
23 * 0x46 2 Length (in units of u32, including the end checksum).
24 * 0x48 2 Zero (0x0)
25 * 0x4A 2 Checksum over the header. NB Not CRC32
26 *
27 * Version 1:
28 * Offset Length Usage
29 * -----------------------
30 * 0x40 4 Validation word (0x31305341)
31 * 0x44 1 Version (0x1)
32 * 0x45 1 Flags (unused, zero is fine)
33 * 0x46 2 Header length (in units of u8).
34 * 0x48 4 Length (in units of u8).
35 * 0x4C 4 Image entry offset from standard of header
36 * 0x50 2 Zero (0x0)
37 * 0x52 2 Checksum over the header. NB Not CRC32
38 *
39 * At the end of the code we have a 32-bit CRC checksum over whole binary
40 * excluding the CRC.
41 *
42 * Note that the CRC used here is **not** the zlib/Adler crc32. It is the
43 * CRC-32 used in bzip2, ethernet and elsewhere.
44 *
45 * The Image entry offset in version 1 image is relative the the start of
46 * the header, 0x40, and must not be a negative number. Therefore, it is
47 * only possible to make the SoCFPGA jump forward. The U-Boot bootloader
48 * places a trampoline instruction at offset 0x5c, 0x14 bytes from the
49 * start of the SoCFPGA header, which jumps to the reset vector.
50 *
51 * The image is padded out to 64k, because that is what is
52 * typically used to write the image to the boot medium.
53 */
54
55 #include "pbl_crc32.h"
56 #include "imagetool.h"
57 #include "mkimage.h"
58 #include <u-boot/crc.h>
59
60 #include <image.h>
61
62 #define HEADER_OFFSET 0x40
63 #define VALIDATION_WORD 0x31305341
64
65 static uint8_t buffer_v0[0x10000];
66 static uint8_t buffer_v1[0x40000];
67
68 struct socfpga_header_v0 {
69 uint32_t validation;
70 uint8_t version;
71 uint8_t flags;
72 uint16_t length_u32;
73 uint16_t zero;
74 uint16_t checksum;
75 };
76
77 struct socfpga_header_v1 {
78 uint32_t validation;
79 uint8_t version;
80 uint8_t flags;
81 uint16_t header_u8;
82 uint32_t length_u8;
83 uint32_t entry_offset;
84 uint16_t zero;
85 uint16_t checksum;
86 };
87
88 static unsigned int sfp_hdr_size(uint8_t ver)
89 {
90 if (ver == 0)
91 return sizeof(struct socfpga_header_v0);
92 if (ver == 1)
93 return sizeof(struct socfpga_header_v1);
94 return 0;
95 }
96
97 static unsigned int sfp_pad_size(uint8_t ver)
98 {
99 if (ver == 0)
100 return sizeof(buffer_v0);
101 if (ver == 1)
102 return sizeof(buffer_v1);
103 return 0;
104 }
105
106 /*
107 * The header checksum is just a very simple checksum over
108 * the header area.
109 * There is still a crc32 over the whole lot.
110 */
111 static uint16_t sfp_hdr_checksum(uint8_t *buf, unsigned char ver)
112 {
113 uint16_t ret = 0;
114 int len = sfp_hdr_size(ver) - sizeof(ret);
115
116 while (--len)
117 ret += *buf++;
118
119 return ret;
120 }
121
122 static void sfp_build_header(uint8_t *buf, uint8_t ver, uint8_t flags,
123 uint32_t length_bytes)
124 {
125 struct socfpga_header_v0 header_v0 = {
126 .validation = cpu_to_le32(VALIDATION_WORD),
127 .version = 0,
128 .flags = flags,
129 .length_u32 = cpu_to_le16(length_bytes / 4),
130 .zero = 0,
131 };
132
133 struct socfpga_header_v1 header_v1 = {
134 .validation = cpu_to_le32(VALIDATION_WORD),
135 .version = 1,
136 .flags = flags,
137 .header_u8 = cpu_to_le16(sizeof(header_v1)),
138 .length_u8 = cpu_to_le32(length_bytes),
139 .entry_offset = cpu_to_le32(0x14), /* Trampoline offset */
140 .zero = 0,
141 };
142
143 uint16_t csum;
144
145 if (ver == 0) {
146 csum = sfp_hdr_checksum((uint8_t *)&header_v0, 0);
147 header_v0.checksum = cpu_to_le16(csum);
148 memcpy(buf, &header_v0, sizeof(header_v0));
149 } else {
150 csum = sfp_hdr_checksum((uint8_t *)&header_v1, 1);
151 header_v1.checksum = cpu_to_le16(csum);
152 memcpy(buf, &header_v1, sizeof(header_v1));
153 }
154 }
155
156 /*
157 * Perform a rudimentary verification of header and return
158 * size of image.
159 */
160 static int sfp_verify_header(const uint8_t *buf, uint8_t *ver)
161 {
162 struct socfpga_header_v0 header_v0;
163 struct socfpga_header_v1 header_v1;
164 uint16_t hdr_csum, sfp_csum;
165 uint32_t img_len;
166
167 /*
168 * Header v0 is always smaller than Header v1 and the validation
169 * word and version field is at the same place, so use Header v0
170 * to check for version during verifiction and upgrade to Header
171 * v1 if needed.
172 */
173 memcpy(&header_v0, buf, sizeof(header_v0));
174
175 if (le32_to_cpu(header_v0.validation) != VALIDATION_WORD)
176 return -1;
177
178 if (header_v0.version == 0) {
179 hdr_csum = le16_to_cpu(header_v0.checksum);
180 sfp_csum = sfp_hdr_checksum((uint8_t *)&header_v0, 0);
181 img_len = le16_to_cpu(header_v0.length_u32) * 4;
182 } else if (header_v0.version == 1) {
183 memcpy(&header_v1, buf, sizeof(header_v1));
184 hdr_csum = le16_to_cpu(header_v1.checksum);
185 sfp_csum = sfp_hdr_checksum((uint8_t *)&header_v1, 1);
186 img_len = le32_to_cpu(header_v1.length_u8);
187 } else { /* Invalid version */
188 return -EINVAL;
189 }
190
191 /* Verify checksum */
192 if (hdr_csum != sfp_csum)
193 return -EINVAL;
194
195 *ver = header_v0.version;
196 return img_len;
197 }
198
199 /* Sign the buffer and return the signed buffer size */
200 static int sfp_sign_buffer(uint8_t *buf, uint8_t ver, uint8_t flags,
201 int len, int pad_64k)
202 {
203 uint32_t calc_crc;
204
205 /* Align the length up */
206 len = ALIGN(len, 4);
207
208 /* Build header, adding 4 bytes to length to hold the CRC32. */
209 sfp_build_header(buf + HEADER_OFFSET, ver, flags, len + 4);
210
211 /* Calculate and apply the CRC */
212 calc_crc = ~pbl_crc32(0, (char *)buf, len);
213
214 *((uint32_t *)(buf + len)) = cpu_to_le32(calc_crc);
215
216 if (!pad_64k)
217 return len + 4;
218
219 return sfp_pad_size(ver);
220 }
221
222 /* Verify that the buffer looks sane */
223 static int sfp_verify_buffer(const uint8_t *buf)
224 {
225 int len; /* Including 32bit CRC */
226 uint32_t calc_crc;
227 uint32_t buf_crc;
228 uint8_t ver = 0;
229
230 len = sfp_verify_header(buf + HEADER_OFFSET, &ver);
231 if (len < 0) {
232 debug("Invalid header\n");
233 return -1;
234 }
235
236 if (len < HEADER_OFFSET || len > sfp_pad_size(ver)) {
237 debug("Invalid header length (%i)\n", len);
238 return -1;
239 }
240
241 /*
242 * Adjust length to the base of the CRC.
243 * Check the CRC.
244 */
245 len -= 4;
246
247 calc_crc = ~pbl_crc32(0, (const char *)buf, len);
248
249 buf_crc = le32_to_cpu(*((uint32_t *)(buf + len)));
250
251 if (buf_crc != calc_crc) {
252 fprintf(stderr, "CRC32 does not match (%08x != %08x)\n",
253 buf_crc, calc_crc);
254 return -1;
255 }
256
257 return 0;
258 }
259
260 /* mkimage glue functions */
261 static int socfpgaimage_verify_header(unsigned char *ptr, int image_size,
262 struct image_tool_params *params)
263 {
264 if (image_size < 0x80)
265 return -1;
266
267 return sfp_verify_buffer(ptr);
268 }
269
270 static void socfpgaimage_print_header(const void *ptr)
271 {
272 if (sfp_verify_buffer(ptr) == 0)
273 printf("Looks like a sane SOCFPGA preloader\n");
274 else
275 printf("Not a sane SOCFPGA preloader\n");
276 }
277
278 static int socfpgaimage_check_params(struct image_tool_params *params)
279 {
280 /* Not sure if we should be accepting fflags */
281 return (params->dflag && (params->fflag || params->lflag)) ||
282 (params->fflag && (params->dflag || params->lflag)) ||
283 (params->lflag && (params->dflag || params->fflag));
284 }
285
286 static int socfpgaimage_check_image_types_v0(uint8_t type)
287 {
288 if (type == IH_TYPE_SOCFPGAIMAGE)
289 return EXIT_SUCCESS;
290 return EXIT_FAILURE;
291 }
292
293 static int socfpgaimage_check_image_types_v1(uint8_t type)
294 {
295 if (type == IH_TYPE_SOCFPGAIMAGE_V1)
296 return EXIT_SUCCESS;
297 return EXIT_FAILURE;
298 }
299
300 /*
301 * To work in with the mkimage framework, we do some ugly stuff...
302 *
303 * First, socfpgaimage_vrec_header() is called.
304 * We prepend a fake header big enough to make the file sfp_pad_size().
305 * This gives us enough space to do what we want later.
306 *
307 * Next, socfpgaimage_set_header() is called.
308 * We fix up the buffer by moving the image to the start of the buffer.
309 * We now have some room to do what we need (add CRC and padding).
310 */
311
312 static int data_size;
313
314 static int sfp_fake_header_size(unsigned int size, uint8_t ver)
315 {
316 return sfp_pad_size(ver) - size;
317 }
318
319 static int sfp_vrec_header(struct image_tool_params *params,
320 struct image_type_params *tparams, uint8_t ver)
321 {
322 struct stat sbuf;
323
324 if (params->datafile &&
325 stat(params->datafile, &sbuf) == 0 &&
326 sbuf.st_size <= (sfp_pad_size(ver) - sizeof(uint32_t))) {
327 data_size = sbuf.st_size;
328 tparams->header_size = sfp_fake_header_size(data_size, ver);
329 }
330 return 0;
331
332 }
333
334 static int socfpgaimage_vrec_header_v0(struct image_tool_params *params,
335 struct image_type_params *tparams)
336 {
337 return sfp_vrec_header(params, tparams, 0);
338 }
339
340 static int socfpgaimage_vrec_header_v1(struct image_tool_params *params,
341 struct image_type_params *tparams)
342 {
343 return sfp_vrec_header(params, tparams, 1);
344 }
345
346 static void sfp_set_header(void *ptr, unsigned char ver)
347 {
348 uint8_t *buf = (uint8_t *)ptr;
349
350 /*
351 * This function is called after vrec_header() has been called.
352 * At this stage we have the sfp_fake_header_size() dummy bytes
353 * followed by data_size image bytes. Total = sfp_pad_size().
354 * We need to fix the buffer by moving the image bytes back to
355 * the beginning of the buffer, then actually do the signing stuff...
356 */
357 memmove(buf, buf + sfp_fake_header_size(data_size, ver), data_size);
358 memset(buf + data_size, 0, sfp_fake_header_size(data_size, ver));
359
360 sfp_sign_buffer(buf, ver, 0, data_size, 0);
361 }
362
363 static void socfpgaimage_set_header_v0(void *ptr, struct stat *sbuf, int ifd,
364 struct image_tool_params *params)
365 {
366 sfp_set_header(ptr, 0);
367 }
368
369 static void socfpgaimage_set_header_v1(void *ptr, struct stat *sbuf, int ifd,
370 struct image_tool_params *params)
371 {
372 sfp_set_header(ptr, 1);
373 }
374
375 U_BOOT_IMAGE_TYPE(
376 socfpgaimage,
377 "Altera SoCFPGA Cyclone V / Arria V image support",
378 0, /* This will be modified by vrec_header() */
379 (void *)buffer_v0,
380 socfpgaimage_check_params,
381 socfpgaimage_verify_header,
382 socfpgaimage_print_header,
383 socfpgaimage_set_header_v0,
384 NULL,
385 socfpgaimage_check_image_types_v0,
386 NULL,
387 socfpgaimage_vrec_header_v0
388 );
389
390 U_BOOT_IMAGE_TYPE(
391 socfpgaimage_v1,
392 "Altera SoCFPGA Arria10 image support",
393 0, /* This will be modified by vrec_header() */
394 (void *)buffer_v1,
395 socfpgaimage_check_params,
396 socfpgaimage_verify_header,
397 socfpgaimage_print_header,
398 socfpgaimage_set_header_v1,
399 NULL,
400 socfpgaimage_check_image_types_v1,
401 NULL,
402 socfpgaimage_vrec_header_v1
403 );