+2015-11-14 Jakub Jelinek <jakub@redhat.com>
+
+ * omp-low.c (lower_omp_ordered): Add argument to GOMP_SMD_ORDERED_*
+ internal calls - 0 if ordered simd and 1 for ordered threads simd.
+ * tree-vectorizer.c (adjust_simduid_builtins): If GOMP_SIMD_ORDERED_*
+ argument is 1, replace it with GOMP_ordered_* call instead of removing
+ it.
+
+2015-11-13 Rich Felker <dalias@libc.org>
+
+ * config/sh/sh.md (symGOT_load): Suppress __stack_chk_guard
+ address loading hack for FDPIC targets.
+
+2015-11-13 Ajit Agarwal <ajitkum@xilinx.com>
+ Jeff Law <law@redhat.com>
+
+ * Makefile.in (OBJS): Add gimple-ssa-split-paths.o
+ * common.opt (-fsplit-paths): New flag controlling path splitting.
+ * doc/invoke.texi (fsplit-paths): Document.
+ * opts.c (default_options_table): Add -fsplit-paths to -O2.
+ * passes.def: Add split_paths pass.
+ * timevar.def (TV_SPLIT_PATHS): New timevar.
+ * tracer.c: Include "tracer.h"
+ (ignore_bb_p): No longer static.
+ (transform_duplicate): New function, broken out of tail_duplicate.
+ (tail_duplicate): Use transform_duplicate.
+ * tracer.h (ignore_bb_p): Declare
+ (transform_duplicate): Likewise.
+ * tree-pass.h (make_pass_split_paths): Declare.
+ * gimple-ssa-split-paths.c: New file.
+
+2015-11-13 Kai Tietz <ktietz70@googlemail.com>
+ Marek Polacek <polacek@redhat.com>
+ Jason Merrill <jason@redhat.com>
+
+ * convert.c (maybe_fold_build1_loc): New.
+ (maybe_fold_build2_loc): New.
+ (convert_to_pointer_1): Split out from convert_to_pointer.
+ (convert_to_pointer_nofold): New.
+ (convert_to_real_1): Split out from convert_to_real.
+ (convert_to_real_nofold): New.
+ (convert_to_integer_1): Split out from convert_to_integer.
+ (convert_to_integer_nofold): New.
+ (convert_to_complex_1): Split out from convert_to_complex.
+ (convert_to_complex_nofold): New.
+ * convert.h: Declare new functions.
+ * tree-complex.c (create_one_component_var): Break up line to
+ avoid sequence point issues.
+
+2015-11-13 Jason Merrill <jason@redhat.com>
+
+ * fold-const.c (fold_convert_const): Fold changing cv-quals on
+ VECTOR_CST.
+
+ * hash-map.h (hash_map::empty): New.
+
+2015-11-13 Nathan Sidwell <nathan@codesourcery.com>
+
+ * gcc/omp-low.c (scan_sharing_clauses): Accept INDEPENDENT, AUTO & SEQ.
+ (oacc_loop_fixed_partitions): Correct return type to bool.
+ (oacc_loop_auto_partitions): New.
+ (oacc_loop_partition): Take mask argument, call
+ oacc_loop_auto_partitions.
+ (execute_oacc_device_lower): Provide mask to oacc_loop_partition.
+
+2015-11-13 Michael Meissner <meissner@linux.vnet.ibm.com>
+
+ * config/rs6000/constraints.md (we constraint): New constraint for
+ 64-bit power9 vector support.
+ (wL constraint): New constraint for the element in a vector that
+ can be addressed by the MFVSRLD instruction.
+
+ * config/rs6000/rs6000-protos.h (convert_float128_to_int): Add
+ declaration.
+ (convert_int_to_float128): Likewise.
+ (rs6000_generate_compare): Add support for ISA 3.0 (power9)
+ hardware support for IEEE 128-bit floating point.
+ (rs6000_expand_float128_convert): Likewise.
+ (convert_float128_to_int): Likewise.
+ (convert_int_to_float128): Likewise.
+
+ * config/rs6000/rs6000.md (UNSPEC_ROUND_TO_ODD): New unspecs for
+ ISA 3.0 hardware IEEE 128-bit floating point.
+ (UNSPEC_IEEE128_MOVE): Likewise.
+ (UNSPEC_IEEE128_CONVERT): Likewise.
+ (FMA_F): Add support for IEEE 128-bit floating point hardware support.
+ (Ff): Add support for DImode.
+ (Fv): Likewise.
+ (any_fix code iterator): New and updated iterators for IEEE
+ 128-bit floating point hardware support.
+ (any_float code iterator): Likewise.
+ (s code attribute): Likewise.
+ (su code attribute): Likewise.
+ (az code attribute): Likewise.
+ (uns code attribute): Likewise.
+ (neg<mode>2, FLOAT128 iterator): Add support for IEEE 128-bit
+ floating point hardware support.
+ (abs<mode>2, FLOAT128 iterator): Likewise.
+ (add<mode>3, IEEE128 iterator): New insns for IEEE 128-bit
+ floating point hardware.
+ (sub<mode>3, IEEE128 iterator): Likewise.
+ (mul<mode>3, IEEE128 iterator): Likewise.
+ (div<mode>3, IEEE128 iterator): Likewise.
+ (copysign<mode>3, IEEE128 iterator): Likewise.
+ (sqrt<mode>2, IEEE128 iterator): Likewise.
+ (neg<mode>2, IEEE128 iterator): Likewise.
+ (abs<mode>2, IEEE128 iterator): Likewise.
+ (nabs<mode>2, IEEE128 iterator): Likewise.
+ (fma<mode>4_hw, IEEE128 iterator): Likewise.
+ (fms<mode>4_hw, IEEE128 iterator): Likewise.
+ (nfma<mode>4_hw, IEEE128 iterator): Likewise.
+ (nfms<mode>4_hw, IEEE128 iterator): Likewise.
+ (extend<SFDF:mode><IEEE128:mode>2_hw): Likewise.
+ (trunc<mode>df2_hw, IEEE128 iterator): Likewise.
+ (trunc<mode>sf2_hw, IEEE128 iterator): Likewise.
+ (fix_fixuns code attribute): Likewise.
+ (float_floatuns code attribute): Likewise.
+ (fix<uns>_<mode>si2_hw): Likewise.
+ (fix<uns>_<mode>di2_hw): Likewise.
+ (float<uns>_<mode>si2_hw): Likewise.
+ (float<uns>_<mode>di2_hw): Likewise.
+ (xscvqp<su>wz_<mode>): Likewise.
+ (xscvqp<su>dz_<mode>): Likewise.
+ (xscv<su>dqp_<mode): Likewise.
+ (ieee128_mfvsrd): Likewise.
+ (ieee128_mfvsrwz): Likewise.
+ (ieee128_mtvsrw): Likewise.
+ (ieee128_mtvsrd): Likewise.
+ (trunc<mode>df2_odd): Likewise.
+ (cmp<mode>_h): Likewise.
+ (128-bit GPR splitters): Don't split a 128-bit move that is a
+ direct move between GPR and vector registers using ISA 3.0 direct
+ move instructions.
+ (maddld4): Add support for the ISA 3.0 integer multiply-add
+ instruction.
+
+ * config/rs6000/rs6000.c (rs6000_debug_reg_global): Add ISA 3.0
+ debugging.
+ (rs6000_init_hard_regno_mode_ok): If ISA 3.0 and 64-bit, enable we
+ constraint. Disable the VSX<->GPR direct move helpers if we have
+ the MFVSRLD and MTVSRDD instructions.
+ (rs6000_secondary_reload_simple_move): Add support for doing
+ vector direct moves directly without additional scratch registers
+ if we have ISA 3.0 instructions.
+ (rs6000_secondary_reload_direct_move): Update comments.
+ (rs6000_output_move_128bit): Add support for ISA 3.0 vector
+ instructions.
+
+ * config/rs6000/vsx.md (vsx_mov<mode>): Add support for ISA 3.0
+ direct move instructions.
+ (vsx_movti_64bit): Likewise.
+ (vsx_extract_<mode>): Likewise.
+
+ * config/rs6000/rs6000.h (VECTOR_ELEMENT_MFVSRLD_64BIT): New
+ macros for ISA 3.0 direct move instructions.
+ (TARGET_DIRECT_MOVE_128): Likewise.
+ (TARGET_MADDLD): Add support for the ISA 3.0 integer multiply-add
+ instruction.
+
+ * doc/md.texi (RS/6000 constraints): Document we, wF, wG, wL
+ constraints. Update wa documentation to say not to use %x<n> on
+ instructions that only take Altivec registers.
+
+2015-11-13 David Malcolm <dmalcolm@redhat.com>
+
+ * Makefile.in (OBJS): Add gcc-rich-location.o.
+ * diagnostic.c (diagnostic_append_note): Pass line_table to
+ rich_location ctor.
+ (emit_diagnostic): Likewise.
+ (inform): Likewise.
+ (inform_n): Likewise.
+ (warning): Likewise.
+ (warning_at): Likewise.
+ (warning_n): Likewise.
+ (pedwarn): Likewise.
+ (permerror): Likewise.
+ (error): Likewise.
+ (error_n): Likewise.
+ (error_at): Likewise.
+ (sorry): Likewise.
+ (fatal_error): Likewise.
+ (internal_error): Likewise.
+ (internal_error_no_backtrace): Likewise.
+ (source_range::debug): Likewise.
+ * gcc-rich-location.c: New file.
+ * gcc-rich-location.h: New file.
+ * genmatch.c (fatal_at): Pass line_table to rich_location ctor.
+ (warning_at): Likewise.
+ * gimple.h (gimple_set_block): Use set_block function.
+ * input.c (dump_line_table_statistics): Dump stats on how many
+ ranges were optimized vs how many needed ad-hoc table.
+ (write_digit_row): Add "map" param; use its range_bits
+ to calculate the per-character offset.
+ (dump_location_info): Print the range and column bits for each
+ ordinary map. Use the range bits to calculate the per-character
+ offset. Pass the map as a new param to the various calls to
+ write_digit_row. Eliminate uses of
+ ORDINARY_MAP_NUMBER_OF_COLUMN_BITS.
+ * print-tree.c (print_node): Print any source range information.
+ * rtl-error.c (diagnostic_for_asm): Likewise.
+ * toplev.c (general_init): Initialize line_table's
+ default_range_bits.
+ * tree-cfg.c (move_block_to_fn): Likewise.
+ (move_block_to_fn): Likewise.
+ * tree-inline.c (copy_phis_for_bb): Likewise.
+ * tree.c (tree_set_block): Likewise.
+ (get_pure_location): New function.
+ (set_source_range): New functions.
+ (set_block): New function.
+ (set_source_range): New functions.
+ * tree.h (CAN_HAVE_RANGE_P): New.
+ (EXPR_LOCATION_RANGE): New.
+ (EXPR_HAS_RANGE): New.
+ (get_expr_source_range): New inline function.
+ (DECL_LOCATION_RANGE): New.
+ (set_source_range): New decls.
+ (get_decl_source_range): New inline function.
+
+2015-11-13 Alan Lawrence <alan.lawrence@arm.com>
+
+ PR tree-optimization/67682
+ * tree-vect-slp.c (vect_split_slp_store_group): New.
+ (vect_analyze_slp_instance): During basic block SLP, recurse on
+ subgroups if vect_build_slp_tree fails after 1st vector.
+
+2015-11-13 Christian Bruel <christian.bruel@st.com>
+
+ PR target/65837
+ * config/arm/arm.c (arm_option_override): Move NEON check...
+ (arm_option_check_internal): here
+ (arm_file_start): Move .fpu print...
+ (arm_declare_function_name): here
+ (arm_option_print): Dump current fpu name.
+ * config/arm/arm.opt (arm_fpu_index): Mark Save.
+
+2015-11-13 Segher Boessenkool <segher@kernel.crashing.org>
+ Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * combine.c (subst): Don't substitute or simplify when
+ handling register-wise widening multiply.
+ (force_to_mode): Likewise.
+
+2015-11-13 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR tree-optimization/68264
+ * tree-call-cdce.c (gen_one_condition): Update commentary.
+ (gen_conditions_for_pow_int_base): Invert the sense of the tests
+ passed to gen_one_condition.
+ (gen_conditions_for_domain): Likewise. Use unordered comparisons.
+ (shrink_wrap_one_built_in_call): Invert the sense of the tests,
+ using EDGE_FALSE_VALUE for edges to the call block and
+ EDGE_TRUE_VALUE for the others.
+
+2015-11-13 Nathan Sidwell <nathan@codesourcery.com>
+
+ * config/nvptx/nvptx.c (nvptx_generate_vector_shuffle): Deal with
+ complex types.
+
+2015-11-13 Nathan Sidwell <nathan@codesourcery.com>
+
+ * gimplify.c (oacc_default_clause): Use inform for enclosing scope.
+
+2015-11-13 Tom de Vries <tom@codesourcery.com>
+
+ * gen-pass-instances.awk (handle_line): Rename prefix_len var to
+ len_of_prefix.
+
+2015-11-13 Tom de Vries <tom@codesourcery.com>
+
+ * gen-pass-instances.awk (handle_line): Add args_str variable.
+
+2015-11-13 Martin Liska <mliska@suse.cz>
+
+ * graphite-poly.c (free_scop): Release scop->drs vector.
+ * graphite-scop-detection.c (scop_detection::harmful_stmt_in_region):
+ Release dom vector.
+ (try_generate_gimple_bb): Use vNULL as a default initialization
+ for vectors.
+
+2015-11-13 Martin Liska <mliska@suse.cz>
+
+ PR ipa/68311
+ * ipa-icf.c (sem_item_optimizer::traverse_congruence_split):
+ Replace array initialization (using a variable post-increment)
+ that possible triggers multiple unsequenced modifications
+ with a pair of pushes to a vector.
+
+2015-11-13 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/68306
+ * tree-vect-data-refs.c (verify_data_ref_alignment): Move
+ loop related checks ...
+ (vect_verify_datarefs_alignment): ... here.
+ (vect_slp_analyze_and_verify_node_alignment): Compute and
+ verify alignment of the single DR that it matters.
+ * tree-vect-stmts.c (vectorizable_store): Add an assert.
+ (vectorizable_load): Add a comment.
+ * tree-vect-slp.c (vect_analyze_slp_cost_1): Fix DR used
+ for determining load cost.
+
+2015-11-13 Ilya Enkovich <enkovich.gnu@gmail.com>
+
+ * tree-vect-loop.c (vect_determine_vectorization_factor): Check
+ mix of boolean and integer vectors in a single statement.
+ * tree-vect-slp.c (vect_mask_constant_operand_p): New.
+ (vect_get_constant_vectors): Use vect_mask_constant_operand_p to
+ determine constant type.
+ * tree-vect-stmts.c (vectorizable_comparison): Provide vectype
+ for loop invariants.
+
+2015-11-13 Alan Hayward <alan.hayward@arm.com>
+
+ PR tree-optimization/66558
+ * tree-vect-loop.c (is_integer_induction):Add.
+ (vectorizable_reduction): Add integer induction checks.
+
+2015-11-13 Christophe Lyon <christophe.lyon@linaro.org>
+
+ Revert [ARM] Remove neon-testgen.ml and generated tests.
+
+ 2015-11-12 Christophe Lyon <christophe.lyon@linaro.org>
+
+ [ARM] Remove neon-testgen.ml and generated tests.
+
+ * config/arm/neon-testgen.ml: Remove.
+
+2015-11-13 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-loop.c (vect_analyze_loop_2): Add fatal parameter.
+ Signal fatal failure if early checks fail.
+ (vect_analyze_loop): If vect_analyze_loop_2 fails fatally
+ do not bother testing further vector sizes.
+
+2015-11-13 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/predicates.md (misaligned_operand): Return true if
+ operand is aligned to less than its natural alignmnet.
+
+2015-11-13 Ilya Enkovich <enkovich.gnu@gmail.com>
+
+ * doc/md.texi (vec_cmp@var{m}@var{n}): New item.
+ (vec_cmpu@var{m}@var{n}): New item.
+ (vcond@var{m}@var{n}): Specify comparison is signed.
+ (vcondu@var{m}@var{n}): New item.
+ (vcond_mask_@var{m}@var{n}): New item.
+ (maskload@var{m}@var{n}): New item.
+ (maskstore@var{m}@var{n}): New item.
+
+2015-11-13 Ilya Enkovich <enkovich.gnu@gmail.com>
+
+ * tree-vect-stmts.c (vectorizable_mask_load_store): Check
+ types of stored value and storage are compatible.
+
+2015-11-13 Andris Pavenis <andris.pavenis@iki.fi>
+
+ * gcc.c (POST_LINK_SPEC): Define if not already defined.
+ (LINK_COMMAND_SPEC): Use post_link.
+ (post_link_spec): New, initialize to POST_LINK_SPEC.
+ (post_link): Initialize new static spec.
+ * doc/tm.texi.in (POST_LINK_SPEC): Document.
+ * doc/tm.texi: Regenerated.
+
+2015-11-13 David Malcolm <dmalcolm@redhat.com>
+
+ PR driver/67613
+ * Makefile.in (GCC_OBJS): Add spellcheck.o.
+ (OBJS): Add spellcheck-tree.o.
+ * gcc.c: Include "spellcheck.h".
+ (suggest_option): New function.
+ (driver::handle_unrecognized_options): Call suggest_option to
+ provide a hint about misspelled options.
+ * spellcheck.c: Update file comment.
+ (levenshtein_distance): Convert 4-param implementation from static
+ to extern scope. Remove note about unit tests from leading
+ comment for const char * implementation. Move tree
+ implementation to...
+ * spellcheck-tree.c: New file.
+ * spellcheck.h (levenshtein_distance): Add 4-param decl.
+
+2015-11-13 David Malcolm <dmalcolm@redhat.com>
+
+ * Makefile.in (OBJS): Add spellcheck.o.
+ * spellcheck.c: New file.
+ * spellcheck.h: New file.
+
+2015-11-13 James Bowman <james.bowman@ftdichip.com>
+
+ * config/ft32/ft32.md (*sne): New insn pattern.
+
+2015-11-12 Brad Lucier <lucier@math.purdue.edu>
+
+ * gcc/cprop.c (is_too_expensive): Remove.
+ (gcse.h): Include.
+ (one_cprop_pass): Call gcse_or_cprop_is_too_expensive, not
+ is_too_expensive.
+ * gcc/gcse.h (gcse_or_cprop_is_too_expensive): Declare.
+ * gcc/gcse.c (is_too_expensive): Rename to ...
+ (gcse_or_cprop_is_too_expensive): ... this.
+ Expand warning to add required size of max-gcse-memory.
+ (one_pre_gcse_pass): Use it.
+ (one_code_hoisting_pass): Use it.
+ * gcc/params.def (max-gcse-memory): Increase from 50MB to 128MB.
+
+2015-11-12 James Norris <jnorris@codesourcery.com>
+ Joseph Myers <joseph@codesourcery.com>
+
+ * gimple-pretty-print.c (dump_gimple_omp_target): Handle
+ GF_OMP_TARGET_KIND_OACC_DECLARE.
+ * gimple.h (enum gf_mask): Add GF_OMP_TARGET_KIND_OACC_DECLARE.
+ (is_gomple_omp_oacc): Handle GF_OMP_TARGET_KIND_OACC_DECLARE.
+ * gimplify.c (oacc_declare_returns): New.
+ (gimplify_bind_expr): Prepend 'exit' stmt to cleanup.
+ (device_resident_p): New function.
+ (oacc_default_clause): Handle device_resident clause.
+ (gimplify_oacc_declare_1, gimplify_oacc_declare): New functions.
+ (gimplify_expr): Handle OACC_DECLARE.
+ * omp-builtins.def (BUILT_IN_GOACC_DECLARE): New builtin.
+ * omp-low.c (expand_omp_target): Handle
+ GF_OMP_TARGET_KIND_OACC_DECLARE and BUILTIN_GOACC_DECLARE.
+ (build_omp_regions_1): Handlde GF_OMP_TARGET_KIND_OACC_DECLARE.
+ (lower_omp_target): Handle GF_OMP_TARGET_KIND_OACC_DECLARE,
+ GOMP_MAP_DEVICE_RESIDENT and GOMP_MAP_LINK.
+ (make_gimple_omp_edges): Handle GF_OMP_TARGET_KIND_OACC_DECLARE.
+ * tree-pretty-print.c (dump_omp_clause): Handle GOMP_MAP_LINK and
+ GOMP_MAP_DEVICE_RESIDENT.
+
+2015-11-12 Christophe Lyon <christophe.lyon@linaro.org>
+
+ [ARM] Remove neon-testgen.ml and generated tests.
+
+ * config/arm/neon-testgen.ml: Remove.
+
+2015-11-12 Jim Wilson <jim.wilson@linaro.org>
+
+ * config/aarch64/aarch64-cores.def (qdf24xx): New.
+ * config/aarch64/aarch64-tune.md: Regenerated.
+ * config/arm/arm-cores.def (qdf24xx): New.
+ * config/arm/arm-tables.opt, config/arm/arm-tune.md: Regenerated.
+ * config/arm/bpabi.h (BE8_LINK_SPEC): Add qdf24xx support.
+ * doc/invoke.texi (AArch64 Options/-mtune): Add "qdf24xx".
+ (ARM Options/-mtune): Likewise.
+
+2015-11-12 Martin Liska <mliska@suse.cz>
+
+ * config/i386/i386.c (ix86_valid_target_attribute_p):
+ Finalize options at the of the function.
+ * gcc.c (driver_get_configure_time_options): Call newly
+ introduced init_opts_obstack.
+ * lto-wrapper.c (main): Likewise.
+ * opts.c (init_opts_obstack): New function.
+ (init_options_struct): Call newly introduced init_opts_obstack.
+ * opts.h (init_options_struct): Declare.
+
+2015-11-12 Martin Liska <mliska@suse.cz>
+
+ PR ipa/68035
+ * ipa-icf.c (void sem_item::set_hash): New function.
+ (sem_function::get_hash): Use renamed m_hash member variable.
+ (sem_item::update_hash_by_addr_refs): Utilize get_hash.
+ (sem_item::update_hash_by_local_refs): Likewise.
+ (sem_variable::get_hash): Use renamed m_hash member variable.
+ (sem_item_optimizer::update_hash_by_addr_refs): Utilize get_hash.
+ (sem_item_optimizer::build_hash_based_classes): Utilize set_hash.
+ (sem_item_optimizer::build_graph): As the hash value of an item
+ is lazy initialized, force the calculation.
+ * ipa-icf.h (set_hash): Declare new function and rename hash member
+ variable to m_hash.
+
+2015-11-12 Richard Biener <rguenther@suse.de>
+
+ * tree-vectorizer.h (vect_slp_analyze_data_ref_dependences):
+ Rename to vect_slp_analyze_instance_dependence.
+ * tree-vect-data-refs.c (vect_slp_analyze_data_ref_dependence):
+ Remove WAR special-case.
+ (vect_slp_analyze_node_dependences): Instead add more specific
+ code here, not relying on other instances being vectorized.
+ (vect_slp_analyze_instance_dependence): Adjust accordingly.
+ * tree-vect-slp.c (vect_build_slp_tree_1): Remove excessive
+ vertical space in dump files.
+ (vect_print_slp_tree): Likewise.
+ (vect_analyze_slp_instance): Dump a header for the final SLP tree.
+ (vect_slp_analyze_bb_1): Delay computing relevant stmts and
+ not vectorized stmts until after dependence analysis removed
+ instances. Merge alignment and dependence checks.
+ * tree-vectorizer.c (pass_slp_vectorize::execute): Clear visited
+ flag on all stmts.
+
+2015-11-12 Evandro Menezes <e.menezes@samsung.com>
+
+ * config/aarch64/aarch64-protos.h (tune_params): Add new members
+ "max_case_values" and "cache_line_size".
+ * config/aarch64/aarch64.c (aarch64_case_values_threshold): New
+ function.
+ (aarch64_override_options_internal): Tune heuristics based on new
+ members in "tune_params".
+ (TARGET_CASE_VALUES_THRESHOLD): Define macro.
+
+2015-11-12 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/68306
+ * tree-vect-data-refs.c (verify_data_ref_alignment): Remove
+ relevant and vectorizable checks here.
+ (vect_verify_datarefs_alignment): Add relevant check here.
+
+2015-11-12 Nathan Sidwell <nathan@codesourcery.com>
+
+ * gimplify.c (oacc_default_clause): New.
+ (omp_notice_variable): Call it.
+
+2015-11-12 Ilya Enkovich <enkovich.gnu@gmail.com>
+
+ PR tree-optimization/68305
+ * tree-vect-slp.c (vect_get_constant_vectors): Support
+ COND_EXPR with SSA_NAME as a condition.
+
+2015-11-12 Eric Botcazou <ebotcazou@adacore.com>
+
+ * config/visium/visium-protos.h (notice_update_cc): Delete.
+ (print_operand): Likewise.
+ (print_operand_address): Likewise.
+
+2015-11-12 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/alpha/alpha.h (FUNCTION_VALUE, LIBCALL_VALUE,
+ FUNCTION_VALUE_REGNO_P): Remove.
+ * config/alpha/alpha-protos.h (function_value): Remove.
+ * config/alpha/alpha.c (function_value): Rename to...
+ (alpha_function_value_1): ... this. Make static.
+ (alpha_function_value, alpha_libcall_value,
+ alpha_function_value_regno_p): New functions.
+ (TARGET_FUNCTION_VALUE, TARGET_LIBCALL_VALUE,
+ TARGET_FUNCTION_VALUE_REGNO_P): Define.
+
+2015-11-12 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/alpha/alpha.h (REGISTER_MOVE_COST, MEMORY_MOVE_COST): Remove.
+ * config/alpha/alpha.c (alpha_memory_latency): Make static.
+ (alpha_register_move_cost, alpha_memory_move_cost): New functions.
+ (TARGET_REGISTER_MOVE_COST, TARGET_MEMORY_MOVE_COST): Define.
+
+2015-11-12 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR target/67265
+ * config/i386/i386.c (ix86_adjust_stack_and_probe): Remove obsolete
+ assertion on the CFA register.
+
+2015-11-12 Ilya Enkovich <enkovich.gnu@gmail.com>
+
+ * expr.c (do_store_flag): Expand vector comparison as
+ VEC_COND_EXPR if vector comparison is not supported by target.
+
+2015-11-12 Renlin Li <renlin.li@arm.com>
+
+ * config/arm/arm.md (addsi3_compare_op2): Make the order of
+ assembly pattern consistent with constraint order.
+
+2015-11-12 Tom de Vries <tom@codesourcery.com>
+
+ * gen-pass-instances.awk (handle_line): Simplify match regexp.
+
+2015-11-12 Tom de Vries <tom@codesourcery.com>
+
+ * gen-pass-instances.awk (handle_line): Simplify init of
+ postfix_starts_at.
+
+2015-11-12 Tom de Vries <tom@codesourcery.com>
+
+ * gen-pass-instances.awk (handle_line): Rename var where to
+ call_starts_at.
+
+2015-11-12 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/arc/arc.c (gen_compare_reg): Swap operands also when we
+ do not expand to rtl.
+
+2015-11-12 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/58497
+ * tree-vect-generic.c: Include gimplify.h.
+ (tree_vec_extract): Lookup constant/constructor DEFs.
+ (do_cond): Unshare cond.
+
+2015-11-12 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.c (ix86_legitimate_combined_insn): Reject
+ combined insn if the alignment of vector mode memory operand
+ is less than ssememalign.
+
+2015-11-12 Tom de Vries <tom@codesourcery.com>
+
+ * gen-pass-instances.awk (handle_line): Print parentheses and
+ pass_name explicitly.
+
+2015-11-12 Tom de Vries <tom@codesourcery.com>
+
+ * gen-pass-instances.awk (handle_line): Add pass_num, prefix
+ and postfix vars.
+
+2015-11-12 Tom de Vries <tom@codesourcery.com>
+
+ * gen-pass-instances.awk (handle_line): Add comments.
+
+2015-11-12 Tom de Vries <tom@codesourcery.com>
+
+ * gen-pass-instances.awk (handle_line): Rename len_of_end to
+ len_of_close.
+
+2015-11-12 Tom de Vries <tom@codesourcery.com>
+
+ * gen-pass-instances.awk (handle_line): Add len_of_call variable.
+
2015-11-12 Tom de Vries <tom@codesourcery.com>
* gen-pass-instances.awk (handle_line): Restructure using early-out.
Move Convert C1/(X*C2) into (C1/C2)/X to match.pd.
Move Optimize (X & (-A)) / A where A is a power of 2, to
X >> log2(A) to match.pd.
-
+
* match.pd (rdiv (rdiv:s @0 @1) @2): New simplifier.
(rdiv @0 (rdiv:s @1 @2)): New simplifier.
(div (convert? (bit_and @0 INTEGER_CST@1)) INTEGER_CST@2):
2015-11-11 Nathan Sidwell <nathan@codesourcery.com>
Cesar Philippidis <cesar@codesourcery.com>
- * gcc/gimplify.c (enum omp_region_type): Add ORT_ACC,
+ * gimplify.c (enum omp_region_type): Add ORT_ACC,
ORT_ACC_DATA, ORT_ACC_PARALLEL, ORT_ACC_KERNELS. Adjust ORT_NONE.
(gimple_add_tmp_var): Add ORT_ACC checks.
(gimplify_var_or_parm_decl): Likewise.
- (omp_firstprivatize_variable): Likewise. Use ORT_TARGET_DATA as a
- mask.
+ (omp_firstprivatize_variable): Likewise. Use ORT_TARGET_DATA as a mask.
(omp_add_variable): Look in outer contexts for openacc and allow
- reductions with other sharing. Add ORT_ACC and ORT_TARGET_DATA
- checks.
+ reductions with other sharing. Add ORT_ACC and ORT_TARGET_DATA checks.
(omp_notice_variable, omp_is_private, omp_check_private): Add
ORT_ACC checks.
(gimplify_scan_omp_clauses: Treat ORT_ACC as ORT_WORKSHARE.
(gimplify_oacc_cache): Specify ORT_ACC.
(gimplify_omp_workshare): Adjust OpenACC region types.
(gimplify_omp_target_update): Likewise.
- * gcc/omp-low.c (scan_sharing_clauses): Remove Openacc
- firstprivate sorry.
+ * omp-low.c (scan_sharing_clauses): Remove Openacc firstprivate sorry.
(lower-rec_input_clauses): Don't handle openacc firstprivate
references here.
(lower_omp_target): Emit initializers for openacc firstprivate vars.
architecture.
(arc_compute_function_type): Likewise.
(arc_print_operand): Handle new ARCv2 punctuation characters.
- (arc_return_in_memory): ARCv2 ABI returns in registers up to 16
- bytes.
+ (arc_return_in_memory): ARCv2 ABI returns in registers up to 16 bytes.
(workaround_arc_anomaly, arc_asm_insn_p, arc_loop_hazard): New
function.
(arc_reorg, arc_hazard): Use it.
- * config/arc/arc.h (TARGET_CPU_CPP_BUILTINS): Define __HS__ and
- __EM__.
+ * config/arc/arc.h (TARGET_CPU_CPP_BUILTINS): Define __HS__ and __EM__.
(ASM_SPEC): Add ARCv2 options.
(TARGET_NORM): ARC HS has norm instructions by default.
- (TARGET_OPTFPE): Use optimized floating point emulation for ARC
- HS.
+ (TARGET_OPTFPE): Use optimized floating point emulation for ARC HS.
(TARGET_AT_DBR_CONDEXEC): Only for ARC600 family.
- (TARGET_EM, TARGET_HS, TARGET_V2, TARGET_MPYW, TARGET_MULTI):
- Define.
+ (TARGET_EM, TARGET_HS, TARGET_V2, TARGET_MPYW, TARGET_MULTI): Define.
(SIGNED_INT16, TARGET_MPY, TARGET_ARC700_MPY, TARGET_ANY_MPY):
Likewise.
(TARGET_ARC600_FAMILY, TARGET_ARCOMPACT_FAMILY): Likewise.
* optabs-tree.c (expand_vec_cond_expr_p): Use
get_vcond_mask_icode for VEC_COND_EXPR with mask.
* optabs.c (expand_vec_cond_mask_expr): New.
- (expand_vec_cond_expr): Use get_vcond_mask_icode
- when possible.
+ (expand_vec_cond_expr): Use get_vcond_mask_icode when possible.
* optabs.def (vcond_mask_optab): New.
* tree-vect-patterns.c (vect_recog_bool_pattern): Don't
generate redundant comparison for COND_EXPR.
* tree-vect-patterns.c (check_bool_pattern): Check fails
if we can vectorize comparison directly.
(search_type_for_mask): New.
- (vect_recog_bool_pattern): Support cases when bool pattern
- check fails.
+ (vect_recog_bool_pattern): Support cases when bool pattern check fails.
* tree-vect-slp.c (vect_build_slp_tree_1): Allow
comparison statements.
- (vect_get_constant_vectors): Support boolean vector
- constants.
+ (vect_get_constant_vectors): Support boolean vector constants.
* config/i386/i386-protos.h (ix86_expand_mask_vec_cmp): New.
(ix86_expand_int_vec_cmp): New.
(ix86_expand_fp_vec_cmp): New.
(fusion_addis_mem_combo_store): Likewise.
(fusion_offsettable_mem_operand): Likewise.
- * config/rs6000/rs6000-protos.h (emit_fusion_addis): Add
- declarations.
+ * config/rs6000/rs6000-protos.h (emit_fusion_addis): Add declarations.
(emit_fusion_load_store): Likewise.
(fusion_p9_p): Likewise.
(expand_fusion_p9_load): Likewise.
elements for power9 fusion.
(rs6000_debug_print_mode): Rework debug information to print more
information about fusion.
- (rs6000_init_hard_regno_mode_ok): Setup for power9 fusion
- support.
+ (rs6000_init_hard_regno_mode_ok): Setup for power9 fusion support.
(rs6000_legitimate_address_p): Recognize toc fusion as a valid
offsettable memory address.
(rs6000_rtx_costs): Update costs for new ISA 3.0 instructions.
(QHSI mode iterator): New iterator for power9 fusion.
(GPR_FUSION): Likewise.
(FPR_FUSION): Likewise.
- (mod<mode>3): Add support for ISA 3.0
- modulus instructions.
+ (mod<mode>3): Add support for ISA 3.0 modulus instructions.
(umod<mode>3): Likewise.
(divmod peephole): Likewise.
(udivmod peephole): Likewise.
(POWERPC_MASKS): Add new ISA 3.0 switches.
(power9 cpu): Add power9 cpu.
- * config/rs6000/rs6000.h (ASM_CPU_POWER9_SPEC): Add support for
- power9.
+ * config/rs6000/rs6000.h (ASM_CPU_POWER9_SPEC): Add support for power9.
(ASM_CPU_SPEC): Likewise.
(EXTRA_SPECS): Likewise.
* config/rs6000/rs6000-opts.h (enum processor_type): Add
PROCESSOR_POWER9.
- * config/rs6000/rs6000.c (power9_cost): Initial cost setup for
- power9.
+ * config/rs6000/rs6000.c (power9_cost): Initial cost setup for power9.
(rs6000_debug_reg_global): Add support for power9 fusion.
(rs6000_setup_reg_addr_masks): Cache mode size.
(rs6000_option_override_internal): Until real power9 tuning is
(rs6000_setup_reg_addr_masks): Do not allow pre-increment,
pre-decrement, or pre-modify on SFmode/DFmode if we allow the use
of Altivec registers.
- (rs6000_option_override_internal): Add support for ISA 3.0
- switches.
+ (rs6000_option_override_internal): Add support for ISA 3.0 switches.
(rs6000_loop_align): Add support for power9 cpu.
(rs6000_file_start): Likewise.
(rs6000_adjust_cost): Likewise.
2015-11-09 Martin Liska <mliska@suse.cz>
* gcc.c (record_temp_file): Release name string.
- * ifcvt.c (noce_convert_multiple_sets): Use auto_vec instead
- of vec.
+ * ifcvt.c (noce_convert_multiple_sets): Use auto_vec instead of vec.
* lra-lives.c (free_live_range_list): Utilize
lra_live_range_pool for allocation and deallocation.
(create_live_range): Likewise.
(remove_some_program_points_and_update_live_ranges): Likewise.
(lra_create_live_ranges_1): Release point_freq_vec that can
be not freed from previous iteration of the function.
- * tree-eh.c (lower_try_finally_switch): Use auto_vec instead of
- vec.
+ * tree-eh.c (lower_try_finally_switch): Use auto_vec instead of vec.
* tree-sra.c (sra_deinitialize): Release all vectors in
base_access_vec.
* tree-ssa-dom.c (free_dom_edge_info): Make the function extern.
2015-11-09 Richard Biener <rguenther@suse.de>
PR tree-optimization/68248
- * tree-vect-generic.c (expand_vector_operations_1): Handle
- scalar rhs2.
+ * tree-vect-generic.c (expand_vector_operations_1): Handle scalar rhs2.
2015-11-09 Richard Biener <rguenther@suse.de>
(frv_print_operand): Pass mode to frv_print_operand_address calls.
* config/mn10300/mn10300.c (mn10300_print_operand): Pass mode to
output_address.
- * config/cris/cris.c (cris_print_operand_address): Add MODE
- argument.
+ * config/cris/cris.c (cris_print_operand_address): Add MODE argument.
(cris_print_operand): Pass mode to output_address calls.
- * config/spu/spu.c (print_operand): Pass mode to output_address
- calls.
+ * config/spu/spu.c (print_operand): Pass mode to output_address calls.
* config/aarch64/aarch64.h (aarch64_print_operand)
(aarch64_print_operand_address): Remove prototypes.
* config/aarch64/aarch64.c (aarch64_memory_reference_mode): Delete
global.
- (aarch64_print_operand): Make static. Update calls to
- output_address.
+ (aarch64_print_operand): Make static. Update calls to output_address.
(aarch64_print_operand_address): Add MODE argument. Use instead of
aarch64_memory_reference_mode global.
(TARGET_PRINT_OPERAND, TARGET_PRINT_OPERAND_ADDRESS): Define target
hooks.
* config/aarch64/aarch64.h (PRINT_OPERAND, PRINT_OPERAND_ADDRESS):
Delete macro definitions.
- * config/pa/pa.c (pa_print_operand): Pass mode in output_address
- calls.
+ * config/pa/pa.c (pa_print_operand): Pass mode in output_address calls.
* config/xtensa/xtensa.c (print_operand): Pass mode in
output_address calls.
* config/h8300/h8300.c (h8300_print_operand_address): Add MODE
argument.
(h83000_print_operand): Update calls to h8300_print_operand_address
and output_address.
- * config/ia64/ia64.c (ia64_print_operand_address): Add MODE
- argument.
+ * config/ia64/ia64.c (ia64_print_operand_address): Add MODE argument.
* config/tilepro/tilepro.c (output_memory_reference_mode): Delete
global.
(tilepro_print_operand): Pass mode to output_address.
output_address call.
(c6x_print_address_operand): Update calls to output_address.
(c6x_print_operand_address): Pass mode to above.
- * config/v850/v850.c (v850_print_operand_address): Add MODE
- argument.
+ * config/v850/v850.c (v850_print_operand_address): Add MODE argument.
(v850_print_operand): Pass mode to v850_print_operand_address,
output_address.
- * config/mmix/mmix.c (mmix_print_operand_address): Add MODE
- argument.
+ * config/mmix/mmix.c (mmix_print_operand_address): Add MODE argument.
(mmix_print_operand): Pass mode in output_address calls.
* config/sh/sh.c (sh_print_operand_address): Add MODE argument.
(sh_print_operand): Pass mem mode to output_address,
sh_print_operand_address.
- * config/cr16/cr16.c (cr16_print_operand_address): Add MODE
- argument.
+ * config/cr16/cr16.c (cr16_print_operand_address): Add MODE argument.
(cr16_print_operand): Pass mode to output_address,
cr16_print_operand_address.
* config/bfin/bfin.c (print_address_operand): Pass VOIDmode to
(nios2_print_operand_address): Add MODE argument. Update call to
nios2_print_operand_address.
* config/s390/s390.c (print_operand): Pass mode to output_address.
- * config/m32c/m32c.c (m32c_print_operand_address): Add MODE
- argument.
+ * config/m32c/m32c.c (m32c_print_operand_address): Add MODE argument.
* config/arc/arc.c (arc_print_operand): Pass VOIDmode to
output_address.
* config/arm/arm.c (arm_print_operand_address): Add MODE argument.
Use instead of output_memory_reference_mode.
(output_memory_reference_mode): Delete global.
(arm_print_operand): Pass mem mode to output_address.
- * config/m32r/m32r.c (m32r_print_operand_address): Add MODE
- argument.
+ * config/m32r/m32r.c (m32r_print_operand_address): Add MODE argument.
(m32r_print_operand): Pass mode to output_address.
* config/msp430/msp430.c (msp430_print_operand_addr): Add MODE
argument.
* config/sol2.h (SUPPORTS_INIT_PRIORITY): Define to
HAVE_INITFINI_ARRAY_SUPPORT.
- * config/initfini-array.h: Check HAVE_INITFINI_ARRAY_SUPPORT
- value.
+ * config/initfini-array.h: Check HAVE_INITFINI_ARRAY_SUPPORT value.
* configure.ac (gcc_cv_as_sparc_nobits): Remove.
* config/sparc/sparc.c (sparc_solaris_elf_asm_named_section):
types with different TYPE_REVERSE_STORAGE_ORDER flag.
* gimplify.c (gimplify_expr) <MEM_REF>: Propagate the
REF_REVERSE_STORAGE_ORDER flag.
- * lto-streamer-out.c (hash_tree): Deal with
- TYPE_REVERSE_STORAGE_ORDER.
+ * lto-streamer-out.c (hash_tree): Deal with TYPE_REVERSE_STORAGE_ORDER.
* output.h (assemble_real): Adjust prototype.
* print-tree.c (print_node): Convey TYPE_REVERSE_STORAGE_ORDER.
* stor-layout.c (finish_record_layout): Propagate the
(TYPE_SATURATING): Adjust.
(REF_REVERSE_STORAGE_ORDER): Document.
* tree-dfa.c (get_ref_base_and_extent): Add PREVERSE parameter and
- set it to true upon encoutering a reference with reverse storage
- order.
+ set it to true upon encoutering a reference with reverse storage order.
* tree-dfa.h (get_ref_base_and_extent): Adjust prototype.
* tree-inline.c (remap_gimple_op_r): Propagate the
REF_REVERSE_STORAGE_ORDER flag.
(compute_known_type_jump_func): Likewise.
(determine_known_aggregate_parts): Likewise.
(ipa_get_adjustment_candidate): Likewise.
- (ipa_modify_call_arguments): Set REF_REVERSE_STORAGE_ORDER on
- MEM_REF.
+ (ipa_modify_call_arguments): Set REF_REVERSE_STORAGE_ORDER on MEM_REF.
* ipa-prop.h (ipa_parm_adjustment): Add REVERSE field.
(build_ref_for_offset): Adjust prototype.
* simplify-rtx.c (delegitimize_mem_from_attrs): Adjust call to
(do_structure_copy): Likewise.
* tree-vect-data-refs.c (vect_check_gather): Adjust call to
get_inner_reference.
- (vect_analyze_data_refs): Likewise. Bail out if reverse storage
- order.
+ (vect_analyze_data_refs): Likewise. Bail out if reverse storage order.
* tsan.c (instrument_expr): Adjust call to get_inner_reference.
* ubsan.c (instrument_bool_enum_load): Likewise.
(instrument_object_size): Likewise.
* var-tracking.c (track_expr_p): Adjust call to
- get_ref_base_and_extent
+ get_ref_base_and_extent.
* config/mips/mips.c (r10k_safe_mem_expr_p): Adjust call to
get_inner_reference.
* config/s390/s390.c (s390_expand_atomic): Adjust call to
* doc/md.texi (multi-alternative constraints): Don't document
alternatives inherently tied to reload for the user documentation.
-2015-11-06 Michael Collison <michael.collison@linaro.org
+2015-11-06 Michael Collison <michael.collison@linaro.org>
Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
Revert:
2015-11-06 Jakub Jelinek <jakub@redhat.com>
- * gimplify.c (gimplify_omp_ordered): Fix up diagnostics
- wording.
+ * gimplify.c (gimplify_omp_ordered): Fix up diagnostics wording.
* omp-low.c (check_omp_nesting_restrictions): Update for the
various new OpenMP 4.5 nesting restrictions, clarified
nesting glossary, closely nested region relationship clarified
code when applicable.
* config/aarch64/aarch64.md: Added enum entries.
* config/aarch64/aarch64.opt: Added option -mlow-precision-recip-sqrt.
- * testsuite/gcc.target/aarch64/rsqrt_asm_check_common.h: Common
- macros for assembly checks.
- * testsuite/gcc.target/aarch64/rsqrt_asm_check_negative_1.c: Make sure
- frsqrts and frsqrte are not emitted.
- * testsuite/gcc.target/aarch64/rsqrt_asm_check_1.c: Make sure
- frsqrts and frsqrte are emitted.
- * testsuite/gcc.target/aarch64/rsqrt_1.c: Functional tests for rsqrt.
2015-11-07 Jan Hubicka <hubicka@ucw.cz>
projects / thirdparty / gcc.git / blobdiff