+2024-03-14 Jason Merrill <jason@redhat.com>
+
+ * tree-core.h (enum clobber_kind): Clarify CLOBBER_OBJECT_*
+ comments.
+
+2024-03-14 John David Anglin <danglin@gcc.gnu.org>
+
+ PR target/114288
+ * config/pa/pa.cc (pa_legitimate_address_p): Don't allow
+ 14-bit displacements before reload for modes that may use
+ a floating-point load or store.
+
+2024-03-14 David Faust <david.faust@oracle.com>
+
+ * config/bpf/bpf.h (INT8_TYPE): Change to signed char.
+
+2024-03-14 Max Filippov <jcmvbkbc@gmail.com>
+
+ * config/xtensa/xtensa.md (movsi_internal): Move l32i and s32i
+ patterns ahead of the l32i.n and s32i.n.
+
+2024-03-14 Jakub Jelinek <jakub@redhat.com>
+
+ * config/gcn/gcn-hsa.h (ABI_VERSION_SPEC): Fix comment typo.
+
+2024-03-14 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/113907
+ * ipa-icf.cc (sem_item_optimizer::merge_classes): Reset
+ SSA_NAME_RANGE_INFO and SSA_NAME_PTR_INFO on successfully ICF merged
+ functions.
+
+2024-03-14 Xi Ruoyao <xry111@xry111.site>
+
+ * config/loongarch/loongarch.md (any_ge): Remove.
+ (sge<u>_<X:mode><GPR:mode>): Remove.
+
+2024-03-14 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/114310
+ * config/aarch64/aarch64.cc (aarch64_expand_compare_and_swap): For
+ TImode force newval into a register.
+
+2024-03-14 Chung-Lin Tang <cltang@baylibre.com>
+
+ * tree.h (OMP_CLAUSE_MAP_READONLY): New macro.
+ (OMP_CLAUSE__CACHE__READONLY): New macro.
+ * tree-core.h (struct GTY(()) tree_base): Adjust comments for new
+ uses of readonly_flag bit in OMP_CLAUSE_MAP_READONLY and
+ OMP_CLAUSE__CACHE__READONLY.
+ * tree-pretty-print.cc (dump_omp_clause): Add support for printing
+ OMP_CLAUSE_MAP_READONLY and OMP_CLAUSE__CACHE__READONLY.
+
+2024-03-14 Andreas Krebbel <krebbel@linux.ibm.com>
+
+ * config/s390/s390.cc (s390_encode_section_info): Adjust the check
+ for misaligned symbols.
+ * config/s390/s390.opt: Improve documentation.
+
+2024-03-14 Jakub Jelinek <jakub@redhat.com>
+
+ * gimple-iterator.cc (edge_before_returns_twice_call): Copy all
+ flags and probability from ad_edge to e edge. If CDI_DOMINATORS
+ are computed, recompute immediate dominator of other_edge->src
+ and other_edge->dest.
+ (gsi_safe_insert_before, gsi_safe_insert_seq_before): Update *iter
+ for the returns_twice call case to the gsi_for_stmt (stmt) to deal
+ with update it for bb splitting.
+
+2024-03-14 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/i386-features.cc
+ (general_scalar_chain::convert_op): Handle REG_EH_REGION note.
+ (convert_scalars_to_vector): Ditto.
+ * config/i386/i386-features.h (class scalar_chain): New
+ memeber control_flow_insns.
+
+2024-03-13 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/114319
+ * gimple-ssa-store-merging.cc
+ (imm_store_chain_info::try_coalesce_bswap): For 32-bit targets
+ allow matching __builtin_bswap64 if there is bswapsi2 optab.
+
+2024-03-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
+
+ * config/s390/s390.cc (s390_secondary_reload): Guard
+ SYMBOL_FLAG_NOTALIGN2_P.
+
+2024-03-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
+
+ * config/s390/s390-builtin-types.def: Update to reflect latest
+ changes.
+ * config/s390/s390-builtins.def: Streamline vector builtins with
+ LLVM.
+
+2024-03-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
+
+ * config/s390/s390-builtins.def (vec_permi): Deprecate.
+ (vec_ctd): Deprecate.
+ (vec_ctd_s64): Deprecate.
+ (vec_ctd_u64): Deprecate.
+ (vec_ctsl): Deprecate.
+ (vec_ctul): Deprecate.
+ (vec_ld2f): Deprecate.
+ (vec_st2f): Deprecate.
+ (vec_insert): Deprecate overloads with bool vectors.
+
+2024-03-13 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/114313
+ * gimple-lower-bitint.cc (bitint_large_huge::limb_access): Use
+ TYPE_SIZE of TREE_TYPE (var) rather than TYPE_SIZE of type.
+ (bitint_large_huge::handle_load): Pass NULL_TREE rather than
+ rhs_type to limb_access for the bitfield load cases.
+ (bitint_large_huge::lower_mergeable_stmt): Pass NULL_TREE rather than
+ lhs_type to limb_access if nlhs is non-NULL.
+
+2024-03-13 Jakub Jelinek <jakub@redhat.com>
+
+ PR sanitizer/112709
+ * asan.cc (maybe_create_ssa_name, maybe_cast_to_ptrmode,
+ build_check_stmt, maybe_instrument_call, asan_expand_mark_ifn): Use
+ gsi_safe_insert_before instead of gsi_insert_before.
+
+2024-03-13 Jakub Jelinek <jakub@redhat.com>
+
+ PR sanitizer/112709
+ * gimple-iterator.h (gsi_safe_insert_before,
+ gsi_safe_insert_seq_before): Declare.
+ * gimple-iterator.cc: Include gimplify.h.
+ (edge_before_returns_twice_call, adjust_before_returns_twice_call,
+ gsi_safe_insert_before, gsi_safe_insert_seq_before): New functions.
+ * ubsan.cc (instrument_mem_ref, instrument_pointer_overflow,
+ instrument_nonnull_arg, instrument_nonnull_return): Use
+ gsi_safe_insert_before instead of gsi_insert_before.
+ (maybe_instrument_pointer_overflow): Use force_gimple_operand,
+ gimple_seq_add_seq_without_update and gsi_safe_insert_seq_before
+ instead of force_gimple_operand_gsi.
+ (instrument_object_size): Likewise. Use gsi_safe_insert_before
+ instead of gsi_insert_before.
+
+2024-03-12 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/114121
+ * tree-chrec.cc (chrec_fold_plus_1): Guard recursion with
+ converted operand properly.
+ (chrec_fold_multiply): Likewise. Handle missed recursion.
+
+2024-03-12 Jakub Jelinek <jakub@redhat.com>
+
+ PR sanitizer/112709
+ * asan.cc (has_stmt_been_instrumented_p): Don't instrument call
+ stores on the caller side unless it is a call to a builtin or
+ internal function or function doesn't return by hidden reference.
+ (maybe_instrument_call): Likewise.
+ (instrument_derefs): Instrument stores to RESULT_DECL if
+ returning by hidden reference.
+
+2024-03-12 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/114293
+ * tree-ssa-strlen.cc (strlen_pass::handle_builtin_strlen): If
+ max is smaller than min, set max to ~(size_t)0.
+
+2024-03-12 Pan Li <pan2.li@intel.com>
+
+ * config/riscv/riscv-c.cc (riscv_ext_version_value): Fix
+ code style greater than 80 chars.
+ (riscv_cpu_cpp_builtins): Fix useless empty line, indent
+ with 3 space(s) and argument unalignment.
+
+2024-03-12 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/114297
+ * tree-vect-loop.cc (vectorizable_live_operation): Pass in the
+ live stmts SLP node to vect_create_epilog_for_reduction.
+
+2024-03-12 Andrew Pinski <quic_apinski@quicinc.com>
+
+ PR driver/114314
+ * common.opt (fmultiflags): Add RejectNegative.
+
+2024-03-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
+
+ * config/aarch64/aarch64.md: Rename aarch_ to aarch64_.
+ * config/aarch64/aarch64.opt: Likewise.
+ * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise.
+ * config/aarch64/aarch64.cc (aarch64_expand_prologue): Likewise.
+ (aarch64_expand_epilogue): Likewise.
+ (aarch64_post_cfi_startproc): Likewise.
+ (aarch64_handle_no_branch_protection): Copy and rename.
+ (aarch64_handle_standard_branch_protection): Likewise.
+ (aarch64_handle_pac_ret_protection): Likewise.
+ (aarch64_handle_pac_ret_leaf): Likewise.
+ (aarch64_handle_pac_ret_b_key): Likewise.
+ (aarch64_handle_bti_protection): Likewise.
+ (aarch64_override_options): Update branch protection validation.
+ (aarch64_handle_attr_branch_protection): Likewise.
+ * config/arm/aarch-common-protos.h (aarch_validate_mbranch_protection):
+ Pass branch protection type description as argument.
+ (struct aarch_branch_protect_type): Move from aarch-common.h.
+ * config/arm/aarch-common.cc (aarch_handle_no_branch_protection):
+ Remove.
+ (aarch_handle_standard_branch_protection): Remove.
+ (aarch_handle_pac_ret_protection): Remove.
+ (aarch_handle_pac_ret_leaf): Remove.
+ (aarch_handle_pac_ret_b_key): Remove.
+ (aarch_handle_bti_protection): Remove.
+ (aarch_validate_mbranch_protection): Pass branch protection type
+ description as argument.
+ * config/arm/aarch-common.h (enum aarch_key_type): Remove.
+ (struct aarch_branch_protect_type): Remove.
+ * config/arm/arm-c.cc (arm_cpu_builtins): Remove aarch_ra_sign_key.
+ * config/arm/arm.cc (arm_handle_no_branch_protection): Copy and rename.
+ (arm_handle_standard_branch_protection): Likewise.
+ (arm_handle_pac_ret_protection): Likewise.
+ (arm_handle_pac_ret_leaf): Likewise.
+ (arm_handle_bti_protection): Likewise.
+ (arm_configure_build_target): Update branch protection validation.
+ * config/arm/arm.opt: Remove aarch_ra_sign_key.
+
+2024-03-11 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/114299
+ * gimplify.cc (internal_get_tmp_var): When gimplification
+ of VAL failed, return a decl.
+
+2024-03-11 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/114278
+ * tree-ssa.cc (maybe_optimize_var): If large/huge _BitInt vars are no
+ longer addressable, set DECL_NOT_GIMPLE_REG_P on them.
+
+2024-03-11 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR debug/113519
+ PR debug/113777
+ * dwarf2out.cc (gen_enumeration_type_die): In the reverse case,
+ generate the DIE with the same parent as in the regular case.
+
+2024-03-11 Andrew Pinski <quic_apinski@quicinc.com>
+
+ PR middle-end/95351
+ * fold-const.cc (merge_truthop_with_opposite_arm): Use
+ the type of the operands of the comparison and not the type
+ of the comparison.
+
+2024-03-10 jlaw <jeffreyalaw@gmail.com>
+
+ PR tree-optimization/110199
+ * tree-ssa-scopedtables.cc
+ (avail_exprs_stack::simplify_binary_operation): Generalize handling
+ of MIN_EXPR/MAX_EXPR to allow additional simplifications. Canonicalize
+ comparison operands for other cases.
+
+2024-03-10 Pan Li <pan2.li@intel.com>
+
+ * tree-vect-stmts.cc (vectorizable_store): Enable the assert
+ during transform process.
+ (vectorizable_load): Ditto.
+
+2024-03-10 jlaw <jeffreyalaw@gmail.com>
+
+ PR target/102250
+ * doc/install.texi: Document need for python when building
+ RISC-V compilers.
+
+2024-03-10 jlaw <jeffreyalaw@gmail.com>
+
+ PR target/111362
+ * mode-switching.cc (optimize_mode_switching): Only process
+ NONDEBUG insns.
+
+2024-03-09 Georg-Johann Lay <avr@gjlay.de>
+
+ * config/avr/avr.md: Fix typos in comment, indentation glitches
+ and some other nits.
+
+2024-03-09 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/114284
+ * fwprop.cc (try_fwprop_subst_pattern): Don't propagate
+ src containing MEMs unless prop.likely_profitable_p ().
+
+2024-03-09 Xi Ruoyao <xry111@xry111.site>
+
+ * config/loongarch/loongarch.cc (loongarch_print_operand_reloc):
+ Support 'Q' for R_LARCH_RELAX for TLS IE.
+ (loongarch_output_move): Use 'Q' to print R_LARCH_RELAX for TLS
+ IE.
+ * config/loongarch/loongarch.md (ld_from_got<mode>): Likewise.
+
+2024-03-09 Georg-Johann Lay <avr@gjlay.de>
+
+ * config/avr/avr.cc (avr_rtx_costs_1) [PLUS]: Determine cost for
+ usum_widenqihi and add_zero_extend1.
+ [MINUS]: Determine costs for udiff_widenqihi, sub+zero_extend,
+ sub+sign_extend.
+ * config/avr/avr.md (*addhi3.sign_extend1, *subhi3.sign_extend2):
+ Compute exact insn lengths.
+ (*usum_widenqihi3): Allow input operands to commute.
+
+2024-03-09 Jakub Jelinek <jakub@redhat.com>
+
+ * config/i386/i386.opt.urls: Regenerate.
+
+2024-03-09 Lulu Cheng <chenglulu@loongson.cn>
+
+ * config/loongarch/sync.md (atomic_cas_value_strong<mode>):
+ In loongarch64, a sign extension operation is added when
+ operands[2] is a register operand and the mode is SImode.
+
+2024-03-08 Martin Jambor <mjambor@suse.cz>
+
+ PR ipa/113757
+ * tree-inline.cc (redirect_all_calls): Remove code adding SSAs to
+ id->killed_new_ssa_names.
+
+2024-03-08 Vladimir N. Makarov <vmakarov@redhat.com>
+
+ PR target/113790
+ * lra-assigns.cc (assign_by_spills): Set up all_spilled_pseudos
+ for non-reload pseudo too.
+
+2024-03-08 David Faust <david.faust@oracle.com>
+
+ * config/bpf/bpf.cc (bpf_expand_cpymem, bpf_expand_setmem): Do
+ not attempt inline expansion if size is above threshold.
+ * config/bpf/bpf.opt (-minline-memops-threshold): New option.
+ * doc/invoke.texi (eBPF Options) <-minline-memops-threshold>:
+ Document.
+
+2024-03-08 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/114269
+ PR tree-optimization/114074
+ * tree-chrec.cc (chrec_fold_plus_1): Handle sign-conversions
+ in the third CASE_CONVERT case as well.
+ (chrec_fold_multiply): Handle sign-conversions from unsigned
+ by performing the operation in the unsigned type.
+
+2024-03-08 Georg-Johann Lay <avr@gjlay.de>
+
+ * config/avr/avr.md (*addhi3_zero_extend.ashift1): New pattern.
+ * config/avr/avr.cc (avr_rtx_costs_1) [PLUS]: Compute its cost.
+
+2024-03-08 Jakub Jelinek <jakub@redhat.com>
+
+ * bb-reorder.cc (fix_up_fall_thru_edges): Fix up checking assert,
+ asm_noperands < 0 means it is not asm goto too.
+
+2024-03-08 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/38534
+ * config/i386/i386.opt (mnoreturn-no-callee-saved-registers): New
+ option.
+ * config/i386/i386-options.cc (ix86_set_func_type): Don't use
+ TYPE_NO_CALLEE_SAVED_REGISTERS_EXCEPT_BP unless
+ ix86_noreturn_no_callee_saved_registers is enabled.
+ * doc/invoke.texi (-mnoreturn-no-callee-saved-registers): Document.
+
+2024-03-08 Jakub Jelinek <jakub@redhat.com>
+
+ PR debug/113918
+ * dwarf2out.cc (gen_field_die): Emit DW_AT_export_symbols
+ on anonymous unions or structs for -gdwarf-5 or -gno-strict-dwarf.
+
+2024-03-08 demin.han <demin.han@starfivetech.com>
+
+ PR target/114264
+ * config/riscv/riscv-vector-costs.cc: Fix ICE
+
+2024-03-08 Haochen Gui <guihaoc@gcc.gnu.org>
+
+ * fwprop.cc (forward_propagate_into): Return false for volatile set
+ source rtx.
+
+2024-03-07 Wilco Dijkstra <wilco.dijkstra@arm.com>
+
+ PR target/113618
+ * config/aarch64/aarch64.cc (aarch64_copy_one_block): Remove.
+ (aarch64_expand_cpymem): Emit single load/store only.
+ (aarch64_set_one_block): Emit single stores only.
+
+2024-03-07 Robin Dapp <rdapp@ventanamicro.com>
+
+ PR middle-end/114196
+ * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p): Merge
+ vectorization guards.
+
+2024-03-07 Jonathan Wakely <jwakely@redhat.com>
+
+ * doc/cppopts.texi: Remove incorrect claim about -dD not
+ outputting predefined macros.
+
+2024-03-07 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
+
+ PR target/113950
+ * config/rs6000/vsx.md (vsx_splat_<mode>): Correct assignment to operand1
+ and simplify else if with else.
+
+2024-03-07 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
+
+ * system.h: Include safe-ctype.h after C++ standard headers.
+
+2024-03-07 Jakub Jelinek <jakub@redhat.com>
+
+ PR rtl-optimization/110079
+ * bb-reorder.cc (fix_crossing_unconditional_branches): Don't adjust
+ asm goto.
+
+2024-03-07 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/105533
+ * expmed.cc (choose_mult_variant): Only try the val - 1 variant
+ if val is not HOST_WIDE_INT_MIN or if mode has exactly
+ HOST_BITS_PER_WIDE_INT precision. Avoid triggering UB while computing
+ val - 1.
+
+2024-03-07 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/105533
+ * tree-ssa-sccvn.cc (ao_ref_init_from_vn_reference) <case ARRAY_REF>:
+ Multiple op->off by BITS_PER_UNIT instead of shifting it left by
+ LOG2_BITS_PER_UNIT.
+
+2024-03-07 Yang Yujie <yangyujie@loongson.cn>
+
+ * config.gcc: Add a case for loongarch*-*-linux-musl*.
+ * config/loongarch/linux.h: Disable the multilib-compatible
+ treatment for *musl* targets.
+ * config/loongarch/musl.h: New file.
+
+2024-03-07 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/114009
+ * genmatch.cc (decision_tree::gen): Emit ARG_UNUSED for captures
+ argument even for GENERIC, not just for GIMPLE.
+ * match.pd (a * !a -> 0): New simplifications.
+
+2024-03-07 demin.han <demin.han@starfivetech.com>
+
+ * config/riscv/riscv-protos.h (expand_vec_cmp): Change proto
+ * config/riscv/riscv-v.cc (expand_vec_cmp): Use default arguments
+ (expand_vec_cmp_float): Adapt arguments
+
+2024-03-06 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/114232
+ * config/i386/mmx.md (negv2qi2): Enable for optimize_size instead
+ of optimize_function_for_size_p. Explictily enable for TARGET_SSE2.
+ (negv2qi SSE reg splitter): Enable for TARGET_SSE2 only.
+ (<plusminus:insn>v2qi3): Enable for optimize_size instead
+ of optimize_function_for_size_p. Explictily enable for TARGET_SSE2.
+ (<plusminus:insn>v2qi SSE reg splitter): Enable for TARGET_SSE2 only.
+ (<any_shift:insn>v2qi3): Enable for optimize_size instead
+ of optimize_function_for_size_p.
+
+2024-03-06 Robin Dapp <rdapp@ventanamicro.com>
+
+ PR target/114200
+ PR target/114202
+ * config/riscv/vector.md: Use vmv[1248]r.v instead of vmv.v.v.
+
+2024-03-06 Robin Dapp <rdapp@ventanamicro.com>
+
+ * config/riscv/riscv-vector-costs.cc (adjust_stmt_cost): Move...
+ (costs::adjust_stmt_cost): ... to here and add vec_load/vec_store
+ offset handling.
+ (costs::add_stmt_cost): Also adjust cost for statements without
+ stmt_info.
+ * config/riscv/riscv-vector-costs.h: Define zero constant.
+
+2024-03-06 Wilco Dijkstra <wilco.dijkstra@arm.com>
+
+ PR target/113915
+ * config/arm/arm.md (NOCOND): Improve comment.
+ (arm_rev*) Add predicable.
+ * config/arm/arm.cc (arm_final_prescan_insn): Add check for
+ PREDICABLE_YES.
+
+2024-03-06 Jeff Law <jlaw@ventanamicro.com>
+
+ PR target/113001
+ PR target/112871
+ * config/riscv/riscv.cc (expand_conditional_move): Do not swap
+ operands when the comparison operand is the same as the false
+ arm for a NE test.
+
+2024-03-06 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386-expand.cc (ix86_expand_move) [TARGET_MACHO]:
+ Eliminate common code and use generic code instead.
+
+2024-03-06 Georg-Johann Lay <avr@gjlay.de>
+
+ * config/avr/avr.cc (avr_rtx_costs_1) [PLUS+ZERO_EXTEND]: Adjust
+ rtx cost.
+
+2024-03-06 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/114239
+ * tree-vect-loop.cc (vect_get_vect_def): Remove.
+ (vect_create_epilog_for_reduction): The passed in stmt_info
+ should now be the live stmt that produces the scalar reduction
+ result. Revert PR114192 fix. Base reduction info off
+ info_for_reduction. Remove special handling of
+ early-break/peeled, restore original vector def gathering.
+ Make sure to pick the correct exit PHIs.
+ (vectorizable_live_operation): Pass in the proper stmt_info
+ for early break exits.
+
+2024-03-06 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-feature-deps.h (feature_deps::info): Add
+ out-of-class definitions of static constants.
+
+2024-03-06 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/114249
+ * tree-vect-slp.cc (vect_build_slp_instance): Move making
+ a BB reduction lane number even ...
+ (vect_slp_check_for_roots): ... here to avoid leaking
+ pattern defs.
+
+2024-03-06 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/114246
+ * tree-ssa-dse.cc (increment_start_addr): Strip useless
+ type conversions from the adjusted address.
+
+2024-03-06 Jakub Jelinek <jakub@redhat.com>
+
+ PR rtl-optimization/114190
+ * config/i386/i386-features.cc (rest_of_handle_insert_vzeroupper):
+ Call df_remove_problem for df_note before calling df_analyze.
+
2024-03-05 Cupertino Miranda <cupertino.miranda@oracle.com>
Indu Bhagat <indu.bhagat@oracle.com>
projects / thirdparty / gcc.git / blobdiff