;; Saphira pipeline description
-;; Copyright (C) 2017-2018 Free Software Foundation, Inc.
+;; Copyright (C) 2017-2024 Free Software Foundation, Inc.
;;
;; This file is part of GCC.
;;
(define_insn_reservation "saphira_alu_1_xyz" 1
(and (eq_attr "tune" "saphira")
- (eq_attr "type" "alus_sreg,alus_imm,alus_shift_imm,csel,adc_reg,alu_imm,alu_sreg,alu_shift_imm,alu_ext,alus_ext,logic_imm,logic_reg,logic_shift_imm,logics_imm,logics_reg,logics_shift_imm,mov_reg"))
+ (eq_attr "type" "alus_sreg,alus_imm,alus_shift_imm,csel,adc_reg,alu_imm,alu_sreg,alu_shift_imm_lsl_1to4,alu_shift_imm_other,alu_ext,alus_ext,logic_imm,logic_reg,logic_shift_imm,logics_imm,logics_reg,logics_shift_imm,mov_reg"))
"saphira_xyzb")
;; SIMD Miscellaneous Instructions
(define_insn_reservation "saphira_other_0_nothing" 0
(and (eq_attr "tune" "saphira")
- (eq_attr "type" "no_insn,trap,block"))
+ (eq_attr "type" "trap,block"))
"nothing")
(define_insn_reservation "saphira_other_2_ld" 2