Fix big-endian code generation

[thirdparty/gcc.git] / gcc / config / arm / arm.md

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 1db601a4d607027108b1319d15ada0406695eaa3..af0c9ecf1cfb1f23283735282a65843d628c96cb 100644 (file)
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -3386,7 +3386,7 @@
   [(set (match_operand:SI 0 "s_register_operand" "")
        (zero_extend:SI (subreg:QI (match_operand:SI 1 "" "") 0)))
    (clobber (match_operand:SI 2 "s_register_operand" ""))]
-  "TARGET_ARM && (GET_CODE (operands[1]) != MEM)"
+  "TARGET_ARM && (GET_CODE (operands[1]) != MEM) && ! BYTES_BIG_ENDIAN"
   [(set (match_dup 2) (match_dup 1))
    (set (match_dup 0) (and:SI (match_dup 2) (const_int 255)))]
   ""
@@ -4285,7 +4285,7 @@
   [(set (match_dup 4) (match_dup 3))
    (set (match_dup 2)
        (ashiftrt:SI (match_operand 0 "" "") (const_int 8)))
-   (set (match_operand 1 "" "")        (subreg:QI (match_dup 2) 0))]
+   (set (match_operand 1 "" "")        (subreg:QI (match_dup 2) 3))]
   "TARGET_ARM"
   "
   {
@@ -4309,7 +4309,7 @@
 (define_expand "storeinthi"
   [(set (match_operand 0 "" "")
        (subreg:QI (match_operand 1 "" "") 0))
-   (set (match_dup 3) (subreg:QI (match_dup 2) 0))]
+   (set (match_dup 3) (match_dup 2))]
   "TARGET_ARM"
   "
   {
@@ -4348,6 +4348,7 @@
 
     operands[3] = adjust_address (op0, QImode, 1);
     operands[0] = adjust_address (operands[0], QImode, 0);
+    operands[2] = gen_lowpart (QImode, operands[2]);
   }"
 )
 
@@ -4410,7 +4411,7 @@
                }
 
              emit_insn (gen_movsi (reg, GEN_INT (val)));
-             operands[1] = gen_rtx_SUBREG (HImode, reg, 0);
+             operands[1] = gen_lowpart (HImode, reg);
            }
           else if (!arm_arch4)
            {
@@ -4807,7 +4808,7 @@
              rtx reg = gen_reg_rtx (SImode);
 
              emit_insn (gen_movsi (reg, operands[1]));
-             operands[1] = gen_rtx_SUBREG (QImode, reg, 0);
+             operands[1] = gen_lowpart (QImode, reg);
            }
          if (GET_CODE (operands[0]) == MEM)
           operands[1] = force_reg (QImode, operands[1]);
@@ -4850,7 +4851,7 @@
           if (GET_CODE (operands[0]) != REG)
            abort ();
 
-          operands[0] = gen_rtx (SUBREG, SImode, operands[0], 0);
+          operands[0] = gen_rtx_SUBREG (SImode, operands[0], 0);
           emit_insn (gen_movsi (operands[0], operands[1]));
           DONE;
        }