[ARM]: Correct the grouping of operands in MVE vector scatter store intrinsics (PR94735).

[thirdparty/gcc.git] / gcc / config / arm / predicates.md

diff --git a/gcc/config/arm/predicates.md b/gcc/config/arm/predicates.md
index c57ad73577e1eebebc8951ed5b4fb544dd3381f8..9e9bca4d87fdc31e045b2b5bb03b996f082079bd 100644 (file)
--- a/gcc/config/arm/predicates.md
+++ b/gcc/config/arm/predicates.md
@@ -37,6 +37,12 @@
                    && mve_vector_mem_operand (GET_MODE (op), XEXP (op, 0),
                                               false)")))
 
+(define_predicate "mve_scatter_memory"
+  (and (match_code "mem")
+       (match_test "TARGET_HAVE_MVE && REG_P (XEXP (op, 0))
+                   && mve_vector_mem_operand (GET_MODE (op), XEXP (op, 0),
+                                              false)")))
+
 ;; True for immediates in the range of 1 to 16 for MVE.
 (define_predicate "mve_imm_16"
   (match_test "satisfies_constraint_Rd (op)"))