Update copyright years.

[thirdparty/gcc.git] / gcc / config / c6x / c6x.h

diff --git a/gcc/config/c6x/c6x.h b/gcc/config/c6x/c6x.h
index 9b3fcfbd5e699cb3232b5cf5889a29e529ea3f63..d96f12e6298d3d4af896f990afcc7a935bfca775 100644 (file)
--- a/gcc/config/c6x/c6x.h
+++ b/gcc/config/c6x/c6x.h
@@ -1,5 +1,5 @@
 /* Target Definitions for TI C6X.
-   Copyright (C) 2010-2015 Free Software Foundation, Inc.
+   Copyright (C) 2010-2020 Free Software Foundation, Inc.
    Contributed by Andrew Jenner <andrew@codesourcery.com>
    Contributed by Bernd Schmidt <bernds@codesourcery.com>
 
@@ -92,14 +92,14 @@ extern c6x_cpu_t c6x_arch;
                                                \
        case C6X_CPU_C64XP:                     \
          builtin_define ("_TMS320C6400_PLUS"); \
-         /* ... fall through ... */            \
+         /* fall through */                    \
        case C6X_CPU_C64X:                      \
          builtin_define ("_TMS320C6400");      \
          break;                                \
                                                \
        case C6X_CPU_C67XP:                     \
          builtin_define ("_TMS320C6700_PLUS"); \
-         /* ... fall through ... */            \
+         /* fall through */                    \
        case C6X_CPU_C67X:                      \
          builtin_define ("_TMS320C6700");      \
          break;                                \
@@ -181,19 +181,6 @@ extern c6x_cpu_t c6x_arch;
     REG_A1, REG_A2, REG_B0, REG_B1, REG_B2, REG_ILC                    \
   }
 
-#define HARD_REGNO_NREGS(regno, mode)          \
-  ((GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1)  \
-   / UNITS_PER_WORD)
-
-#define HARD_REGNO_MODE_OK(reg, mode) (GET_MODE_SIZE (mode) <= UNITS_PER_WORD \
-                                      ? 1 : ((reg) & 1) == 0)
-
-#define MODES_TIEABLE_P(mode1, mode2)         \
-  ((mode1) == (mode2) ||                      \
-   (GET_MODE_SIZE (mode1) <= UNITS_PER_WORD && \
-    GET_MODE_SIZE (mode2) <= UNITS_PER_WORD))
-
-
 /* Register Classes.  */
 
 enum reg_class
@@ -272,12 +259,7 @@ enum reg_class
 #define CROSS_OPERANDS(X0,X1) \
   (A_REG_P (X0) == A_REG_P (X1) ? CROSS_N : CROSS_Y)
 
-#define REGNO_REG_CLASS(reg) \
-    ((reg) >= REG_A1 && (reg) <= REG_A2 ? PREDICATE_A_REGS     \
-     : (reg) == REG_A0 && TARGET_INSNS_64 ? PREDICATE_A_REGS   \
-     : (reg) >= REG_B0 && (reg) <= REG_B2 ? PREDICATE_B_REGS   \
-     : A_REGNO_P (reg) ? NONPREDICATE_A_REGS                   \
-     : call_used_regs[reg] ? CALL_USED_B_REGS : B_REGS)
+#define REGNO_REG_CLASS(reg) c6x_regno_reg_class (reg)
 
 #define BASE_REG_CLASS ALL_REGS
 #define INDEX_REG_CLASS ALL_REGS
@@ -311,9 +293,8 @@ enum reg_class
 #define STACK_POINTER_OFFSET 4
 /* Likewise for AP (which is the incoming stack pointer).  */
 #define FIRST_PARM_OFFSET(fundecl) 4
-#define STARTING_FRAME_OFFSET 0
 #define FRAME_GROWS_DOWNWARD 1
-#define STACK_GROWS_DOWNWARD
+#define STACK_GROWS_DOWNWARD 1
 
 #define STACK_POINTER_REGNUM REG_B15
 #define HARD_FRAME_POINTER_REGNUM REG_A15
@@ -353,7 +334,7 @@ struct c6x_args {
   c6x_init_cumulative_args (&cum, fntype, libname, n_named_args)
 
 #define BLOCK_REG_PADDING(MODE, TYPE, FIRST) \
-  (c6x_block_reg_pad_upward (MODE, TYPE, FIRST) ? upward : downward)
+  (c6x_block_reg_pad_upward (MODE, TYPE, FIRST) ? PAD_UPWARD : PAD_DOWNWARD)
 
 #define FUNCTION_ARG_REGNO_P(r) \
     (((r) >= REG_A4 && (r) <= REG_A13) || ((r) >= REG_B4 && (r) <= REG_B13))
@@ -609,7 +590,6 @@ do {                                                                        \
 #define CASE_VECTOR_MODE SImode
 #define MOVE_MAX 4
 #define MOVE_RATIO(SPEED) 4
-#define TRULY_NOOP_TRUNCATION(outprec, inprec) 1
 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 32, 1)
 #define Pmode SImode
 #define FUNCTION_MODE QImode