/* Subroutines for the gcc driver.
- Copyright (C) 2006-2016 Free Software Foundation, Inc.
+ Copyright (C) 2006-2020 Free Software Foundation, Inc.
This file is part of GCC.
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
+#define IN_TARGET_CODE 1
+
#include "config.h"
#include "system.h"
#include "coretypes.h"
unsigned int has_pclmul = 0, has_abm = 0, has_lwp = 0;
unsigned int has_fma = 0, has_fma4 = 0, has_xop = 0;
unsigned int has_bmi = 0, has_bmi2 = 0, has_tbm = 0, has_lzcnt = 0;
- unsigned int has_hle = 0, has_rtm = 0;
+ unsigned int has_hle = 0, has_rtm = 0, has_sgx = 0;
+ unsigned int has_pconfig = 0, has_wbnoinvd = 0;
unsigned int has_rdrnd = 0, has_f16c = 0, has_fsgsbase = 0;
unsigned int has_rdseed = 0, has_prfchw = 0, has_adx = 0;
unsigned int has_osxsave = 0, has_fxsr = 0, has_xsave = 0, has_xsaveopt = 0;
unsigned int has_clflushopt = 0, has_xsavec = 0, has_xsaves = 0;
unsigned int has_avx512dq = 0, has_avx512bw = 0, has_avx512vl = 0;
unsigned int has_avx512vbmi = 0, has_avx512ifma = 0, has_clwb = 0;
- unsigned int has_pcommit = 0, has_mwaitx = 0;
- unsigned int has_clzero = 0, has_pku = 0;
+ unsigned int has_mwaitx = 0, has_clzero = 0, has_pku = 0, has_rdpid = 0;
+ unsigned int has_avx5124fmaps = 0, has_avx5124vnniw = 0;
+ unsigned int has_gfni = 0, has_avx512vbmi2 = 0;
+ unsigned int has_avx512bitalg = 0;
+ unsigned int has_shstk = 0;
+ unsigned int has_avx512vnni = 0, has_vaes = 0;
+ unsigned int has_vpclmulqdq = 0;
+ unsigned int has_avx512vp2intersect = 0;
+ unsigned int has_movdiri = 0, has_movdir64b = 0;
+ unsigned int has_enqcmd = 0;
+ unsigned int has_waitpkg = 0;
+ unsigned int has_cldemote = 0;
+ unsigned int has_avx512bf16 = 0;
+
+ unsigned int has_ptwrite = 0;
bool arch;
__cpuid_count (7, 0, eax, ebx, ecx, edx);
has_bmi = ebx & bit_BMI;
+ has_sgx = ebx & bit_SGX;
has_hle = ebx & bit_HLE;
has_rtm = ebx & bit_RTM;
has_avx2 = ebx & bit_AVX2;
has_avx512pf = ebx & bit_AVX512PF;
has_avx512cd = ebx & bit_AVX512CD;
has_sha = ebx & bit_SHA;
- has_pcommit = ebx & bit_PCOMMIT;
has_clflushopt = ebx & bit_CLFLUSHOPT;
has_clwb = ebx & bit_CLWB;
has_avx512dq = ebx & bit_AVX512DQ;
has_prefetchwt1 = ecx & bit_PREFETCHWT1;
has_avx512vbmi = ecx & bit_AVX512VBMI;
has_pku = ecx & bit_OSPKE;
+ has_avx512vbmi2 = ecx & bit_AVX512VBMI2;
+ has_avx512vnni = ecx & bit_AVX512VNNI;
+ has_rdpid = ecx & bit_RDPID;
+ has_gfni = ecx & bit_GFNI;
+ has_vaes = ecx & bit_VAES;
+ has_vpclmulqdq = ecx & bit_VPCLMULQDQ;
+ has_avx512bitalg = ecx & bit_AVX512BITALG;
+ has_movdiri = ecx & bit_MOVDIRI;
+ has_movdir64b = ecx & bit_MOVDIR64B;
+ has_enqcmd = ecx & bit_ENQCMD;
+ has_cldemote = ecx & bit_CLDEMOTE;
+
+ has_avx5124vnniw = edx & bit_AVX5124VNNIW;
+ has_avx5124fmaps = edx & bit_AVX5124FMAPS;
+ has_avx512vp2intersect = edx & bit_AVX512VP2INTERSECT;
+
+ has_shstk = ecx & bit_SHSTK;
+ has_pconfig = edx & bit_PCONFIG;
+ has_waitpkg = ecx & bit_WAITPKG;
+
+ __cpuid_count (7, 1, eax, ebx, ecx, edx);
+ has_avx512bf16 = eax & bit_AVX512BF16;
}
if (max_level >= 13)
has_xsaves = eax & bit_XSAVES;
}
+ if (max_level >= 0x14)
+ {
+ __cpuid_count (0x14, 0, eax, ebx, ecx, edx);
+
+ has_ptwrite = ebx & bit_PTWRITE;
+ }
+
/* Check cpuid level of extended features. */
__cpuid (0x80000000, ext_level, ebx, ecx, edx);
- if (ext_level > 0x80000000)
+ if (ext_level >= 0x80000001)
{
__cpuid (0x80000001, eax, ebx, ecx, edx);
has_3dnowp = edx & bit_3DNOWP;
has_3dnow = edx & bit_3DNOW;
has_mwaitx = ecx & bit_MWAITX;
+ }
+ if (ext_level >= 0x80000008)
+ {
__cpuid (0x80000008, eax, ebx, ecx, edx);
has_clzero = ebx & bit_CLZERO;
+ has_wbnoinvd = ebx & bit_WBNOINVD;
}
/* Get XCR_XFEATURE_ENABLED_MASK register with xgetbv. */
#define XSTATE_OPMASK 0x20
#define XSTATE_ZMM 0x40
#define XSTATE_HI_ZMM 0x80
+
+#define XCR_AVX_ENABLED_MASK \
+ (XSTATE_SSE | XSTATE_YMM)
+#define XCR_AVX512F_ENABLED_MASK \
+ (XSTATE_SSE | XSTATE_YMM | XSTATE_OPMASK | XSTATE_ZMM | XSTATE_HI_ZMM)
+
if (has_osxsave)
asm (".byte 0x0f; .byte 0x01; .byte 0xd0"
: "=a" (eax), "=d" (edx)
: "c" (XCR_XFEATURE_ENABLED_MASK));
+ else
+ eax = 0;
- /* Check if SSE and YMM states are supported. */
- if (!has_osxsave
- || (eax & (XSTATE_SSE | XSTATE_YMM)) != (XSTATE_SSE | XSTATE_YMM))
+ /* Check if AVX registers are supported. */
+ if ((eax & XCR_AVX_ENABLED_MASK) != XCR_AVX_ENABLED_MASK)
{
has_avx = 0;
has_avx2 = 0;
has_xsavec = 0;
}
- if (!has_osxsave
- || (eax &
- (XSTATE_SSE | XSTATE_YMM | XSTATE_OPMASK | XSTATE_ZMM | XSTATE_HI_ZMM))
- != (XSTATE_SSE | XSTATE_YMM | XSTATE_OPMASK | XSTATE_ZMM | XSTATE_HI_ZMM))
+ /* Check if AVX512F registers are supported. */
+ if ((eax & XCR_AVX512F_ENABLED_MASK) != XCR_AVX512F_ENABLED_MASK)
{
has_avx512f = 0;
has_avx512er = 0;
unsigned int name;
/* Detect geode processor by its processor signature. */
- if (ext_level > 0x80000001)
+ if (ext_level >= 0x80000002)
__cpuid (0x80000002, name, ebx, ecx, edx);
else
name = 0;
processor = PROCESSOR_GEODE;
else if (has_movbe && family == 22)
processor = PROCESSOR_BTVER2;
+ else if (has_clwb)
+ processor = PROCESSOR_ZNVER2;
else if (has_clzero)
processor = PROCESSOR_ZNVER1;
else if (has_avx2)
/* Silvermont. */
cpu = "silvermont";
break;
+ case 0x5c:
+ case 0x5f:
+ /* Goldmont. */
+ cpu = "goldmont";
+ break;
+ case 0x7a:
+ /* Goldmont Plus. */
+ cpu = "goldmont-plus";
+ break;
case 0x0f:
/* Merom. */
case 0x17:
case 0x4e:
case 0x5e:
/* Skylake. */
+ case 0x8e:
+ case 0x9e:
+ /* Kaby Lake. */
cpu = "skylake";
break;
+ case 0x55:
+ if (has_avx512vnni)
+ /* Cascade Lake. */
+ cpu = "cascadelake";
+ else
+ /* Skylake with AVX-512. */
+ cpu = "skylake-avx512";
+ break;
case 0x57:
/* Knights Landing. */
cpu = "knl";
break;
+ case 0x66:
+ /* Cannon Lake. */
+ cpu = "cannonlake";
+ break;
+ case 0x85:
+ /* Knights Mill. */
+ cpu = "knm";
+ break;
default:
if (arch)
{
/* This is unknown family 0x6 CPU. */
- /* Assume Knights Landing. */
- if (has_avx512f)
- cpu = "knl";
- /* Assume Broadwell. */
- else if (has_adx)
- cpu = "broadwell";
- else if (has_avx2)
+ if (has_avx)
+ {
+ /* Assume Tiger Lake */
+ if (has_avx512vp2intersect)
+ cpu = "tigerlake";
+ /* Assume Cooper Lake */
+ else if (has_avx512bf16)
+ cpu = "cooperlake";
+ /* Assume Ice Lake Server. */
+ else if (has_wbnoinvd)
+ cpu = "icelake-server";
+ /* Assume Ice Lake. */
+ else if (has_avx512bitalg)
+ cpu = "icelake-client";
+ /* Assume Cannon Lake. */
+ else if (has_avx512vbmi)
+ cpu = "cannonlake";
+ /* Assume Knights Mill. */
+ else if (has_avx5124vnniw)
+ cpu = "knm";
+ /* Assume Knights Landing. */
+ else if (has_avx512er)
+ cpu = "knl";
+ /* Assume Skylake with AVX-512. */
+ else if (has_avx512f)
+ cpu = "skylake-avx512";
+ /* Assume Skylake. */
+ else if (has_clflushopt)
+ cpu = "skylake";
+ /* Assume Broadwell. */
+ else if (has_adx)
+ cpu = "broadwell";
+ else if (has_avx2)
/* Assume Haswell. */
- cpu = "haswell";
- else if (has_avx)
+ cpu = "haswell";
+ else
/* Assume Sandy Bridge. */
- cpu = "sandybridge";
+ cpu = "sandybridge";
+ }
else if (has_sse4_2)
{
- if (has_movbe)
+ if (has_gfni)
+ /* Assume Tremont. */
+ cpu = "tremont";
+ else if (has_sgx)
+ /* Assume Goldmont Plus. */
+ cpu = "goldmont-plus";
+ else if (has_xsave)
+ /* Assume Goldmont. */
+ cpu = "goldmont";
+ else if (has_movbe)
/* Assume Silvermont. */
cpu = "silvermont";
else
case PROCESSOR_ZNVER1:
cpu = "znver1";
break;
+ case PROCESSOR_ZNVER2:
+ cpu = "znver2";
+ break;
case PROCESSOR_BTVER1:
cpu = "btver1";
break;
const char *fma4 = has_fma4 ? " -mfma4" : " -mno-fma4";
const char *xop = has_xop ? " -mxop" : " -mno-xop";
const char *bmi = has_bmi ? " -mbmi" : " -mno-bmi";
+ const char *pconfig = has_pconfig ? " -mpconfig" : " -mno-pconfig";
+ const char *wbnoinvd = has_wbnoinvd ? " -mwbnoinvd" : " -mno-wbnoinvd";
+ const char *sgx = has_sgx ? " -msgx" : " -mno-sgx";
const char *bmi2 = has_bmi2 ? " -mbmi2" : " -mno-bmi2";
const char *tbm = has_tbm ? " -mtbm" : " -mno-tbm";
const char *avx = has_avx ? " -mavx" : " -mno-avx";
const char *avx512vl = has_avx512vl ? " -mavx512vl" : " -mno-avx512vl";
const char *avx512ifma = has_avx512ifma ? " -mavx512ifma" : " -mno-avx512ifma";
const char *avx512vbmi = has_avx512vbmi ? " -mavx512vbmi" : " -mno-avx512vbmi";
+ const char *avx5124vnniw = has_avx5124vnniw ? " -mavx5124vnniw" : " -mno-avx5124vnniw";
+ const char *avx512vbmi2 = has_avx512vbmi2 ? " -mavx512vbmi2" : " -mno-avx512vbmi2";
+ const char *avx512vnni = has_avx512vnni ? " -mavx512vnni" : " -mno-avx512vnni";
+ const char *avx5124fmaps = has_avx5124fmaps ? " -mavx5124fmaps" : " -mno-avx5124fmaps";
const char *clwb = has_clwb ? " -mclwb" : " -mno-clwb";
- const char *pcommit = has_pcommit ? " -mpcommit" : " -mno-pcommit";
const char *mwaitx = has_mwaitx ? " -mmwaitx" : " -mno-mwaitx";
const char *clzero = has_clzero ? " -mclzero" : " -mno-clzero";
const char *pku = has_pku ? " -mpku" : " -mno-pku";
+ const char *rdpid = has_rdpid ? " -mrdpid" : " -mno-rdpid";
+ const char *gfni = has_gfni ? " -mgfni" : " -mno-gfni";
+ const char *shstk = has_shstk ? " -mshstk" : " -mno-shstk";
+ const char *vaes = has_vaes ? " -mvaes" : " -mno-vaes";
+ const char *vpclmulqdq = has_vpclmulqdq ? " -mvpclmulqdq" : " -mno-vpclmulqdq";
+ const char *avx512vp2intersect = has_avx512vp2intersect ? " -mavx512vp2intersect" : " -mno-avx512vp2intersect";
+ const char *avx512bitalg = has_avx512bitalg ? " -mavx512bitalg" : " -mno-avx512bitalg";
+ const char *movdiri = has_movdiri ? " -mmovdiri" : " -mno-movdiri";
+ const char *movdir64b = has_movdir64b ? " -mmovdir64b" : " -mno-movdir64b";
+ const char *enqcmd = has_enqcmd ? " -menqcmd" : " -mno-enqcmd";
+ const char *waitpkg = has_waitpkg ? " -mwaitpkg" : " -mno-waitpkg";
+ const char *cldemote = has_cldemote ? " -mcldemote" : " -mno-cldemote";
+ const char *ptwrite = has_ptwrite ? " -mptwrite" : " -mno-ptwrite";
+ const char *avx512bf16 = has_avx512bf16 ? " -mavx512bf16" : " -mno-avx512bf16";
+
options = concat (options, mmx, mmx3dnow, sse, sse2, sse3, ssse3,
sse4a, cx16, sahf, movbe, aes, sha, pclmul,
- popcnt, abm, lwp, fma, fma4, xop, bmi, bmi2,
+ popcnt, abm, lwp, fma, fma4, xop, bmi, sgx, bmi2,
+ pconfig, wbnoinvd,
tbm, avx, avx2, sse4_2, sse4_1, lzcnt, rtm,
hle, rdrnd, f16c, fsgsbase, rdseed, prfchw, adx,
fxsr, xsave, xsaveopt, avx512f, avx512er,
avx512cd, avx512pf, prefetchwt1, clflushopt,
xsavec, xsaves, avx512dq, avx512bw, avx512vl,
- avx512ifma, avx512vbmi, clwb, pcommit, mwaitx,
- clzero, pku, NULL);
+ avx512ifma, avx512vbmi, avx5124fmaps, avx5124vnniw,
+ clwb, mwaitx, clzero, pku, rdpid, gfni, shstk,
+ avx512vbmi2, avx512vnni, vaes, vpclmulqdq,
+ avx512bitalg, movdiri, movdir64b, waitpkg, cldemote,
+ ptwrite, avx512bf16, enqcmd, avx512vp2intersect,
+ NULL);
}
done:
projects / thirdparty / gcc.git / blobdiff