Update copyright years.

[thirdparty/gcc.git] / gcc / config / m32r / predicates.md

diff --git a/gcc/config/m32r/predicates.md b/gcc/config/m32r/predicates.md
index 026a3cfc8f3b46ed614d21f53354b9cb912db7f5..667d8749ee2edda64025171ee3bfe20e1eba54ff 100644 (file)
--- a/gcc/config/m32r/predicates.md
+++ b/gcc/config/m32r/predicates.md
@@ -1,11 +1,11 @@
 ;; Predicate definitions for Renesas M32R.
-;; Copyright (C) 2005 Free Software Foundation, Inc.
+;; Copyright (C) 2005-2022 Free Software Foundation, Inc.
 ;;
 ;; This file is part of GCC.
 ;;
 ;; GCC is free software; you can redistribute it and/or modify
 ;; it under the terms of the GNU General Public License as published by
-;; the Free Software Foundation; either version 2, or (at your option)
+;; the Free Software Foundation; either version 3, or (at your option)
 ;; any later version.
 ;;
 ;; GCC is distributed in the hope that it will be useful,
@@ -14,19 +14,18 @@
 ;; GNU General Public License for more details.
 ;;
 ;; You should have received a copy of the GNU General Public License
-;; along with GCC; see the file COPYING.  If not, write to
-;; the Free Software Foundation, 51 Franklin Street, Fifth Floor,
-;; Boston, MA 02110-1301, USA.
+;; along with GCC; see the file COPYING3.  If not see
+;; <http://www.gnu.org/licenses/>.
 
 ;; Return true if OP is a register or the constant 0.
 
 (define_predicate "reg_or_zero_operand"
   (match_code "reg,subreg,const_int")
 {
-  if (GET_CODE (op) == REG || GET_CODE (op) == SUBREG)
+  if (REG_P (op) || GET_CODE (op) == SUBREG)
     return register_operand (op, mode);
 
-  if (GET_CODE (op) != CONST_INT)
+  if (!CONST_INT_P (op))
     return 0;
 
   return INTVAL (op) == 0;
@@ -51,7 +50,7 @@
       return 1;
 
     case CONST_INT:
-      return INT8_P (INTVAL (op));
+      return satisfies_constraint_I (op);
 
     default:
 #if 0
@@ -76,11 +75,11 @@
     return FALSE;
 
   x = XEXP (op, 0);
-  if (GET_CODE (x) != REG || REGNO (x) != CARRY_REGNUM)
+  if (!REG_P (x) || REGNO (x) != CARRY_REGNUM)
     return FALSE;
 
   x = XEXP (op, 1);
-  if (GET_CODE (x) != CONST_INT || INTVAL (x) != 0)
+  if (!CONST_INT_P (x) || INTVAL (x) != 0)
     return FALSE;
 
   return TRUE;
@@ -120,7 +119,7 @@
     case SUBREG :
       /* (subreg (mem ...) ...) can occur here if the inner part was once a
         pseudo-reg and is now a stack slot.  */
-      if (GET_CODE (SUBREG_REG (op)) == MEM)
+      if (MEM_P (SUBREG_REG (op)))
        return address_operand (XEXP (SUBREG_REG (op), 0), mode);
       else
        return register_operand (op, mode);
@@ -176,7 +175,7 @@
     case SUBREG :
       /* (subreg (mem ...) ...) can occur here if the inner part was once a
         pseudo-reg and is now a stack slot.  */
-      if (GET_CODE (SUBREG_REG (op)) == MEM)
+      if (MEM_P (SUBREG_REG (op)))
        return address_operand (XEXP (SUBREG_REG (op), 0), mode);
       else
        return register_operand (op, mode);
@@ -206,7 +205,7 @@
     case SUBREG :
       /* (subreg (mem ...) ...) can occur here if the inner part was once a
         pseudo-reg and is now a stack slot.  */
-      if (GET_CODE (SUBREG_REG (op)) == MEM)
+      if (MEM_P (SUBREG_REG (op)))
        return move_double_src_operand (SUBREG_REG (op), mode);
       else
        return register_operand (op, mode);
@@ -227,11 +226,11 @@
 (define_predicate "two_insn_const_operand"
   (match_code "const_int")
 {
-  if (GET_CODE (op) != CONST_INT)
+  if (!CONST_INT_P (op))
     return 0;
-  if (INT16_P (INTVAL (op))
-      || UINT24_P (INTVAL (op))
-      || UPPER16_P (INTVAL (op)))
+  if (satisfies_constraint_J (op)
+      || satisfies_constraint_M (op)
+      || satisfies_constraint_L (op))
     return 0;
   return 1;
 })
@@ -258,9 +257,9 @@
 (define_predicate "int8_operand"
   (match_code "const_int")
 {
-  if (GET_CODE (op) != CONST_INT)
+  if (!CONST_INT_P (op))
     return 0;
-  return INT8_P (INTVAL (op));
+  return satisfies_constraint_I (op);
 })
 
 ;; Return true if OP is an unsigned 16-bit immediate value.
@@ -268,9 +267,9 @@
 (define_predicate "uint16_operand"
   (match_code "const_int")
 {
-  if (GET_CODE (op) != CONST_INT)
+  if (!CONST_INT_P (op))
     return 0;
-  return UINT16_P (INTVAL (op));
+  return satisfies_constraint_K (op);
 })
 
 ;; Return true if OP is a register or signed 16-bit value.
@@ -278,11 +277,11 @@
 (define_predicate "reg_or_int16_operand"
   (match_code "reg,subreg,const_int")
 {
-  if (GET_CODE (op) == REG || GET_CODE (op) == SUBREG)
+  if (REG_P (op) || GET_CODE (op) == SUBREG)
     return register_operand (op, mode);
-  if (GET_CODE (op) != CONST_INT)
+  if (!CONST_INT_P (op))
     return 0;
-  return INT16_P (INTVAL (op));
+  return satisfies_constraint_J (op);
 })
 
 ;; Return true if OP is a register or an unsigned 16-bit value.
@@ -290,11 +289,11 @@
 (define_predicate "reg_or_uint16_operand"
   (match_code "reg,subreg,const_int")
 {
-  if (GET_CODE (op) == REG || GET_CODE (op) == SUBREG)
+  if (REG_P (op) || GET_CODE (op) == SUBREG)
     return register_operand (op, mode);
-  if (GET_CODE (op) != CONST_INT)
+  if (!CONST_INT_P (op))
     return 0;
-  return UINT16_P (INTVAL (op));
+  return satisfies_constraint_K (op);
 })
 
 ;; Return true if OP is a register or signed 16-bit value for
@@ -303,11 +302,11 @@
 (define_predicate "reg_or_cmp_int16_operand"
   (match_code "reg,subreg,const_int")
 {
-  if (GET_CODE (op) == REG || GET_CODE (op) == SUBREG)
+  if (REG_P (op) || GET_CODE (op) == SUBREG)
     return register_operand (op, mode);
-  if (GET_CODE (op) != CONST_INT)
+  if (!CONST_INT_P (op))
     return 0;
-  return CMP_INT16_P (INTVAL (op));
+  return satisfies_constraint_P (op);
 })
 
 ;; Return true if OP is a register or an integer value that can be
@@ -320,10 +319,10 @@
 {
   HOST_WIDE_INT value;
 
-  if (GET_CODE (op) == REG || GET_CODE (op) == SUBREG)
+  if (REG_P (op) || GET_CODE (op) == SUBREG)
     return register_operand (op, mode);
 
-  if (GET_CODE (op) != CONST_INT)
+  if (!CONST_INT_P (op))
     return 0;
 
   value = INTVAL (op);
@@ -336,9 +335,9 @@
 (define_predicate "cmp_int16_operand"
   (match_code "const_int")
 {
-  if (GET_CODE (op) != CONST_INT)
+  if (!CONST_INT_P (op))
     return 0;
-  return CMP_INT16_P (INTVAL (op));
+  return satisfies_constraint_P (op);
 })
 
 ;; Acceptable arguments to the call insn.
@@ -385,13 +384,13 @@
 (define_predicate "small_insn_p"
   (match_code "insn,call_insn,jump_insn")
 {
-  if (GET_CODE (op) == CONST_INT && INTVAL (op) == 0)
+  if (CONST_INT_P (op) && INTVAL (op) == 0)
     return 1;
 
   if (! INSN_P (op))
     return 0;
 
-  return get_attr_length (op) == 2;
+  return get_attr_length (as_a <rtx_insn *> (op)) == 2;
 })
 
 ;; Return true if op is an integer constant, less than or equal to
@@ -400,7 +399,7 @@
 (define_predicate "m32r_block_immediate_operand"
   (match_code "const_int")
 {
-  if (GET_CODE (op) != CONST_INT
+  if (!CONST_INT_P (op)
       || INTVAL (op) > MAX_MOVE_BYTES
       || INTVAL (op) <= 0)
     return 0;
@@ -416,7 +415,7 @@
   if (! INSN_P (op))
     return 0;
 
-  return get_attr_length (op) != 2;
+  return get_attr_length (as_a <rtx_insn *> (op)) != 2;
 })
 
 ;; Returns 1 if OP is an acceptable operand for seth/add3.
@@ -434,8 +433,7 @@
   if (GET_CODE (op) == CONST
       && GET_CODE (XEXP (op, 0)) == PLUS
       && GET_CODE (XEXP (XEXP (op, 0), 0)) == SYMBOL_REF
-      && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT
-      && INT16_P (INTVAL (XEXP (XEXP (op, 0), 1))))
+      && satisfies_constraint_J (XEXP (XEXP (op, 0), 1)))
     return 1;
 
   return 0;