/* Definitions of target machine for GNU compiler,
for m68k (including m68010) NetBSD platforms using the
ELF object format.
- Copyright (C) 2002, 2003, 2004, 2006 Free Software Foundation, Inc.
+ Copyright (C) 2002-2020 Free Software Foundation, Inc.
Contributed by Wasabi Systems. Inc.
This file is derived from <m68k/m68kv4.h>, <m68k/m68kelf.h>,
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
+the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING. If not, write to
-the Free Software Foundation, 51 Franklin Street, Fifth Floor,
-Boston, MA 02110-1301, USA. */
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
#define TARGET_OS_CPP_BUILTINS() \
do \
builtin_define ("__m68k__"); \
builtin_define ("__SVR4_ABI__"); \
builtin_define ("__motorola__"); \
+ if (TARGET_HARD_FLOAT) \
+ builtin_define ("__HAVE_FPU__"); \
} \
while (0)
-/* Default target comes from config.gcc */
-#undef TARGET_DEFAULT
-#define TARGET_DEFAULT TARGET_CPU_DEFAULT
-
-
/* Don't try using XFmode on the 68010. */
#undef LONG_DOUBLE_TYPE_SIZE
#define LONG_DOUBLE_TYPE_SIZE (TARGET_68020 ? 80 : 64)
-#ifdef __mc68010__
-#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
-#else
-#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 80
-#endif
-
-#define EXTRA_SPECS \
- { "cpp_cpu_default_spec", CPP_CPU_DEFAULT_SPEC }, \
- { "cpp_cpu_spec", CPP_CPU_SPEC }, \
- { "cpp_fpu_spec", CPP_FPU_SPEC }, \
- { "asm_default_spec", ASM_DEFAULT_SPEC }, \
- { "netbsd_cpp_spec", NETBSD_CPP_SPEC }, \
+#undef SUBTARGET_EXTRA_SPECS
+#define SUBTARGET_EXTRA_SPECS \
{ "netbsd_entry_point", NETBSD_ENTRY_POINT },
-#define CPP_CPU_SPEC \
- "%(cpp_cpu_default_spec)"
-
-
-#undef TARGET_VERSION
-#if TARGET_DEFAULT & MASK_68020
-#define TARGET_VERSION fprintf (stderr, " (NetBSD/m68k ELF)");
-#define CPP_CPU_DEFAULT_SPEC "%{!m680*:-D__mc68020__}"
-#define ASM_DEFAULT_SPEC "%{!m680*:-m68020}"
-#else
-#define TARGET_VERSION fprintf (stderr, " (NetBSD/68010 ELF)");
-#define CPP_CPU_DEFAULT_SPEC "%{!m680*:-D__mc68010__}"
-#define ASM_DEFAULT_SPEC "%{!m680*:-m68010}"
-#endif
-
-
-#if TARGET_DEFAULT & MASK_68881
-#define CPP_FPU_SPEC "%{!msoft-float:-D__HAVE_68881__ -D__HAVE_FPU__}"
-#else
-#define CPP_FPU_SPEC "%{m68881:-D__HAVE_68881__ -D__HAVE_FPU__}"
-#endif
-
-
/* Provide a CPP_SPEC appropriate for NetBSD m68k targets. Currently we
deal with the GCC option '-posix', as well as an indication as to
whether or not use of the FPU is allowed. */
#undef CPP_SPEC
-#define CPP_SPEC \
- "%(netbsd_cpp_spec) %(cpp_cpu_spec) %(cpp_fpu_spec)"
+#define CPP_SPEC NETBSD_CPP_SPEC
-/* Provide an ASM_SPEC appropriate for NetBSD m68k ELF targets. We pass
- on some CPU options, as well as PIC code generation options. */
+/* Provide an ASM_SPEC appropriate for NetBSD m68k ELF targets. We need
+ to pass PIC code generation options. */
#undef ASM_SPEC
#define ASM_SPEC \
- "%(asm_default_spec) \
- %{m68010} %{m68020} %{m68030} %{m68040} %{m68060} \
- %{fpic|fpie:-k} %{fPIC|fPIE:-k -K}"
-
-#define AS_NEEDS_DASH_FOR_PIPED_INPUT
+ "%(asm_cpu_spec) %{" FPIE1_OR_FPIC1_SPEC ":-k} %{" FPIE2_OR_FPIC2_SPEC ":-k -K}"
/* Provide a LINK_SPEC appropriate for a NetBSD/m68k ELF target. */
#define USER_LABEL_PREFIX ""
-/* The prefix for immediate operands. */
-
-#undef IMMEDIATE_PREFIX
-#define IMMEDIATE_PREFIX "#"
-
-
#undef ASM_COMMENT_START
#define ASM_COMMENT_START "|"
{ \
if (ADDRESS_REG_P (operands[0])) \
return "jmp %%pc@(2,%0:l)"; \
+ else if (TARGET_LONG_JUMP_TABLE_OFFSETS) \
+ return "jmp %%pc@(2,%0:l)"; \
else \
return "ext%.l %0\n\tjmp %%pc@(2,%0:l)"; \
} \
+ else if (TARGET_LONG_JUMP_TABLE_OFFSETS) \
+ return "jmp %%pc@(2,%0:l)"; \
else \
return "jmp %%pc@(2,%0:w)"; \
} while (0)
#define BSS_SECTION_ASM_OP ".section\t.bss"
-/* Like `ASM_OUTPUT_BSS' except takes the required alignment as a
- separate, explicit argument. If you define this macro, it is used
- in place of `ASM_OUTPUT_BSS', and gives you more flexibility in
- handling the required alignment of the variable. The alignment is
- specified as the number of bits.
-
- Try to use function `asm_output_aligned_bss' defined in file
- `varasm.c' when defining this macro. */
-
#undef ASM_OUTPUT_ALIGNED_BSS
#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
function. The default in m68k.h is a1. For m68k/SVR4 it is a0. */
#undef M68K_STRUCT_VALUE_REGNUM
-#define M68K_STRUCT_VALUE_REGNUM 8
+#define M68K_STRUCT_VALUE_REGNUM A0_REG
/* Register in which static-chain is passed to a function. The
regnum. Make it a1 instead. */
#undef STATIC_CHAIN_REGNUM
-#define STATIC_CHAIN_REGNUM 9
+#define STATIC_CHAIN_REGNUM A1_REG
+#undef M68K_STATIC_CHAIN_REG_NAME
+#define M68K_STATIC_CHAIN_REG_NAME REGISTER_PREFIX "a1"
/* Now to renumber registers for dbx and gdb.
#undef FUNCTION_VALUE_REGNO_P
#define FUNCTION_VALUE_REGNO_P(N) \
- ((N) == 0 || (N) == 8 || (TARGET_68881 && (N) == 16))
+ ((N) == D0_REG || (N) == A0_REG || (TARGET_68881 && (N) == FP0_REG))
/* Define this to be true when FUNCTION_VALUE_REGNO_P is true for
m68k_function_value (VALTYPE, FUNC)
-/* For compatibility with the large body of existing code which does
- not always properly declare external functions returning pointer
- types, the m68k/SVR4 convention is to copy the value returned for
- pointer functions from a0 to d0 in the function epilogue, so that
- callers that have neglected to properly declare the callee can
- still find the correct return value. */
-
-extern int current_function_returns_pointer;
-#define FUNCTION_EXTRA_EPILOGUE(FILE, SIZE) \
-do \
- { \
- if (current_function_returns_pointer \
- && ! find_equiv_reg (0, get_last_insn (), 0, 0, 0, 8, Pmode)) \
- asm_fprintf (FILE, "\tmove.l %Ra0,%Rd0\n"); \
- } \
-while (0)
-
-
/* Define how to find the value returned by a library function
assuming the value has mode MODE.
For m68k/SVR4 look for integer values in d0, pointer values in d0
#define BIGGEST_ALIGNMENT 64
-/* For m68k SVR4, structures are returned using the reentrant
- technique. */
-
-#undef PCC_STATIC_STRUCT_RETURN
-
-
/* The svr4 ABI for the m68k says that records and unions are returned
in memory. */
#undef DEFAULT_PCC_STRUCT_RETURN
#define DEFAULT_PCC_STRUCT_RETURN 1
-/* Output assembler code for a block containing the constant parts
- of a trampoline, leaving space for the variable parts. */
-
-/* On m68k svr4, the trampoline is different from the generic version
- in that we use a1 as the static call chain. */
-
-#undef TRAMPOLINE_TEMPLATE
-#define TRAMPOLINE_TEMPLATE(FILE) \
-{ \
- assemble_aligned_integer (2, GEN_INT (0x227a)); \
- assemble_aligned_integer (2, GEN_INT (8)); \
- assemble_aligned_integer (2, GEN_INT (0x2f3a)); \
- assemble_aligned_integer (2, GEN_INT (8)); \
- assemble_aligned_integer (2, GEN_INT (0x4e75)); \
- assemble_aligned_integer (4, const0_rtx); \
- assemble_aligned_integer (4, const0_rtx); \
-}
-
-/* Redefine since we are using a different trampoline */
-#undef TRAMPOLINE_SIZE
-#define TRAMPOLINE_SIZE 18
-
-/* Emit RTL insns to initialize the variable parts of a trampoline.
- FNADDR is an RTX for the address of the function's pure code.
- CXT is an RTX for the static chain value for the function. */
-
-#undef INITIALIZE_TRAMPOLINE
-#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
-{ \
- emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 10)), CXT); \
- emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 14)), FNADDR); \
-}
-
-
/* XXX
This is the end of the chunk lifted from m68kv4.h */
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