mips.md (move_type): Replace mfhilo and mthilo with mflo and mtlo.

[thirdparty/gcc.git] / gcc / config / mips / 74k.md

diff --git a/gcc/config/mips/74k.md b/gcc/config/mips/74k.md
index b75bfc4b91784d0375fd4a6719c36359700ab3e0..b643b65d353942986d14250f06a634e0665cb4d0 100644 (file)
--- a/gcc/config/mips/74k.md
+++ b/gcc/config/mips/74k.md
@@ -80,13 +80,13 @@
 ;; mfhi, mflo, mflhxu - deliver result to gpr in 7 cycles
 (define_insn_reservation "r74k_int_mfhilo" 7
   (and (eq_attr "cpu" "74kc,74kf2_1,74kf1_1,74kf3_2")
-       (eq_attr "type" "mfhilo"))
+       (eq_attr "type" "mfhi,mflo"))
   "r74k_alu+r74k_mul")
 
 ;; mthi, mtlo, mtlhx - deliver result to hi/lo, thence madd, handled as bypass
 (define_insn_reservation "r74k_int_mthilo" 7
   (and (eq_attr "cpu" "74kc,74kf2_1,74kf1_1,74kf3_2")
-       (eq_attr "type" "mthilo"))
+       (eq_attr "type" "mthi,mtlo"))
   "r74k_alu+r74k_mul")
 
 ;; div - default to 50 cycles for 32bit operands.  Faster for 8 bit,