;; DFA-based pipeline description for the RM9000.
-;; Copyright (C) 2003, 2004 Free Software Foundation, Inc.
+;; Copyright (C) 2003-2020 Free Software Foundation, Inc.
;;
;; This file is part of GCC.
;; GCC is free software; you can redistribute it and/or modify it
;; under the terms of the GNU General Public License as published
-;; by the Free Software Foundation; either version 2, or (at your
+;; by the Free Software Foundation; either version 3, or (at your
;; option) any later version.
;; GCC is distributed in the hope that it will be useful, but WITHOUT
;; License for more details.
;; You should have received a copy of the GNU General Public License
-;; along with GCC; see the file COPYING. If not, write to the
-;; Free Software Foundation, 59 Temple Place - Suite 330, Boston,
-;; MA 02111-1307, USA.
+;; along with GCC; see the file COPYING3. If not see
+;; <http://www.gnu.org/licenses/>.
(define_automaton "rm9k_main, rm9k_imul, rm9k_fdiv")
(define_insn_reservation "rm9k_int" 1
(and (eq_attr "cpu" "r9000")
- (eq_attr "type" "arith,shift,slt,clz,const,nop,trap"))
+ (eq_attr "type" "arith,shift,signext,slt,clz,const,logical,move,nop,trap"))
"rm9k_any1 | rm9k_any2")
(define_insn_reservation "rm9k_int_cmove" 2
;; This applies to both 'mul' and 'mult'.
(define_insn_reservation "rm9k_mulsi" 3
(and (eq_attr "cpu" "r9000")
- (and (eq_attr "type" "imul,imadd")
+ (and (eq_attr "type" "imul,imul3,imadd")
(eq_attr "mode" "!DI")))
"rm9k_f_int")
(define_insn_reservation "rm9k_muldi" 7
(and (eq_attr "cpu" "r9000")
- (and (eq_attr "type" "imul,imadd")
+ (and (eq_attr "type" "imul,imul3,imadd")
(eq_attr "mode" "DI")))
"rm9k_f_int + rm9k_imul * 7")
(define_insn_reservation "rm9k_mfhilo" 1
(and (eq_attr "cpu" "r9000")
- (eq_attr "type" "mfhilo"))
+ (eq_attr "type" "mfhi,mflo"))
"rm9k_f_int")
(define_insn_reservation "rm9k_mthilo" 5
(and (eq_attr "cpu" "r9000")
- (eq_attr "type" "mthilo"))
+ (eq_attr "type" "mthi,mtlo"))
"rm9k_f_int")
(define_insn_reservation "rm9k_xfer" 2
(and (eq_attr "cpu" "r9000")
- (eq_attr "type" "xfer"))
+ (eq_attr "type" "mfc,mtc"))
"rm9k_m")
(define_insn_reservation "rm9k_fquick" 2
(define_insn_reservation "rm9k_fdivs" 22
(and (eq_attr "cpu" "r9000")
- (and (eq_attr "type" "fdiv,fsqrt,frsqrt")
+ (and (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt")
(eq_attr "mode" "SF")))
"rm9k_f_float + rm9k_fdiv * 22")
(define_insn_reservation "rm9k_fdivd" 37
(and (eq_attr "cpu" "r9000")
- (and (eq_attr "type" "fdiv,fsqrt,frsqrt")
+ (and (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt")
(eq_attr "mode" "DF")))
"rm9k_f_float + rm9k_fdiv * 37")
(define_insn_reservation "rm9k_unknown" 1
(and (eq_attr "cpu" "r9000")
- (eq_attr "type" "unknown,multi"))
+ (eq_attr "type" "unknown,multi,atomic,syncloop"))
"rm9k_m + rm9k_f_int + rm9k_any1 + rm9k_any2")