/* Definitions of target machine for Altera Nios II.
- Copyright (C) 2012-2015 Free Software Foundation, Inc.
+ Copyright (C) 2012-2020 Free Software Foundation, Inc.
Contributed by Jonah Graham (jgraham@altera.com),
Will Reece (wreece@altera.com), and Jeff DaSilva (jdasilva@altera.com).
Contributed by Mentor Graphics, Inc.
#ifndef GCC_NIOS2_H
#define GCC_NIOS2_H
+/* Indicate R2 ISA level support. */
+#define TARGET_ARCH_R2 (nios2_arch_option == ARCH_R2)
+
/* FPU insn codes declared here. */
#include "config/nios2/nios2-opts.h"
builtin_define_std ("nios2_big_endian"); \
else \
builtin_define_std ("nios2_little_endian"); \
- } \
+ builtin_define_with_int_value ( \
+ "__nios2_arch__", (int) nios2_arch_option); \
+ } \
while (0)
/* We're little endian, unless otherwise specified by defining
# define TARGET_DEFAULT (MASK_HAS_MUL | TARGET_ENDIAN_DEFAULT)
#endif
+#define OPTION_DEFAULT_SPECS \
+ {"arch", "%{!march=*:%{!mcpu=*:-march=%(VALUE)}}" }
+
#define CC1_SPEC "%{G*}"
#if TARGET_ENDIAN_DEFAULT == 0
-# define ASM_SPEC "%{!meb:-EL} %{meb:-EB}"
+# define ASM_SPEC "%{!meb:-EL} %{meb:-EB} %{march=*:-march=%*}"
# define LINK_SPEC_ENDIAN "%{!meb:-EL} %{meb:-EB}"
# define MULTILIB_DEFAULTS { "EL" }
#else
-# define ASM_SPEC "%{!mel:-EB} %{mel:-EL}"
+# define ASM_SPEC "%{!mel:-EB} %{mel:-EL} %{march=*:-march=%*}"
# define LINK_SPEC_ENDIAN "%{!mel:-EB} %{mel:-EL}"
# define MULTILIB_DEFAULTS { "EB" }
#endif
#define PREFERRED_STACK_BOUNDARY 32
#define MAX_FIXED_MODE_SIZE 64
-#define CONSTANT_ALIGNMENT(EXP, ALIGN) \
- ((TREE_CODE (EXP) == STRING_CST) \
- && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
+#define LABEL_ALIGN(LABEL) nios2_label_align (LABEL)
/* Layout of source language data types. */
/* 30 */ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
}
-#define MODES_TIEABLE_P(MODE1, MODE2) 1
-#define HARD_REGNO_MODE_OK(REGNO, MODE) 1
-#define HARD_REGNO_NREGS(REGNO, MODE) \
- ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
+/* Order in which to allocate registers. Each register must be
+ listed once. This is the default ordering for R1 and non-CDX R2
+ code. For CDX, we overwrite this in ADJUST_REG_ALLOC_ORDER. */
+#define REG_ALLOC_ORDER \
+ { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \
+ 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, \
+ 37, 38, 39 }
+
+#define ADJUST_REG_ALLOC_ORDER nios2_adjust_reg_alloc_order ()
+
+/* Caller-save costs can be less emphasized under R2 CDX, where we can
+ use push.n/pop.n. */
+#define HONOR_REG_ALLOC_ORDER (TARGET_HAS_CDX)
/* Register Classes. */
#define CLASS_MAX_NREGS(CLASS, MODE) \
((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
+#define CDX_REG_P(REGNO) \
+ ((REGNO) == 16 || (REGNO) == 17 || ((REGNO) >= 2 && (REGNO) <= 7))
+
/* Tests for various kinds of constants used in the Nios II port. */
#define SMALL_INT(X) ((unsigned HOST_WIDE_INT)(X) + 0x8000 < 0x10000)
+#define SMALL_INT12(X) ((unsigned HOST_WIDE_INT)(X) + 0x800 < 0x1000)
#define SMALL_INT_UNSIGNED(X) ((X) >= 0 && (X) < 0x10000)
#define UPPER16_INT(X) (((X) & 0xffff) == 0)
#define SHIFT_INT(X) ((X) >= 0 && (X) <= 31)
#define RDWRCTL_INT(X) ((X) >= 0 && (X) <= 31)
#define CUSTOM_INSN_OPCODE(X) ((X) >= 0 && (X) <= 255)
+#define ANDCLEAR_INT(X) \
+ (((X) & 0xffff) == 0xffff || (((X) >> 16) & 0xffff) == 0xffff)
/* Say that the epilogue uses the return address register. Note that
in the case of sibcalls, the values "used by the epilogue" are
/* Stack layout. */
#define STACK_GROWS_DOWNWARD 1
-#define STARTING_FRAME_OFFSET 0
+#define FRAME_GROWS_DOWNWARD 1
#define FIRST_PARM_OFFSET(FUNDECL) 0
/* Before the prologue, RA lives in r31. */
-#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (VOIDmode, RA_REGNO)
+#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, RA_REGNO)
#define RETURN_ADDR_RTX(C,F) nios2_get_return_address (C)
#define DWARF_FRAME_RETURN_COLUMN RA_REGNO
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
do { (CUM).regs_used = 0; } while (0)
-#define FUNCTION_ARG_PADDING(MODE, TYPE) \
- (nios2_function_arg_padding ((MODE), (TYPE)))
-
#define PAD_VARARGS_DOWN \
- (FUNCTION_ARG_PADDING (TYPE_MODE (type), type) == downward)
+ (targetm.calls.function_arg_padding (TYPE_MODE (type), type) == PAD_DOWNWARD)
#define BLOCK_REG_PADDING(MODE, TYPE, FIRST) \
(nios2_block_reg_padding ((MODE), (TYPE), (FIRST)))
/* Output before 'small' uninitialized data. */
#define SBSS_SECTION_ASM_OP "\t.section\t.sbss"
-#ifndef IN_LIBGCC2
+#ifndef USED_FOR_TARGET
/* Default the definition of "small data" to 8 bytes. */
extern unsigned HOST_WIDE_INT nios2_section_threshold;
#endif
the linker seems to want the alignment of data objects
to depend on their types. We do exactly that here. */
-#undef ASM_OUTPUT_ALIGNED_LOCAL
-#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \
+#undef ASM_OUTPUT_ALIGNED_DECL_LOCAL
+#define ASM_OUTPUT_ALIGNED_DECL_LOCAL(FILE, DECL, NAME, SIZE, ALIGN) \
do { \
- if ((SIZE) <= nios2_section_threshold) \
+ if (targetm.in_small_data_p (DECL)) \
switch_to_section (sbss_section); \
else \
switch_to_section (bss_section); \
#define CASE_VECTOR_MODE Pmode
-#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
-
#define LOAD_EXTEND_OP(MODE) (ZERO_EXTEND)
-#define WORD_REGISTER_OPERATIONS
+#define WORD_REGISTER_OPERATIONS 1
#endif /* GCC_NIOS2_H */
projects / thirdparty / gcc.git / blobdiff