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Update copyright years.
[thirdparty/gcc.git] / gcc / config / rl78 / rl78.h
diff --git a/gcc/config/rl78/rl78.h b/gcc/config/rl78/rl78.h
index 39a8bec1fe8feb149cf58996488a2dc124fed426..8f9a51ca094715842af02bf8339ce3f464a96439 100644 (file)
--- a/gcc/config/rl78/rl78.h
+++ b/gcc/config/rl78/rl78.h
@@ -1,5 +1,5 @@
 /* GCC backend definitions for the Renesas RL78 processor.
-   Copyright (C) 2011, 2012 Free Software Foundation, Inc.
+   Copyright (C) 2011-2020 Free Software Foundation, Inc.
    Contributed by Red Hat.
 
    This file is part of GCC.
@@ -20,18 +20,32 @@
 \f
 
 #define RL78_MUL_NONE  (rl78_mul_type == MUL_NONE)
-#define RL78_MUL_RL78  (rl78_mul_type == MUL_RL78)
 #define RL78_MUL_G13   (rl78_mul_type == MUL_G13)
+#define RL78_MUL_G14   (rl78_mul_type == MUL_G14)
+
+#define TARGET_G10     (rl78_cpu_type == CPU_G10)
+#define TARGET_G13     (rl78_cpu_type == CPU_G13)
+#define TARGET_G14     (rl78_cpu_type == CPU_G14)
 
 #define TARGET_CPU_CPP_BUILTINS()               \
   do                                            \
     {                                           \
       builtin_define ("__RL78__");             \
       builtin_assert ("cpu=RL78");             \
-      if (RL78_MUL_RL78)                       \
-       builtin_define ("__RL78_MUL_RL78__");   \
-      if (RL78_MUL_G13)                                \
+                                               \
+      if (RL78_MUL_NONE)                       \
+       builtin_define ("__RL78_MUL_NONE__");   \
+      else if (RL78_MUL_G13)                   \
        builtin_define ("__RL78_MUL_G13__");    \
+      else if (RL78_MUL_G14)                   \
+       builtin_define ("__RL78_MUL_G14__");    \
+                                               \
+      if (TARGET_G10)                          \
+       builtin_define ("__RL78_G10__");        \
+      else if (TARGET_G13)                     \
+       builtin_define ("__RL78_G13__");        \
+      else if (TARGET_G14)                     \
+       builtin_define ("__RL78_G14__");        \
     }                                           \
   while (0)
 
@@ -41,6 +55,25 @@
 #undef  ENDFILE_SPEC
 #define ENDFILE_SPEC "crtend.o%s crtn.o%s"
 
+#undef  ASM_SPEC
+#define ASM_SPEC "\
+%{mrelax:-relax} \
+%{mg10:--mg10} \
+%{mg13:--mg13} \
+%{mg14:--mg14} \
+%{mrl78:--mg14} \
+%{mcpu=g10:--mg10} \
+%{mcpu=g13:--mg13} \
+%{mcpu=g14:--mg14} \
+%{mcpu=rl78:--mg14} \
+"
+
+#undef  LINK_SPEC
+#define LINK_SPEC "\
+%{mrelax:-relax} \
+%{!r:--gc-sections} \
+"
+
 #undef  LIB_SPEC
 #define LIB_SPEC "                                     \
 --start-group                                          \
@@ -84,9 +117,6 @@
 #define DOUBLE_TYPE_SIZE               32 /*64*/
 #define LONG_DOUBLE_TYPE_SIZE          64 /*DOUBLE_TYPE_SIZE*/
 
-#define LIBGCC2_HAS_DF_MODE            1
-#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE   64
-
 #define DEFAULT_SIGNED_CHAR            0
 
 #define STRICT_ALIGNMENT               1
@@ -114,16 +144,14 @@
 #define POINTERS_EXTEND_UNSIGNED       1
 #define FUNCTION_MODE                  HImode
 #define CASE_VECTOR_MODE               Pmode
-#define WORD_REGISTER_OPERATIONS       0
+#define WORD_REGISTER_OPERATIONS       1
 #define HAS_LONG_COND_BRANCH           0
 #define HAS_LONG_UNCOND_BRANCH         0
 
 #define MOVE_MAX                       2
-#define STARTING_FRAME_OFFSET          0
 
-#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC)   1
-
-#define ADDR_SPACE_FAR 1
+#define ADDR_SPACE_NEAR                        1
+#define ADDR_SPACE_FAR                 2
 
 #define HAVE_PRE_DECCREMENT            0
 #define HAVE_POST_INCREMENT            0
@@ -133,7 +161,6 @@
 
 #define STORE_FLAG_VALUE               1
 #define LOAD_EXTEND_OP(MODE)           ZERO_EXTEND
-#define SHORT_IMMEDIATES_SIGN_EXTEND   0
 \f
 
 /* The RL78 has four register banks.  Normal operation uses RB0 as
@@ -149,11 +176,11 @@
 */
 #define REGISTER_NAMES                                         \
   {                                                            \
-    "x", "a", "c", "b", "e", "d", "l", "h",                    \
-    "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",      \
+    "x",   "a",   "c",   "b",   "e",   "d",   "l",   "h",      \
+    "r8",  "r9",  "r10", "r11", "r12", "r13", "r14", "r15",    \
     "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",    \
     "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",    \
-      "sp", "ap", "psw", "es", "cs"                            \
+    "sp",  "ap",  "psw", "es",  "cs"                           \
   }
 
 #define ADDITIONAL_REGISTER_NAMES      \
@@ -231,6 +258,8 @@ enum reg_class
   "ALL_REGS"                                           \
 }
 
+/* Note that no class may include the second register in $fp, because
+   we treat $fp as a single HImode register.  */
 #define REG_CLASS_CONTENTS                             \
 {                                                      \
   { 0x00000000, 0x00000000 },  /* No registers,  */            \
@@ -252,8 +281,8 @@ enum reg_class
   { 0x00000300, 0x00000000 },  /* R8 - HImode */               \
   { 0x00000c00, 0x00000000 },  /* R10 - HImode */              \
   { 0xff000000, 0x00000000 },  /* INT - HImode */              \
-  { 0x007fff00, 0x00000000 },  /* Virtual registers.  */       \
-  { 0xff7fffff, 0x00000002 },  /* General registers.  */       \
+  { 0xff7fff00, 0x00000000 },  /* Virtual registers.  */       \
+  { 0xff7fff00, 0x00000002 },  /* General registers.  */       \
   { 0x04000000, 0x00000004 },  /* PSW.  */     \
   { 0xff7fffff, 0x0000001f }   /* All registers.  */           \
 }
@@ -339,7 +368,7 @@ enum reg_class
        && reg_renumber[(REGNO)] <= (MAX)))
 
 #ifdef REG_OK_STRICT
-#define REGNO_OK_FOR_BASE_P(regno)      REGNO_IN_RANGE (regno, 16, 23)
+#define REGNO_OK_FOR_BASE_P(regno)      REGNO_IN_RANGE (regno, 16, 31)
 #else
 #define REGNO_OK_FOR_BASE_P(regno)     1
 #endif
@@ -375,19 +404,6 @@ typedef unsigned int CUMULATIVE_ARGS;
     fprintf (FILE, "\tbsr\t__mcount\n");
 \f
 
-#define HARD_REGNO_NREGS(REGNO, MODE)            \
-  rl78_hard_regno_nregs (REGNO, MODE)
-
-#define HARD_REGNO_MODE_OK(REGNO, MODE)                        \
-  rl78_hard_regno_mode_ok (REGNO, MODE)
-
-#define MODES_TIEABLE_P(MODE1, MODE2)                          \
-  (   (   GET_MODE_CLASS (MODE1) == MODE_FLOAT                 \
-       || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT)                \
-   == (   GET_MODE_CLASS (MODE2) == MODE_FLOAT                 \
-       || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
-\f
-
 #define TEXT_SECTION_ASM_OP ".text"
 #define DATA_SECTION_ASM_OP ".data"
 #define BSS_SECTION_ASM_OP ".bss"
@@ -414,6 +430,16 @@ typedef unsigned int CUMULATIVE_ARGS;
   fprintf (FILE, "\t.long .L%d - 1b\n", VALUE)
 
 
+#define ASM_OUTPUT_SYMBOL_REF(FILE, SYM) rl78_output_symbol_ref ((FILE), (SYM))
+
+#define ASM_OUTPUT_LABELREF(FILE, SYM) rl78_output_labelref ((FILE), (SYM))
+
+#define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGNMENT) \
+       rl78_output_aligned_common (STREAM, DECL, NAME, SIZE, ALIGNMENT, 1)
+
+#define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGNMENT) \
+       rl78_output_aligned_common (STREAM, DECL, NAME, SIZE, ALIGNMENT, 0)
+
 #define ASM_OUTPUT_ALIGN(STREAM, LOG)          \
   do                                           \
     {                                          \
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