Update copyright years.

[thirdparty/gcc.git] / gcc / config / rs6000 / e500mc.md

diff --git a/gcc/config/rs6000/e500mc.md b/gcc/config/rs6000/e500mc.md
index 7c14c631c9268747ca2406de451b6dd7907ed18c..306f621f78779ec9011b1f47b7821933caac6275 100644 (file)
--- a/gcc/config/rs6000/e500mc.md
+++ b/gcc/config/rs6000/e500mc.md
@@ -1,5 +1,5 @@
 ;; Pipeline description for Motorola PowerPC e500mc core.
-;;   Copyright (C) 2008-2014 Free Software Foundation, Inc.
+;;   Copyright (C) 2008-2020 Free Software Foundation, Inc.
 ;;   Contributed by Edmar Wienskoski (edmar@freescale.com)
 ;;
 ;; This file is part of GCC.
@@ -70,9 +70,8 @@
 
 ;; Simple SU insns.
 (define_insn_reservation "e500mc_su" 1
-  (and (eq_attr "type" "integer,insert_word,insert_dword,cmp,compare,\
-                        delayed_compare,var_delayed_compare,fast_compare,\
-                        shift,trap,var_shift_rotate,cntlz,exts,isel")
+  (and (eq_attr "type" "integer,add,logical,insert,cmp,\
+                        shift,trap,cntlz,exts,isel")
        (eq_attr "cpu" "ppce500mc"))
   "e500mc_decode,e500mc_issue+e500mc_su_stage0+e500mc_retire")
 
@@ -91,14 +90,14 @@
 
 ;; Multiply.
 (define_insn_reservation "e500mc_multiply" 4
-  (and (eq_attr "type" "imul,imul2,imul3,imul_compare")
+  (and (eq_attr "type" "mul")
        (eq_attr "cpu" "ppce500mc"))
   "e500mc_decode,e500mc_issue+e500mc_mu_stage0,e500mc_mu_stage1,\
    e500mc_mu_stage2,e500mc_mu_stage3+e500mc_retire")
 
 ;; Divide. We use the average latency time here.
 (define_insn_reservation "e500mc_divide" 14
-  (and (eq_attr "type" "idiv")
+  (and (eq_attr "type" "div")
        (eq_attr "cpu" "ppce500mc"))
   "e500mc_decode,e500mc_issue+e500mc_mu_stage0+e500mc_mu_div,\
    e500mc_mu_div*13")
@@ -111,7 +110,7 @@
 
 ;; CR logical.
 (define_insn_reservation "e500mc_cr_logical" 1
-  (and (eq_attr "type" "cr_logical,delayed_cr")
+  (and (eq_attr "type" "cr_logical")
        (eq_attr "cpu" "ppce500mc"))
   "e500mc_decode,e500mc_bu,e500mc_retire")
 
@@ -133,12 +132,6 @@
        (eq_attr "cpu" "ppce500mc"))
   "e500mc_decode,e500mc_issue+e500mc_su_stage0+e500mc_retire")
 
-;; Brinc.
-(define_insn_reservation "e500mc_brinc" 1
-  (and (eq_attr "type" "brinc")
-       (eq_attr "cpu" "ppce500mc"))
-  "e500mc_decode,e500mc_issue+e500mc_su_stage0+e500mc_retire")
-
 ;; Loads.
 (define_insn_reservation "e500mc_load" 3
   (and (eq_attr "type" "load,load_l,sync")