Update copyright years.

[thirdparty/gcc.git] / gcc / config / s390 / 2064.md

diff --git a/gcc/config/s390/2064.md b/gcc/config/s390/2064.md
index d5dabc7679c6854d8b9163736aabba4d8b9dd6ed..6fd96bd4bf60ec9df0b68eea9e18656676373a3b 100644 (file)
--- a/gcc/config/s390/2064.md
+++ b/gcc/config/s390/2064.md
@@ -1,5 +1,5 @@
 ;; Scheduling description for z900 (cpu 2064).
-;;   Copyright (C) 2003-2016 Free Software Foundation, Inc.
+;;   Copyright (C) 2003-2020 Free Software Foundation, Inc.
 ;;   Contributed by Hartmut Penner (hpenner@de.ibm.com) and
 ;;                  Ulrich Weigand (uweigand@de.ibm.com).
 
@@ -39,63 +39,61 @@
 ;;                  |
 ;;                  wr
 
-;; This scheduler description is also used for the g5 and g6.
-
 (define_automaton "z_ipu")
 (define_cpu_unit "z_e1"   "z_ipu")
 (define_cpu_unit "z_wr"   "z_ipu")
 
 
 (define_insn_reservation "z_la" 1
-  (and (eq_attr "cpu" "z900,g5,g6")
+  (and (eq_attr "cpu" "z900")
        (eq_attr "type" "la"))
   "z_e1,z_wr")
 
 (define_insn_reservation "z_larl" 1
-  (and (eq_attr "cpu" "z900,g5,g6")
+  (and (eq_attr "cpu" "z900")
        (eq_attr "type" "larl"))
   "z_e1,z_wr")
 
 (define_insn_reservation "z_load" 1
-  (and (eq_attr "cpu" "z900,g5,g6")
+  (and (eq_attr "cpu" "z900")
        (eq_attr "type" "load"))
   "z_e1,z_wr")
 
 (define_insn_reservation "z_store" 1
-  (and (eq_attr "cpu" "z900,g5,g6")
+  (and (eq_attr "cpu" "z900")
        (eq_attr "type" "store"))
   "z_e1,z_wr")
 
 (define_insn_reservation "z_sem" 2
-  (and (eq_attr "cpu" "z900,g5,g6")
+  (and (eq_attr "cpu" "z900")
        (eq_attr "type" "sem"))
   "z_e1*2,z_wr")
 
 (define_insn_reservation "z_call" 5
-  (and (eq_attr "cpu" "z900,g5,g6")
+  (and (eq_attr "cpu" "z900")
        (eq_attr "type" "jsr"))
   "z_e1*5,z_wr")
 
 (define_insn_reservation "z_mul" 5
-  (and (eq_attr "cpu" "g5,g6,z900")
+  (and (eq_attr "cpu" "z900")
        (eq_attr "type" "imulsi,imulhi"))
   "z_e1*5,z_wr")
 
 (define_insn_reservation "z_inf" 10
-  (and (eq_attr "cpu" "g5,g6,z900")
+  (and (eq_attr "cpu" "z900")
        (eq_attr "type" "idiv,imuldi"))
   "z_e1*10,z_wr")
 
 ;; For everything else we check the atype flag.
 
 (define_insn_reservation "z_int" 1
-  (and (eq_attr "cpu" "z900,g5,g6")
+  (and (eq_attr "cpu" "z900")
        (and (not (eq_attr "type" "la,larl,load,store,jsr"))
             (eq_attr "atype" "reg")))
   "z_e1,z_wr")
 
 (define_insn_reservation "z_agen" 1
-  (and (eq_attr "cpu" "z900,g5,g6")
+  (and (eq_attr "cpu" "z900")
        (and (not (eq_attr "type" "la,larl,load,store,jsr"))
             (eq_attr "atype" "agen")))
   "z_e1,z_wr")