static void sparc_option_override (void);
static void sparc_init_modes (void);
static void scan_record_type (const_tree, int *, int *, int *);
-static int function_arg_slotno (const CUMULATIVE_ARGS *, enum machine_mode,
+static int function_arg_slotno (const CUMULATIVE_ARGS *, machine_mode,
const_tree, bool, bool, int *, int *);
static int supersparc_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
static void sparc_output_addr_vec (rtx);
static void sparc_output_addr_diff_vec (rtx);
static void sparc_output_deferred_case_vectors (void);
-static bool sparc_legitimate_address_p (enum machine_mode, rtx, bool);
-static bool sparc_legitimate_constant_p (enum machine_mode, rtx);
+static bool sparc_legitimate_address_p (machine_mode, rtx, bool);
+static bool sparc_legitimate_constant_p (machine_mode, rtx);
static rtx sparc_builtin_saveregs (void);
static int epilogue_renumber (rtx *, int);
static bool sparc_assemble_integer (rtx, unsigned int, int);
static void sparc_fpu_init_builtins (void);
static void sparc_vis_init_builtins (void);
static tree sparc_builtin_decl (unsigned, bool);
-static rtx sparc_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
+static rtx sparc_expand_builtin (tree, rtx, rtx, machine_mode, int);
static tree sparc_fold_builtin (tree, int, tree *, bool);
static void sparc_output_mi_thunk (FILE *, tree, HOST_WIDE_INT,
HOST_WIDE_INT, tree);
static bool sparc_can_output_mi_thunk (const_tree, HOST_WIDE_INT,
HOST_WIDE_INT, const_tree);
static struct machine_function * sparc_init_machine_status (void);
-static bool sparc_cannot_force_const_mem (enum machine_mode, rtx);
+static bool sparc_cannot_force_const_mem (machine_mode, rtx);
static rtx sparc_tls_get_addr (void);
static rtx sparc_tls_got (void);
-static int sparc_register_move_cost (enum machine_mode,
+static int sparc_register_move_cost (machine_mode,
reg_class_t, reg_class_t);
static bool sparc_rtx_costs (rtx, int, int, int, int *, bool);
static rtx sparc_function_value (const_tree, const_tree, bool);
-static rtx sparc_libcall_value (enum machine_mode, const_rtx);
+static rtx sparc_libcall_value (machine_mode, const_rtx);
static bool sparc_function_value_regno_p (const unsigned int);
static rtx sparc_struct_value_rtx (tree, int);
-static enum machine_mode sparc_promote_function_mode (const_tree, enum machine_mode,
+static machine_mode sparc_promote_function_mode (const_tree, machine_mode,
int *, const_tree, int);
static bool sparc_return_in_memory (const_tree, const_tree);
static bool sparc_strict_argument_naming (cumulative_args_t);
static void sparc_va_start (tree, rtx);
static tree sparc_gimplify_va_arg (tree, tree, gimple_seq *, gimple_seq *);
-static bool sparc_vector_mode_supported_p (enum machine_mode);
+static bool sparc_vector_mode_supported_p (machine_mode);
static bool sparc_tls_referenced_p (rtx);
static rtx sparc_legitimize_tls_address (rtx);
static rtx sparc_legitimize_pic_address (rtx, rtx);
-static rtx sparc_legitimize_address (rtx, rtx, enum machine_mode);
+static rtx sparc_legitimize_address (rtx, rtx, machine_mode);
static rtx sparc_delegitimize_address (rtx);
static bool sparc_mode_dependent_address_p (const_rtx, addr_space_t);
static bool sparc_pass_by_reference (cumulative_args_t,
- enum machine_mode, const_tree, bool);
+ machine_mode, const_tree, bool);
static void sparc_function_arg_advance (cumulative_args_t,
- enum machine_mode, const_tree, bool);
+ machine_mode, const_tree, bool);
static rtx sparc_function_arg_1 (cumulative_args_t,
- enum machine_mode, const_tree, bool, bool);
+ machine_mode, const_tree, bool, bool);
static rtx sparc_function_arg (cumulative_args_t,
- enum machine_mode, const_tree, bool);
+ machine_mode, const_tree, bool);
static rtx sparc_function_incoming_arg (cumulative_args_t,
- enum machine_mode, const_tree, bool);
-static unsigned int sparc_function_arg_boundary (enum machine_mode,
+ machine_mode, const_tree, bool);
+static unsigned int sparc_function_arg_boundary (machine_mode,
const_tree);
static int sparc_arg_partial_bytes (cumulative_args_t,
- enum machine_mode, tree, bool);
+ machine_mode, tree, bool);
static void sparc_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED;
static void sparc_file_end (void);
static bool sparc_frame_pointer_required (void);
static const char *sparc_mangle_type (const_tree);
#endif
static void sparc_trampoline_init (rtx, tree, rtx);
-static enum machine_mode sparc_preferred_simd_mode (enum machine_mode);
+static machine_mode sparc_preferred_simd_mode (machine_mode);
static reg_class_t sparc_preferred_reload_class (rtx x, reg_class_t rclass);
static bool sparc_print_operand_punct_valid_p (unsigned char);
static void sparc_print_operand (FILE *, rtx, int);
static void sparc_print_operand_address (FILE *, rtx);
static reg_class_t sparc_secondary_reload (bool, rtx, reg_class_t,
- enum machine_mode,
+ machine_mode,
secondary_reload_info *);
-static enum machine_mode sparc_cstore_mode (enum insn_code icode);
+static machine_mode sparc_cstore_mode (enum insn_code icode);
static void sparc_atomic_assign_expand_fenv (tree *, tree *, tree *);
\f
#ifdef SUBTARGET_ATTRIBUTE_TABLE
/* Expand a move instruction. Return true if all work is done. */
bool
-sparc_expand_move (enum machine_mode mode, rtx *operands)
+sparc_expand_move (machine_mode mode, rtx *operands)
{
/* Handle sets of MEM first. */
if (GET_CODE (operands[0]) == MEM)
static void
sparc_emit_set_const32 (rtx op0, rtx op1)
{
- enum machine_mode mode = GET_MODE (op0);
+ machine_mode mode = GET_MODE (op0);
rtx temp = op0;
if (can_create_pseudo_p ())
is a PLUS, MINUS, NEG, or ASHIFT. CCmode should be used when no special
processing is needed. */
-enum machine_mode
+machine_mode
select_cc_mode (enum rtx_code op, rtx x, rtx y ATTRIBUTE_UNUSED)
{
if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
static rtx
gen_compare_reg_1 (enum rtx_code code, rtx x, rtx y)
{
- enum machine_mode mode;
+ machine_mode mode;
rtx cc_reg;
if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
not constant (TLS) or not known at final link time (PIC). */
static bool
-sparc_cannot_force_const_mem (enum machine_mode mode, rtx x)
+sparc_cannot_force_const_mem (machine_mode mode, rtx x)
{
switch (GET_CODE (x))
{
satisfies CONSTANT_P. */
static bool
-sparc_legitimate_constant_p (enum machine_mode mode, rtx x)
+sparc_legitimate_constant_p (machine_mode mode, rtx x)
{
switch (GET_CODE (x))
{
ordinarily. This changes a bit when generating PIC. */
static bool
-sparc_legitimate_address_p (enum machine_mode mode, rtx addr, bool strict)
+sparc_legitimate_address_p (machine_mode mode, rtx addr, bool strict)
{
rtx rs1 = NULL, rs2 = NULL, imm1 = NULL;
static rtx
sparc_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED,
- enum machine_mode mode)
+ machine_mode mode)
{
rtx orig_x = x;
operand or requires a scratch register. */
rtx
-sparc_legitimize_reload_address (rtx x, enum machine_mode mode,
+sparc_legitimize_reload_address (rtx x, machine_mode mode,
int opnum, int type,
int ind_levels ATTRIBUTE_UNUSED, int *win)
{
for (i = 0; i < NUM_MACHINE_MODES; i++)
{
- enum machine_mode m = (enum machine_mode) i;
+ machine_mode m = (machine_mode) i;
unsigned int size = GET_MODE_SIZE (m);
switch (GET_MODE_CLASS (m))
{
bool reg0 = save_p (i, leaf_function);
bool reg1 = save_p (i + 1, leaf_function);
- enum machine_mode mode;
+ machine_mode mode;
int regno;
if (reg0 && reg1)
/* Handle promotion of pointer and integer arguments. */
-static enum machine_mode
+static machine_mode
sparc_promote_function_mode (const_tree type,
- enum machine_mode mode,
+ machine_mode mode,
int *punsignedp,
const_tree fntype ATTRIBUTE_UNUSED,
int for_return ATTRIBUTE_UNUSED)
*PPADDING records the amount of padding needed in words. */
static int
-function_arg_slotno (const struct sparc_args *cum, enum machine_mode mode,
+function_arg_slotno (const struct sparc_args *cum, machine_mode mode,
const_tree type, bool named, bool incoming_p,
int *pregno, int *ppadding)
{
(const_tree, HOST_WIDE_INT, struct function_arg_record_value_parms *, bool);
static void function_arg_record_value_1
(const_tree, HOST_WIDE_INT, struct function_arg_record_value_parms *, bool);
-static rtx function_arg_record_value (const_tree, enum machine_mode, int, int, int);
-static rtx function_arg_union_value (int, enum machine_mode, int, int);
+static rtx function_arg_record_value (const_tree, machine_mode, int, int, int);
+static rtx function_arg_union_value (int, machine_mode, int, int);
/* A subroutine of function_arg_record_value. Traverse the structure
recursively and determine how many registers will be required. */
function_arg_record_value_3 (HOST_WIDE_INT bitpos,
struct function_arg_record_value_parms *parms)
{
- enum machine_mode mode;
+ machine_mode mode;
unsigned int regno;
unsigned int startbit, endbit;
int this_slotno, intslots, intoffset;
{
int this_slotno = parms->slotno + bitpos / BITS_PER_WORD;
int regno, nregs, pos;
- enum machine_mode mode = DECL_MODE (field);
+ machine_mode mode = DECL_MODE (field);
rtx reg;
function_arg_record_value_3 (bitpos, parms);
REGBASE is the regno of the base register for the parameter array. */
static rtx
-function_arg_record_value (const_tree type, enum machine_mode mode,
+function_arg_record_value (const_tree type, machine_mode mode,
int slotno, int named, int regbase)
{
HOST_WIDE_INT typesize = int_size_in_bytes (type);
REGNO is the hard register the union will be passed in. */
static rtx
-function_arg_union_value (int size, enum machine_mode mode, int slotno,
+function_arg_union_value (int size, machine_mode mode, int slotno,
int regno)
{
int nwords = ROUND_ADVANCE (size), i;
TARGET_FUNCTION_INCOMING_ARG. */
static rtx
-sparc_function_arg_1 (cumulative_args_t cum_v, enum machine_mode mode,
+sparc_function_arg_1 (cumulative_args_t cum_v, machine_mode mode,
const_tree type, bool named, bool incoming_p)
{
const CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
/* Handle the TARGET_FUNCTION_ARG target hook. */
static rtx
-sparc_function_arg (cumulative_args_t cum, enum machine_mode mode,
+sparc_function_arg (cumulative_args_t cum, machine_mode mode,
const_tree type, bool named)
{
return sparc_function_arg_1 (cum, mode, type, named, false);
/* Handle the TARGET_FUNCTION_INCOMING_ARG target hook. */
static rtx
-sparc_function_incoming_arg (cumulative_args_t cum, enum machine_mode mode,
+sparc_function_incoming_arg (cumulative_args_t cum, machine_mode mode,
const_tree type, bool named)
{
return sparc_function_arg_1 (cum, mode, type, named, true);
/* For sparc64, objects requiring 16 byte alignment are passed that way. */
static unsigned int
-sparc_function_arg_boundary (enum machine_mode mode, const_tree type)
+sparc_function_arg_boundary (machine_mode mode, const_tree type)
{
return ((TARGET_ARCH64
&& (GET_MODE_ALIGNMENT (mode) == 128
mode] will be split between that reg and memory. */
static int
-sparc_arg_partial_bytes (cumulative_args_t cum, enum machine_mode mode,
+sparc_arg_partial_bytes (cumulative_args_t cum, machine_mode mode,
tree type, bool named)
{
int slotno, regno, padding;
static bool
sparc_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED,
- enum machine_mode mode, const_tree type,
+ machine_mode mode, const_tree type,
bool named ATTRIBUTE_UNUSED)
{
if (TARGET_ARCH32)
TYPE is null for libcalls where that information may not be available. */
static void
-sparc_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode,
+sparc_function_arg_advance (cumulative_args_t cum_v, machine_mode mode,
const_tree type, bool named)
{
CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
argument slot. */
enum direction
-function_arg_padding (enum machine_mode mode, const_tree type)
+function_arg_padding (machine_mode mode, const_tree type)
{
if (TARGET_ARCH64 && type != 0 && AGGREGATE_TYPE_P (type))
return upward;
except that up to 32 bytes may be returned in registers. */
static rtx
-sparc_function_value_1 (const_tree type, enum machine_mode mode,
+sparc_function_value_1 (const_tree type, machine_mode mode,
bool outgoing)
{
/* Beware that the two values are swapped here wrt function_arg. */
/* Handle TARGET_LIBCALL_VALUE. */
static rtx
-sparc_libcall_value (enum machine_mode mode,
+sparc_libcall_value (machine_mode mode,
const_rtx fun ATTRIBUTE_UNUSED)
{
return sparc_function_value_1 (NULL_TREE, mode, false);
Specify whether the vector mode is supported by the hardware. */
static bool
-sparc_vector_mode_supported_p (enum machine_mode mode)
+sparc_vector_mode_supported_p (machine_mode mode)
{
return TARGET_VIS && VECTOR_MODE_P (mode) ? true : false;
}
\f
/* Implement the TARGET_VECTORIZE_PREFERRED_SIMD_MODE target hook. */
-static enum machine_mode
-sparc_preferred_simd_mode (enum machine_mode mode)
+static machine_mode
+sparc_preferred_simd_mode (machine_mode mode)
{
if (TARGET_VIS)
switch (mode)
static char string[64];
enum rtx_code code = GET_CODE (op);
rtx cc_reg = XEXP (op, 0);
- enum machine_mode mode = GET_MODE (cc_reg);
+ machine_mode mode = GET_MODE (cc_reg);
const char *labelno, *branch;
int spaces = 8, far;
char *p;
{
const char *qpfunc;
rtx slot0, slot1, result, tem, tem2, libfunc;
- enum machine_mode mode;
+ machine_mode mode;
enum rtx_code new_comparison;
switch (comparison)
optabs would emit if we didn't have TFmode patterns. */
void
-sparc_emit_floatunsdi (rtx *operands, enum machine_mode mode)
+sparc_emit_floatunsdi (rtx *operands, machine_mode mode)
{
rtx i0, i1, f0, in, out;
optabs would emit if we didn't have TFmode patterns. */
void
-sparc_emit_fixunsdi (rtx *operands, enum machine_mode mode)
+sparc_emit_fixunsdi (rtx *operands, machine_mode mode)
{
rtx i0, i1, f0, in, out, limit;
const char *
output_cbcond (rtx op, rtx dest, rtx_insn *insn)
{
- enum machine_mode mode = GET_MODE (XEXP (op, 0));
+ machine_mode mode = GET_MODE (XEXP (op, 0));
enum rtx_code code = GET_CODE (op);
const char *cond_str, *tmpl;
int far, emit_nop, len;
{
static char string[64];
enum rtx_code code = GET_CODE (op);
- enum machine_mode mode = GET_MODE (XEXP (op, 0));
+ machine_mode mode = GET_MODE (XEXP (op, 0));
rtx note;
int far;
char *p;
/* Return the widened memory access made of MEM1 and MEM2 in MODE. */
rtx
-widen_mem_for_ldd_peep (rtx mem1, rtx mem2, enum machine_mode mode)
+widen_mem_for_ldd_peep (rtx mem1, rtx mem2, machine_mode mode)
{
rtx x = widen_memory_access (mem1, mode, 0);
MEM_NOTRAP_P (x) = MEM_NOTRAP_P (mem1) && MEM_NOTRAP_P (mem2);
static rtx
sparc_expand_builtin (tree exp, rtx target,
rtx subtarget ATTRIBUTE_UNUSED,
- enum machine_mode tmode ATTRIBUTE_UNUSED,
+ machine_mode tmode ATTRIBUTE_UNUSED,
int ignore ATTRIBUTE_UNUSED)
{
tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
if (nonvoid)
{
- enum machine_mode tmode = insn_data[icode].operand[0].mode;
+ machine_mode tmode = insn_data[icode].operand[0].mode;
if (!target
|| GET_MODE (target) != tmode
|| ! (*insn_data[icode].operand[0].predicate) (target, tmode))
sparc_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED,
int *total, bool speed ATTRIBUTE_UNUSED)
{
- enum machine_mode mode = GET_MODE (x);
+ machine_mode mode = GET_MODE (x);
bool float_mode_p = FLOAT_MODE_P (mode);
switch (code)
/* Implement TARGET_REGISTER_MOVE_COST. */
static int
-sparc_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED,
+sparc_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED,
reg_class_t from, reg_class_t to)
{
bool need_memory = false;
sparc_expand_compare_and_swap (rtx operands[])
{
rtx bval, retval, mem, oldval, newval;
- enum machine_mode mode;
+ machine_mode mode;
enum memmodel model;
bval = operands[0];
}
void
-sparc_expand_vec_perm_bmask (enum machine_mode vmode, rtx sel)
+sparc_expand_vec_perm_bmask (machine_mode vmode, rtx sel)
{
rtx t_1, t_2, t_3;
static reg_class_t
sparc_preferred_reload_class (rtx x, reg_class_t rclass)
{
- enum machine_mode mode = GET_MODE (x);
+ machine_mode mode = GET_MODE (x);
if (CONSTANT_P (x))
{
if (FP_REG_CLASS_P (rclass)
and INNER_MODE are the modes describing TARGET. */
static void
-vector_init_bshuffle (rtx target, rtx elt, enum machine_mode mode,
- enum machine_mode inner_mode)
+vector_init_bshuffle (rtx target, rtx elt, machine_mode mode,
+ machine_mode inner_mode)
{
rtx t1, final_insn, sel;
int bmask;
void
sparc_expand_vector_init (rtx target, rtx vals)
{
- const enum machine_mode mode = GET_MODE (target);
- const enum machine_mode inner_mode = GET_MODE_INNER (mode);
+ const machine_mode mode = GET_MODE (target);
+ const machine_mode inner_mode = GET_MODE_INNER (mode);
const int n_elts = GET_MODE_NUNITS (mode);
int i, n_var = 0;
bool all_same;
static reg_class_t
sparc_secondary_reload (bool in_p, rtx x, reg_class_t rclass_i,
- enum machine_mode mode, secondary_reload_info *sri)
+ machine_mode mode, secondary_reload_info *sri)
{
enum reg_class rclass = (enum reg_class) rclass_i;
OPERANDS[0] in MODE. OPERANDS[1] is the operator of the condition. */
bool
-sparc_expand_conditional_move (enum machine_mode mode, rtx *operands)
+sparc_expand_conditional_move (machine_mode mode, rtx *operands)
{
enum rtx_code rc = GET_CODE (operands[1]);
- enum machine_mode cmp_mode;
+ machine_mode cmp_mode;
rtx cc_reg, dst, cmp;
cmp = operands[1];
code to be used for the condition mask. */
void
-sparc_expand_vcond (enum machine_mode mode, rtx *operands, int ccode, int fcode)
+sparc_expand_vcond (machine_mode mode, rtx *operands, int ccode, int fcode)
{
rtx mask, cop0, cop1, fcmp, cmask, bshuf, gsr;
enum rtx_code code = GET_CODE (operands[3]);
registers should return 4 here. */
unsigned int
-sparc_regmode_natural_size (enum machine_mode mode)
+sparc_regmode_natural_size (machine_mode mode)
{
int size = UNITS_PER_WORD;
point registers are 32-bit addressable. */
bool
-sparc_modes_tieable_p (enum machine_mode mode1, enum machine_mode mode2)
+sparc_modes_tieable_p (machine_mode mode1, machine_mode mode2)
{
enum mode_class mclass1, mclass2;
unsigned short size1, size2;
/* Implement TARGET_CSTORE_MODE. */
-static enum machine_mode
+static machine_mode
sparc_cstore_mode (enum insn_code icode ATTRIBUTE_UNUSED)
{
return (TARGET_ARCH64 ? DImode : SImode);
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