Turn HARD_REGNO_MODE_OK into a target hook

[thirdparty/gcc.git] / gcc / config / sparc / sparc.h

diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h
index 15a62179af57591c7197c68822f9aa31ca38a3ea..b4c3dab6646a76b5e727bac6c35f67626cf12e92 100644 (file)
--- a/gcc/config/sparc/sparc.h
+++ b/gcc/config/sparc/sparc.h
@@ -768,17 +768,6 @@ extern enum cmodel sparc_cmodel;
    macro too.  */
 #define REGMODE_NATURAL_SIZE(MODE) sparc_regmode_natural_size (MODE)
 
-/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
-   See sparc.c for how we initialize this.  */
-extern const int *hard_regno_mode_classes;
-extern int sparc_mode_class[];
-
-/* ??? Because of the funny way we pass parameters we should allow certain
-   ??? types of float/complex values to be in integer registers during
-   ??? RTL generation.  This only matters on arch32.  */
-#define HARD_REGNO_MODE_OK(REGNO, MODE) \
-  ((hard_regno_mode_classes[REGNO] & sparc_mode_class[MODE]) != 0)
-
 /* Value is 1 if it is OK to rename a hard register FROM to another hard
    register TO.  We cannot rename %g1 as it may be used before the save
    register window instruction in the prologue.  */
@@ -878,10 +867,10 @@ extern int sparc_mode_class[];
 
    For v9 we must distinguish between the upper and lower floating point
    registers because the upper ones can't hold SFmode values.
-   HARD_REGNO_MODE_OK won't help here because reload assumes that register(s)
-   satisfying a group need for a class will also satisfy a single need for
-   that class.  EXTRA_FP_REGS is a bit of a misnomer as it covers all 64 fp
-   regs.
+   TARGET_HARD_REGNO_MODE_OK won't help here because reload assumes that
+   register(s) satisfying a group need for a class will also satisfy a
+   single need for that class.  EXTRA_FP_REGS is a bit of a misnomer as
+   it covers all 64 fp regs.
 
    It is important that one class contains all the general and all the standard
    fp regs.  Otherwise find_reg() won't properly allocate int regs for moves,