(UNSPEC_DFTSV 51)
(UNSPEC_FLOAT_EXTEND 52)
(UNSPEC_FLOAT_TRUNCATE 53)
+ (UNSPEC_SP_SET 54)
+ (UNSPEC_SP_TEST 55)
])
(include "predicates.md")
DONE;
}")
+(define_insn "stack_protect_set"
+ [(set (match_operand:SI 0 "spu_mem_operand" "=m")
+ (unspec:SI [(match_operand:SI 1 "spu_mem_operand" "m")] UNSPEC_SP_SET))
+ (set (match_scratch:SI 2 "=&r") (const_int 0))]
+ ""
+ "lq%p1\t%2,%1\;stq%p0\t%2,%0\;xor\t%2,%2,%2"
+ [(set_attr "length" "12")
+ (set_attr "type" "multi1")]
+)
+
+(define_expand "stack_protect_test"
+ [(match_operand 0 "spu_mem_operand" "")
+ (match_operand 1 "spu_mem_operand" "")
+ (match_operand 2 "" "")]
+ ""
+{
+ rtx compare_result;
+ rtx bcomp, loc_ref;
+
+ compare_result = gen_reg_rtx (SImode);
+
+ emit_insn (gen_stack_protect_test_si (compare_result,
+ operands[0],
+ operands[1]));
+
+ bcomp = gen_rtx_NE (SImode, compare_result, const0_rtx);
+
+ loc_ref = gen_rtx_LABEL_REF (VOIDmode, operands[2]);
+
+ emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx,
+ gen_rtx_IF_THEN_ELSE (VOIDmode, bcomp,
+ loc_ref, pc_rtx)));
+
+ DONE;
+})
+
+(define_insn "stack_protect_test_si"
+ [(set (match_operand:SI 0 "spu_reg_operand" "=&r")
+ (unspec:SI [(match_operand:SI 1 "spu_mem_operand" "m")
+ (match_operand:SI 2 "spu_mem_operand" "m")]
+ UNSPEC_SP_TEST))
+ (set (match_scratch:SI 3 "=&r") (const_int 0))]
+ ""
+ "lq%p1\t%0,%1\;lq%p2\t%3,%2\;ceq\t%0,%0,%3\;xor\t%3,%3,%3"
+ [(set_attr "length" "16")
+ (set_attr "type" "multi1")]
+)