Wrap option names in gcc internal messages with %< and %>.

[thirdparty/gcc.git] / gcc / config / visium / visium.c

diff --git a/gcc/config/visium/visium.c b/gcc/config/visium/visium.c
index 39f6ab3bd1e5f174b7cc2cf3f85d5a6e73c2fbfa..431f64cfcad3351f39dd42c38d1d72e2f68b6f35 100644 (file)
--- a/gcc/config/visium/visium.c
+++ b/gcc/config/visium/visium.c
@@ -419,9 +419,9 @@ static void
 visium_option_override (void)
 {
   if (flag_pic == 1)
-    warning (OPT_fpic, "-fpic is not supported");
+    warning (OPT_fpic, "%<-fpic%> is not supported");
   if (flag_pic == 2)
-    warning (OPT_fPIC, "-fPIC is not supported");
+    warning (OPT_fPIC, "%<-fPIC%> is not supported");
 
   /* MCM is the default in the GR5/GR6 era.  */
   target_flags |= MASK_MCM;
@@ -484,20 +484,6 @@ visium_option_override (void)
       else
        str_align_jumps = "8";
     }
-
-  /* We register a machine-specific pass.  This pass must be scheduled as
-     late as possible so that we have the (essentially) final form of the
-     insn stream to work on.  Registering the pass must be done at start up.
-     It's convenient to do it here.  */
-  opt_pass *visium_reorg_pass = make_pass_visium_reorg (g);
-  struct register_pass_info insert_pass_visium_reorg =
-    {
-      visium_reorg_pass,               /* pass */
-      "dbr",                           /* reference_pass_name */
-      1,                               /* ref_pass_instance_number */
-      PASS_POS_INSERT_AFTER            /* po_op */
-    };
-  register_pass (&insert_pass_visium_reorg);
 }
 
 /* Register the Visium-specific libfuncs with the middle-end.  */
@@ -742,7 +728,7 @@ visium_handle_interrupt_attr (tree *node, tree name,
     }
   else if (!TARGET_SV_MODE)
     {
-      error ("an interrupt handler cannot be compiled with -muser-mode");
+      error ("an interrupt handler cannot be compiled with %<-muser-mode%>");
       *no_add_attrs = true;
     }
 
@@ -2725,6 +2711,7 @@ visium_trampoline_init (rtx m_tramp, tree fndecl, rtx static_chain)
 
        moviu   r9,%u FUNCTION
        movil   r9,%l FUNCTION
+       [nop]
        moviu   r20,%u STATIC
        bra     tr,r9,r9
         movil   r20,%l STATIC
@@ -2745,6 +2732,14 @@ visium_trampoline_init (rtx m_tramp, tree fndecl, rtx static_chain)
                                             NULL_RTX),
                                 0x04890000));
 
+  if (visium_cpu == PROCESSOR_GR6)
+    {
+      /* For the GR6, the BRA insn must be aligned on a 64-bit boundary.  */
+      gcc_assert (TRAMPOLINE_ALIGNMENT >= 64);
+      emit_move_insn (gen_rtx_MEM (SImode, plus_constant (Pmode, addr, 12)),
+                     gen_int_mode (0, SImode));
+    }
+
   emit_move_insn (gen_rtx_MEM (SImode, plus_constant (Pmode, addr, 8)),
                  plus_constant (SImode,
                                 expand_shift (RSHIFT_EXPR, SImode,
@@ -3059,9 +3054,9 @@ output_branch (rtx label, const char *cond, rtx_insn *insn)
   gcc_assert (cond);
   operands[0] = label;
 
-  /* If the length of the instruction is greater than 8, then this is a
+  /* If the length of the instruction is greater than 12, then this is a
      long branch and we need to work harder to emit it properly.  */
-  if (get_attr_length (insn) > 8)
+  if (get_attr_length (insn) > 12)
     {
       bool spilled;