object size, for example in functions that call @code{__builtin_object_size}.
@xref{Object Size Checking}.
+Note that the @code{access} attribute merely specifies how an object
+referenced by the pointer argument can be accessed; it does not imply that
+an access @strong{will} happen. Also, the @code{access} attribute does not
+imply the attribute @code{nonnull}; it may be appropriate to add both attributes
+at the declaration of a function that unconditionally manipulates a buffer via
+a pointer argument. See the @code{nonnull} attribute for more information and
+caveats.
+
@item alias ("@var{target}")
@cindex @code{alias} function attribute
The @code{alias} attribute causes the declaration to be emitted as an alias
of the section to record function entry instrumentation calls in when
enabled with @option{-pg -mrecord-mcount}
+@item nodirect_extern_access
+@cindex @code{nodirect_extern_access} function attribute
+@opindex mno-direct-extern-access
+This attribute, attached to a global variable or function, is the
+counterpart to option @option{-mno-direct-extern-access}.
+
@end table
@node Xstormy16 Function Attributes
@code{expl}, @code{fabsf}, @code{fabsl}, @code{floorf}, @code{floorl},
@code{fmodf}, @code{fmodl}, @code{frexpf}, @code{frexpl}, @code{ldexpf},
@code{ldexpl}, @code{log10f}, @code{log10l}, @code{logf}, @code{logl},
-@code{modfl}, @code{modf}, @code{powf}, @code{powl}, @code{sinf},
+@code{modfl}, @code{modff}, @code{powf}, @code{powl}, @code{sinf},
@code{sinhf}, @code{sinhl}, @code{sinl}, @code{sqrtf}, @code{sqrtl},
@code{tanf}, @code{tanhf}, @code{tanhl} and @code{tanl}
that are recognized in any mode since ISO C90 reserves these names for
@code{feraiseexcept}. They may not be available for all targets, and because
they need close interaction with libc internal values, they may not be available
for all target libcs, but in all cases they will gracefully fallback to libc
-calls. This built-in functions appear both with and without the
+calls. These built-in functions appear both with and without the
@code{__builtin_} prefix.
@deftypefn {Built-in Function} void *__builtin_alloca (size_t size)
This built-in-function is useful if the padding bits of an object might
have intederminate values and the object representation needs to be
bitwise compared to some other object, for example for atomic operations.
+
+For C++, @var{ptr} argument type should be pointer to trivially-copyable
+type, unless the argument is address of a variable or parameter, because
+otherwise it isn't known if the type isn't just a base class whose padding
+bits are reused or laid out differently in a derived class.
@end deftypefn
@deftypefn {Built-in Function} @var{type} __builtin_bit_cast (@var{type}, @var{arg})
* SH Built-in Functions::
* SPARC VIS Built-in Functions::
* TI C6X Built-in Functions::
-* TILE-Gx Built-in Functions::
-* TILEPro Built-in Functions::
* x86 Built-in Functions::
* x86 transactional memory intrinsics::
* x86 control-flow protection intrinsics::
that use a future architecture instruction set (@option{-mcpu=power10}):
@smallexample
-@exdent unsigned long long int
-@exdent __builtin_cfuged (unsigned long long int, unsigned long long int)
+@exdent unsigned long long
+@exdent __builtin_cfuged (unsigned long long, unsigned long long)
@end smallexample
Perform a 64-bit centrifuge operation, as if implemented by the
@code{cfuged} instruction.
@findex __builtin_cfuged
@smallexample
-@exdent unsigned long long int
-@exdent __builtin_cntlzdm (unsigned long long int, unsigned long long int)
+@exdent unsigned long long
+@exdent __builtin_cntlzdm (unsigned long long, unsigned long long)
@end smallexample
Perform a 64-bit count leading zeros operation under mask, as if
implemented by the @code{cntlzdm} instruction.
@findex __builtin_cntlzdm
@smallexample
-@exdent unsigned long long int
-@exdent __builtin_cnttzdm (unsigned long long int, unsigned long long int)
+@exdent unsigned long long
+@exdent __builtin_cnttzdm (unsigned long long, unsigned long long)
@end smallexample
Perform a 64-bit count trailing zeros operation under mask, as if
implemented by the @code{cnttzdm} instruction.
@findex __builtin_cnttzdm
@smallexample
-@exdent unsigned long long int
-@exdent __builtin_pdepd (unsigned long long int, unsigned long long int)
+@exdent unsigned long long
+@exdent __builtin_pdepd (unsigned long long, unsigned long long)
@end smallexample
Perform a 64-bit parallel bits deposit operation, as if implemented by the
@code{pdepd} instruction.
@findex __builtin_pdepd
@smallexample
-@exdent unsigned long long int
-@exdent __builtin_pextd (unsigned long long int, unsigned long long int)
+@exdent unsigned long long
+@exdent __builtin_pextd (unsigned long long, unsigned long long)
@end smallexample
Perform a 64-bit parallel bits extract operation, as if implemented by the
@code{pextd} instruction.
@findex __builtin_pextd
@smallexample
-@exdent vector signed __int128 vsx_xl_sext (signed long long, signed char *);
-@exdent vector signed __int128 vsx_xl_sext (signed long long, signed short *);
-@exdent vector signed __int128 vsx_xl_sext (signed long long, signed int *);
-@exdent vector signed __int128 vsx_xl_sext (signed long long, signed long long *);
-@exdent vector unsigned __int128 vsx_xl_zext (signed long long, unsigned char *);
-@exdent vector unsigned __int128 vsx_xl_zext (signed long long, unsigned short *);
-@exdent vector unsigned __int128 vsx_xl_zext (signed long long, unsigned int *);
-@exdent vector unsigned __int128 vsx_xl_zext (signed long long, unsigned long long *);
+@exdent vector signed __int128 vsx_xl_sext (signed long long, signed char *)
+
+@exdent vector signed __int128 vsx_xl_sext (signed long long, signed short *)
+
+@exdent vector signed __int128 vsx_xl_sext (signed long long, signed int *)
+
+@exdent vector signed __int128 vsx_xl_sext (signed long long, signed long long *)
+
+@exdent vector unsigned __int128 vsx_xl_zext (signed long long, unsigned char *)
+
+@exdent vector unsigned __int128 vsx_xl_zext (signed long long, unsigned short *)
+
+@exdent vector unsigned __int128 vsx_xl_zext (signed long long, unsigned int *)
+
+@exdent vector unsigned __int128 vsx_xl_zext (signed long long, unsigned long long *)
@end smallexample
Load (and sign extend) to an __int128 vector, as if implemented by the ISA 3.1
-@code{lxvrbx} @code{lxvrhx} @code{lxvrwx} @code{lxvrdx} instructions.
+@code{lxvrbx}, @code{lxvrhx}, @code{lxvrwx}, and @code{lxvrdx} instructions.
@findex vsx_xl_sext
@findex vsx_xl_zext
@smallexample
-@exdent void vec_xst_trunc (vector signed __int128, signed long long, signed char *);
-@exdent void vec_xst_trunc (vector signed __int128, signed long long, signed short *);
-@exdent void vec_xst_trunc (vector signed __int128, signed long long, signed int *);
-@exdent void vec_xst_trunc (vector signed __int128, signed long long, signed long long *);
-@exdent void vec_xst_trunc (vector unsigned __int128, signed long long, unsigned char *);
-@exdent void vec_xst_trunc (vector unsigned __int128, signed long long, unsigned short *);
-@exdent void vec_xst_trunc (vector unsigned __int128, signed long long, unsigned int *);
-@exdent void vec_xst_trunc (vector unsigned __int128, signed long long, unsigned long long *);
+@exdent void vec_xst_trunc (vector signed __int128, signed long long, signed char *)
+
+@exdent void vec_xst_trunc (vector signed __int128, signed long long, signed short *)
+
+@exdent void vec_xst_trunc (vector signed __int128, signed long long, signed int *)
+
+@exdent void vec_xst_trunc (vector signed __int128, signed long long, signed long long *)
+
+@exdent void vec_xst_trunc (vector unsigned __int128, signed long long, unsigned char *)
+
+@exdent void vec_xst_trunc (vector unsigned __int128, signed long long, unsigned short *)
+
+@exdent void vec_xst_trunc (vector unsigned __int128, signed long long, unsigned int *)
+
+@exdent void vec_xst_trunc (vector unsigned __int128, signed long long, unsigned long long *)
@end smallexample
Truncate and store the rightmost element of a vector, as if implemented by the
-ISA 3.1 @code{stxvrbx} @code{stxvrhx} @code{stxvrwx} @code{stxvrdx} instructions.
+ISA 3.1 @code{stxvrbx}, @code{stxvrhx}, @code{stxvrwx}, and @code{stxvrdx}
+instructions.
@findex vec_xst_trunc
@node PowerPC AltiVec/VSX Built-in Functions
int _abs2 (int);
@end smallexample
-@node TILE-Gx Built-in Functions
-@subsection TILE-Gx Built-in Functions
-
-GCC provides intrinsics to access every instruction of the TILE-Gx
-processor. The intrinsics are of the form:
-
-@smallexample
-
-unsigned long long __insn_@var{op} (...)
-
-@end smallexample
-
-Where @var{op} is the name of the instruction. Refer to the ISA manual
-for the complete list of instructions.
-
-GCC also provides intrinsics to directly access the network registers.
-The intrinsics are:
-
-@smallexample
-unsigned long long __tile_idn0_receive (void);
-unsigned long long __tile_idn1_receive (void);
-unsigned long long __tile_udn0_receive (void);
-unsigned long long __tile_udn1_receive (void);
-unsigned long long __tile_udn2_receive (void);
-unsigned long long __tile_udn3_receive (void);
-void __tile_idn_send (unsigned long long);
-void __tile_udn_send (unsigned long long);
-@end smallexample
-
-The intrinsic @code{void __tile_network_barrier (void)} is used to
-guarantee that no network operations before it are reordered with
-those after it.
-
-@node TILEPro Built-in Functions
-@subsection TILEPro Built-in Functions
-
-GCC provides intrinsics to access every instruction of the TILEPro
-processor. The intrinsics are of the form:
-
-@smallexample
-
-unsigned __insn_@var{op} (...)
-
-@end smallexample
-
-@noindent
-where @var{op} is the name of the instruction. Refer to the ISA manual
-for the complete list of instructions.
-
-GCC also provides intrinsics to directly access the network registers.
-The intrinsics are:
-
-@smallexample
-unsigned __tile_idn0_receive (void);
-unsigned __tile_idn1_receive (void);
-unsigned __tile_sn_receive (void);
-unsigned __tile_udn0_receive (void);
-unsigned __tile_udn1_receive (void);
-unsigned __tile_udn2_receive (void);
-unsigned __tile_udn3_receive (void);
-void __tile_idn_send (unsigned);
-void __tile_sn_send (unsigned);
-void __tile_udn_send (unsigned);
-@end smallexample
-
-The intrinsic @code{void __tile_network_barrier (void)} is used to
-guarantee that no network operations before it are reordered with
-those after it.
-
@node x86 Built-in Functions
@subsection x86 Built-in Functions
@item knm
Intel Knights Mill CPU.
+@item lujiazui
+ZHAOXIN lujiazui CPU.
+
@item amdfam10h
AMD Family 10h CPU.
@item __has_trivial_assign (type)
If @code{type} is @code{const}- qualified or is a reference type then
-the trait is @code{false}. Otherwise if @code{__is_pod (type)} is
+the trait is @code{false}. Otherwise if @code{__is_trivial (type)} is
@code{true} then the trait is @code{true}, else if @code{type} is
a cv-qualified class or union type with a trivial copy assignment
([class.copy]) then the trait is @code{true}, else it is @code{false}.
@code{void}, or an array of unknown bound.
@item __has_trivial_copy (type)
-If @code{__is_pod (type)} is @code{true} or @code{type} is a reference
+If @code{__is_trivial (type)} is @code{true} or @code{type} is a reference
type then the trait is @code{true}, else if @code{type} is a cv class
or union type with a trivial copy constructor ([class.copy]) then the trait
is @code{true}, else it is @code{false}. Requires: @code{type} shall be
bound.
@item __has_trivial_constructor (type)
-If @code{__is_pod (type)} is @code{true} then the trait is @code{true},
+If @code{__is_trivial (type)} is @code{true} then the trait is @code{true},
else if @code{type} is a cv-qualified class or union type (or array thereof)
with a trivial default constructor ([class.ctor]) then the trait is @code{true},
else it is @code{false}.
@code{void}, or an array of unknown bound.
@item __has_trivial_destructor (type)
-If @code{__is_pod (type)} is @code{true} or @code{type} is a reference type
+If @code{__is_trivial (type)} is @code{true} or @code{type} is a reference type
then the trait is @code{true}, else if @code{type} is a cv class or union
type (or array thereof) with a trivial destructor ([class.dtor]) then
the trait is @code{true}, else it is @code{false}.
projects / thirdparty / gcc.git / blobdiff