-@c Copyright (C) 1988-2018 Free Software Foundation, Inc.
+@c Copyright (C) 1988-2019 Free Software Foundation, Inc.
@c This is part of the GCC manual.
@c For copying conditions, see the file gcc.texi.
@c man end
@c man begin COPYRIGHT
-Copyright @copyright{} 1988-2018 Free Software Foundation, Inc.
+Copyright @copyright{} 1988-2019 Free Software Foundation, Inc.
Permission is granted to copy, distribute and/or modify this document
under the terms of the GNU Free Documentation License, Version 1.3 or
-fvisibility-ms-compat @gol
-fext-numeric-literals @gol
-Wabi=@var{n} -Wabi-tag -Wconversion-null -Wctor-dtor-privacy @gol
--Wdelete-non-virtual-dtor -Wdeprecated-copy -Wliteral-suffix @gol
--Wmultiple-inheritance -Wno-init-list-lifetime @gol
+-Wdelete-non-virtual-dtor -Wdeprecated-copy -Wdeprecated-copy-dtor @gol
+-Wliteral-suffix @gol
+-Wmultiple-inheritance -Wno-init-list-lifetime @gol
-Wnamespaces -Wnarrowing @gol
-Wpessimizing-move -Wredundant-move @gol
-Wnoexcept -Wnoexcept-type -Wclass-memaccess @gol
@gccoptlist{-fmessage-length=@var{n} @gol
-fdiagnostics-show-location=@r{[}once@r{|}every-line@r{]} @gol
-fdiagnostics-color=@r{[}auto@r{|}never@r{|}always@r{]} @gol
+-fdiagnostics-format=@r{[}text@r{|}json@r{]} @gol
-fno-diagnostics-show-option -fno-diagnostics-show-caret @gol
--fno-diagnostics-show-labels -fno-diagnostics-show-line-numbers @gol
+-fno-diagnostics-show-labels -fno-diagnostics-show-line-numbers @gol
-fdiagnostics-minimum-margin-width=@var{width} @gol
-fdiagnostics-parseable-fixits -fdiagnostics-generate-patch @gol
--fdiagnostics-show-template-tree -fno-elide-type @gol
+-fdiagnostics-show-template-tree -fno-elide-type @gol
-fno-show-column}
@item Warning Options
@xref{Warning Options,,Options to Request or Suppress Warnings}.
@gccoptlist{-fsyntax-only -fmax-errors=@var{n} -Wpedantic @gol
-pedantic-errors @gol
--w -Wextra -Wall -Waddress -Waggregate-return -Waligned-new @gol
--Walloc-zero -Walloc-size-larger-than=@var{byte-size}
+-w -Wextra -Wall -Waddress -Waddress-of-packed-member @gol
+-Waggregate-return -Waligned-new @gol
+-Walloc-zero -Walloc-size-larger-than=@var{byte-size} @gol
-Walloca -Walloca-larger-than=@var{byte-size} @gol
-Wno-aggressive-loop-optimizations -Warray-bounds -Warray-bounds=@var{n} @gol
--Wno-attributes -Wbool-compare -Wbool-operation @gol
+-Wno-attributes -Wno-attribute-alias @gol
+-Wbool-compare -Wbool-operation @gol
-Wno-builtin-declaration-mismatch @gol
-Wno-builtin-macro-redefined -Wc90-c99-compat -Wc99-c11-compat @gol
-Wc++-compat -Wc++11-compat -Wc++14-compat -Wc++17-compat @gol
-Werror -Werror=* -Wextra-semi -Wfatal-errors @gol
-Wfloat-equal -Wformat -Wformat=2 @gol
-Wno-format-contains-nul -Wno-format-extra-args @gol
--Wformat-nonliteral -Wformat-overflow=@var{n} @gol
+-Wformat-nonliteral -Wformat-overflow=@var{n} @gol
-Wformat-security -Wformat-signedness -Wformat-truncation=@var{n} @gol
-Wformat-y2k -Wframe-address @gol
-Wframe-larger-than=@var{byte-size} -Wno-free-nonheap-object @gol
-Wjump-misses-init @gol
--Wif-not-aligned @gol
+-Whsa -Wif-not-aligned @gol
-Wignored-qualifiers -Wignored-attributes -Wincompatible-pointer-types @gol
-Wimplicit -Wimplicit-fallthrough -Wimplicit-fallthrough=@var{n} @gol
-Wimplicit-function-declaration -Wimplicit-int @gol
-Winvalid-pch -Wlarger-than=@var{byte-size} @gol
-Wlogical-op -Wlogical-not-parentheses -Wlong-long @gol
-Wmain -Wmaybe-uninitialized -Wmemset-elt-size -Wmemset-transposed-args @gol
--Wmisleading-indentation -Wmissing-attributes -Wmissing-braces @gol
--Wmissing-field-initializers -Wmissing-include-dirs -Wmissing-profile @gol
+-Wmisleading-indentation -Wno-missing-attributes -Wmissing-braces @gol
+-Wmissing-field-initializers -Wmissing-format-attribute @gol
+-Wmissing-include-dirs -Wmissing-noreturn -Wmissing-profile @gol
-Wno-multichar -Wmultistatement-macros -Wnonnull -Wnonnull-compare @gol
-Wnormalized=@r{[}none@r{|}id@r{|}nfc@r{|}nfkc@r{]} @gol
-Wnull-dereference -Wodr -Wno-overflow -Wopenmp-simd @gol
-Woverride-init-side-effects -Woverlength-strings @gol
--Wpacked -Wpacked-bitfield-compat -Wpacked-not-aligned -Wpadded @gol
+-Wpacked -Wpacked-bitfield-compat -Wpacked-not-aligned -Wpadded @gol
-Wparentheses -Wno-pedantic-ms-format @gol
-Wplacement-new -Wplacement-new=@var{n} @gol
-Wpointer-arith -Wpointer-compare -Wno-pointer-to-int-cast @gol
--Wno-pragmas -Wno-prio-ctor-dtor -Wredundant-decls @gol
+-Wno-pragmas -Wno-prio-ctor-dtor -Wredundant-decls @gol
-Wrestrict -Wno-return-local-addr @gol
-Wreturn-type -Wsequence-point -Wshadow -Wno-shadow-ivar @gol
-Wshadow=global, -Wshadow=local, -Wshadow=compatible-local @gol
-Wsizeof-pointer-memaccess -Wsizeof-array-argument @gol
-Wstack-protector -Wstack-usage=@var{byte-size} -Wstrict-aliasing @gol
-Wstrict-aliasing=n -Wstrict-overflow -Wstrict-overflow=@var{n} @gol
--Wstringop-overflow=@var{n} -Wstringop-truncation @gol
+-Wstringop-overflow=@var{n} -Wstringop-truncation -Wsubobject-linkage @gol
-Wsuggest-attribute=@r{[}pure@r{|}const@r{|}noreturn@r{|}format@r{|}malloc@r{]} @gol
-Wsuggest-final-types @gol -Wsuggest-final-methods -Wsuggest-override @gol
--Wmissing-format-attribute -Wsubobject-linkage @gol
-Wswitch -Wswitch-bool -Wswitch-default -Wswitch-enum @gol
-Wswitch-unreachable -Wsync-nand @gol
-Wsystem-headers -Wtautological-compare -Wtrampolines -Wtrigraphs @gol
-Wuseless-cast -Wvariadic-macros -Wvector-operation-performance @gol
-Wvla -Wvla-larger-than=@var{byte-size} -Wvolatile-register-var @gol
-Wwrite-strings @gol
--Wzero-as-null-pointer-constant -Whsa}
+-Wzero-as-null-pointer-constant}
@item C and Objective-C-only Warning Options
@gccoptlist{-Wbad-function-cast -Wmissing-declarations @gol
-ginternal-reset-location-views -gno-internal-reset-location-views @gol
-ginline-points -gno-inline-points @gol
-gvms -gxcoff -gxcoff+ -gz@r{[}=@var{type}@r{]} @gol
--gsplit-dwarf -gdescribe-dies -gno-describe-dies @gol
+-gsplit-dwarf -gdescribe-dies -gno-describe-dies @gol
-fdebug-prefix-map=@var{old}=@var{new} -fdebug-types-section @gol
-fno-eliminate-unused-debug-types @gol
-femit-struct-debug-baseonly -femit-struct-debug-reduced @gol
-fif-conversion2 -findirect-inlining @gol
-finline-functions -finline-functions-called-once -finline-limit=@var{n} @gol
-finline-small-functions -fipa-cp -fipa-cp-clone @gol
--fipa-bit-cp -fipa-vrp @gol
--fipa-pta -fipa-profile -fipa-pure-const -fipa-reference -fipa-reference-addressable @gol
--fipa-icf -fira-algorithm=@var{algorithm} @gol
+-fipa-bit-cp -fipa-vrp -fipa-pta -fipa-profile -fipa-pure-const @gol
+-fipa-reference -fipa-reference-addressable @gol
+-fipa-stack-alignment -fipa-icf -fira-algorithm=@var{algorithm} @gol
+-flive-patching=@var{level} @gol
-fira-region=@var{region} -fira-hoist-pressure @gol
-fira-loop-pressure -fno-ira-share-save-slots @gol
-fno-ira-share-spill-slots @gol
@gccoptlist{-p -pg -fprofile-arcs --coverage -ftest-coverage @gol
-fprofile-abs-path @gol
-fprofile-dir=@var{path} -fprofile-generate -fprofile-generate=@var{path} @gol
+-fprofile-update=@var{method} -fprofile-filter-files=@var{regex} @gol
+-fprofile-exclude-files=@var{regex} @gol
-fsanitize=@var{style} -fsanitize-recover -fsanitize-recover=@var{style} @gol
-fasan-shadow-offset=@var{number} -fsanitize-sections=@var{s1},@var{s2},... @gol
-fsanitize-undefined-trap-on-error -fbounds-check @gol
-dD -dI -dM -dN -dU @gol
-fdebug-cpp -fdirectives-only -fdollars-in-identifiers @gol
-fexec-charset=@var{charset} -fextended-identifiers @gol
--finput-charset=@var{charset} -fmacro-prefix-map=@var{old}=@var{new} @gol
--fno-canonical-system-headers @gol -fpch-deps -fpch-preprocess @gol
--fpreprocessed -ftabstop=@var{width} -ftrack-macro-expansion @gol
+-finput-charset=@var{charset} -fmacro-prefix-map=@var{old}=@var{new} @gol
+-fno-canonical-system-headers -fpch-deps -fpch-preprocess @gol
+-fpreprocessed -ftabstop=@var{width} -ftrack-macro-expansion @gol
-fwide-exec-charset=@var{charset} -fworking-directory @gol
-H -imacros @var{file} -include @var{file} @gol
-M -MD -MF -MG -MM -MMD -MP -MQ -MT @gol
-nostartfiles -nodefaultlibs -nolibc -nostdlib @gol
-e @var{entry} --entry=@var{entry} @gol
-pie -pthread -r -rdynamic @gol
--s -static -static-pie -static-libgcc -static-libstdc++ @gol
+-s -static -static-pie -static-libgcc -static-libstdc++ @gol
-static-libasan -static-libtsan -static-liblsan -static-libubsan @gol
-shared -shared-libgcc -symbolic @gol
-T @var{script} -Wl,@var{option} -Xlinker @var{option} @gol
-fdisable-rtl-@var{pass-name}=@var{range-list} @gol
-fdisable-tree-@var{pass_name} @gol
-fdisable-tree-@var{pass-name}=@var{range-list} @gol
--fdump-debug -fdump-earlydebug @gol
+-fdump-debug -fdump-earlydebug @gol
-fdump-noaddr -fdump-unnumbered -fdump-unnumbered-links @gol
-fdump-class-hierarchy@r{[}-@var{n}@r{]} @gol
-fdump-final-insns@r{[}=@var{file}@r{]} @gol
@gccoptlist{-mabi=@var{name} -mbig-endian -mlittle-endian @gol
-mgeneral-regs-only @gol
-mcmodel=tiny -mcmodel=small -mcmodel=large @gol
--mstrict-align -mno-strict-align @gol
+-mstrict-align -mno-strict-align @gol
-momit-leaf-frame-pointer @gol
-mtls-dialect=desc -mtls-dialect=traditional @gol
-mtls-size=@var{size} @gol
-mlow-precision-recip-sqrt -mlow-precision-sqrt -mlow-precision-div @gol
-mpc-relative-literal-loads @gol
-msign-return-address=@var{scope} @gol
+-mbranch-protection=@var{none}|@var{standard}|@var{pac-ret}[+@var{leaf}] @gol
-march=@var{name} -mcpu=@var{name} -mtune=@var{name} @gol
--moverride=@var{string} -mverbose-cost-dump -mtrack-speculation}
+-moverride=@var{string} -mverbose-cost-dump -mtrack-speculation}
@emph{Adapteva Epiphany Options}
@gccoptlist{-mhalf-reg-file -mprefer-short-insn-regs @gol
-msplit-vecmove-early -m1reg-@var{reg}}
@emph{ARC Options}
-@gccoptlist{-mbarrel-shifter -mjli-always @gol
+@gccoptlist{-mbarrel-shifter -mjli-always @gol
-mcpu=@var{cpu} -mA6 -mARC600 -mA7 -mARC700 @gol
-mdpfp -mdpfp-compact -mdpfp-fast -mno-dpfp-lrsr @gol
-mea -mno-mpy -mmul32x16 -mmul64 -matomic @gol
-mnorm -mspfp -mspfp-compact -mspfp-fast -msimd -msoft-float -mswap @gol
-mcrc -mdsp-packa -mdvbf -mlock -mmac-d16 -mmac-24 -mrtsc -mswape @gol
-mtelephony -mxy -misize -mannotate-align -marclinux -marclinux_prof @gol
--mlong-calls -mmedium-calls -msdata -mirq-ctrl-saved @gol
--mrgf-banked-regs -mlpc-width=@var{width} -G @var{num} @gol
+-mlong-calls -mmedium-calls -msdata -mirq-ctrl-saved @gol
+-mrgf-banked-regs -mlpc-width=@var{width} -G @var{num} @gol
-mvolatile-cache -mtp-regno=@var{regno} @gol
-malign-call -mauto-modify-reg -mbbit-peephole -mno-brcc @gol
-mcase-vector-pcrel -mcompact-casesi -mno-cond-exec -mearly-cbranchsi @gol
-mexpand-adddi -mindexed-loads -mlra -mlra-priority-none @gol
--mlra-priority-compact mlra-priority-noncompact -mno-millicode @gol
+-mlra-priority-compact mlra-priority-noncompact -mmillicode @gol
-mmixed-code -mq-class -mRcq -mRcw -msize-level=@var{level} @gol
--mtune=@var{cpu} -mmultcost=@var{num} @gol
+-mtune=@var{cpu} -mmultcost=@var{num} -mcode-density-frame @gol
-munalign-prob-threshold=@var{probability} -mmpy-option=@var{multo} @gol
--mdiv-rem -mcode-density -mll64 -mfpu=@var{fpu} -mrf16 -mbranch-index}
+-mdiv-rem -mcode-density -mll64 -mfpu=@var{fpu} -mrf16 -mbranch-index}
@emph{ARM Options}
@gccoptlist{-mapcs-frame -mno-apcs-frame @gol
-mapcs-reentrant -mno-apcs-reentrant @gol
-msched-prolog -mno-sched-prolog @gol
-mlittle-endian -mbig-endian @gol
--mbe8 -mbe32 @gol
+-mbe8 -mbe32 @gol
-mfloat-abi=@var{name} @gol
-mfp16-format=@var{name}
-mthumb-interwork -mno-thumb-interwork @gol
-mbranch-cost=@var{cost} @gol
-mcall-prologues -mgas-isr-prologues -mint8 @gol
-mn_flash=@var{size} -mno-interrupts @gol
--mmain-is-OS_task -mrelax -mrmw -mstrict-X -mtiny-stack @gol
+-mmain-is-OS_task -mrelax -mrmw -mstrict-X -mtiny-stack @gol
-mfract-convert-truncate @gol
-mshort-calls -nodevicelib @gol
-Waddr-space-convert -Wmisspelled-isr}
-mmemcpy -mxl-soft-mul -mxl-soft-div -mxl-barrel-shift @gol
-mxl-pattern-compare -mxl-stack-check -mxl-gp-opt -mno-clearbss @gol
-mxl-multiply-high -mxl-float-convert -mxl-float-sqrt @gol
--mbig-endian -mlittle-endian -mxl-reorder -mxl-mode-@var{app-model}
+-mbig-endian -mlittle-endian -mxl-reorder -mxl-mode-@var{app-model} @gol
-mpic-data-is-text-relative}
@emph{MIPS Options}
-meva -mno-eva @gol
-mvirt -mno-virt @gol
-mxpa -mno-xpa @gol
--mcrc -mno-crc @gol
--mginv -mno-ginv @gol
+-mcrc -mno-crc @gol
+-mginv -mno-ginv @gol
-mmicromips -mno-micromips @gol
-mmsa -mno-msa @gol
-mloongson-mmi -mno-loongson-mmi @gol
-mmad -mno-mad -mimadd -mno-imadd -mfused-madd -mno-fused-madd -nocpp @gol
-mfix-24k -mno-fix-24k @gol
-mfix-r4000 -mno-fix-r4000 -mfix-r4400 -mno-fix-r4400 @gol
+-mfix-r5900 -mno-fix-r5900 @gol
-mfix-r10000 -mno-fix-r10000 -mfix-rm7000 -mno-fix-rm7000 @gol
-mfix-vr4120 -mno-fix-vr4120 @gol
-mfix-vr4130 -mno-fix-vr4130 -mfix-sb1 -mno-fix-sb1 @gol
-mcompact-branches=@var{policy} @gol
-mfp-exceptions -mno-fp-exceptions @gol
-mvr4130-align -mno-vr4130-align -msynci -mno-synci @gol
--mlxc1-sxc1 -mno-lxc1-sxc1 -mmadd4 -mno-madd4 @gol
+-mlxc1-sxc1 -mno-lxc1-sxc1 -mmadd4 -mno-madd4 @gol
-mrelax-pic-calls -mno-relax-pic-calls -mmcount-ra-address @gol
-mframe-header-opt -mno-frame-header-opt}
@emph{Nios II Options}
@gccoptlist{-G @var{num} -mgpopt=@var{option} -mgpopt -mno-gpopt @gol
--mgprel-sec=@var{regexp} -mr0rel-sec=@var{regexp} @gol
+-mgprel-sec=@var{regexp} -mr0rel-sec=@var{regexp} @gol
-mel -meb @gol
-mno-bypass-cache -mbypass-cache @gol
-mno-cache-volatile -mcache-volatile @gol
@gccoptlist{-m32 -m64 -mmainkernel -moptimize}
@emph{OpenRISC Options}
-@gccoptlist{-mboard=@var{name} -mnewlib -mhard-mul -mhard-div @gol
--msoft-mul -msoft-div @gol
--mcmov -mror -msext -msfimm -mshftimm}
+@gccoptlist{-mboard=@var{name} -mnewlib -mhard-mul -mhard-div @gol
+-msoft-mul -msoft-div @gol
+-mcmov -mror -msext -msfimm -mshftimm}
@emph{PDP-11 Options}
@gccoptlist{-mfpu -msoft-float -mac0 -mno-ac0 -m40 -m45 -m10 @gol
--mint32 -mno-int16 -mint16 -mno-int32 @gol
--msplit -munix-asm -mdec-asm -mgnu-asm -mlra}
+-mint32 -mno-int16 -mint16 -mno-int32 @gol
+-msplit -munix-asm -mdec-asm -mgnu-asm -mlra}
@emph{picoChip Options}
@gccoptlist{-mae=@var{ae_type} -mvliw-lookahead=@var{N} @gol
@emph{PowerPC Options}
See RS/6000 and PowerPC Options.
-@emph{PowerPC SPE Options}
-@gccoptlist{-mcpu=@var{cpu-type} @gol
--mtune=@var{cpu-type} @gol
--mmfcrf -mno-mfcrf -mpopcntb -mno-popcntb @gol
--mfull-toc -mminimal-toc -mno-fp-in-toc -mno-sum-in-toc @gol
--m32 -mxl-compat -mno-xl-compat @gol
--malign-power -malign-natural @gol
--msoft-float -mhard-float -mmultiple -mno-multiple @gol
--msingle-float -mdouble-float @gol
--mupdate -mno-update @gol
--mavoid-indexed-addresses -mno-avoid-indexed-addresses @gol
--mstrict-align -mno-strict-align -mrelocatable @gol
--mno-relocatable -mrelocatable-lib -mno-relocatable-lib @gol
--mtoc -mno-toc -mlittle -mlittle-endian -mbig -mbig-endian @gol
--msingle-pic-base @gol
--mprioritize-restricted-insns=@var{priority} @gol
--msched-costly-dep=@var{dependence_type} @gol
--minsert-sched-nops=@var{scheme} @gol
--mcall-sysv -mcall-netbsd @gol
--maix-struct-return -msvr4-struct-return @gol
--mabi=@var{abi-type} -msecure-plt -mbss-plt @gol
--mblock-move-inline-limit=@var{num} @gol
--misel -mno-isel @gol
--misel=yes -misel=no @gol
--mspe -mno-spe @gol
--mspe=yes -mspe=no @gol
--mfloat-gprs=yes -mfloat-gprs=no -mfloat-gprs=single -mfloat-gprs=double @gol
--mprototype -mno-prototype @gol
--msim -mmvme -mads -myellowknife -memb -msdata @gol
--msdata=@var{opt} -mvxworks -G @var{num} @gol
--mrecip -mrecip=@var{opt} -mno-recip -mrecip-precision @gol
--mno-recip-precision @gol
--mpointers-to-nested-functions -mno-pointers-to-nested-functions @gol
--msave-toc-indirect -mno-save-toc-indirect @gol
--mcompat-align-parm -mno-compat-align-parm @gol
--mfloat128 -mno-float128 @gol
--mgnu-attribute -mno-gnu-attribute @gol
--mstack-protector-guard=@var{guard} -mstack-protector-guard-reg=@var{reg} @gol
--mstack-protector-guard-offset=@var{offset}}
-
@emph{RISC-V Options}
@gccoptlist{-mbranch-cost=@var{N-instruction} @gol
-mplt -mno-plt @gol
-mpreferred-stack-boundary=@var{num} @gol
-msmall-data-limit=@var{N-bytes} @gol
-msave-restore -mno-save-restore @gol
--mstrict-align -mno-strict-align @gol
--mcmodel=medlow -mcmodel=medany @gol
+-mstrict-align -mno-strict-align @gol
+-mcmodel=medlow -mcmodel=medany @gol
-mexplicit-relocs -mno-explicit-relocs @gol
--mrelax -mno-relax @gol}
+-mrelax -mno-relax}
@emph{RL78 Options}
@gccoptlist{-msim -mmul=none -mmul=g13 -mmul=g14 -mallregs @gol
-muser-mode -mno-user-mode @gol
-mv8plus -mno-v8plus -mvis -mno-vis @gol
-mvis2 -mno-vis2 -mvis3 -mno-vis3 @gol
--mvis4 -mno-vis4 -mvis4b -mno-vis4b @gol
+-mvis4 -mno-vis4 -mvis4b -mno-vis4b @gol
-mcbcond -mno-cbcond -mfmaf -mno-fmaf -mfsmuld -mno-fsmuld @gol
-mpopc -mno-popc -msubxc -mno-subxc @gol
-mfix-at697f -mfix-ut699 -mfix-ut700 -mfix-gr712rc @gol
-mincoming-stack-boundary=@var{num} @gol
-mcld -mcx16 -msahf -mmovbe -mcrc32 @gol
-mrecip -mrecip=@var{opt} @gol
--mvzeroupper -mprefer-avx128 -mprefer-vector-width=@var{opt} @gol
+-mvzeroupper -mprefer-avx128 -mprefer-vector-width=@var{opt} @gol
-mmmx -msse -msse2 -msse3 -mssse3 -msse4.1 -msse4.2 -msse4 -mavx @gol
-mavx2 -mavx512f -mavx512pf -mavx512er -mavx512cd -mavx512vl @gol
-mavx512bw -mavx512dq -mavx512ifma -mavx512vbmi -msha -maes @gol
--mpclmul -mfsgsbase -mrdrnd -mf16c -mfma -mpconfig -mwbnoinvd -mptwrite @gol
--mprefetchwt1 -mclflushopt -mxsavec -mxsaves @gol
+-mpclmul -mfsgsbase -mrdrnd -mf16c -mfma -mpconfig -mwbnoinvd @gol
+-mptwrite -mprefetchwt1 -mclflushopt -mxsavec -mxsaves @gol
-msse4a -m3dnow -m3dnowa -mpopcnt -mabm -mbmi -mtbm -mfma4 -mxop @gol
-mlzcnt -mbmi2 -mfxsr -mxsave -mxsaveopt -mrtm -mlwp @gol
--mmwaitx -mclzero -mpku -mthreads -mgfni -mvaes -mwaitpkg @gol
--mshstk -mforce-indirect-call -mavx512vbmi2 @gol
--mvpclmulqdq -mavx512bitalg -mmovdiri -mmovdir64b -mavx512vpopcntdq
--mcldemote @gol
--mms-bitfields -mno-align-stringops -minline-all-stringops @gol
+-mmwaitx -mclzero -mpku -mthreads -mgfni -mvaes -mwaitpkg @gol
+-mshstk -mmanual-endbr -mforce-indirect-call -mavx512vbmi2 @gol
+-mvpclmulqdq -mavx512bitalg -mmovdiri -mmovdir64b -mavx512vpopcntdq @gol
+-mcldemote -mms-bitfields -mno-align-stringops -minline-all-stringops @gol
-minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol
-mmemcpy-strategy=@var{strategy} -mmemset-strategy=@var{strategy} @gol
-mpush-args -maccumulate-outgoing-args -m128bit-long-double @gol
-mcmodel=@var{code-model} -mabi=@var{name} -maddress-mode=@var{mode} @gol
-m32 -m64 -mx32 -m16 -miamcu -mlarge-data-threshold=@var{num} @gol
-msse2avx -mfentry -mrecord-mcount -mnop-mcount -m8bit-idiv @gol
+-minstrument-return=@var{type} -mfentry-name=@var{name} -mfentry-section=@var{name} @gol
-mavx256-split-unaligned-load -mavx256-split-unaligned-store @gol
-malign-data=@var{type} -mstack-protector-guard=@var{guard} @gol
-mstack-protector-guard-reg=@var{reg} @gol
-mstack-protector-guard-offset=@var{offset} @gol
-mstack-protector-guard-symbol=@var{symbol} @gol
--mgeneral-regs-only -mcall-ms2sysv-xlogues @gol
--mindirect-branch=@var{choice} -mfunction-return=@var{choice} @gol
+-mgeneral-regs-only -mcall-ms2sysv-xlogues @gol
+-mindirect-branch=@var{choice} -mfunction-return=@var{choice} @gol
-mindirect-branch-register}
@emph{x86 Windows Options}
The @option{--help=} option can be repeated on the command line. Each
successive use displays its requested class of options, skipping
-those that have already been displayed.
+those that have already been displayed. If @option{--help} is also
+specified anywhere on the command line then this takes precedence
+over any @option{--help=} option.
If the @option{-Q} option appears on the command line before the
@option{--help=} option, then the descriptive text displayed by
@item -fno-asm
@opindex fno-asm
+@opindex fasm
Do not recognize @code{asm}, @code{inline} or @code{typeof} as a
keyword, so that code can use these words as identifiers. You can use
the keywords @code{__asm__}, @code{__inline__} and @code{__typeof__}
@item -fno-builtin
@itemx -fno-builtin-@var{function}
@opindex fno-builtin
+@opindex fbuiltin
@cindex built-in functions
Don't recognize built-in functions that do not begin with
@samp{__builtin_} as prefix. @xref{Other Builtins,,Other built-in
@item -fno-access-control
@opindex fno-access-control
+@opindex faccess-control
Turn off all access checking. This switch is mainly useful for working
around bugs in the access control code.
@item -fno-elide-constructors
@opindex fno-elide-constructors
+@opindex felide-constructors
The C++ standard allows an implementation to omit creating a temporary
that is only used to initialize another object of the same type.
Specifying this option disables that optimization, and forces G++ to
@item -fno-enforce-eh-specs
@opindex fno-enforce-eh-specs
+@opindex fenforce-eh-specs
Don't generate code to check for violation of exception specifications
at run time. This option violates the C++ standard, but may be useful
for reducing code size in production builds, much like defining
@item -fno-gnu-keywords
@opindex fno-gnu-keywords
+@opindex fgnu-keywords
Do not recognize @code{typeof} as a keyword, so that code can use this
word as an identifier. You can use the keyword @code{__typeof__} instead.
This option is implied by the strict ISO C++ dialects: @option{-ansi},
@item -fno-implicit-templates
@opindex fno-implicit-templates
+@opindex fimplicit-templates
Never emit code for non-inline templates that are instantiated
implicitly (i.e.@: by use); only emit code for explicit instantiations.
+If you use this option, you must take care to structure your code to
+include all the necessary explicit instantiations to avoid getting
+undefined symbols at link time.
@xref{Template Instantiation}, for more information.
@item -fno-implicit-inline-templates
@opindex fno-implicit-inline-templates
+@opindex fimplicit-inline-templates
Don't emit code for implicit instantiations of inline templates, either.
The default is to handle inlines differently so that compiles with and
without optimization need the same set of explicit instantiations.
@item -fno-implement-inlines
@opindex fno-implement-inlines
+@opindex fimplement-inlines
To save space, do not emit out-of-line copies of inline functions
controlled by @code{#pragma implementation}. This causes linker
errors if these functions are not inlined everywhere they are called.
@item -fno-nonansi-builtins
@opindex fno-nonansi-builtins
+@opindex fnonansi-builtins
Disable built-in declarations of functions that are not mandated by
ANSI/ISO C@. These include @code{ffs}, @code{alloca}, @code{_exit},
@code{index}, @code{bzero}, @code{conjf}, and other related functions.
@item -fno-operator-names
@opindex fno-operator-names
+@opindex foperator-names
Do not treat the operator name keywords @code{and}, @code{bitand},
@code{bitor}, @code{compl}, @code{not}, @code{or} and @code{xor} as
synonyms as keywords.
@item -fno-optional-diags
@opindex fno-optional-diags
+@opindex foptional-diags
Disable diagnostics that the standard says a compiler does not need to
issue. Currently, the only such diagnostic issued by G++ is the one for
a name having multiple meanings within a class.
@item -fno-pretty-templates
@opindex fno-pretty-templates
+@opindex fpretty-templates
When an error message refers to a specialization of a function
template, the compiler normally prints the signature of the
template followed by the template arguments and any typedefs or
@item -fno-rtti
@opindex fno-rtti
+@opindex frtti
Disable generation of information about every class with virtual
functions for use by the C++ run-time type identification features
(@code{dynamic_cast} and @code{typeid}). If you don't use those parts
do not require run-time type information, i.e.@: casts to @code{void *} or to
unambiguous base classes.
+Mixing code compiled with @option{-frtti} with that compiled with
+@option{-fno-rtti} may not work. For example, programs may
+fail to link if a class compiled with @option{-fno-rtti} is used as a base
+for a class compiled with @option{-frtti}.
+
@item -fsized-deallocation
@opindex fsized-deallocation
Enable the built-in global declarations
@item -fno-threadsafe-statics
@opindex fno-threadsafe-statics
+@opindex fthreadsafe-statics
Do not emit the extra code to use the routines specified in the C++
ABI for thread-safe initialization of local statics. You can use this
option to reduce code size slightly in code that doesn't need to be
@item -fno-use-cxa-get-exception-ptr
@opindex fno-use-cxa-get-exception-ptr
+@opindex fuse-cxa-get-exception-ptr
Don't use the @code{__cxa_get_exception_ptr} runtime routine. This
causes @code{std::uncaught_exception} to be incorrect, but is necessary
if the runtime routine is not available.
@item -fno-weak
@opindex fno-weak
+@opindex fweak
Do not use weak symbol support, even if it is provided by the linker.
By default, G++ uses weak symbols if they are available. This
option exists only for testing, and should not be used by end-users;
@opindex Wno-deprecated-copy
Warn that the implicit declaration of a copy constructor or copy
assignment operator is deprecated if the class has a user-provided
-copy constructor, copy assignment operator, or destructor, in C++11
-and up. This warning is enabled by @option{-Wall}.
+copy constructor or copy assignment operator, in C++11 and up. This
+warning is enabled by @option{-Wextra}. With
+@option{-Wdeprecated-copy-dtor}, also deprecate if the class has a
+user-provided destructor.
@item -Wno-init-list-lifetime @r{(C++ and Objective-C++ only)}
@opindex Winit-list-lifetime
@item -fno-nil-receivers
@opindex fno-nil-receivers
+@opindex fnil-receivers
Assume that all Objective-C message dispatches (@code{[receiver
message:arg]}) in this translation unit ensure that the receiver is
not @code{nil}. This allows for more efficient entry points in the
@item -fno-show-column
@opindex fno-show-column
+@opindex fshow-column
Do not print column numbers in diagnostics. This may be necessary if
diagnostics are being scanned by a program that does not understand the
column numbers, such as @command{dejagnu}.
+@item -fdiagnostics-format=@var{FORMAT}
+@opindex fdiagnostics-format
+Select a different format for printing diagnostics.
+@var{FORMAT} is @samp{text} or @samp{json}.
+The default is @samp{text}.
+
+The @samp{json} format consists of a top-level JSON array containing JSON
+objects representing the diagnostics.
+
+The JSON is emitted as one line, without formatting; the examples below
+have been formatted for clarity.
+
+Diagnostics can have child diagnostics. For example, this error and note:
+
+@smallexample
+misleading-indentation.c:15:3: warning: this 'if' clause does not
+ guard... [-Wmisleading-indentation]
+ 15 | if (flag)
+ | ^~
+misleading-indentation.c:17:5: note: ...this statement, but the latter
+ is misleadingly indented as if it were guarded by the 'if'
+ 17 | y = 2;
+ | ^
+@end smallexample
+
+@noindent
+might be printed in JSON form (after formatting) like this:
+
+@smallexample
+[
+ @{
+ "kind": "warning",
+ "locations": [
+ @{
+ "caret": @{
+ "column": 3,
+ "file": "misleading-indentation.c",
+ "line": 15
+ @},
+ "finish": @{
+ "column": 4,
+ "file": "misleading-indentation.c",
+ "line": 15
+ @}
+ @}
+ ],
+ "message": "this \u2018if\u2019 clause does not guard...",
+ "option": "-Wmisleading-indentation",
+ "children": [
+ @{
+ "kind": "note",
+ "locations": [
+ @{
+ "caret": @{
+ "column": 5,
+ "file": "misleading-indentation.c",
+ "line": 17
+ @}
+ @}
+ ],
+ "message": "...this statement, but the latter is @dots{}"
+ @}
+ ]
+ @},
+ @dots{}
+]
+@end smallexample
+
+@noindent
+where the @code{note} is a child of the @code{warning}.
+
+A diagnostic has a @code{kind}. If this is @code{warning}, then there is
+an @code{option} key describing the command-line option controlling the
+warning.
+
+A diagnostic can contain zero or more locations. Each location has up
+to three positions within it: a @code{caret} position and optional
+@code{start} and @code{finish} positions. A location can also have
+an optional @code{label} string. For example, this error:
+
+@smallexample
+bad-binary-ops.c:64:23: error: invalid operands to binary + (have 'S' @{aka
+ 'struct s'@} and 'T' @{aka 'struct t'@})
+ 64 | return callee_4a () + callee_4b ();
+ | ~~~~~~~~~~~~ ^ ~~~~~~~~~~~~
+ | | |
+ | | T @{aka struct t@}
+ | S @{aka struct s@}
+@end smallexample
+
+@noindent
+has three locations. Its primary location is at the ``+'' token at column
+23. It has two secondary locations, describing the left and right-hand sides
+of the expression, which have labels. It might be printed in JSON form as:
+
+@smallexample
+ @{
+ "children": [],
+ "kind": "error",
+ "locations": [
+ @{
+ "caret": @{
+ "column": 23, "file": "bad-binary-ops.c", "line": 64
+ @}
+ @},
+ @{
+ "caret": @{
+ "column": 10, "file": "bad-binary-ops.c", "line": 64
+ @},
+ "finish": @{
+ "column": 21, "file": "bad-binary-ops.c", "line": 64
+ @},
+ "label": "S @{aka struct s@}"
+ @},
+ @{
+ "caret": @{
+ "column": 25, "file": "bad-binary-ops.c", "line": 64
+ @},
+ "finish": @{
+ "column": 36, "file": "bad-binary-ops.c", "line": 64
+ @},
+ "label": "T @{aka struct t@}"
+ @}
+ ],
+ "message": "invalid operands to binary + @dots{}"
+ @}
+@end smallexample
+
+If a diagnostic contains fix-it hints, it has a @code{fixits} array,
+consisting of half-open intervals, similar to the output of
+@option{-fdiagnostics-parseable-fixits}. For example, this diagnostic
+with a replacement fix-it hint:
+
+@smallexample
+demo.c:8:15: error: 'struct s' has no member named 'colour'; did you
+ mean 'color'?
+ 8 | return ptr->colour;
+ | ^~~~~~
+ | color
+@end smallexample
+
+@noindent
+might be printed in JSON form as:
+
+@smallexample
+ @{
+ "children": [],
+ "fixits": [
+ @{
+ "next": @{
+ "column": 21,
+ "file": "demo.c",
+ "line": 8
+ @},
+ "start": @{
+ "column": 15,
+ "file": "demo.c",
+ "line": 8
+ @},
+ "string": "color"
+ @}
+ ],
+ "kind": "error",
+ "locations": [
+ @{
+ "caret": @{
+ "column": 15,
+ "file": "demo.c",
+ "line": 8
+ @},
+ "finish": @{
+ "column": 20,
+ "file": "demo.c",
+ "line": 8
+ @}
+ @}
+ ],
+ "message": "\u2018struct s\u2019 has no member named @dots{}"
+ @}
+@end smallexample
+
+@noindent
+where the fix-it hint suggests replacing the text from @code{start} up
+to but not including @code{next} with @code{string}'s value. Deletions
+are expressed via an empty value for @code{string}, insertions by
+having @code{start} equal @code{next}.
+
@end table
@node Warning Options
-Wunused-label @gol
-Wunused-value @gol
-Wunused-variable @gol
--Wvolatile-register-var @gol
-}
+-Wvolatile-register-var}
Note that some warning flags are not implied by @option{-Wall}. Some of
them warn about constructions that users generally do not consider
@gccoptlist{-Wclobbered @gol
-Wcast-function-type @gol
+-Wdeprecated-copy @r{(C++ only)} @gol
-Wempty-body @gol
-Wignored-qualifiers @gol
-Wimplicit-fallthrough=3 @gol
-Wuninitialized @gol
-Wshift-negative-value @r{(in C++03 and in C99 and newer)} @gol
-Wunused-parameter @r{(only with} @option{-Wunused} @r{or} @option{-Wall}@r{)} @gol
--Wunused-but-set-parameter @r{(only with} @option{-Wunused} @r{or} @option{-Wall}@r{)} @gol
-}
+-Wunused-but-set-parameter @r{(only with} @option{-Wunused} @r{or} @option{-Wall}@r{)}}
+
The option @option{-Wextra} also prints warning messages for the
following cases:
This warning is enabled by @option{-Wall} in C and C++.
-@item -Wmissing-attributes
+@item -Wno-missing-attributes
@opindex Wmissing-attributes
@opindex Wno-missing-attributes
Warn when a declaration of a function is missing one or more attributes
that a related function is declared with and whose absence may adversely
-affect the correctness or efficiency of generated code. For example, in
-C++, the warning is issued when an explicit specialization of a primary
+affect the correctness or efficiency of generated code. For example,
+the warning is issued for declarations of aliases that use attributes
+to specify less restrictive requirements than those of their targets.
+This typically represents a potential optimization oportunity rather
+than a hidden bug. The @option{-Wattribute-alias} option controls warnings
+issued for mismatches between declarations of aliases and their targets
+that might be indicative of code generation bugs.
+Attributes considered include @code{alloc_align}, @code{alloc_size},
+@code{cold}, @code{const}, @code{hot}, @code{leaf}, @code{malloc},
+@code{nonnull}, @code{noreturn}, @code{nothrow}, @code{pure},
+@code{returns_nonnull}, and @code{returns_twice}.
+
+In C++, the warning is issued when an explicit specialization of a primary
template declared with attribute @code{alloc_align}, @code{alloc_size},
@code{assume_aligned}, @code{format}, @code{format_arg}, @code{malloc},
or @code{nonnull} is declared without it. Attributes @code{deprecated},
by default in C99 and C++11 modes (and newer). This warning level does
not warn about left-shifting 1 into the sign bit. (However, in C, such
an overflow is still rejected in contexts where an integer constant expression
-is required.)
+is required.) No warning is emitted in C++2A mode (and newer), as signed left
+shifts always wrap.
@item -Wshift-overflow=2
This warning level also warns about left-shifting 1 into the sign bit,
-unless C++14 mode is active.
+unless C++14 mode (or newer) is active.
@end table
@item -Wswitch
@item -Wsuggest-attribute=pure
@itemx -Wsuggest-attribute=const
@itemx -Wsuggest-attribute=noreturn
+@itemx -Wmissing-noreturn
@itemx -Wsuggest-attribute=malloc
@opindex Wsuggest-attribute=pure
@opindex Wno-suggest-attribute=pure
@opindex Wno-suggest-attribute=const
@opindex Wsuggest-attribute=noreturn
@opindex Wno-suggest-attribute=noreturn
+@opindex Wmissing-noreturn
+@opindex Wno-missing-noreturn
@opindex Wsuggest-attribute=malloc
@opindex Wno-suggest-attribute=malloc
false positives and is deactivated by default.
@end table
-@item -Wattribute-alias
+@item -Wattribute-alias=@var{n}
+@itemx -Wno-attribute-alias
+@opindex -Wattribute-alias
+@opindex -Wno-attribute-alias
Warn about declarations using the @code{alias} and similar attributes whose
-target is incompatible with the type of the alias. @xref{Function Attributes,
-,Declaring Attributes of Functions}.
+target is incompatible with the type of the alias.
+@xref{Function Attributes,,Declaring Attributes of Functions}.
+The @option{-Wattribute-alias=1} is enabled by @option{-Wall}.
+
+@table @gcctabopt
+@item -Wattribute-alias=1
+The default warning level of the @option{-Wattribute-alias} option diagnoses
+incompatibilities between the type of the alias declaration and that of its
+target. Such incompatibilities are typically indicative of bugs.
+
+@item -Wattribute-alias=2
+At this level @option{-Wattribute-alias} also diagnoses mismatches between
+the set of attributes of the alias declaration and the attributes applied
+to its target. Although in some cases such mismatches may indicate bugs,
+in other cases they may be benign and could be resolved simply by adding
+the missing attribute to the target.
+@end table
@item -Wbool-compare
@opindex Wno-bool-compare
programmer intended to use @code{strcmp}. This warning is enabled by
@option{-Wall}.
+@item -Waddress-of-packed-member
+@opindex Waddress-of-packed-member
+@opindex Wno-address-of-packed-member
+Warn when the address of packed member of struct or union is taken,
+which usually results in an unaligned pointer value. This is
+enabled by default.
+
@item -Wlogical-op
@opindex Wlogical-op
@opindex Wno-logical-op
@item -Wno-builtin-declaration-mismatch
@opindex Wno-builtin-declaration-mismatch
@opindex Wbuiltin-declaration-mismatch
-Warn if a built-in function is declared with the wrong signature or
-as non-function.
-This warning is enabled by default.
+Warn if a built-in function is declared with an incompatible signature
+or as a non-function, or when a built-in function declared with a type
+that does not include a prototype is called with arguments whose promoted
+types do not match those expected by the function. When @option{-Wextra}
+is specified, also warn when a built-in function that takes arguments is
+declared without a prototype. The @option{-Wno-builtin-declaration-mismatch}
+warning is enabled by default. To avoid the warning include the appropriate
+header to bring the prototypes of built-in functions into scope.
+
+For example, the call to @code{memset} below is diagnosed by the warning
+because the function expects a value of type @code{size_t} as its argument
+but the type of @code{32} is @code{int}. With @option{-Wextra},
+the declaration of the function is diagnosed as well.
+@smallexample
+extern void* memset ();
+void f (void *d)
+@{
+ memset (d, '\0', 32);
+@}
+@end smallexample
@item -Wno-builtin-macro-redefined
@opindex Wno-builtin-macro-redefined
Not all optimizations are controlled directly by a flag. Only
optimizations that have a flag are listed in this section.
-Most optimizations are only enabled if an @option{-O} level is set on
-the command line. Otherwise they are disabled, even if individual
-optimization flags are specified.
+Most optimizations are completely disabled at @option{-O0} or if an
+@option{-O} level is not set on the command line, even if individual
+optimization flags are specified. Similarly, @option{-Og} suppresses
+many optimization passes.
Depending on the target and how GCC was configured, a slightly different
set of optimizations may be enabled at each @option{-O} level than
time, without performing any optimizations that take a great deal of
compilation time.
+@c Note that in addition to the default_options_table list in opts.c,
+@c several optimization flags default to true but control optimization
+@c passes that are explicitly disabled at -O0.
+
@option{-O} turns on the following optimization flags:
-@gccoptlist{
--fauto-inc-dec @gol
+
+@c Please keep the following list alphabetized.
+@gccoptlist{-fauto-inc-dec @gol
-fbranch-count-reg @gol
-fcombine-stack-adjustments @gol
-fcompare-elim @gol
-fdse @gol
-fforward-propagate @gol
-fguess-branch-probability @gol
--fif-conversion2 @gol
-fif-conversion @gol
+-fif-conversion2 @gol
-finline-functions-called-once @gol
--fipa-pure-const @gol
-fipa-profile @gol
+-fipa-pure-const @gol
-fipa-reference @gol
-fipa-reference-addressable @gol
-fmerge-constants @gol
-ftree-forwprop @gol
-ftree-fre @gol
-ftree-phiprop @gol
+-ftree-pta @gol
-ftree-scev-cprop @gol
-ftree-sink @gol
-ftree-slsr @gol
-ftree-sra @gol
--ftree-pta @gol
-ftree-ter @gol
-funit-at-a-time}
@option{-O2} turns on all optimization flags specified by @option{-O}. It
also turns on the following optimization flags:
-@gccoptlist{-fthread-jumps @gol
--falign-functions -falign-jumps @gol
--falign-loops -falign-labels @gol
+
+@c Please keep the following list alphabetized!
+@gccoptlist{-falign-functions -falign-jumps @gol
+-falign-labels -falign-loops @gol
-fcaller-saves @gol
+-fcode-hoisting @gol
-fcrossjumping @gol
-fcse-follow-jumps -fcse-skip-blocks @gol
-fdelete-null-pointer-checks @gol
--fdevirtualize -fdevirtualize-speculatively @gol
+-fdevirtualize -fdevirtualize-speculatively @gol
-fexpensive-optimizations @gol
-fgcse -fgcse-lm @gol
-fhoist-adjacent-loads @gol
-finline-small-functions @gol
-findirect-inlining @gol
--fipa-cp @gol
--fipa-bit-cp @gol
--fipa-vrp @gol
--fipa-sra @gol
--fipa-icf @gol
+-fipa-bit-cp -fipa-cp -fipa-icf @gol
+-fipa-ra -fipa-sra -fipa-vrp @gol
-fisolate-erroneous-paths-dereference @gol
-flra-remat @gol
-foptimize-sibling-calls @gol
-fpartial-inlining @gol
-fpeephole2 @gol
-freorder-blocks-algorithm=stc @gol
--freorder-blocks-and-partition -freorder-functions @gol
+-freorder-blocks-and-partition -freorder-functions @gol
-frerun-cse-after-loop @gol
--fsched-interblock -fsched-spec @gol
-fschedule-insns -fschedule-insns2 @gol
+-fsched-interblock -fsched-spec @gol
-fstore-merging @gol
-fstrict-aliasing @gol
+-fthread-jumps @gol
-ftree-builtin-call-dce @gol
--ftree-switch-conversion -ftree-tail-merge @gol
--fcode-hoisting @gol
-ftree-pre @gol
--ftree-vrp @gol
--fipa-ra}
+-ftree-switch-conversion -ftree-tail-merge @gol
+-ftree-vrp}
Please note the warning under @option{-fgcse} about
invoking @option{-O2} on programs that use computed gotos.
@opindex O3
Optimize yet more. @option{-O3} turns on all optimizations specified
by @option{-O2} and also turns on the following optimization flags:
-@gccoptlist{-finline-functions @gol
--funswitch-loops @gol
--fpredictive-commoning @gol
--fgcse-after-reload @gol
--ftree-loop-vectorize @gol
--ftree-loop-distribution @gol
--ftree-loop-distribute-patterns @gol
+
+@c Please keep the following list alphabetized!
+@gccoptlist{-fgcse-after-reload @gol
+-finline-functions @gol
+-fipa-cp-clone
-floop-interchange @gol
-floop-unroll-and-jam @gol
+-fpeel-loops @gol
+-fpredictive-commoning @gol
-fsplit-paths @gol
+-ftree-loop-distribute-patterns @gol
+-ftree-loop-distribution @gol
+-ftree-loop-vectorize @gol
+-ftree-partial-pre @gol
-ftree-slp-vectorize @gol
+-funswitch-loops @gol
-fvect-cost-model @gol
--ftree-partial-pre @gol
--fpeel-loops @gol
--fipa-cp-clone}
+-fversion-loops-for-strides}
@item -O0
@opindex O0
@item -Os
@opindex Os
-Optimize for size. @option{-Os} enables all @option{-O2} optimizations that
-do not typically increase code size. It also performs further
-optimizations designed to reduce code size.
+Optimize for size. @option{-Os} enables all @option{-O2} optimizations
+except those that often increase code size:
+
+@gccoptlist{-falign-functions -falign-jumps @gol
+-falign-labels -falign-loops @gol
+-fprefetch-loop-arrays -freorder-blocks-algorithm=stc}
-@option{-Os} disables the following optimization flags:
-@gccoptlist{-falign-functions -falign-jumps -falign-loops @gol
--falign-labels -fprefetch-loop-arrays}
+It also enables @option{-finline-functions}, causes the compiler to tune for
+code size rather than execution speed, and performs further optimizations
+designed to reduce code size.
@item -Ofast
@opindex Ofast
@item -Og
@opindex Og
-Optimize debugging experience. @option{-Og} enables optimizations
-that do not interfere with debugging. It should be the optimization
+Optimize debugging experience. @option{-Og} should be the optimization
level of choice for the standard edit-compile-debug cycle, offering
a reasonable level of optimization while maintaining fast compilation
-and a good debugging experience.
+and a good debugging experience. It is a better choice than @option{-O0}
+for producing debuggable code because some compiler passes
+that collect debug information are disabled at @option{-O0}.
+
+Like @option{-O0}, @option{-Og} completely disables a number of
+optimization passes so that individual options controlling them have
+no effect. Otherwise @option{-Og} enables all @option{-O1}
+optimization flags except for those that may interfere with debugging:
+
+@gccoptlist{-fbranch-count-reg -fdelayed-branch @gol
+-fif-conversion -fif-conversion2 @gol
+-finline-functions-called-once @gol
+-fmove-loop-invariants -fssa-phiopt @gol
+-ftree-bit-ccp -ftree-pta -ftree-sra}
+
@end table
If you use multiple @option{-O} options, with or without level numbers,
@table @gcctabopt
@item -fno-defer-pop
@opindex fno-defer-pop
-Always pop the arguments to each function call as soon as that function
-returns. For machines that must pop arguments after a function call,
-the compiler normally lets arguments accumulate on the stack for several
-function calls and pops them all at once.
-
-Disabled at levels @option{-O}, @option{-O2}, @option{-O3}, @option{-Os}.
+@opindex fdefer-pop
+For machines that must pop arguments after a function call, always pop
+the arguments as soon as each function returns.
+At levels @option{-O1} and higher, @option{-fdefer-pop} is the default;
+this allows the compiler to let arguments accumulate on the stack for several
+function calls and pop them all at once.
@item -fforward-propagate
@opindex fforward-propagate
@item -fno-inline
@opindex fno-inline
+@opindex finline
Do not expand any functions inline apart from those marked with
the @code{always_inline} attribute. This is the default when not
optimizing.
declared @code{static}, then the function is normally not output as
assembler code in its own right.
-Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
+Enabled at levels @option{-O3}, @option{-Os}. Also enabled
+by @option{-fprofile-use} and @option{-fauto-profile}.
@item -finline-functions-called-once
@opindex finline-functions-called-once
function is integrated, then the function is not output as assembler code
in its own right.
-Enabled at levels @option{-O1}, @option{-O2}, @option{-O3} and @option{-Os}.
+Enabled at levels @option{-O1}, @option{-O2}, @option{-O3} and @option{-Os},
+but not @option{-Og}.
@item -fearly-inlining
@opindex fearly-inlining
@item -fno-keep-inline-dllexport
@opindex fno-keep-inline-dllexport
+@opindex fkeep-inline-dllexport
This is a more fine-grained version of @option{-fkeep-inline-functions},
which applies only to functions that are declared using the @code{dllexport}
attribute or declspec. @xref{Function Attributes,,Declaring Attributes of
@item -fno-branch-count-reg
@opindex fno-branch-count-reg
-Avoid running a pass scanning for opportunities to use ``decrement and
-branch'' instructions on a count register instead of generating sequences
-of instructions that decrement a register, compare it against zero, and
+@opindex fbranch-count-reg
+Disable the optimization pass that scans for opportunities to use
+``decrement and branch'' instructions on a count register instead of
+instruction sequences that decrement a register, compare it against zero, and
then branch based upon the result. This option is only meaningful on
architectures that support such instructions, which include x86, PowerPC,
IA-64 and S/390. Note that the @option{-fno-branch-count-reg} option
doesn't remove the decrement and branch instructions from the generated
instruction stream introduced by other optimization passes.
-Enabled by default at @option{-O1} and higher.
-
-The default is @option{-fbranch-count-reg}.
+The default is @option{-fbranch-count-reg} at @option{-O1} and higher,
+except for @option{-Og}.
@item -fno-function-cse
@opindex fno-function-cse
+@opindex ffunction-cse
Do not put function addresses in registers; make each instruction that
calls a constant function contain the function's address explicitly.
@item -fno-zero-initialized-in-bss
@opindex fno-zero-initialized-in-bss
+@opindex fzero-initialized-in-bss
If the target supports a BSS section, GCC by default puts variables that
are initialized to zero into BSS@. This can save space in the resulting
code.
pass is performed after reload. The purpose of this pass is to clean up
redundant spilling.
+Enabled by @option{-fprofile-use} and @option{-fauto-profile}.
+
@item -faggressive-loop-optimizations
@opindex faggressive-loop-optimizations
This option tells the loop optimizer to use language constraints to
some tricks doable by standard arithmetics. The use of conditional execution
on chips where it is available is controlled by @option{-fif-conversion2}.
-Enabled at levels @option{-O}, @option{-O2}, @option{-O3}, @option{-Os}.
+Enabled at levels @option{-O}, @option{-O2}, @option{-O3}, @option{-Os}, but
+not with @option{-Og}.
@item -fif-conversion2
@opindex fif-conversion2
Use conditional execution (where available) to transform conditional jumps into
branch-less equivalents.
-Enabled at levels @option{-O}, @option{-O2}, @option{-O3}, @option{-Os}.
+Enabled at levels @option{-O}, @option{-O2}, @option{-O3}, @option{-Os}, but
+not with @option{-Og}.
@item -fdeclone-ctor-dtor
@opindex fdeclone-ctor-dtor
@item -fno-lifetime-dse
@opindex fno-lifetime-dse
+@opindex flifetime-dse
In C++ the value of an object is only affected by changes within its
lifetime: when the constructor begins, the object has an indeterminate
value, and any changes during the lifetime of the object are dead when
@item -fno-ira-share-save-slots
@opindex fno-ira-share-save-slots
+@opindex fira-share-save-slots
Disable sharing of stack slots used for saving call-used hard
registers living through a call. Each hard register gets a
separate stack slot, and as a result function stack frames are
@item -fno-ira-share-spill-slots
@opindex fno-ira-share-spill-slots
+@opindex fira-share-spill-slots
Disable sharing of stack slots allocated for pseudo-registers. Each
pseudo-register that does not get a hard register gets a separate
stack slot, and as a result function stack frames are larger.
@item -fno-sched-interblock
@opindex fno-sched-interblock
+@opindex fsched-interblock
Disable instruction scheduling across basic blocks, which
is normally enabled when scheduling before register allocation, i.e.@:
with @option{-fschedule-insns} or at @option{-O2} or higher.
@item -fno-sched-spec
@opindex fno-sched-spec
+@opindex fsched-spec
Disable speculative motion of non-load instructions, which
is normally enabled when scheduling before register allocation, i.e.@:
with @option{-fschedule-insns} or at @option{-O2} or higher.
Discover read-only, write-only and non-addressable static variables.
Enabled by default at @option{-O} and higher.
+@item -fipa-stack-alignment
+@opindex fipa-stack-alignment
+Reduce stack alignment on call sites if possible.
+Enabled by default.
+
@item -fipa-pta
@opindex fipa-pta
Perform interprocedural pointer analysis and interprocedural modification
This optimization can substantially increase performance
if the application has constants passed to functions.
This flag is enabled by default at @option{-O2}, @option{-Os} and @option{-O3}.
+It is also enabled by @option{-fprofile-use} and @option{-fauto-profile}.
@item -fipa-cp-clone
@opindex fipa-cp-clone
it may significantly increase code size
(see @option{--param ipcp-unit-growth=@var{value}}).
This flag is enabled by default at @option{-O3}.
+It is also enabled by @option{-fprofile-use} and @option{-fauto-profile}.
@item -fipa-bit-cp
@opindex fipa-bit-cp
When enabled, perform interprocedural bitwise constant
-propagation. This flag is enabled by default at @option{-O2}. It
-requires that @option{-fipa-cp} is enabled.
+propagation. This flag is enabled by default at @option{-O2} and
+by @option{-fprofile-use} and @option{-fauto-profile}.
+It requires that @option{-fipa-cp} is enabled.
@item -fipa-vrp
@opindex fipa-vrp
This flag is enabled by default at @option{-O2} and @option{-Os}.
+@item -flive-patching=@var{level}
+@opindex flive-patching
+Control GCC's optimizations to provide a safe compilation for live-patching.
+
+If the compiler's optimization uses a function's body or information extracted
+from its body to optimize/change another function, the latter is called an
+impacted function of the former. If a function is patched, its impacted
+functions should be patched too.
+
+The impacted functions are decided by the compiler's interprocedural
+optimizations. For example, inlining a function into its caller, cloning
+a function and changing its caller to call this new clone, or extracting
+a function's pureness/constness information to optimize its direct or
+indirect callers, etc.
+
+Usually, the more IPA optimizations enabled, the larger the number of
+impacted functions for each function. In order to control the number of
+impacted functions and computed the list of impacted function easily,
+we provide control to partially enable IPA optimizations on two different
+levels.
+
+The @var{level} argument should be one of the following:
+
+@table @samp
+
+@item inline-clone
+
+Only enable inlining and cloning optimizations, which includes inlining,
+cloning, interprocedural scalar replacement of aggregates and partial inlining.
+As a result, when patching a function, all its callers and its clones'
+callers need to be patched as well.
+
+@option{-flive-patching=inline-clone} disables the following optimization flags:
+@gccoptlist{-fwhole-program -fipa-pta -fipa-reference -fipa-ra @gol
+-fipa-icf -fipa-icf-functions -fipa-icf-variables @gol
+-fipa-bit-cp -fipa-vrp -fipa-pure-const -fipa-reference-addressable @gol
+-fipa-stack-alignment}
+
+@item inline-only-static
+
+Only enable inlining of static functions.
+As a result, when patching a static function, all its callers need to be
+patches as well.
+
+In addition to all the flags that -flive-patching=inline-clone disables,
+@option{-flive-patching=inline-only-static} disables the following additional
+optimization flags:
+@gccoptlist{-fipa-cp-clone -fipa-sra -fpartial-inlining -fipa-cp}
+
+@end table
+
+When -flive-patching specified without any value, the default value
+is "inline-clone".
+
+This flag is disabled by default.
+
+Note that -flive-patching is not supported with link-time optimizer.
+(@option{-flto}).
+
@item -fisolate-erroneous-paths-dereference
@opindex fisolate-erroneous-paths-dereference
Detect paths that trigger erroneous or undefined behavior due to
Perform sparse conditional bit constant propagation on trees and propagate
pointer alignment information.
This pass only operates on local scalar variables and is enabled by default
-at @option{-O} and higher. It requires that @option{-ftree-ccp} is enabled.
+at @option{-O1} and higher, except for @option{-Og}.
+It requires that @option{-ftree-ccp} is enabled.
@item -ftree-ccp
@opindex ftree-ccp
@item -fssa-phiopt
@opindex fssa-phiopt
Perform pattern matching on SSA PHI nodes to optimize conditional
-code. This pass is enabled by default at @option{-O} and higher.
+code. This pass is enabled by default at @option{-O1} and higher,
+except for @option{-Og}.
@item -ftree-switch-conversion
@opindex ftree-switch-conversion
D(I) = E(I) * F
ENDDO
@end smallexample
+This flag is enabled by default at @option{-O3}.
+It is also enabled by @option{-fprofile-use} and @option{-fauto-profile}.
@item -ftree-loop-distribute-patterns
@opindex ftree-loop-distribute-patterns
Perform loop distribution of patterns that can be code generated with
-calls to a library. This flag is enabled by default at @option{-O3}.
+calls to a library. This flag is enabled by default at @option{-O3}, and
+by @option{-fprofile-use} and @option{-fauto-profile}.
This pass distributes the initialization loops and generates a call to
memset zero. For example, the loop
ENDDO
@end smallexample
and the initialization loop is transformed into a call to memset zero.
+This flag is enabled by default at @option{-O3}.
+It is also enabled by @option{-fprofile-use} and @option{-fauto-profile}.
@item -floop-interchange
@opindex floop-interchange
c[i][j] = c[i][j] + a[i][k]*b[k][j];
@end smallexample
This flag is enabled by default at @option{-O3}.
+It is also enabled by @option{-fprofile-use} and @option{-fauto-profile}.
@item -floop-unroll-and-jam
@opindex floop-unroll-and-jam
Apply unroll and jam transformations on feasible loops. In a loop
nest this unrolls the outer loop by some factor and fuses the resulting
multiple inner loops. This flag is enabled by default at @option{-O3}.
+It is also enabled by @option{-fprofile-use} and @option{-fauto-profile}.
@item -ftree-loop-im
@opindex ftree-loop-im
@item -ftree-pta
@opindex ftree-pta
Perform function-local points-to analysis on trees. This flag is
-enabled by default at @option{-O} and higher.
+enabled by default at @option{-O1} and higher, except for @option{-Og}.
@item -ftree-sra
@opindex ftree-sra
Perform scalar replacement of aggregates. This pass replaces structure
references with scalars to prevent committing structures to memory too
-early. This flag is enabled by default at @option{-O} and higher.
+early. This flag is enabled by default at @option{-O1} and higher,
+except for @option{-Og}.
@item -fstore-merging
@opindex fstore-merging
@item -ftree-loop-vectorize
@opindex ftree-loop-vectorize
Perform loop vectorization on trees. This flag is enabled by default at
-@option{-O3} and when @option{-ftree-vectorize} is enabled.
+@option{-O3} and by @option{-ftree-vectorize}, @option{-fprofile-use},
+and @option{-fauto-profile}.
@item -ftree-slp-vectorize
@opindex ftree-slp-vectorize
Perform basic block vectorization on trees. This flag is enabled by default at
-@option{-O3} and when @option{-ftree-vectorize} is enabled.
+@option{-O3} and by @option{-ftree-vectorize}, @option{-fprofile-use},
+and @option{-fauto-profile}.
@item -fvect-cost-model=@var{model}
@opindex fvect-cost-model
iterations of loops.
This option is enabled at level @option{-O3}.
+It is also enabled by @option{-fprofile-use} and @option{-fauto-profile}.
@item -fprefetch-loop-arrays
@opindex fprefetch-loop-arrays
@item -fno-printf-return-value
@opindex fno-printf-return-value
+@opindex fprintf-return-value
Do not substitute constants for known return value of formatted output
functions such as @code{sprintf}, @code{snprintf}, @code{vsprintf}, and
@code{vsnprintf} (but not @code{printf} of @code{fprintf}). This
@item -fno-peephole
@itemx -fno-peephole2
@opindex fno-peephole
+@opindex fpeephole
@opindex fno-peephole2
+@opindex fpeephole2
Disable any machine-specific peephole optimizations. The difference
between @option{-fno-peephole} and @option{-fno-peephole2} is in how they
are implemented in the compiler; some targets use one, some use the
@item -fno-guess-branch-probability
@opindex fno-guess-branch-probability
+@opindex fguess-branch-probability
Do not guess branch probabilities using heuristics.
GCC uses heuristics to guess branch probabilities if they are
the linker so object file format must support named sections and linker must
place them in a reasonable way.
-Also profile feedback must be available to make this option effective. See
-@option{-fprofile-arcs} for details.
+This option isn't effective unless you either provide profile feedback
+(see @option{-fprofile-arcs} for details) or manually annotate functions with
+@code{hot} or @code{cold} attributes (@pxref{Common Function Attributes}).
Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
@item -fno-toplevel-reorder
@opindex fno-toplevel-reorder
+@opindex ftoplevel-reorder
Do not reorder top-level functions, variables, and @code{asm}
statements. Output them in the same order that they appear in the
input file. When this option is used, unreferenced static variables
that relies on a particular ordering. For new code, it is better to
use attributes when possible.
-Enabled at level @option{-O0}. When disabled explicitly, it also implies
-@option{-fno-section-anchors}, which is otherwise enabled at @option{-O0} on some
-targets.
+@option{-ftoplevel-reorder} is the default at @option{-O1} and higher, and
+also at @option{-O0} if @option{-fsection-anchors} is explicitly requested.
+Additionally @option{-fno-toplevel-reorder} implies
+@option{-fno-section-anchors}.
@item -fweb
@opindex fweb
merges them together into a single GIMPLE representation and optimizes
them as usual to produce @file{myprog}.
-The only important thing to keep in mind is that to enable link-time
+The important thing to keep in mind is that to enable link-time
optimizations you need to use the GCC driver to perform the link step.
-GCC then automatically performs link-time optimization if any of the
+GCC automatically performs link-time optimization if any of the
objects involved were compiled with the @option{-flto} command-line option.
-You generally
-should specify the optimization options to be used for link-time
-optimization though GCC tries to be clever at guessing an
-optimization level to use from the options used at compile time
-if you fail to specify one at link time. You can always override
+You can always override
the automatic decision to do link-time optimization
by passing @option{-fno-lto} to the link command.
used to allow the compiler to make these assumptions, which leads
to more aggressive optimization decisions.
-When @option{-fuse-linker-plugin} is not enabled, when a file is
-compiled with @option{-flto}, the generated object file is larger than
+When a file is compiled with @option{-flto} without
+@option{-fuse-linker-plugin}, the generated object file is larger than
a regular object file because it contains GIMPLE bytecodes and the usual
final code (see @option{-ffat-lto-objects}. This means that
object files with LTO information can be linked as normal object
@option{-fno-fat-lto-objects} is enabled the compile stage is faster
but you cannot perform a regular, non-LTO link on them.
-Additionally, the optimization flags used to compile individual files
-are not necessarily related to those used at link time. For instance,
-
-@smallexample
-gcc -c -O0 -ffat-lto-objects -flto foo.c
-gcc -c -O0 -ffat-lto-objects -flto bar.c
-gcc -o myprog -O3 foo.o bar.o
-@end smallexample
-
-This produces individual object files with unoptimized assembler
-code, but the resulting binary @file{myprog} is optimized at
-@option{-O3}. If, instead, the final binary is generated with
-@option{-fno-lto}, then @file{myprog} is not optimized.
-
When producing the final binary, GCC only
applies link-time optimizations to those files that contain bytecode.
Therefore, you can mix and match object files and libraries with
which files to optimize in LTO mode and which files to link without
further processing.
-There are some code generation flags preserved by GCC when
-generating bytecodes, as they need to be used during the final link
-stage. Generally options specified at link time override those
-specified at compile time.
+Generally, options specified at link time override those
+specified at compile time, although in some cases GCC attempts to infer
+link-time options from the settings used to compile the input files.
If you do not specify an optimization level option @option{-O} at
link time, then GCC uses the highest optimization level
-used when compiling the object files.
+used when compiling the object files. Note that it is generally
+ineffective to specify an optimization level option only at link time and
+not at compile time, for two reasons. First, compiling without
+optimization suppresses compiler passes that gather information
+needed for effective optimization at link time. Second, some early
+optimization passes can be performed only at compile time and
+not at link time.
+There are some code generation flags preserved by GCC when
+generating bytecodes, as they need to be used during the final link.
Currently, the following options and their settings are taken from
the first object file that explicitly specifies them:
@option{-fPIC}, @option{-fpic}, @option{-fpie}, @option{-fcommon},
GCC uses heuristics to correct or smooth out such inconsistencies. By
default, GCC emits an error message when an inconsistent profile is detected.
+This option is enabled by @option{-fauto-profile}.
+
@item -fprofile-use
@itemx -fprofile-use=@var{path}
@opindex fprofile-use
Enable profile feedback-directed optimizations,
-and the following optimizations
-which are generally profitable only with profile feedback available:
-@option{-fbranch-probabilities}, @option{-fvpt},
-@option{-funroll-loops}, @option{-fpeel-loops}, @option{-ftracer},
-@option{-ftree-vectorize}, and @option{ftree-loop-distribute-patterns}.
+and the following optimizations, many of which
+are generally profitable only with profile feedback available:
+
+@gccoptlist{-fbranch-probabilities -fprofile-values @gol
+-funroll-loops -fpeel-loops -ftracer -fvpt @gol
+-finline-functions -fipa-cp -fipa-cp-clone -fipa-bit-cp @gol
+-fpredictive-commoning -fsplit-loops -funswitch-loops @gol
+-fgcse-after-reload -ftree-loop-vectorize -ftree-slp-vectorize @gol
+-fvect-cost-model=dynamic -ftree-loop-distribute-patterns @gol
+-fprofile-reorder-functions}
Before you can use this option, you must first generate profiling information.
@xref{Instrumentation Options}, for information about the
match the source code. This error can be turned into a warning by using
@option{-Wno-error=coverage-mismatch}. Note this may result in poorly
optimized code. Additionally, by default, GCC also emits a warning message if
-the feedback profiles do not exist (See @option{-Wmissing-profile}).
+the feedback profiles do not exist (see @option{-Wmissing-profile}).
If @var{path} is specified, GCC looks at the @var{path} to find
the profile feedback data files. See @option{-fprofile-dir}.
@itemx -fauto-profile=@var{path}
@opindex fauto-profile
Enable sampling-based feedback-directed optimizations,
-and the following optimizations
-which are generally profitable only with profile feedback available:
-@option{-fbranch-probabilities}, @option{-fvpt},
-@option{-funroll-loops}, @option{-fpeel-loops}, @option{-ftracer},
-@option{-ftree-vectorize},
-@option{-finline-functions}, @option{-fipa-cp}, @option{-fipa-cp-clone},
-@option{-fpredictive-commoning}, @option{-funswitch-loops},
-@option{-fgcse-after-reload}, and @option{-ftree-loop-distribute-patterns}.
+and the following optimizations,
+many of which are generally profitable only with profile feedback available:
+
+@gccoptlist{-fbranch-probabilities -fprofile-values @gol
+-funroll-loops -fpeel-loops -ftracer -fvpt @gol
+-finline-functions -fipa-cp -fipa-cp-clone -fipa-bit-cp @gol
+-fpredictive-commoning -fsplit-loops -funswitch-loops @gol
+-fgcse-after-reload -ftree-loop-vectorize -ftree-slp-vectorize @gol
+-fvect-cost-model=dynamic -ftree-loop-distribute-patterns @gol
+-fprofile-correction}
@var{path} is the name of a file containing AutoFDO profile information.
If omitted, it defaults to @file{fbdata.afdo} in the current directory.
@item -fno-math-errno
@opindex fno-math-errno
+@opindex fmath-errno
Do not set @code{errno} after calling math functions that are executed
with a single instruction, e.g., @code{sqrt}. A program that relies on
IEEE exceptions for math error handling may want to use this flag
@item -fno-signed-zeros
@opindex fno-signed-zeros
+@opindex fsigned-zeros
Allow optimizations for floating-point arithmetic that ignore the
signedness of zero. IEEE arithmetic specifies the behavior of
distinct +0.0 and @minus{}0.0 values, which then prohibits simplification
@item -fno-trapping-math
@opindex fno-trapping-math
+@opindex ftrapping-math
Compile code assuming that floating-point operations cannot generate
user-visible traps. These traps include division by zero, overflow,
underflow, inexact result and invalid operation. This option requires
@item -fno-fp-int-builtin-inexact
@opindex fno-fp-int-builtin-inexact
+@opindex ffp-int-builtin-inexact
Do not allow the built-in functions @code{ceil}, @code{floor},
@code{round} and @code{trunc}, and their @code{float} and @code{long
double} variants, to generate code that raises the ``inexact''
branch is most likely to take, the @samp{REG_BR_PROB} values are used to
exactly determine which path is taken more often.
+Enabled by @option{-fprofile-use} and @option{-fauto-profile}.
+
@item -fprofile-values
@opindex fprofile-values
If combined with @option{-fprofile-arcs}, it adds code so that some
With @option{-fbranch-probabilities}, it reads back the data gathered
from profiling values of expressions for usage in optimizations.
-Enabled with @option{-fprofile-generate} and @option{-fprofile-use}.
+Enabled by @option{-fprofile-generate}, @option{-fprofile-use}, and
+@option{-fauto-profile}.
@item -fprofile-reorder-functions
@opindex fprofile-reorder-functions
Currently the optimizations include specialization of division operations
using the knowledge about the value of the denominator.
+Enabled with @option{-fprofile-use} and @option{-fauto-profile}.
+
@item -frename-registers
@opindex frename-registers
Attempt to avoid false dependencies in scheduled code by making use
simplifies the control flow of the function allowing other optimizations to do
a better job.
-Enabled with @option{-fprofile-use}.
+Enabled by @option{-fprofile-use} and @option{-fauto-profile}.
@item -funroll-loops
@opindex funroll-loops
a small constant number of iterations). This option makes code larger, and may
or may not make it run faster.
-Enabled with @option{-fprofile-use}.
+Enabled by @option{-fprofile-use} and @option{-fauto-profile}.
@item -funroll-all-loops
@opindex funroll-all-loops
complete loop peeling (i.e.@: complete removal of loops with small constant
number of iterations).
-Enabled with @option{-O3} and/or @option{-fprofile-use}.
+Enabled by @option{-O3}, @option{-fprofile-use}, and @option{-fauto-profile}.
@item -fmove-loop-invariants
@opindex fmove-loop-invariants
Enables the loop invariant motion pass in the RTL loop optimizer. Enabled
-at level @option{-O1}
+at level @option{-O1} and higher, except for @option{-Og}.
@item -fsplit-loops
@opindex fsplit-loops
Split a loop into two if it contains a condition that's always true
for one side of the iteration space and false for the other.
+Enabled by @option{-fprofile-use} and @option{-fauto-profile}.
+
@item -funswitch-loops
@opindex funswitch-loops
Move branches with loop invariant conditions out of the loop, with duplicates
of the loop on both branches (modified according to result of the condition).
+Enabled by @option{-fprofile-use} and @option{-fauto-profile}.
+
+@item -fversion-loops-for-strides
+@opindex fversion-loops-for-strides
+If a loop iterates over an array with a variable stride, create another
+version of the loop that assumes the stride is always one. For example:
+
+@smallexample
+for (int i = 0; i < n; ++i)
+ x[i * stride] = @dots{};
+@end smallexample
+
+becomes:
+
+@smallexample
+if (stride == 1)
+ for (int i = 0; i < n; ++i)
+ x[i] = @dots{};
+else
+ for (int i = 0; i < n; ++i)
+ x[i * stride] = @dots{};
+@end smallexample
+
+This is particularly useful for assumed-shape arrays in Fortran where
+(for example) it allows better vectorization assuming contiguous accesses.
+This flag is enabled by default at @option{-O3}.
+It is also enabled by @option{-fprofile-use} and @option{-fauto-profile}.
+
@item -ffunction-sections
@itemx -fdata-sections
@opindex ffunction-sections
(more restrictive) limit compared to functions declared inline can
be applied.
+@item max-inline-insns-small
+This is bound applied to calls which are considered relevant with
+@option{-finline-small-functions}.
+
+@item max-inline-insns-size
+This is bound applied to calls which are optimized for size. Small growth
+may be desirable to anticipate optimization oppurtunities exposed by inlining.
+
+@item uninlined-function-insns
+Number of instructions accounted by inliner for function overhead such as
+function prologue and epilogue.
+
+@item uninlined-function-time
+Extra time accounted by inliner for function overhead such as time needed to
+execute function prologue and epilogue
+
+@item uninlined-thunk-insns
+@item uninlined-thunk-time
+Same as @option{--param uninlined-function-insns} and
+@option{--param uninlined-function-time} but applied to function thunks
+
@item inline-min-speedup
When estimated performance improvement of caller + callee runtime exceeds this
threshold (in percent), the function can be inlined regardless of the limit on
Maximum number of prefetches that can run at the same time.
@item l1-cache-line-size
-The size of cache line in L1 cache, in bytes.
+The size of cache line in L1 data cache, in bytes.
@item l1-cache-size
-The size of L1 cache, in kilobytes.
+The size of L1 data cache, in kilobytes.
@item l2-cache-size
-The size of L2 cache, in kilobytes.
+The size of L2 data cache, in kilobytes.
@item prefetch-dynamic-strides
Whether the loop array prefetch pass should issue software prefetch hints
Number of lookahead cycles the model looks into; at '
' only enable instruction sorting heuristic.
+@item loop-versioning-max-inner-insns
+The maximum number of instructions that an inner loop can have
+before the loop versioning pass considers it too big to copy.
+
+@item loop-versioning-max-outer-insns
+The maximum number of instructions that an outer loop can have
+before the loop versioning pass considers it too big to copy,
+discounting any instructions in inner loops that directly benefit
+from versioning.
@end table
@end table
@table @gcctabopt
@cindex @command{prof}
+@cindex @command{gprof}
@item -p
+@itemx -pg
@opindex p
-Generate extra code to write profile information suitable for the
-analysis program @command{prof}. You must use this option when compiling
-the source files you want data about, and you must also use it when
-linking.
-
-@cindex @command{gprof}
-@item -pg
@opindex pg
Generate extra code to write profile information suitable for the
-analysis program @command{gprof}. You must use this option when compiling
+analysis program @command{prof} (for @option{-p}) or @command{gprof}
+(for @option{-pg}). You must use this option when compiling
the source files you want data about, and you must also use it when
linking.
+You can use the function attribute @code{no_instrument_function} to
+suppress profiling of individual functions when compiling with these options.
+@xref{Common Function Attributes}.
+
@item -fprofile-arcs
@opindex fprofile-arcs
Add code so that program flow @dfn{arcs} are instrumented. During
optimization. You must use @option{-fprofile-generate} both when
compiling and when linking your program.
-The following options are enabled: @option{-fprofile-arcs}, @option{-fprofile-values}, @option{-fvpt}.
+The following options are enabled:
+@option{-fprofile-arcs}, @option{-fprofile-values},
+@option{-finline-functions}, and @option{-fipa-bit-cp}.
If @var{path} is specified, GCC looks at the @var{path} to find
the profile feedback data files. See @option{-fprofile-dir}.
automatically selects @samp{prefer-atomic} when @option{-pthread}
is present in the command line.
+@item -fprofile-filter-files=@var{regex}
+@opindex fprofile-filter-files
+
+Instrument only functions from files where names match
+any regular expression (separated by a semi-colon).
+
+For example, @option{-fprofile-filter-files=main.c;module.*.c} will instrument
+only @file{main.c} and all C files starting with 'module'.
+
+@item -fprofile-exclude-files=@var{regex}
+@opindex fprofile-exclude-files
+
+Instrument only functions from files where names do not match
+all the regular expressions (separated by a semi-colon).
+
+For example, @option{-fprofile-exclude-files=/usr/*} will prevent instrumentation
+of all files that are located in @file{/usr/} folder.
+
@item -fsanitize=address
@opindex fsanitize=address
Enable AddressSanitizer, a fast memory error detector.
interrupt routines, and any functions from which the profiling functions
cannot safely be called (perhaps signal handlers, if the profiling
routines generate output or allocate memory).
+@xref{Common Function Attributes}.
@item -finstrument-functions-exclude-file-list=@var{file},@var{file},@dots{}
@opindex finstrument-functions-exclude-file-list
During the incremental link (by @option{-r}) the linker plugin will default to
@option{rel}. With current interfaces to GNU Binutils it is however not
possible to link incrementally LTO objects and non-LTO objects into a single
-mixed object file. In the case any of object files in incremental link can not
+mixed object file. In the case any of object files in incremental link cannot
be used for link-time optimization the linker plugin will output warning and
use @samp{nolto-rel}. To maintain the whole program optimization it is
recommended to link such objects into static library instead. Alternatively it
alternative with the library as a separate argument is only for
POSIX compliance and is not recommended.)
+The @option{-l} option is passed directly to the linker by GCC. Refer
+to your linker documentation for exact details. The general
+description below applies to the GNU linker.
+
+The linker searches a standard list of directories for the library.
+The directories searched include several standard system directories
+plus any that you specify with @option{-L}.
+
+Static libraries are archives of object files, and have file names
+like @file{lib@var{library}.a}. Some targets also support shared
+libraries, which typically have names like @file{lib@var{library}.so}.
+If both static and shared libraries are found, the linker gives
+preference to linking with the shared library unless the
+@option{-static} option is used.
+
It makes a difference where in the command you write this option; the
linker searches and processes libraries and object files in the order they
are specified. Thus, @samp{foo.o -lz bar.o} searches library @samp{z}
after file @file{foo.o} but before @file{bar.o}. If @file{bar.o} refers
to functions in @samp{z}, those functions may not be loaded.
-The linker searches a standard list of directories for the library,
-which is actually a file named @file{lib@var{library}.a}. The linker
-then uses this file as if it had been specified precisely by name.
-
-The directories searched include several standard system directories
-plus any that you specify with @option{-L}.
-
-Normally the files found this way are library files---archive files
-whose members are object files. The linker handles an archive file by
-scanning through it for members which define symbols that have so far
-been referenced but not defined. But if the file that is found is an
-ordinary object file, it is linked in the usual fashion. The only
-difference between using an @option{-l} option and specifying a file name
-is that @option{-l} surrounds @var{library} with @samp{lib} and @samp{.a}
-and searches several directories.
-
@item -lobjc
@opindex lobjc
You need this special case of the @option{-l} option in order to
@item -fno-gnu-unique
@opindex fno-gnu-unique
+@opindex fgnu-unique
On systems with recent GNU assembler and C library, the C++ compiler
uses the @code{STB_GNU_UNIQUE} binding to make sure that definitions
of template static data members and static local variables in inline
@item -fno-common
@opindex fno-common
+@opindex fcommon
@cindex tentative definitions
In C code, this option controls the placement of global variables
defined without an initializer, known as @dfn{tentative definitions}
@item -fno-ident
@opindex fno-ident
+@opindex fident
Ignore the @code{#ident} directive.
@item -finhibit-size-directive
@item -fno-plt
@opindex fno-plt
+@opindex fplt
Do not use the PLT for external function calls in position-independent code.
Instead, load the callee address at call sites from the GOT and branch to it.
This leads to more efficient code by eliminating PLT stubs and exposing
@item -fno-jump-tables
@opindex fno-jump-tables
+@opindex fjump-tables
Do not use jump tables for switch statements even where it would be
more efficient than other code generation strategies. This option is
of use in conjunction with @option{-fpic} or @option{-fPIC} for
@item -fsave-optimization-record
@opindex fsave-optimization-record
-Write a SRCFILE.opt-record.json file detailing what optimizations
+Write a SRCFILE.opt-record.json.gz file detailing what optimizations
were performed, for those optimizations that support @option{-fopt-info}.
-This option is experimental and the format of the data within the JSON
-file is subject to change.
+This option is experimental and the format of the data within the
+compressed JSON file is subject to change.
It is roughly equivalent to a machine-readable version of
@option{-fopt-info-all}, as a collection of messages with source file,
* PDP-11 Options::
* picoChip Options::
* PowerPC Options::
-* PowerPC SPE Options::
* RISC-V Options::
* RL78 Options::
* RS/6000 and PowerPC Options::
@option{-march=@var{arch}@r{@{}+@r{[}no@r{]}@var{feature}@r{@}*}}.
The permissible values for @var{arch} are @samp{armv8-a},
-@samp{armv8.1-a}, @samp{armv8.2-a}, @samp{armv8.3-a} or @samp{armv8.4-a}
-or @var{native}.
+@samp{armv8.1-a}, @samp{armv8.2-a}, @samp{armv8.3-a}, @samp{armv8.4-a},
+@samp{armv8.5-a} or @var{native}.
+
+The value @samp{armv8.5-a} implies @samp{armv8.4-a} and enables compiler
+support for the ARMv8.5-A architecture extensions.
The value @samp{armv8.4-a} implies @samp{armv8.3-a} and enables compiler
support for the ARMv8.4-A architecture extensions.
performance of the code. Permissible values for this option are:
@samp{generic}, @samp{cortex-a35}, @samp{cortex-a53}, @samp{cortex-a55},
@samp{cortex-a57}, @samp{cortex-a72}, @samp{cortex-a73}, @samp{cortex-a75},
-@samp{cortex-a76}, @samp{ares}, @samp{exynos-m1}, @samp{falkor},
+@samp{cortex-a76}, @samp{ares}, @samp{exynos-m1}, @samp{emag}, @samp{falkor},
@samp{qdf24xx}, @samp{saphira}, @samp{phecda}, @samp{xgene1}, @samp{vulcan},
+@samp{octeontx}, @samp{octeontx81}, @samp{octeontx83},
@samp{thunderx}, @samp{thunderxt88}, @samp{thunderxt88p1}, @samp{thunderxt81},
@samp{tsv110}, @samp{thunderxt83}, @samp{thunderx2t99},
@samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53},
Permissible values are @samp{none}, which disables return address signing,
@samp{non-leaf}, which enables pointer signing for functions which are not leaf
functions, and @samp{all}, which enables pointer signing for all functions. The
-default value is @samp{none}.
+default value is @samp{none}. This option has been deprecated by
+-mbranch-protection.
+
+@item -mbranch-protection=@var{none}|@var{standard}|@var{pac-ret}[+@var{leaf}]
+@opindex mbranch-protection
+Select the branch protection features to use.
+@samp{none} is the default and turns off all types of branch protection.
+@samp{standard} turns on all types of branch protection features. If a feature
+has additional tuning options, then @samp{standard} sets it to its standard
+level.
+@samp{pac-ret[+@var{leaf}]} turns on return address signing to its standard
+level: signing functions that save the return address to memory (non-leaf
+functions will practically always do this) using the a-key. The optional
+argument @samp{leaf} can be used to extend the signing to include leaf
+functions.
+@samp{bti} turns on branch target identification mechanism.
@item -msve-vector-bits=@var{bits}
@opindex msve-vector-bits
GCC supports two forms of SVE code generation: ``vector-length
agnostic'' output that works with any size of vector register and
-``vector-length specific'' output that only works when the vector
-registers are a particular size. Replacing @var{bits} with
-@samp{scalable} selects vector-length agnostic output while
-replacing it with a number selects vector-length specific output.
-The possible lengths in the latter case are: 128, 256, 512, 1024
-and 2048. @samp{scalable} is the default.
-
-At present, @samp{-msve-vector-bits=128} produces the same output
-as @samp{-msve-vector-bits=scalable}.
-
+``vector-length specific'' output that allows GCC to make assumptions
+about the vector length when it is useful for optimization reasons.
+The possible values of @samp{bits} are: @samp{scalable}, @samp{128},
+@samp{256}, @samp{512}, @samp{1024} and @samp{2048}.
+Specifying @samp{scalable} selects vector-length agnostic
+output. At present @samp{-msve-vector-bits=128} also generates vector-length
+agnostic output. All other values generate vector-length specific code.
+The behavior of these values may change in future releases and no value except
+@samp{scalable} should be relied on for producing code that is portable across
+different hardware SVE vector lengths.
+
+The default is @samp{-msve-vector-bits=scalable}, which produces
+vector-length agnostic code.
@end table
@subsubsection @option{-march} and @option{-mcpu} Feature Modifiers
@item profile
Enable the Statistical Profiling extension. This option is only to enable the
extension at the assembler level and does not affect code generation.
+@item rng
+Enable the Armv8.5-a Random Number instructions. This option is only to
+enable the extension at the assembler level and does not affect code
+generation.
+@item memtag
+Enable the Armv8.5-a Memory Tagging Extensions. This option is only to
+enable the extension at the assembler level and does not affect code
+generation.
+@item sb
+Enable the Armv8-a Speculation Barrier instruction. This option is only to
+enable the extension at the assembler level and does not affect code
+generation. This option is enabled by default for @option{-march=armv8.5-a}.
+@item ssbs
+Enable the Armv8-a Speculative Store Bypass Safe instruction. This option
+is only to enable the extension at the assembler level and does not affect code
+generation. This option is enabled by default for @option{-march=armv8.5-a}.
+@item predres
+Enable the Armv8-a Execution and Data Prediction Restriction instructions.
+This option is only to enable the extension at the assembler level and does
+not affect code generation. This option is enabled by default for
+@option{-march=armv8.5-a}.
@end table
@item -mno-soft-cmpsf
@opindex mno-soft-cmpsf
+@opindex msoft-cmpsf
For single-precision floating-point comparisons, emit an @code{fsub} instruction
and test the flags. This is faster than a software comparison, but can
get incorrect results in the presence of NaNs, or when two different small
@item -mno-round-nearest
@opindex mno-round-nearest
+@opindex mround-nearest
Make the scheduler assume that the rounding mode has been set to
truncating. The default is @option{-mround-nearest}.
The default is @option{-mfp-mode=caller}
-@item -mnosplit-lohi
+@item -mno-split-lohi
@itemx -mno-postinc
@itemx -mno-postmodify
-@opindex mnosplit-lohi
+@opindex mno-split-lohi
+@opindex msplit-lohi
@opindex mno-postinc
+@opindex mpostinc
@opindex mno-postmodify
+@opindex mpostmodify
Code generation tweaks that disable, respectively, splitting of 32-bit
loads, generation of post-increment addresses, and generation of
post-modify addresses. The defaults are @option{msplit-lohi},
@item -mnovect-double
@opindex mno-vect-double
+@opindex mvect-double
Change the preferred SIMD mode to SImode. The default is
@option{-mvect-double}, which uses DImode as preferred SIMD mode.
@item -mno-mpy
@opindex mno-mpy
+@opindex mmpy
Do not generate @code{mpy}-family instructions for ARC700. This option is
deprecated.
@item -mno-sdata
@opindex mno-sdata
+@opindex msdata
Do not generate sdata references. This is the default for tool chains
built for @w{@code{arc-linux-uclibc}} and @w{@code{arceb-linux-uclibc}}
targets.
@item -mno-volatile-cache
@opindex mno-volatile-cache
+@opindex mvolatile-cache
Enable cache bypass for volatile references.
@end table
@opindex mlra-priority-noncompact
Reduce target register priority for r0..r3 / r12..r15.
-@item -mno-millicode
-@opindex mno-millicode
+@item -mmillicode
+@opindex mmillicode
When optimizing for size (using @option{-Os}), prologues and epilogues
that have to save or restore a large number of registers are often
shortened by using call to a special function in libgcc; this is
referred to as a @emph{millicode} call. As these calls can pose
performance issues, and/or cause linking issues when linking in a
-nonstandard way, this option is provided to turn off millicode call
-generation.
+nonstandard way, this option is provided to turn on or off millicode
+call generation.
+
+@item -mcode-density-frame
+@opindex mcode-density-frame
+This option enable the compiler to emit @code{enter} and @code{leave}
+instructions. These instructions are only valid for CPUs with
+code-density feature.
@item -mmixed-code
@opindex mmixed-code
@item -mno-sched-prolog
@opindex mno-sched-prolog
+@opindex msched-prolog
Prevent the reordering of instructions in the function prologue, or the
merging of those instruction with the instructions in the function's
body. This means that all functions start with a recognizable set
@samp{armv7}, @samp{armv7-a}, @samp{armv7ve},
@samp{armv8-a}, @samp{armv8.1-a}, @samp{armv8.2-a}, @samp{armv8.3-a},
@samp{armv8.4-a},
+@samp{armv8.5-a},
@samp{armv7-r},
@samp{armv8-r},
@samp{armv6-m}, @samp{armv6s-m},
Disable the cryptographic instructions.
@item +nofp
Disable the floating-point, Advanced SIMD and cryptographic instructions.
+@item +sb
+Speculation Barrier Instruction.
+@item +predres
+Execution and Data Prediction Restriction Instructions.
@end table
@item armv8.1-a
@item +nofp
Disable the floating-point, Advanced SIMD and cryptographic instructions.
+
+@item +sb
+Speculation Barrier Instruction.
+
+@item +predres
+Execution and Data Prediction Restriction Instructions.
@end table
@item armv8.2-a
@item +nofp
Disable the floating-point, Advanced SIMD and cryptographic instructions.
+
+@item +sb
+Speculation Barrier Instruction.
+
+@item +predres
+Execution and Data Prediction Restriction Instructions.
@end table
@item armv8.4-a
@item +nocrypto
Disable the cryptographic extension.
+@item +nofp
+Disable the floating-point, Advanced SIMD and cryptographic instructions.
+
+@item +sb
+Speculation Barrier Instruction.
+
+@item +predres
+Execution and Data Prediction Restriction Instructions.
+@end table
+
+@item armv8.5-a
+@table @samp
+@item +fp16
+The half-precision floating-point data processing instructions.
+This also enables the Advanced SIMD and floating-point instructions as well
+as the Dot Product extension and the half-precision floating-point fmla
+extension.
+
+@item +simd
+The ARMv8.3-A Advanced SIMD and floating-point instructions as well as the
+Dot Product extension.
+
+@item +crypto
+The cryptographic instructions. This also enables the Advanced SIMD and
+floating-point instructions as well as the Dot Product extension.
+
+@item +nocrypto
+Disable the cryptographic extension.
+
@item +nofp
Disable the floating-point, Advanced SIMD and cryptographic instructions.
@end table
The VFPv3 floating-point instructions with 16 double-precision registers.
The extension +vfpv3-d16 can be used as an alias for this extension.
+@item +vfpv3xd-d16-fp16
+The single-precision VFPv3 floating-point instructions with 16 double-precision
+registers and the half-precision floating-point conversion operations.
+
+@item +vfpv3-d16-fp16
+The VFPv3 floating-point instructions with 16 double-precision
+registers and the half-precision floating-point conversion operations.
+
@item +nofp
Disable the floating-point extension.
which GCC should tune the performance of the code.
For some ARM implementations better performance can be obtained by using
this option.
-Permissible names are: @samp{arm2}, @samp{arm250},
-@samp{arm3}, @samp{arm6}, @samp{arm60}, @samp{arm600}, @samp{arm610},
-@samp{arm620}, @samp{arm7}, @samp{arm7m}, @samp{arm7d}, @samp{arm7dm},
-@samp{arm7di}, @samp{arm7dmi}, @samp{arm70}, @samp{arm700},
-@samp{arm700i}, @samp{arm710}, @samp{arm710c}, @samp{arm7100},
-@samp{arm720},
-@samp{arm7500}, @samp{arm7500fe}, @samp{arm7tdmi}, @samp{arm7tdmi-s},
-@samp{arm710t}, @samp{arm720t}, @samp{arm740t},
-@samp{strongarm}, @samp{strongarm110}, @samp{strongarm1100},
-@samp{strongarm1110},
-@samp{arm8}, @samp{arm810}, @samp{arm9}, @samp{arm9e}, @samp{arm920},
-@samp{arm920t}, @samp{arm922t}, @samp{arm946e-s}, @samp{arm966e-s},
-@samp{arm968e-s}, @samp{arm926ej-s}, @samp{arm940t}, @samp{arm9tdmi},
-@samp{arm10tdmi}, @samp{arm1020t}, @samp{arm1026ej-s},
-@samp{arm10e}, @samp{arm1020e}, @samp{arm1022e},
+Permissible names are: @samp{arm7tdmi}, @samp{arm7tdmi-s}, @samp{arm710t},
+@samp{arm720t}, @samp{arm740t}, @samp{strongarm}, @samp{strongarm110},
+@samp{strongarm1100}, 0@samp{strongarm1110}, @samp{arm8}, @samp{arm810},
+@samp{arm9}, @samp{arm9e}, @samp{arm920}, @samp{arm920t}, @samp{arm922t},
+@samp{arm946e-s}, @samp{arm966e-s}, @samp{arm968e-s}, @samp{arm926ej-s},
+@samp{arm940t}, @samp{arm9tdmi}, @samp{arm10tdmi}, @samp{arm1020t},
+@samp{arm1026ej-s}, @samp{arm10e}, @samp{arm1020e}, @samp{arm1022e},
@samp{arm1136j-s}, @samp{arm1136jf-s}, @samp{mpcore}, @samp{mpcorenovfp},
@samp{arm1156t2-s}, @samp{arm1156t2f-s}, @samp{arm1176jz-s}, @samp{arm1176jzf-s},
@samp{generic-armv7-a}, @samp{cortex-a5}, @samp{cortex-a7}, @samp{cortex-a8},
@samp{cortex-a57}, @samp{cortex-a72}, @samp{cortex-a73}, @samp{cortex-a75},
@samp{cortex-a76}, @samp{ares}, @samp{cortex-r4}, @samp{cortex-r4f},
@samp{cortex-r5}, @samp{cortex-r7}, @samp{cortex-r8}, @samp{cortex-r52},
-@samp{cortex-m33},
-@samp{cortex-m23},
-@samp{cortex-m7},
-@samp{cortex-m4},
-@samp{cortex-m3},
-@samp{cortex-m1},
-@samp{cortex-m0},
-@samp{cortex-m0plus},
-@samp{cortex-m1.small-multiply},
-@samp{cortex-m0.small-multiply},
-@samp{cortex-m0plus.small-multiply},
-@samp{exynos-m1},
-@samp{marvell-pj4},
-@samp{xscale}, @samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312},
-@samp{fa526}, @samp{fa626},
-@samp{fa606te}, @samp{fa626te}, @samp{fmp626}, @samp{fa726te},
+@samp{cortex-m0}, @samp{cortex-m0plus}, @samp{cortex-m1}, @samp{cortex-m3},
+@samp{cortex-m4}, @samp{cortex-m7}, @samp{cortex-m23}, @samp{cortex-m33},
+@samp{cortex-m1.small-multiply}, @samp{cortex-m0.small-multiply},
+@samp{cortex-m0plus.small-multiply}, @samp{exynos-m1}, @samp{marvell-pj4},
+@samp{xscale}, @samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312}, @samp{fa526},
+@samp{fa626}, @samp{fa606te}, @samp{fa626te}, @samp{fmp626}, @samp{fa726te},
@samp{xgene1}.
Additionally, this option can specify that GCC should tune the performance
@item +nofp.dp
Disables the double-precision component of the floating-point instructions
-on @samp{cortex-r5}, @samp{cortex-r52} and @samp{cortex-m7}.
+on @samp{cortex-r5}, @samp{cortex-r7}, @samp{cortex-r8}, @samp{cortex-r52} and
+@samp{cortex-m7}.
@item +nosimd
Disables the SIMD (but not floating-point) instructions on
@item -mno-specld-anomaly
@opindex mno-specld-anomaly
+@opindex mspecld-anomaly
Don't generate extra code to prevent speculative loads from occurring.
@item -mcsync-anomaly
@item -mno-csync-anomaly
@opindex mno-csync-anomaly
+@opindex mcsync-anomaly
Don't generate extra code to prevent CSYNC or SSYNC instructions from
occurring too soon after a conditional branch.
-@item -mlow-64k
-@opindex mlow-64k
+@item -mlow64k
+@opindex mlow64k
When enabled, the compiler is free to take advantage of the knowledge that
the entire program fits into the low 64k of memory.
-@item -mno-low-64k
-@opindex mno-low-64k
+@item -mno-low64k
+@opindex mno-low64k
Assume that the program is arbitrarily large. This is the default.
@item -mstack-check-l1
@item -mno-id-shared-library
@opindex mno-id-shared-library
+@opindex mid-shared-library
Generate code that doesn't assume ID-based shared libraries are being used.
This is the default.
@item -mno-leaf-id-shared-library
@opindex mno-leaf-id-shared-library
+@opindex mleaf-id-shared-library
Do not assume that the code being compiled won't link against any ID shared
libraries. Slower code is generated for jump and call insns.
@item -mno-sep-data
@opindex mno-sep-data
+@opindex msep-data
Generate code that assumes that the data segment follows the text segment.
This is the default.
@item -mno-side-effects
@opindex mno-side-effects
+@opindex mside-effects
Do not emit instructions with side effects in addressing modes other than
post-increment.
@item -mno-dword
@opindex mno-dword
+@opindex mdword
Do not use double word instructions.
@item -mno-optimize-membar
@opindex mno-optimize-membar
+@opindex moptimize-membar
This switch disables the automatic removal of redundant @code{membar}
instructions from the generated code.
@item -mno-exr
@opindex mno-exr
+@opindex mexr
Extended registers are not stored on stack before execution of function
with monitor attribute. Default option is @option{-mno-exr}.
This option is valid only for H8S targets.
@item -mno-space-regs
@opindex mno-space-regs
+@opindex mspace-regs
Generate code that assumes the target has no space registers. This allows
GCC to generate faster indirect calls and use unscaled index address modes.
@item -mlong-calls
@opindex mno-long-calls
+@opindex mlong-calls
Generate code that uses long call sequences. This ensures that a call
is always able to reach linker generated stubs. The default is to generate
long calls only when the distance from the call site to the beginning
@item -mno-inline-int-divide
@opindex mno-inline-int-divide
+@opindex minline-int-divide
Do not generate inline code for divides of integer values.
@item -minline-sqrt-min-latency
The @code{rtd} instruction is supported by the 68010, 68020, 68030,
68040, 68060 and CPU32 processors, but not by the 68000 or 5200.
-@item -mno-rtd
-@opindex mno-rtd
-Do not use the calling conventions selected by @option{-mrtd}.
-This is the default.
+The default is @option{-mno-rtd}.
@item -malign-int
@itemx -mno-align-int
@samp{orion},
@samp{p5600}, @samp{p6600},
@samp{r2000}, @samp{r3000}, @samp{r3900}, @samp{r4000}, @samp{r4400},
-@samp{r4600}, @samp{r4650}, @samp{r4700}, @samp{r6000}, @samp{r8000},
+@samp{r4600}, @samp{r4650}, @samp{r4700}, @samp{r5900},
+@samp{r6000}, @samp{r8000},
@samp{rm7000}, @samp{rm9000},
@samp{r10000}, @samp{r12000}, @samp{r14000}, @samp{r16000},
@samp{sb1},
@option{-march=r10000} is used; @option{-mno-fix-r10000} is the default
otherwise.
+@item -mfix-r5900
+@itemx -mno-fix-r5900
+@opindex mfix-r5900
+Do not attempt to schedule the preceding instruction into the delay slot
+of a branch instruction placed at the end of a short loop of six
+instructions or fewer and always schedule a @code{nop} instruction there
+instead. The short loop bug under certain conditions causes loops to
+execute only once or twice, due to a hardware bug in the R5900 chip. The
+workaround is implemented by the assembler rather than by GCC@.
+
@item -mfix-rm7000
@itemx -mno-fix-rm7000
@opindex mfix-rm7000
instructions if the target is the @samp{AM33} or later. This is the
default. This option defines the preprocessor macro @code{__LIW__}.
-@item -mnoliw
-@opindex mnoliw
+@item -mno-liw
+@opindex mno-liw
Do not allow the compiler to generate @emph{Long Instruction Word}
instructions. This option defines the preprocessor macro
@code{__NO_LIW__}.
instructions if the target is the @samp{AM33} or later. This is the
default. This option defines the preprocessor macro @code{__SETLB__}.
-@item -mnosetlb
-@opindex mnosetlb
+@item -mno-setlb
+@opindex mno-setlb
Do not allow the compiler to generate @emph{SETLB} or @emph{Lcc}
instructions. This option defines the preprocessor macro
@code{__NO_SETLB__}.
Do not generate conditional move instructions.
@item -mext-perf
-@opindex mperf-ext
+@opindex mext-perf
Generate performance extension instructions.
@item -mno-ext-perf
-@opindex mno-perf-ext
+@opindex mno-ext-perf
Do not generate performance extension instructions.
@item -mext-perf2
-@opindex mperf-ext
+@opindex mext-perf2
Generate performance extension 2 instructions.
@item -mno-ext-perf2
-@opindex mno-perf-ext
+@opindex mno-ext-perf2
Do not generate performance extension 2 instructions.
@item -mext-string
-@opindex mperf-ext
+@opindex mext-string
Generate string extension instructions.
@item -mno-ext-string
-@opindex mno-perf-ext
+@opindex mno-ext-string
Do not generate string extension instructions.
@item -mv3push
@item -mshftimm
@opindex mshftimm
Generate code for hardware which supports shift immediate related instructions
-(i.e. @code{l.srai}, @code{l.srli}, @code{l.slli}, @code{1.rori}). Note, to
-enable generation of the @code{l.rori} instruction the @option{-mror} flag must
-also be specified.
-
-@item -msoft-div
-@opindex msoft-div
-Generate code for hardware which requires divide instruction emulation.
-
-@item -msoft-mul
-@opindex msoft-mul
-Generate code for hardware which requires multiply instruction emulation.
-
-@end table
-
-@node PDP-11 Options
-@subsection PDP-11 Options
-@cindex PDP-11 Options
-
-These options are defined for the PDP-11:
-
-@table @gcctabopt
-@item -mfpu
-@opindex mfpu
-Use hardware FPP floating point. This is the default. (FIS floating
-point on the PDP-11/40 is not supported.) Implies -m45.
-
-@item -msoft-float
-@opindex msoft-float
-Do not use hardware floating point.
-
-@item -mac0
-@opindex mac0
-Return floating-point results in ac0 (fr0 in Unix assembler syntax).
-
-@item -mno-ac0
-@opindex mno-ac0
-Return floating-point results in memory. This is the default.
-
-@item -m40
-@opindex m40
-Generate code for a PDP-11/40. Implies -msoft-float -mno-split.
-
-@item -m45
-@opindex m45
-Generate code for a PDP-11/45. This is the default.
-
-@item -m10
-@opindex m10
-Generate code for a PDP-11/10. Implies -msoft-float -mno-split.
-
-@item -mint16
-@itemx -mno-int32
-@opindex mint16
-@opindex mno-int32
-Use 16-bit @code{int}. This is the default.
-
-@item -mint32
-@itemx -mno-int16
-@opindex mint32
-@opindex mno-int16
-Use 32-bit @code{int}.
-
-@item -msplit
-@opindex msplit
-Target has split instruction and data space. Implies -m45.
-
-@item -munix-asm
-@opindex munix-asm
-Use Unix assembler syntax.
-
-@item -mdec-asm
-@opindex mdec-asm
-Use DEC assembler syntax.
-
-@item -mgnu-asm
-@opindex mgnu-asm
-Use GNU assembler syntax. This is the default.
-
-@item -mlra
-@opindex mlra
-Use the new LRA register allocator. By default, the old ``reload''
-allocator is used.
-@end table
-
-@node picoChip Options
-@subsection picoChip Options
-@cindex picoChip options
-
-These @samp{-m} options are defined for picoChip implementations:
-
-@table @gcctabopt
-
-@item -mae=@var{ae_type}
-@opindex mcpu
-Set the instruction set, register set, and instruction scheduling
-parameters for array element type @var{ae_type}. Supported values
-for @var{ae_type} are @samp{ANY}, @samp{MUL}, and @samp{MAC}.
-
-@option{-mae=ANY} selects a completely generic AE type. Code
-generated with this option runs on any of the other AE types. The
-code is not as efficient as it would be if compiled for a specific
-AE type, and some types of operation (e.g., multiplication) do not
-work properly on all types of AE.
-
-@option{-mae=MUL} selects a MUL AE type. This is the most useful AE type
-for compiled code, and is the default.
-
-@option{-mae=MAC} selects a DSP-style MAC AE. Code compiled with this
-option may suffer from poor performance of byte (char) manipulation,
-since the DSP AE does not provide hardware support for byte load/stores.
-
-@item -msymbol-as-address
-Enable the compiler to directly use a symbol name as an address in a
-load/store instruction, without first loading it into a
-register. Typically, the use of this option generates larger
-programs, which run faster than when the option isn't used. However, the
-results vary from program to program, so it is left as a user option,
-rather than being permanently enabled.
-
-@item -mno-inefficient-warnings
-Disables warnings about the generation of inefficient code. These
-warnings can be generated, for example, when compiling code that
-performs byte-level memory operations on the MAC AE type. The MAC AE has
-no hardware support for byte-level memory operations, so all byte
-load/stores must be synthesized from word load/store operations. This is
-inefficient and a warning is generated to indicate
-that you should rewrite the code to avoid byte operations, or to target
-an AE type that has the necessary hardware support. This option disables
-these warnings.
-
-@end table
-
-@node PowerPC Options
-@subsection PowerPC Options
-@cindex PowerPC options
-
-These are listed under @xref{RS/6000 and PowerPC Options}.
-
-@node PowerPC SPE Options
-@subsection PowerPC SPE Options
-@cindex PowerPC SPE options
-
-These @samp{-m} options are defined for PowerPC SPE:
-@table @gcctabopt
-@item -mmfcrf
-@itemx -mno-mfcrf
-@itemx -mpopcntb
-@itemx -mno-popcntb
-@opindex mmfcrf
-@opindex mno-mfcrf
-@opindex mpopcntb
-@opindex mno-popcntb
-You use these options to specify which instructions are available on the
-processor you are using. The default value of these options is
-determined when configuring GCC@. Specifying the
-@option{-mcpu=@var{cpu_type}} overrides the specification of these
-options. We recommend you use the @option{-mcpu=@var{cpu_type}} option
-rather than the options listed above.
-
-The @option{-mmfcrf} option allows GCC to generate the move from
-condition register field instruction implemented on the POWER4
-processor and other processors that support the PowerPC V2.01
-architecture.
-The @option{-mpopcntb} option allows GCC to generate the popcount and
-double-precision FP reciprocal estimate instruction implemented on the
-POWER5 processor and other processors that support the PowerPC V2.02
-architecture.
-
-@item -mcpu=@var{cpu_type}
-@opindex mcpu
-Set architecture type, register usage, and
-instruction scheduling parameters for machine type @var{cpu_type}.
-Supported values for @var{cpu_type} are @samp{8540}, @samp{8548},
-and @samp{native}.
-
-@option{-mcpu=powerpc} specifies pure 32-bit PowerPC (either
-endian), with an appropriate, generic processor model assumed for
-scheduling purposes.
-
-Specifying @samp{native} as cpu type detects and selects the
-architecture option that corresponds to the host processor of the
-system performing the compilation.
-@option{-mcpu=native} has no effect if GCC does not recognize the
-processor.
-
-The other options specify a specific processor. Code generated under
-those options runs best on that processor, and may not run at all on
-others.
-
-The @option{-mcpu} options automatically enable or disable the
-following options:
-
-@gccoptlist{-mhard-float -mmfcrf -mmultiple @gol
--mpopcntb -mpopcntd @gol
--msingle-float -mdouble-float @gol
--mfloat128}
-
-The particular options set for any particular CPU varies between
-compiler versions, depending on what setting seems to produce optimal
-code for that CPU; it doesn't necessarily reflect the actual hardware's
-capabilities. If you wish to set an individual option to a particular
-value, you may specify it after the @option{-mcpu} option, like
-@option{-mcpu=8548}.
-
-@item -mtune=@var{cpu_type}
-@opindex mtune
-Set the instruction scheduling parameters for machine type
-@var{cpu_type}, but do not set the architecture type or register usage,
-as @option{-mcpu=@var{cpu_type}} does. The same
-values for @var{cpu_type} are used for @option{-mtune} as for
-@option{-mcpu}. If both are specified, the code generated uses the
-architecture and registers set by @option{-mcpu}, but the
-scheduling parameters set by @option{-mtune}.
-
-@item -msecure-plt
-@opindex msecure-plt
-Generate code that allows @command{ld} and @command{ld.so}
-to build executables and shared
-libraries with non-executable @code{.plt} and @code{.got} sections.
-This is a PowerPC
-32-bit SYSV ABI option.
-
-@item -mbss-plt
-@opindex mbss-plt
-Generate code that uses a BSS @code{.plt} section that @command{ld.so}
-fills in, and
-requires @code{.plt} and @code{.got}
-sections that are both writable and executable.
-This is a PowerPC 32-bit SYSV ABI option.
-
-@item -misel
-@itemx -mno-isel
-@opindex misel
-@opindex mno-isel
-This switch enables or disables the generation of ISEL instructions.
-
-@item -misel=@var{yes/no}
-This switch has been deprecated. Use @option{-misel} and
-@option{-mno-isel} instead.
-
-@item -mspe
-@itemx -mno-spe
-@opindex mspe
-@opindex mno-spe
-This switch enables or disables the generation of SPE simd
-instructions.
-
-@item -mspe=@var{yes/no}
-This option has been deprecated. Use @option{-mspe} and
-@option{-mno-spe} instead.
-
-@item -mfloat128
-@itemx -mno-float128
-@opindex mfloat128
-@opindex mno-float128
-Enable/disable the @var{__float128} keyword for IEEE 128-bit floating point
-and use either software emulation for IEEE 128-bit floating point or
-hardware instructions.
-
-@item -mfloat-gprs=@var{yes/single/double/no}
-@itemx -mfloat-gprs
-@opindex mfloat-gprs
-This switch enables or disables the generation of floating-point
-operations on the general-purpose registers for architectures that
-support it.
-
-The argument @samp{yes} or @samp{single} enables the use of
-single-precision floating-point operations.
-
-The argument @samp{double} enables the use of single and
-double-precision floating-point operations.
-
-The argument @samp{no} disables floating-point operations on the
-general-purpose registers.
-
-This option is currently only available on the MPC854x.
-
-@item -mfull-toc
-@itemx -mno-fp-in-toc
-@itemx -mno-sum-in-toc
-@itemx -mminimal-toc
-@opindex mfull-toc
-@opindex mno-fp-in-toc
-@opindex mno-sum-in-toc
-@opindex mminimal-toc
-Modify generation of the TOC (Table Of Contents), which is created for
-every executable file. The @option{-mfull-toc} option is selected by
-default. In that case, GCC allocates at least one TOC entry for
-each unique non-automatic variable reference in your program. GCC
-also places floating-point constants in the TOC@. However, only
-16,384 entries are available in the TOC@.
-
-If you receive a linker error message that saying you have overflowed
-the available TOC space, you can reduce the amount of TOC space used
-with the @option{-mno-fp-in-toc} and @option{-mno-sum-in-toc} options.
-@option{-mno-fp-in-toc} prevents GCC from putting floating-point
-constants in the TOC and @option{-mno-sum-in-toc} forces GCC to
-generate code to calculate the sum of an address and a constant at
-run time instead of putting that sum into the TOC@. You may specify one
-or both of these options. Each causes GCC to produce very slightly
-slower and larger code at the expense of conserving TOC space.
-
-If you still run out of space in the TOC even when you specify both of
-these options, specify @option{-mminimal-toc} instead. This option causes
-GCC to make only one TOC entry for every file. When you specify this
-option, GCC produces code that is slower and larger but which
-uses extremely little TOC space. You may wish to use this option
-only on files that contain less frequently-executed code.
-
-@item -maix32
-@opindex maix32
-Disables the 64-bit ABI. GCC defaults to @option{-maix32}.
-
-@item -mxl-compat
-@itemx -mno-xl-compat
-@opindex mxl-compat
-@opindex mno-xl-compat
-Produce code that conforms more closely to IBM XL compiler semantics
-when using AIX-compatible ABI@. Pass floating-point arguments to
-prototyped functions beyond the register save area (RSA) on the stack
-in addition to argument FPRs. Do not assume that most significant
-double in 128-bit long double value is properly rounded when comparing
-values and converting to double. Use XL symbol names for long double
-support routines.
-
-The AIX calling convention was extended but not initially documented to
-handle an obscure K&R C case of calling a function that takes the
-address of its arguments with fewer arguments than declared. IBM XL
-compilers access floating-point arguments that do not fit in the
-RSA from the stack when a subroutine is compiled without
-optimization. Because always storing floating-point arguments on the
-stack is inefficient and rarely needed, this option is not enabled by
-default and only is necessary when calling subroutines compiled by IBM
-XL compilers without optimization.
-
-@item -malign-natural
-@itemx -malign-power
-@opindex malign-natural
-@opindex malign-power
-On AIX, 32-bit Darwin, and 64-bit PowerPC GNU/Linux, the option
-@option{-malign-natural} overrides the ABI-defined alignment of larger
-types, such as floating-point doubles, on their natural size-based boundary.
-The option @option{-malign-power} instructs GCC to follow the ABI-specified
-alignment rules. GCC defaults to the standard alignment defined in the ABI@.
-
-On 64-bit Darwin, natural alignment is the default, and @option{-malign-power}
-is not supported.
-
-@item -msoft-float
-@itemx -mhard-float
-@opindex msoft-float
-@opindex mhard-float
-Generate code that does not use (uses) the floating-point register set.
-Software floating-point emulation is provided if you use the
-@option{-msoft-float} option, and pass the option to GCC when linking.
-
-@item -msingle-float
-@itemx -mdouble-float
-@opindex msingle-float
-@opindex mdouble-float
-Generate code for single- or double-precision floating-point operations.
-@option{-mdouble-float} implies @option{-msingle-float}.
-
-@item -mmultiple
-@itemx -mno-multiple
-@opindex mmultiple
-@opindex mno-multiple
-Generate code that uses (does not use) the load multiple word
-instructions and the store multiple word instructions. These
-instructions are generated by default on POWER systems, and not
-generated on PowerPC systems. Do not use @option{-mmultiple} on little-endian
-PowerPC systems, since those instructions do not work when the
-processor is in little-endian mode. The exceptions are PPC740 and
-PPC750 which permit these instructions in little-endian mode.
-
-@item -mupdate
-@itemx -mno-update
-@opindex mupdate
-@opindex mno-update
-Generate code that uses (does not use) the load or store instructions
-that update the base register to the address of the calculated memory
-location. These instructions are generated by default. If you use
-@option{-mno-update}, there is a small window between the time that the
-stack pointer is updated and the address of the previous frame is
-stored, which means code that walks the stack frame across interrupts or
-signals may get corrupted data.
-
-@item -mavoid-indexed-addresses
-@itemx -mno-avoid-indexed-addresses
-@opindex mavoid-indexed-addresses
-@opindex mno-avoid-indexed-addresses
-Generate code that tries to avoid (not avoid) the use of indexed load
-or store instructions. These instructions can incur a performance
-penalty on Power6 processors in certain situations, such as when
-stepping through large arrays that cross a 16M boundary. This option
-is enabled by default when targeting Power6 and disabled otherwise.
-
-@item -mfused-madd
-@itemx -mno-fused-madd
-@opindex mfused-madd
-@opindex mno-fused-madd
-Generate code that uses (does not use) the floating-point multiply and
-accumulate instructions. These instructions are generated by default
-if hardware floating point is used. The machine-dependent
-@option{-mfused-madd} option is now mapped to the machine-independent
-@option{-ffp-contract=fast} option, and @option{-mno-fused-madd} is
-mapped to @option{-ffp-contract=off}.
-
-@item -mno-strict-align
-@itemx -mstrict-align
-@opindex mno-strict-align
-@opindex mstrict-align
-On System V.4 and embedded PowerPC systems do not (do) assume that
-unaligned memory references are handled by the system.
-
-@item -mrelocatable
-@itemx -mno-relocatable
-@opindex mrelocatable
-@opindex mno-relocatable
-Generate code that allows (does not allow) a static executable to be
-relocated to a different address at run time. A simple embedded
-PowerPC system loader should relocate the entire contents of
-@code{.got2} and 4-byte locations listed in the @code{.fixup} section,
-a table of 32-bit addresses generated by this option. For this to
-work, all objects linked together must be compiled with
-@option{-mrelocatable} or @option{-mrelocatable-lib}.
-@option{-mrelocatable} code aligns the stack to an 8-byte boundary.
-
-@item -mrelocatable-lib
-@itemx -mno-relocatable-lib
-@opindex mrelocatable-lib
-@opindex mno-relocatable-lib
-Like @option{-mrelocatable}, @option{-mrelocatable-lib} generates a
-@code{.fixup} section to allow static executables to be relocated at
-run time, but @option{-mrelocatable-lib} does not use the smaller stack
-alignment of @option{-mrelocatable}. Objects compiled with
-@option{-mrelocatable-lib} may be linked with objects compiled with
-any combination of the @option{-mrelocatable} options.
-
-@item -mno-toc
-@itemx -mtoc
-@opindex mno-toc
-@opindex mtoc
-On System V.4 and embedded PowerPC systems do not (do) assume that
-register 2 contains a pointer to a global area pointing to the addresses
-used in the program.
-
-@item -mlittle
-@itemx -mlittle-endian
-@opindex mlittle
-@opindex mlittle-endian
-On System V.4 and embedded PowerPC systems compile code for the
-processor in little-endian mode. The @option{-mlittle-endian} option is
-the same as @option{-mlittle}.
-
-@item -mbig
-@itemx -mbig-endian
-@opindex mbig
-@opindex mbig-endian
-On System V.4 and embedded PowerPC systems compile code for the
-processor in big-endian mode. The @option{-mbig-endian} option is
-the same as @option{-mbig}.
-
-@item -mdynamic-no-pic
-@opindex mdynamic-no-pic
-On Darwin and Mac OS X systems, compile code so that it is not
-relocatable, but that its external references are relocatable. The
-resulting code is suitable for applications, but not shared
-libraries.
-
-@item -msingle-pic-base
-@opindex msingle-pic-base
-Treat the register used for PIC addressing as read-only, rather than
-loading it in the prologue for each function. The runtime system is
-responsible for initializing this register with an appropriate value
-before execution begins.
-
-@item -mprioritize-restricted-insns=@var{priority}
-@opindex mprioritize-restricted-insns
-This option controls the priority that is assigned to
-dispatch-slot restricted instructions during the second scheduling
-pass. The argument @var{priority} takes the value @samp{0}, @samp{1},
-or @samp{2} to assign no, highest, or second-highest (respectively)
-priority to dispatch-slot restricted
-instructions.
-
-@item -msched-costly-dep=@var{dependence_type}
-@opindex msched-costly-dep
-This option controls which dependences are considered costly
-by the target during instruction scheduling. The argument
-@var{dependence_type} takes one of the following values:
-
-@table @asis
-@item @samp{no}
-No dependence is costly.
-
-@item @samp{all}
-All dependences are costly.
-
-@item @samp{true_store_to_load}
-A true dependence from store to load is costly.
-
-@item @samp{store_to_load}
-Any dependence from store to load is costly.
-
-@item @var{number}
-Any dependence for which the latency is greater than or equal to
-@var{number} is costly.
-@end table
-
-@item -minsert-sched-nops=@var{scheme}
-@opindex minsert-sched-nops
-This option controls which NOP insertion scheme is used during
-the second scheduling pass. The argument @var{scheme} takes one of the
-following values:
-
-@table @asis
-@item @samp{no}
-Don't insert NOPs.
-
-@item @samp{pad}
-Pad with NOPs any dispatch group that has vacant issue slots,
-according to the scheduler's grouping.
-
-@item @samp{regroup_exact}
-Insert NOPs to force costly dependent insns into
-separate groups. Insert exactly as many NOPs as needed to force an insn
-to a new group, according to the estimated processor grouping.
-
-@item @var{number}
-Insert NOPs to force costly dependent insns into
-separate groups. Insert @var{number} NOPs to force an insn to a new group.
-@end table
-
-@item -mcall-sysv
-@opindex mcall-sysv
-On System V.4 and embedded PowerPC systems compile code using calling
-conventions that adhere to the March 1995 draft of the System V
-Application Binary Interface, PowerPC processor supplement. This is the
-default unless you configured GCC using @samp{powerpc-*-eabiaix}.
-
-@item -mcall-sysv-eabi
-@itemx -mcall-eabi
-@opindex mcall-sysv-eabi
-@opindex mcall-eabi
-Specify both @option{-mcall-sysv} and @option{-meabi} options.
-
-@item -mcall-sysv-noeabi
-@opindex mcall-sysv-noeabi
-Specify both @option{-mcall-sysv} and @option{-mno-eabi} options.
-
-@item -mcall-aixdesc
-@opindex m
-On System V.4 and embedded PowerPC systems compile code for the AIX
-operating system.
-
-@item -mcall-linux
-@opindex mcall-linux
-On System V.4 and embedded PowerPC systems compile code for the
-Linux-based GNU system.
-
-@item -mcall-freebsd
-@opindex mcall-freebsd
-On System V.4 and embedded PowerPC systems compile code for the
-FreeBSD operating system.
-
-@item -mcall-netbsd
-@opindex mcall-netbsd
-On System V.4 and embedded PowerPC systems compile code for the
-NetBSD operating system.
-
-@item -mcall-openbsd
-@opindex mcall-netbsd
-On System V.4 and embedded PowerPC systems compile code for the
-OpenBSD operating system.
-
-@item -maix-struct-return
-@opindex maix-struct-return
-Return all structures in memory (as specified by the AIX ABI)@.
-
-@item -msvr4-struct-return
-@opindex msvr4-struct-return
-Return structures smaller than 8 bytes in registers (as specified by the
-SVR4 ABI)@.
-
-@item -mabi=@var{abi-type}
-@opindex mabi
-Extend the current ABI with a particular extension, or remove such extension.
-Valid values are @samp{altivec}, @samp{no-altivec}, @samp{spe},
-@samp{no-spe}, @samp{ibmlongdouble}, @samp{ieeelongdouble},
-@samp{elfv1}, @samp{elfv2}@.
-
-@item -mabi=spe
-@opindex mabi=spe
-Extend the current ABI with SPE ABI extensions. This does not change
-the default ABI, instead it adds the SPE ABI extensions to the current
-ABI@.
-
-@item -mabi=no-spe
-@opindex mabi=no-spe
-Disable Book-E SPE ABI extensions for the current ABI@.
-
-@item -mabi=ibmlongdouble
-@opindex mabi=ibmlongdouble
-Change the current ABI to use IBM extended-precision long double.
-This is not likely to work if your system defaults to using IEEE
-extended-precision long double. If you change the long double type
-from IEEE extended-precision, the compiler will issue a warning unless
-you use the @option{-Wno-psabi} option.
-
-@item -mabi=ieeelongdouble
-@opindex mabi=ieeelongdouble
-Change the current ABI to use IEEE extended-precision long double.
-This is not likely to work if your system defaults to using IBM
-extended-precision long double. If you change the long double type
-from IBM extended-precision, the compiler will issue a warning unless
-you use the @option{-Wno-psabi} option.
-
-@item -mabi=elfv1
-@opindex mabi=elfv1
-Change the current ABI to use the ELFv1 ABI.
-This is the default ABI for big-endian PowerPC 64-bit Linux.
-Overriding the default ABI requires special system support and is
-likely to fail in spectacular ways.
-
-@item -mabi=elfv2
-@opindex mabi=elfv2
-Change the current ABI to use the ELFv2 ABI.
-This is the default ABI for little-endian PowerPC 64-bit Linux.
-Overriding the default ABI requires special system support and is
-likely to fail in spectacular ways.
-
-@item -mgnu-attribute
-@itemx -mno-gnu-attribute
-@opindex mgnu-attribute
-@opindex mno-gnu-attribute
-Emit .gnu_attribute assembly directives to set tag/value pairs in a
-.gnu.attributes section that specify ABI variations in function
-parameters or return values.
-
-@item -mprototype
-@itemx -mno-prototype
-@opindex mprototype
-@opindex mno-prototype
-On System V.4 and embedded PowerPC systems assume that all calls to
-variable argument functions are properly prototyped. Otherwise, the
-compiler must insert an instruction before every non-prototyped call to
-set or clear bit 6 of the condition code register (@code{CR}) to
-indicate whether floating-point values are passed in the floating-point
-registers in case the function takes variable arguments. With
-@option{-mprototype}, only calls to prototyped variable argument functions
-set or clear the bit.
-
-@item -msim
-@opindex msim
-On embedded PowerPC systems, assume that the startup module is called
-@file{sim-crt0.o} and that the standard C libraries are @file{libsim.a} and
-@file{libc.a}. This is the default for @samp{powerpc-*-eabisim}
-configurations.
-
-@item -mmvme
-@opindex mmvme
-On embedded PowerPC systems, assume that the startup module is called
-@file{crt0.o} and the standard C libraries are @file{libmvme.a} and
-@file{libc.a}.
-
-@item -mads
-@opindex mads
-On embedded PowerPC systems, assume that the startup module is called
-@file{crt0.o} and the standard C libraries are @file{libads.a} and
-@file{libc.a}.
-
-@item -myellowknife
-@opindex myellowknife
-On embedded PowerPC systems, assume that the startup module is called
-@file{crt0.o} and the standard C libraries are @file{libyk.a} and
-@file{libc.a}.
-
-@item -mvxworks
-@opindex mvxworks
-On System V.4 and embedded PowerPC systems, specify that you are
-compiling for a VxWorks system.
-
-@item -memb
-@opindex memb
-On embedded PowerPC systems, set the @code{PPC_EMB} bit in the ELF flags
-header to indicate that @samp{eabi} extended relocations are used.
-
-@item -meabi
-@itemx -mno-eabi
-@opindex meabi
-@opindex mno-eabi
-On System V.4 and embedded PowerPC systems do (do not) adhere to the
-Embedded Applications Binary Interface (EABI), which is a set of
-modifications to the System V.4 specifications. Selecting @option{-meabi}
-means that the stack is aligned to an 8-byte boundary, a function
-@code{__eabi} is called from @code{main} to set up the EABI
-environment, and the @option{-msdata} option can use both @code{r2} and
-@code{r13} to point to two separate small data areas. Selecting
-@option{-mno-eabi} means that the stack is aligned to a 16-byte boundary,
-no EABI initialization function is called from @code{main}, and the
-@option{-msdata} option only uses @code{r13} to point to a single
-small data area. The @option{-meabi} option is on by default if you
-configured GCC using one of the @samp{powerpc*-*-eabi*} options.
-
-@item -msdata=eabi
-@opindex msdata=eabi
-On System V.4 and embedded PowerPC systems, put small initialized
-@code{const} global and static data in the @code{.sdata2} section, which
-is pointed to by register @code{r2}. Put small initialized
-non-@code{const} global and static data in the @code{.sdata} section,
-which is pointed to by register @code{r13}. Put small uninitialized
-global and static data in the @code{.sbss} section, which is adjacent to
-the @code{.sdata} section. The @option{-msdata=eabi} option is
-incompatible with the @option{-mrelocatable} option. The
-@option{-msdata=eabi} option also sets the @option{-memb} option.
-
-@item -msdata=sysv
-@opindex msdata=sysv
-On System V.4 and embedded PowerPC systems, put small global and static
-data in the @code{.sdata} section, which is pointed to by register
-@code{r13}. Put small uninitialized global and static data in the
-@code{.sbss} section, which is adjacent to the @code{.sdata} section.
-The @option{-msdata=sysv} option is incompatible with the
-@option{-mrelocatable} option.
-
-@item -msdata=default
-@itemx -msdata
-@opindex msdata=default
-@opindex msdata
-On System V.4 and embedded PowerPC systems, if @option{-meabi} is used,
-compile code the same as @option{-msdata=eabi}, otherwise compile code the
-same as @option{-msdata=sysv}.
-
-@item -msdata=data
-@opindex msdata=data
-On System V.4 and embedded PowerPC systems, put small global
-data in the @code{.sdata} section. Put small uninitialized global
-data in the @code{.sbss} section. Do not use register @code{r13}
-to address small data however. This is the default behavior unless
-other @option{-msdata} options are used.
-
-@item -msdata=none
-@itemx -mno-sdata
-@opindex msdata=none
-@opindex mno-sdata
-On embedded PowerPC systems, put all initialized global and static data
-in the @code{.data} section, and all uninitialized data in the
-@code{.bss} section.
-
-@item -mblock-move-inline-limit=@var{num}
-@opindex mblock-move-inline-limit
-Inline all block moves (such as calls to @code{memcpy} or structure
-copies) less than or equal to @var{num} bytes. The minimum value for
-@var{num} is 32 bytes on 32-bit targets and 64 bytes on 64-bit
-targets. The default value is target-specific.
+(i.e. @code{l.srai}, @code{l.srli}, @code{l.slli}, @code{1.rori}). Note, to
+enable generation of the @code{l.rori} instruction the @option{-mror} flag must
+also be specified.
-@item -G @var{num}
-@opindex G
-@cindex smaller data references (PowerPC)
-@cindex .sdata/.sdata2 references (PowerPC)
-On embedded PowerPC systems, put global and static items less than or
-equal to @var{num} bytes into the small data or BSS sections instead of
-the normal data or BSS section. By default, @var{num} is 8. The
-@option{-G @var{num}} switch is also passed to the linker.
-All modules should be compiled with the same @option{-G @var{num}} value.
+@item -msoft-div
+@opindex msoft-div
+Generate code for hardware which requires divide instruction emulation.
-@item -mregnames
-@itemx -mno-regnames
-@opindex mregnames
-@opindex mno-regnames
-On System V.4 and embedded PowerPC systems do (do not) emit register
-names in the assembly language output using symbolic forms.
+@item -msoft-mul
+@opindex msoft-mul
+Generate code for hardware which requires multiply instruction emulation.
-@item -mlongcall
-@itemx -mno-longcall
-@opindex mlongcall
-@opindex mno-longcall
-By default assume that all calls are far away so that a longer and more
-expensive calling sequence is required. This is required for calls
-farther than 32 megabytes (33,554,432 bytes) from the current location.
-A short call is generated if the compiler knows
-the call cannot be that far away. This setting can be overridden by
-the @code{shortcall} function attribute, or by @code{#pragma
-longcall(0)}.
+@end table
-Some linkers are capable of detecting out-of-range calls and generating
-glue code on the fly. On these systems, long calls are unnecessary and
-generate slower code. As of this writing, the AIX linker can do this,
-as can the GNU linker for PowerPC/64. It is planned to add this feature
-to the GNU linker for 32-bit PowerPC systems as well.
+@node PDP-11 Options
+@subsection PDP-11 Options
+@cindex PDP-11 Options
-In the future, GCC may ignore all longcall specifications
-when the linker is known to generate glue.
+These options are defined for the PDP-11:
-@item -mtls-markers
-@itemx -mno-tls-markers
-@opindex mtls-markers
-@opindex mno-tls-markers
-Mark (do not mark) calls to @code{__tls_get_addr} with a relocation
-specifying the function argument. The relocation allows the linker to
-reliably associate function call with argument setup instructions for
-TLS optimization, which in turn allows GCC to better schedule the
-sequence.
+@table @gcctabopt
+@item -mfpu
+@opindex mfpu
+Use hardware FPP floating point. This is the default. (FIS floating
+point on the PDP-11/40 is not supported.) Implies -m45.
-@item -mrecip
-@itemx -mno-recip
-@opindex mrecip
-This option enables use of the reciprocal estimate and
-reciprocal square root estimate instructions with additional
-Newton-Raphson steps to increase precision instead of doing a divide or
-square root and divide for floating-point arguments. You should use
-the @option{-ffast-math} option when using @option{-mrecip} (or at
-least @option{-funsafe-math-optimizations},
-@option{-ffinite-math-only}, @option{-freciprocal-math} and
-@option{-fno-trapping-math}). Note that while the throughput of the
-sequence is generally higher than the throughput of the non-reciprocal
-instruction, the precision of the sequence can be decreased by up to 2
-ulp (i.e.@: the inverse of 1.0 equals 0.99999994) for reciprocal square
-roots.
+@item -msoft-float
+@opindex msoft-float
+Do not use hardware floating point.
-@item -mrecip=@var{opt}
-@opindex mrecip=opt
-This option controls which reciprocal estimate instructions
-may be used. @var{opt} is a comma-separated list of options, which may
-be preceded by a @code{!} to invert the option:
+@item -mac0
+@opindex mac0
+Return floating-point results in ac0 (fr0 in Unix assembler syntax).
-@table @samp
+@item -mno-ac0
+@opindex mno-ac0
+Return floating-point results in memory. This is the default.
-@item all
-Enable all estimate instructions.
+@item -m40
+@opindex m40
+Generate code for a PDP-11/40. Implies -msoft-float -mno-split.
-@item default
-Enable the default instructions, equivalent to @option{-mrecip}.
+@item -m45
+@opindex m45
+Generate code for a PDP-11/45. This is the default.
-@item none
-Disable all estimate instructions, equivalent to @option{-mno-recip}.
+@item -m10
+@opindex m10
+Generate code for a PDP-11/10. Implies -msoft-float -mno-split.
-@item div
-Enable the reciprocal approximation instructions for both
-single and double precision.
+@item -mint16
+@itemx -mno-int32
+@opindex mint16
+@opindex mno-int32
+Use 16-bit @code{int}. This is the default.
-@item divf
-Enable the single-precision reciprocal approximation instructions.
+@item -mint32
+@itemx -mno-int16
+@opindex mint32
+@opindex mno-int16
+Use 32-bit @code{int}.
-@item divd
-Enable the double-precision reciprocal approximation instructions.
+@item -msplit
+@opindex msplit
+Target has split instruction and data space. Implies -m45.
-@item rsqrt
-Enable the reciprocal square root approximation instructions for both
-single and double precision.
+@item -munix-asm
+@opindex munix-asm
+Use Unix assembler syntax.
-@item rsqrtf
-Enable the single-precision reciprocal square root approximation instructions.
+@item -mdec-asm
+@opindex mdec-asm
+Use DEC assembler syntax.
-@item rsqrtd
-Enable the double-precision reciprocal square root approximation instructions.
+@item -mgnu-asm
+@opindex mgnu-asm
+Use GNU assembler syntax. This is the default.
+@item -mlra
+@opindex mlra
+Use the new LRA register allocator. By default, the old ``reload''
+allocator is used.
@end table
-So, for example, @option{-mrecip=all,!rsqrtd} enables
-all of the reciprocal estimate instructions, except for the
-@code{FRSQRTE}, @code{XSRSQRTEDP}, and @code{XVRSQRTEDP} instructions
-which handle the double-precision reciprocal square root calculations.
+@node picoChip Options
+@subsection picoChip Options
+@cindex picoChip options
-@item -mrecip-precision
-@itemx -mno-recip-precision
-@opindex mrecip-precision
-Assume (do not assume) that the reciprocal estimate instructions
-provide higher-precision estimates than is mandated by the PowerPC
-ABI. Selecting @option{-mcpu=power6}, @option{-mcpu=power7} or
-@option{-mcpu=power8} automatically selects @option{-mrecip-precision}.
-The double-precision square root estimate instructions are not generated by
-default on low-precision machines, since they do not provide an
-estimate that converges after three steps.
+These @samp{-m} options are defined for picoChip implementations:
-@item -mpointers-to-nested-functions
-@itemx -mno-pointers-to-nested-functions
-@opindex mpointers-to-nested-functions
-Generate (do not generate) code to load up the static chain register
-(@code{r11}) when calling through a pointer on AIX and 64-bit Linux
-systems where a function pointer points to a 3-word descriptor giving
-the function address, TOC value to be loaded in register @code{r2}, and
-static chain value to be loaded in register @code{r11}. The
-@option{-mpointers-to-nested-functions} is on by default. You cannot
-call through pointers to nested functions or pointers
-to functions compiled in other languages that use the static chain if
-you use @option{-mno-pointers-to-nested-functions}.
+@table @gcctabopt
-@item -msave-toc-indirect
-@itemx -mno-save-toc-indirect
-@opindex msave-toc-indirect
-Generate (do not generate) code to save the TOC value in the reserved
-stack location in the function prologue if the function calls through
-a pointer on AIX and 64-bit Linux systems. If the TOC value is not
-saved in the prologue, it is saved just before the call through the
-pointer. The @option{-mno-save-toc-indirect} option is the default.
+@item -mae=@var{ae_type}
+@opindex mcpu
+Set the instruction set, register set, and instruction scheduling
+parameters for array element type @var{ae_type}. Supported values
+for @var{ae_type} are @samp{ANY}, @samp{MUL}, and @samp{MAC}.
-@item -mcompat-align-parm
-@itemx -mno-compat-align-parm
-@opindex mcompat-align-parm
-Generate (do not generate) code to pass structure parameters with a
-maximum alignment of 64 bits, for compatibility with older versions
-of GCC.
+@option{-mae=ANY} selects a completely generic AE type. Code
+generated with this option runs on any of the other AE types. The
+code is not as efficient as it would be if compiled for a specific
+AE type, and some types of operation (e.g., multiplication) do not
+work properly on all types of AE.
-Older versions of GCC (prior to 4.9.0) incorrectly did not align a
-structure parameter on a 128-bit boundary when that structure contained
-a member requiring 128-bit alignment. This is corrected in more
-recent versions of GCC. This option may be used to generate code
-that is compatible with functions compiled with older versions of
-GCC.
+@option{-mae=MUL} selects a MUL AE type. This is the most useful AE type
+for compiled code, and is the default.
-The @option{-mno-compat-align-parm} option is the default.
+@option{-mae=MAC} selects a DSP-style MAC AE. Code compiled with this
+option may suffer from poor performance of byte (char) manipulation,
+since the DSP AE does not provide hardware support for byte load/stores.
-@item -mstack-protector-guard=@var{guard}
-@itemx -mstack-protector-guard-reg=@var{reg}
-@itemx -mstack-protector-guard-offset=@var{offset}
-@itemx -mstack-protector-guard-symbol=@var{symbol}
-@opindex mstack-protector-guard
-@opindex mstack-protector-guard-reg
-@opindex mstack-protector-guard-offset
-@opindex mstack-protector-guard-symbol
-Generate stack protection code using canary at @var{guard}. Supported
-locations are @samp{global} for global canary or @samp{tls} for per-thread
-canary in the TLS block (the default with GNU libc version 2.4 or later).
+@item -msymbol-as-address
+Enable the compiler to directly use a symbol name as an address in a
+load/store instruction, without first loading it into a
+register. Typically, the use of this option generates larger
+programs, which run faster than when the option isn't used. However, the
+results vary from program to program, so it is left as a user option,
+rather than being permanently enabled.
+
+@item -mno-inefficient-warnings
+Disables warnings about the generation of inefficient code. These
+warnings can be generated, for example, when compiling code that
+performs byte-level memory operations on the MAC AE type. The MAC AE has
+no hardware support for byte-level memory operations, so all byte
+load/stores must be synthesized from word load/store operations. This is
+inefficient and a warning is generated to indicate
+that you should rewrite the code to avoid byte operations, or to target
+an AE type that has the necessary hardware support. This option disables
+these warnings.
-With the latter choice the options
-@option{-mstack-protector-guard-reg=@var{reg}} and
-@option{-mstack-protector-guard-offset=@var{offset}} furthermore specify
-which register to use as base register for reading the canary, and from what
-offset from that base register. The default for those is as specified in the
-relevant ABI. @option{-mstack-protector-guard-symbol=@var{symbol}} overrides
-the offset with a symbol reference to a canary in the TLS block.
@end table
+@node PowerPC Options
+@subsection PowerPC Options
+@cindex PowerPC options
+
+These are listed under @xref{RS/6000 and PowerPC Options}.
@node RISC-V Options
@subsection RISC-V Options
following options:
@gccoptlist{-maltivec -mfprnd -mhard-float -mmfcrf -mmultiple @gol
--mpopcntb -mpopcntd -mpowerpc64 @gol
+-mpopcntb -mpopcntd -mpowerpc64 @gol
-mpowerpc-gpopt -mpowerpc-gfxopt @gol
--mmulhw -mdlmzb -mmfpgpr -mvsx @gol
--mcrypto -mhtm -mpower8-fusion -mpower8-vector @gol
--mquad-memory -mquad-memory-atomic -mfloat128 -mfloat128-hardware}
+-mmulhw -mdlmzb -mmfpgpr -mvsx @gol
+-mcrypto -mhtm -mpower8-fusion -mpower8-vector @gol
+-mquad-memory -mquad-memory-atomic -mfloat128 -mfloat128-hardware}
The particular options set for any particular CPU varies between
compiler versions, depending on what setting seems to produce optimal
This is not likely to work if your system defaults to using IEEE
extended-precision long double. If you change the long double type
from IEEE extended-precision, the compiler will issue a warning unless
-you use the @option{-Wno-psabi} option.
+you use the @option{-Wno-psabi} option. Requires @option{-mlong-double-128}
+to be enabled.
@item -mabi=ieeelongdouble
@opindex mabi=ieeelongdouble
This is not likely to work if your system defaults to using IBM
extended-precision long double. If you change the long double type
from IBM extended-precision, the compiler will issue a warning unless
-you use the @option{-Wno-psabi} option.
+you use the @option{-Wno-psabi} option. Requires @option{-mlong-double-128}
+to be enabled.
@item -mabi=elfv1
@opindex mabi=elfv1
system representing a certain processor type. Possible values for
@var{cpu-type} are @samp{z900}/@samp{arch5}, @samp{z990}/@samp{arch6},
@samp{z9-109}, @samp{z9-ec}/@samp{arch7}, @samp{z10}/@samp{arch8},
-@samp{z196}/@samp{arch9}, @samp{zEC12}, @samp{z13}/@samp{arch11}, and
-@samp{native}.
+@samp{z196}/@samp{arch9}, @samp{zEC12}, @samp{z13}/@samp{arch11},
+@samp{z14}/@samp{arch12}, and @samp{native}.
The default is @option{-march=z900}.
@item -mfixed-range=@var{register-range}
@opindex mfixed-range
Generate code treating the given register range as fixed registers.
-A fixed register is one that the register allocator can not use. This is
+A fixed register is one that the register allocator cannot use. This is
useful when compiling kernel code. A register range is specified as
two registers separated by a dash. Multiple register ranges can be
specified separated by a comma.
AVX512BITALG, AVX512VNNI, VPCLMULQDQ, VAES, PCONFIG and WBNOINVD instruction
set support.
+@item cascadelake
+Intel Cascadelake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3,
+SSE4.1, SSE4.2, POPCNT, PKU, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA, BMI,
+BMI2, F16C, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVEC, XSAVES, AVX512F, CLWB,
+AVX512VL, AVX512BW, AVX512DQ, AVX512CD and AVX512VNNI instruction set support.
+
@item k6
AMD K6 CPU with MMX instruction set support.
@item -mno-fp-ret-in-387
@opindex mno-fp-ret-in-387
+@opindex mfp-ret-in-387
Do not use the FPU registers for return values of functions.
The usual calling convention has functions return values of types
@item -mno-fancy-math-387
@opindex mno-fancy-math-387
+@opindex mfancy-math-387
Some 387 emulators do not support the @code{sin}, @code{cos} and
@code{sqrt} instructions for the 387. Specify this option to avoid
generating those instructions.
when using Intel Processor Trace where it generates more precise timing
information for function calls.
+@item -mmanual-endbr
+@opindex mmanual-endbr
+Insert ENDBR instruction at function entry only via the @code{cf_check}
+function attribute. This is useful when used with the option
+@option{-fcf-protection=branch} to control ENDBR insertion at the
+function entry.
+
@item -mcall-ms2sysv-xlogues
@opindex mcall-ms2sysv-xlogues
@opindex mno-call-ms2sysv-xlogues
@item -mno-align-stringops
@opindex mno-align-stringops
+@opindex malign-stringops
Do not align the destination of inlined string operations. This switch reduces
code size and improves performance in case the destination is already aligned,
but GCC doesn't know about it.
should be patched in later dynamically. This is likely only
useful together with @option{-mrecord-mcount}.
+@item -minstrument-return=@var{type}
+@opindex minstrument-return
+Instrument function exit in -pg -mfentry instrumented functions with
+call to specified function. This only instruments true returns ending
+with ret, but not sibling calls ending with jump. Valid types
+are @var{none} to not instrument, @var{call} to generate a call to __return__,
+or @var{nop5} to generate a 5 byte nop.
+
+@item -mrecord-return
+@itemx -mno-record-return
+@opindex mrecord-return
+Generate a __return_loc section pointing to all return instrumentation code.
+
+@item -mfentry-name=@var{name}
+@opindex mfentry-name
+Set name of __fentry__ symbol called at function entry for -pg -mfentry functions.
+
+@item -mfentry-section=@var{name}
+@opindex mfentry-section
+Set name of section to record -mrecord-mcount calls (default __mcount_loc).
+
@item -mskip-rax-setup
@itemx -mno-skip-rax-setup
@opindex mskip-rax-setup
not be reachable in the large code model.
Note that @option{-mindirect-branch=thunk-extern} is incompatible with
-@option{-fcf-protection=branch} since the external thunk can not be modified
+@option{-fcf-protection=branch} since the external thunk cannot be modified
to disable control-flow check.
@item -mfunction-return=@var{choice}
@item -mno-red-zone
@opindex mno-red-zone
+@opindex mred-zone
Do not use a so-called ``red zone'' for x86-64 code. The red zone is mandated
by the x86-64 ABI; it is a 128-byte area beyond the location of the
stack pointer that is not modified by signal or interrupt handlers
@item -fno-set-stack-executable
@opindex fno-set-stack-executable
+@opindex fset-stack-executable
This option is available for MinGW targets. It specifies that
the executable flag for the stack used by nested functions isn't
set. This is necessary for binaries running in kernel mode of
@item -fwritable-relocated-rdata
@opindex fno-writable-relocated-rdata
+@opindex fwritable-relocated-rdata
This option is available for MinGW and Cygwin targets. It specifies
that relocated-data in read-only section is put into the @code{.data}
section. This is a necessary for older runtimes not supporting
projects / thirdparty / gcc.git / blobdiff