/* Code to analyze doloop loops in order for targets to perform late
optimizations converting doloops to other forms of hardware loops.
- Copyright (C) 2011, 2012 Free Software Foundation, Inc.
+ Copyright (C) 2011-2021 Free Software Foundation, Inc.
This file is part of GCC.
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
+#ifndef GCC_HW_DOLOOP_H
+#define GCC_HW_DOLOOP_H
+
/* We need to keep a vector of loops */
typedef struct hwloop_info_d *hwloop_info;
basic_block successor;
/* The last instruction in the tail. */
- rtx last_insn;
+ rtx_insn *last_insn;
/* The loop_end insn. */
- rtx loop_end;
+ rtx_insn *loop_end;
/* The iteration register. */
rtx iter_reg;
/* The new label placed at the beginning of the loop. */
- rtx start_label;
+ rtx_insn *start_label;
/* The new label placed at the end of the loop. */
rtx end_label;
/* Examine INSN. If it is a suitable doloop_end pattern, return the
iteration register, which should be a single hard register.
Otherwise, return NULL_RTX. */
- rtx (*end_pattern_reg) (rtx insn);
+ rtx (*end_pattern_reg) (rtx_insn *insn);
/* Optimize LOOP. The target should perform any additional analysis
(e.g. checking that the loop isn't too long), and then perform
its transformations. Return true if successful, false if the
};
extern void reorg_loops (bool, struct hw_doloop_hooks *);
+
+#endif /* GCC_HW_DOLOOP_H */