it is possible. */
int lra_bad_spill_regno_start;
+/* A pseudo of Pmode. */
+rtx lra_pmode_pseudo;
+
/* Inheritance pseudo regnos before the new spill pass. */
bitmap_head lra_inheritance_pseudos;
/* File used for output of LRA debug information. */
FILE *lra_dump_file;
+/* True if we split hard reg after the last constraint sub-pass. */
+bool lra_hard_reg_split_p;
+
/* True if we found an asm error. */
bool lra_asm_error_p;
lra_dump_file = f;
lra_asm_error_p = false;
+ lra_pmode_pseudo = gen_reg_rtx (Pmode);
timevar_push (TV_LRA);
if (live_p)
lra_clear_live_ranges ();
bool fails_p;
+ lra_hard_reg_split_p = false;
do
{
/* We need live ranges for lra_assign -- so build them.
live_p = false;
if (! lra_split_hard_reg_for ())
break;
+ lra_hard_reg_split_p = true;
}
}
while (fails_p);