/* real.c - software floating point emulation.
- Copyright (C) 1993-2014 Free Software Foundation, Inc.
+ Copyright (C) 1993-2020 Free Software Foundation, Inc.
Contributed by Stephen L. Moshier (moshier@world.std.com).
Re-written by Richard Henderson <rth@redhat.com>
#include "system.h"
#include "coretypes.h"
#include "tm.h"
+#include "rtl.h"
#include "tree.h"
-#include "diagnostic-core.h"
-#include "real.h"
#include "realmpfr.h"
-#include "tm_p.h"
#include "dfp.h"
-#include "wide-int.h"
/* The floating point model used internally is not exactly IEEE 754
compliant, and close to the description in the ISO C99 standard,
for (i = 0; i < w; ++i)
r->sig[i] = 0;
- r->sig[w] &= ~(((unsigned long)1 << (n % HOST_BITS_PER_LONG)) - 1);
+ /* We are actually passing N == SIGNIFICAND_BITS which would result
+ in an out-of-bound access below. */
+ if (n % HOST_BITS_PER_LONG != 0)
+ r->sig[w] &= ~(((unsigned long)1 << (n % HOST_BITS_PER_LONG)) - 1);
}
/* Divide the significands of A and B, placing the result in R. Return
case CLASS2 (rvc_normal, rvc_inf):
/* R + Inf = Inf. */
*r = *b;
+ /* Make resulting NaN value to be qNaN. The caller has the
+ responsibility to avoid the operation if flag_signaling_nans
+ is on. */
+ r->signalling = 0;
r->sign = sign ^ subtract_p;
return false;
case CLASS2 (rvc_inf, rvc_normal):
/* Inf + R = Inf. */
*r = *a;
+ /* Make resulting NaN value to be qNaN. The caller has the
+ responsibility to avoid the operation if flag_signaling_nans
+ is on. */
+ r->signalling = 0;
return false;
case CLASS2 (rvc_inf, rvc_inf):
case CLASS2 (rvc_nan, rvc_nan):
/* ANY * NaN = NaN. */
*r = *b;
+ /* Make resulting NaN value to be qNaN. The caller has the
+ responsibility to avoid the operation if flag_signaling_nans
+ is on. */
+ r->signalling = 0;
r->sign = sign;
return false;
case CLASS2 (rvc_nan, rvc_inf):
/* NaN * ANY = NaN. */
*r = *a;
+ /* Make resulting NaN value to be qNaN. The caller has the
+ responsibility to avoid the operation if flag_signaling_nans
+ is on. */
+ r->signalling = 0;
r->sign = sign;
return false;
case CLASS2 (rvc_nan, rvc_nan):
/* ANY / NaN = NaN. */
*r = *b;
+ /* Make resulting NaN value to be qNaN. The caller has the
+ responsibility to avoid the operation if flag_signaling_nans
+ is on. */
+ r->signalling = 0;
r->sign = sign;
return false;
case CLASS2 (rvc_nan, rvc_inf):
/* NaN / ANY = NaN. */
*r = *a;
+ /* Make resulting NaN value to be qNaN. The caller has the
+ responsibility to avoid the operation if flag_signaling_nans
+ is on. */
+ r->signalling = 0;
r->sign = sign;
return false;
gcc_unreachable ();
}
- if (a->sign != b->sign)
- return -a->sign - -b->sign;
-
if (a->decimal || b->decimal)
return decimal_do_compare (a, b, nan_result);
+ if (a->sign != b->sign)
+ return -a->sign - -b->sign;
+
if (REAL_EXP (a) > REAL_EXP (b))
ret = 1;
else if (REAL_EXP (a) < REAL_EXP (b))
case rvc_zero:
case rvc_inf:
case rvc_nan:
+ /* Make resulting NaN value to be qNaN. The caller has the
+ responsibility to avoid the operation if flag_signaling_nans
+ is on. */
+ r->signalling = 0;
break;
case rvc_normal:
case MIN_EXPR:
if (op1->cl == rvc_nan)
+ {
*r = *op1;
+ /* Make resulting NaN value to be qNaN. The caller has the
+ responsibility to avoid the operation if flag_signaling_nans
+ is on. */
+ r->signalling = 0;
+ }
else if (do_compare (op0, op1, -1) < 0)
*r = *op0;
else
case MAX_EXPR:
if (op1->cl == rvc_nan)
+ {
*r = *op1;
+ /* Make resulting NaN value to be qNaN. The caller has the
+ responsibility to avoid the operation if flag_signaling_nans
+ is on. */
+ r->signalling = 0;
+ }
else if (do_compare (op0, op1, 1) < 0)
*r = *op1;
else
return r;
}
+/* Return whether OP0 == OP1. */
+
+bool
+real_equal (const REAL_VALUE_TYPE *op0, const REAL_VALUE_TYPE *op1)
+{
+ return do_compare (op0, op1, -1) == 0;
+}
+
+/* Return whether OP0 < OP1. */
+
+bool
+real_less (const REAL_VALUE_TYPE *op0, const REAL_VALUE_TYPE *op1)
+{
+ return do_compare (op0, op1, 1) < 0;
+}
+
bool
real_compare (int icode, const REAL_VALUE_TYPE *op0,
const REAL_VALUE_TYPE *op1)
switch (code)
{
case LT_EXPR:
- return do_compare (op0, op1, 1) < 0;
+ return real_less (op0, op1);
case LE_EXPR:
return do_compare (op0, op1, 1) <= 0;
case GT_EXPR:
case GE_EXPR:
return do_compare (op0, op1, -1) >= 0;
case EQ_EXPR:
- return do_compare (op0, op1, -1) == 0;
+ return real_equal (op0, op1);
case NE_EXPR:
return do_compare (op0, op1, -1) != 0;
case UNORDERED_EXPR:
case rvc_zero:
case rvc_inf:
case rvc_nan:
+ /* Make resulting NaN value to be qNaN. The caller has the
+ responsibility to avoid the operation if flag_signaling_nans
+ is on. */
+ r->signalling = 0;
break;
case rvc_normal:
return (r->cl == rvc_nan);
}
+/* Determine whether a floating-point value X is a signaling NaN. */
+bool real_issignaling_nan (const REAL_VALUE_TYPE *r)
+{
+ return real_isnan (r) && r->signalling;
+}
+
/* Determine whether a floating-point value X is finite. */
bool
return true;
}
-/* Try to change R into its exact multiplicative inverse in machine
- mode MODE. Return true if successful. */
+/* Try to change R into its exact multiplicative inverse in format FMT.
+ Return true if successful. */
bool
-exact_real_inverse (enum machine_mode mode, REAL_VALUE_TYPE *r)
+exact_real_inverse (format_helper fmt, REAL_VALUE_TYPE *r)
{
const REAL_VALUE_TYPE *one = real_digit (1);
REAL_VALUE_TYPE u;
if (r->sig[SIGSZ-1] != SIG_MSB)
return false;
- /* Find the inverse and truncate to the required mode. */
+ /* Find the inverse and truncate to the required format. */
do_divide (&u, one, r);
- real_convert (&u, mode, &u);
+ real_convert (&u, fmt, &u);
/* The rounding may have overflowed. */
if (u.cl != rvc_normal)
in TMODE. */
bool
-real_can_shorten_arithmetic (enum machine_mode imode, enum machine_mode tmode)
+real_can_shorten_arithmetic (machine_mode imode, machine_mode tmode)
{
const struct real_format *tfmt, *ifmt;
tfmt = REAL_MODE_FORMAT (tmode);
case rvc_inf:
case rvc_nan:
overflow:
- i = (unsigned HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1);
+ i = HOST_WIDE_INT_1U << (HOST_BITS_PER_WIDE_INT - 1);
if (!r->sign)
i--;
return i;
void
real_to_decimal_for_mode (char *str, const REAL_VALUE_TYPE *r_orig,
size_t buf_size, size_t digits,
- int crop_trailing_zeros, enum machine_mode mode)
+ int crop_trailing_zeros, machine_mode mode)
{
const struct real_format *fmt = NULL;
const REAL_VALUE_TYPE *one, *ten;
do_multiply (&u, &v, ten);
- /* Stop if we're now >= 1. */
- if (REAL_EXP (&u) > 0)
+ /* Stop if we're now >= 1 or zero. */
+ if (REAL_EXP (&u) > 0 || u.cl == rvc_zero)
break;
v = u;
/* Append the exponent. */
sprintf (last, "e%+d", dec_exp);
-#ifdef ENABLE_CHECKING
/* Verify that we can read the original value back in. */
- if (mode != VOIDmode)
+ if (flag_checking && mode != VOIDmode)
{
real_from_string (&r, str);
real_convert (&r, mode, &r);
gcc_assert (real_identical (&r, r_orig));
}
-#endif
}
/* Likewise, except always uses round-to-nearest. */
/* Nonzero value, possibly overflowing or underflowing. */
mpfr_init2 (m, SIGNIFICAND_BITS);
- inexact = mpfr_strtofr (m, str, NULL, 10, GMP_RNDZ);
+ inexact = mpfr_strtofr (m, str, NULL, 10, MPFR_RNDZ);
/* The result should never be a NaN, and because the rounding is
toward zero should never be an infinity. */
gcc_assert (!mpfr_nan_p (m) && !mpfr_inf_p (m));
}
else
{
- real_from_mpfr (r, m, NULL_TREE, GMP_RNDZ);
+ real_from_mpfr (r, m, NULL_TREE, MPFR_RNDZ);
/* 1 to 3 bits may have been shifted off (with a sticky bit)
because the hex digits used in real_from_mpfr did not
start with a digit 8 to f, but the exponent bounds above
should have avoided underflow or overflow. */
- gcc_assert (r->cl = rvc_normal);
+ gcc_assert (r->cl == rvc_normal);
/* Set a sticky bit if mpfr_strtofr was inexact. */
r->sig[0] |= inexact;
+ mpfr_clear (m);
}
}
/* Legacy. Similar, but return the result directly. */
REAL_VALUE_TYPE
-real_from_string2 (const char *s, enum machine_mode mode)
+real_from_string2 (const char *s, format_helper fmt)
{
REAL_VALUE_TYPE r;
real_from_string (&r, s);
- if (mode != VOIDmode)
- real_convert (&r, mode, &r);
+ if (fmt)
+ real_convert (&r, fmt, &r);
return r;
}
-/* Initialize R from string S and desired MODE. */
+/* Initialize R from string S and desired format FMT. */
void
-real_from_string3 (REAL_VALUE_TYPE *r, const char *s, enum machine_mode mode)
+real_from_string3 (REAL_VALUE_TYPE *r, const char *s, format_helper fmt)
{
- if (DECIMAL_FLOAT_MODE_P (mode))
+ if (fmt.decimal_p ())
decimal_real_from_string (r, s);
else
real_from_string (r, s);
- if (mode != VOIDmode)
- real_convert (r, mode, r);
+ if (fmt)
+ real_convert (r, fmt, r);
}
-/* Initialize R from the wide_int VAL_IN. The MODE is not VOIDmode,*/
+/* Initialize R from the wide_int VAL_IN. Round it to format FMT if
+ FMT is nonnull. */
void
-real_from_integer (REAL_VALUE_TYPE *r, enum machine_mode mode,
+real_from_integer (REAL_VALUE_TYPE *r, format_helper fmt,
const wide_int_ref &val_in, signop sgn)
{
if (val_in == 0)
normalize (r);
}
- if (DECIMAL_FLOAT_MODE_P (mode))
+ if (fmt.decimal_p ())
decimal_from_integer (r);
- else if (mode != VOIDmode)
- real_convert (r, mode, r);
+ if (fmt)
+ real_convert (r, fmt, r);
}
/* Render R, an integral value, as a floating point constant with no
{
mpfr_t m;
mpfr_init2 (m, SIGNIFICAND_BITS);
- mpfr_set_ui (m, 1, GMP_RNDN);
- mpfr_exp (m, m, GMP_RNDN);
- real_from_mpfr (&value, m, NULL_TREE, GMP_RNDN);
+ mpfr_set_ui (m, 1, MPFR_RNDN);
+ mpfr_exp (m, m, MPFR_RNDN);
+ real_from_mpfr (&value, m, NULL_TREE, MPFR_RNDN);
mpfr_clear (m);
}
return &value;
}
-/* Returns the special REAL_VALUE_TYPE corresponding to 1/3. */
-
-const REAL_VALUE_TYPE *
-dconst_third_ptr (void)
-{
- static REAL_VALUE_TYPE value;
-
- /* Initialize mathematical constants for constant folding builtins.
- These constants need to be given to at least 160 bits precision. */
- if (value.cl == rvc_zero)
- {
- real_arithmetic (&value, RDIV_EXPR, &dconst1, real_digit (3));
- }
- return &value;
-}
+/* Returns a cached REAL_VALUE_TYPE corresponding to 1/n, for various n. */
+
+#define CACHED_FRACTION(NAME, N) \
+ const REAL_VALUE_TYPE * \
+ NAME (void) \
+ { \
+ static REAL_VALUE_TYPE value; \
+ \
+ /* Initialize mathematical constants for constant folding builtins. \
+ These constants need to be given to at least 160 bits \
+ precision. */ \
+ if (value.cl == rvc_zero) \
+ real_arithmetic (&value, RDIV_EXPR, &dconst1, real_digit (N)); \
+ return &value; \
+ }
+
+CACHED_FRACTION (dconst_third_ptr, 3)
+CACHED_FRACTION (dconst_quarter_ptr, 4)
+CACHED_FRACTION (dconst_sixth_ptr, 6)
+CACHED_FRACTION (dconst_ninth_ptr, 9)
/* Returns the special REAL_VALUE_TYPE corresponding to sqrt(2). */
{
mpfr_t m;
mpfr_init2 (m, SIGNIFICAND_BITS);
- mpfr_sqrt_ui (m, 2, GMP_RNDN);
- real_from_mpfr (&value, m, NULL_TREE, GMP_RNDN);
+ mpfr_sqrt_ui (m, 2, MPFR_RNDN);
+ real_from_mpfr (&value, m, NULL_TREE, MPFR_RNDN);
mpfr_clear (m);
}
return &value;
bool
real_nan (REAL_VALUE_TYPE *r, const char *str, int quiet,
- enum machine_mode mode)
+ format_helper fmt)
{
- const struct real_format *fmt;
-
- fmt = REAL_MODE_FORMAT (mode);
- gcc_assert (fmt);
-
if (*str == 0)
{
if (quiet)
/* Our MSB is always unset for NaNs. */
r->sig[SIGSZ-1] &= ~SIG_MSB;
- /* Force quiet or signalling NaN. */
+ /* Force quiet or signaling NaN. */
r->signalling = !quiet;
}
If SIGN is nonzero, R is set to the most negative finite value. */
void
-real_maxval (REAL_VALUE_TYPE *r, int sign, enum machine_mode mode)
+real_maxval (REAL_VALUE_TYPE *r, int sign, machine_mode mode)
{
const struct real_format *fmt;
int np2;
/* Fills R with 2**N. */
void
-real_2expN (REAL_VALUE_TYPE *r, int n, enum machine_mode fmode)
+real_2expN (REAL_VALUE_TYPE *r, int n, format_helper fmt)
{
memset (r, 0, sizeof (*r));
SET_REAL_EXP (r, n);
r->sig[SIGSZ-1] = SIG_MSB;
}
- if (DECIMAL_FLOAT_MODE_P (fmode))
- decimal_real_convert (r, fmode, r);
+ if (fmt.decimal_p ())
+ decimal_real_convert (r, fmt, r);
}
\f
(e.g. -O0 on '_Decimal32 x = 1.0 + 2.0dd'), but have not
investigated whether this convert needs to be here, or
something else is missing. */
- decimal_real_convert (r, DFmode, r);
+ decimal_real_convert (r, REAL_MODE_FORMAT (DFmode), r);
}
p2 = fmt->p;
{
underflow:
get_zero (r, r->sign);
+ /* FALLTHRU */
case rvc_zero:
if (!fmt->has_signed_zero)
r->sign = 0;
clear_significand_below (r, np2);
}
-/* Extend or truncate to a new mode. */
+/* Extend or truncate to a new format. */
void
-real_convert (REAL_VALUE_TYPE *r, enum machine_mode mode,
+real_convert (REAL_VALUE_TYPE *r, format_helper fmt,
const REAL_VALUE_TYPE *a)
{
- const struct real_format *fmt;
-
- fmt = REAL_MODE_FORMAT (mode);
- gcc_assert (fmt);
-
*r = *a;
if (a->decimal || fmt->b == 10)
- decimal_real_convert (r, mode, a);
+ decimal_real_convert (r, fmt, a);
round_for_format (fmt, r);
+ /* Make resulting NaN value to be qNaN. The caller has the
+ responsibility to avoid the operation if flag_signaling_nans
+ is on. */
+ if (r->cl == rvc_nan)
+ r->signalling = 0;
+
/* round_for_format de-normalizes denormals. Undo just that part. */
if (r->cl == rvc_normal)
normalize (r);
/* Legacy. Likewise, except return the struct directly. */
REAL_VALUE_TYPE
-real_value_truncate (enum machine_mode mode, REAL_VALUE_TYPE a)
+real_value_truncate (format_helper fmt, REAL_VALUE_TYPE a)
{
REAL_VALUE_TYPE r;
- real_convert (&r, mode, &a);
+ real_convert (&r, fmt, &a);
return r;
}
-/* Return true if truncating to MODE is exact. */
+/* Return true if truncating to FMT is exact. */
bool
-exact_real_truncate (enum machine_mode mode, const REAL_VALUE_TYPE *a)
+exact_real_truncate (format_helper fmt, const REAL_VALUE_TYPE *a)
{
- const struct real_format *fmt;
REAL_VALUE_TYPE t;
int emin2m1;
- fmt = REAL_MODE_FORMAT (mode);
- gcc_assert (fmt);
-
/* Don't allow conversion to denormals. */
emin2m1 = fmt->emin - 1;
if (REAL_EXP (a) <= emin2m1)
return false;
- /* After conversion to the new mode, the value must be identical. */
- real_convert (&t, mode, a);
+ /* After conversion to the new format, the value must be identical. */
+ real_convert (&t, fmt, a);
return real_identical (&t, a);
}
Legacy: return word 0 for implementing REAL_VALUE_TO_TARGET_SINGLE. */
long
-real_to_target_fmt (long *buf, const REAL_VALUE_TYPE *r_orig,
- const struct real_format *fmt)
+real_to_target (long *buf, const REAL_VALUE_TYPE *r_orig,
+ format_helper fmt)
{
REAL_VALUE_TYPE r;
long buf1;
return *buf;
}
-/* Similar, but look up the format from MODE. */
-
-long
-real_to_target (long *buf, const REAL_VALUE_TYPE *r, enum machine_mode mode)
-{
- const struct real_format *fmt;
-
- fmt = REAL_MODE_FORMAT (mode);
- gcc_assert (fmt);
-
- return real_to_target_fmt (buf, r, fmt);
-}
-
/* Read R from the given target format. Read the words of the result
in target word order in BUF. There are always 32 bits in each
long, no matter the size of the host long. */
void
-real_from_target_fmt (REAL_VALUE_TYPE *r, const long *buf,
- const struct real_format *fmt)
-{
- (*fmt->decode) (fmt, r, buf);
-}
-
-/* Similar, but look up the format from MODE. */
-
-void
-real_from_target (REAL_VALUE_TYPE *r, const long *buf, enum machine_mode mode)
+real_from_target (REAL_VALUE_TYPE *r, const long *buf, format_helper fmt)
{
- const struct real_format *fmt;
-
- fmt = REAL_MODE_FORMAT (mode);
- gcc_assert (fmt);
-
(*fmt->decode) (fmt, r, buf);
}
/* Return the number of bits of the largest binary value that the
- significand of MODE will hold. */
+ significand of FMT will hold. */
/* ??? Legacy. Should get access to real_format directly. */
int
-significand_size (enum machine_mode mode)
+significand_size (format_helper fmt)
{
- const struct real_format *fmt;
-
- fmt = REAL_MODE_FORMAT (mode);
if (fmt == NULL)
return 0;
if (fmt->b == 10)
{
/* Return the size in bits of the largest binary value that can be
- held by the decimal coefficient for this mode. This is one more
+ held by the decimal coefficient for this format. This is one more
than the number of bits required to hold the largest coefficient
- of this mode. */
+ of this format. */
double log2_10 = 3.3219281;
return fmt->p * log2_10;
}
return h;
case rvc_normal:
- h |= REAL_EXP (r) << 3;
+ h |= (unsigned int)REAL_EXP (r) << 3;
break;
case rvc_nan:
128,
31,
31,
+ 32,
false,
true,
true,
true,
true,
true,
- false
+ false,
+ "ieee_single"
};
const struct real_format mips_single_format =
128,
31,
31,
+ 32,
false,
true,
true,
true,
true,
false,
- true
+ true,
+ "mips_single"
};
const struct real_format motorola_single_format =
128,
31,
31,
+ 32,
false,
true,
true,
true,
true,
true,
- true
+ true,
+ "motorola_single"
};
/* SPU Single Precision (Extended-Range Mode) format is the same as IEEE
129,
31,
31,
+ 0,
true,
false,
false,
true,
true,
false,
- false
+ false,
+ "spu_single"
};
\f
/* IEEE double-precision format. */
1024,
63,
63,
+ 64,
false,
true,
true,
true,
true,
true,
- false
+ false,
+ "ieee_double"
};
const struct real_format mips_double_format =
1024,
63,
63,
+ 64,
false,
true,
true,
true,
true,
false,
- true
+ true,
+ "mips_double"
};
const struct real_format motorola_double_format =
1024,
63,
63,
+ 64,
false,
true,
true,
true,
true,
true,
- true
+ true,
+ "motorola_double"
};
\f
/* IEEE extended real format. This comes in three flavors: Intel's as
long intermed[3];
encode_ieee_extended (fmt, intermed, r);
+ if (r->cl == rvc_inf)
+ /* For infinity clear the explicit integer bit again, so that the
+ format matches the canonical infinity generated by the FPU. */
+ intermed[1] = 0;
+
/* Motorola chips are assumed always to be big-endian. Also, the
padding in a Motorola extended real goes between the exponent and
the mantissa. At this point the mantissa is entirely within
16384,
95,
95,
+ 0,
false,
true,
true,
true,
true,
true,
- true
+ true,
+ "ieee_extended_motorola"
};
const struct real_format ieee_extended_intel_96_format =
16384,
79,
79,
+ 65,
false,
true,
true,
true,
true,
true,
- false
+ false,
+ "ieee_extended_intel_96"
};
const struct real_format ieee_extended_intel_128_format =
16384,
79,
79,
+ 65,
false,
true,
true,
true,
true,
true,
- false
+ false,
+ "ieee_extended_intel_128"
};
/* The following caters to i386 systems that set the rounding precision
16384,
79,
79,
+ 33,
false,
true,
true,
true,
true,
true,
- false
+ false,
+ "ieee_extended_intel_96_round_53"
};
\f
/* IBM 128-bit extended precision format: a pair of IEEE double precision
1024,
127,
-1,
+ 0,
false,
true,
true,
true,
true,
true,
- false
+ false,
+ "ibm_extended"
};
const struct real_format mips_extended_format =
1024,
127,
-1,
+ 0,
false,
true,
true,
true,
true,
false,
- true
+ true,
+ "mips_extended"
};
\f
16384,
127,
127,
+ 128,
false,
true,
true,
true,
true,
true,
- false
+ false,
+ "ieee_quad"
};
const struct real_format mips_quad_format =
16384,
127,
127,
+ 128,
false,
true,
true,
true,
true,
false,
- true
+ true,
+ "mips_quad"
};
\f
/* Descriptions of VAX floating point formats can be found beginning at
127,
15,
15,
+ 0,
+ false,
false,
false,
false,
false,
false,
false,
- false
+ "vax_f"
};
const struct real_format vax_d_format =
127,
15,
15,
+ 0,
+ false,
false,
false,
false,
false,
false,
false,
- false
+ "vax_d"
};
const struct real_format vax_g_format =
1023,
15,
15,
+ 0,
false,
false,
false,
false,
false,
false,
- false
+ false,
+ "vax_g"
};
\f
/* Encode real R into a single precision DFP value in BUF. */
97,
31,
31,
+ 32,
false,
true,
true,
true,
true,
true,
- false
+ false,
+ "decimal_single"
};
/* Double precision decimal floating point (IEEE 754). */
385,
63,
63,
+ 64,
false,
true,
true,
true,
true,
true,
- false
+ false,
+ "decimal_double"
};
/* Quad precision decimal floating point (IEEE 754). */
6145,
127,
127,
+ 128,
false,
true,
true,
true,
true,
true,
- false
+ false,
+ "decimal_quad"
};
\f
/* Encode half-precision floats. This routine is used both for the IEEE
}
}
+/* Encode arm_bfloat types. */
+static void
+encode_arm_bfloat_half (const struct real_format *fmt, long *buf,
+ const REAL_VALUE_TYPE *r)
+{
+ unsigned long image, sig, exp;
+ unsigned long sign = r->sign;
+ bool denormal = (r->sig[SIGSZ-1] & SIG_MSB) == 0;
+
+ image = sign << 15;
+ sig = (r->sig[SIGSZ-1] >> (HOST_BITS_PER_LONG - 8)) & 0x7f;
+
+ switch (r->cl)
+ {
+ case rvc_zero:
+ break;
+
+ case rvc_inf:
+ if (fmt->has_inf)
+ image |= 255 << 7;
+ else
+ image |= 0x7fff;
+ break;
+
+ case rvc_nan:
+ if (fmt->has_nans)
+ {
+ if (r->canonical)
+ sig = (fmt->canonical_nan_lsbs_set ? (1 << 6) - 1 : 0);
+ if (r->signalling == fmt->qnan_msb_set)
+ sig &= ~(1 << 6);
+ else
+ sig |= 1 << 6;
+ if (sig == 0)
+ sig = 1 << 5;
+
+ image |= 255 << 7;
+ image |= sig;
+ }
+ else
+ image |= 0x7fff;
+ break;
+
+ case rvc_normal:
+ if (denormal)
+ exp = 0;
+ else
+ exp = REAL_EXP (r) + 127 - 1;
+ image |= exp << 7;
+ image |= sig;
+ break;
+
+ default:
+ gcc_unreachable ();
+ }
+
+ buf[0] = image;
+}
+
+/* Decode arm_bfloat types. */
+static void
+decode_arm_bfloat_half (const struct real_format *fmt, REAL_VALUE_TYPE *r,
+ const long *buf)
+{
+ unsigned long image = buf[0] & 0xffff;
+ bool sign = (image >> 15) & 1;
+ int exp = (image >> 7) & 0xff;
+
+ memset (r, 0, sizeof (*r));
+ image <<= HOST_BITS_PER_LONG - 8;
+ image &= ~SIG_MSB;
+
+ if (exp == 0)
+ {
+ if (image && fmt->has_denorm)
+ {
+ r->cl = rvc_normal;
+ r->sign = sign;
+ SET_REAL_EXP (r, -126);
+ r->sig[SIGSZ-1] = image << 1;
+ normalize (r);
+ }
+ else if (fmt->has_signed_zero)
+ r->sign = sign;
+ }
+ else if (exp == 255 && (fmt->has_nans || fmt->has_inf))
+ {
+ if (image)
+ {
+ r->cl = rvc_nan;
+ r->sign = sign;
+ r->signalling = (((image >> (HOST_BITS_PER_LONG - 2)) & 1)
+ ^ fmt->qnan_msb_set);
+ r->sig[SIGSZ-1] = image;
+ }
+ else
+ {
+ r->cl = rvc_inf;
+ r->sign = sign;
+ }
+ }
+ else
+ {
+ r->cl = rvc_normal;
+ r->sign = sign;
+ SET_REAL_EXP (r, exp - 127 + 1);
+ r->sig[SIGSZ-1] = image | SIG_MSB;
+ }
+}
+
/* Half-precision format, as specified in IEEE 754R. */
const struct real_format ieee_half_format =
{
16,
15,
15,
+ 16,
false,
true,
true,
true,
true,
true,
- false
+ false,
+ "ieee_half"
};
/* ARM's alternative half-precision format, similar to IEEE but with
17,
15,
15,
+ 0,
+ false,
+ true,
+ false,
false,
true,
+ true,
+ false,
false,
+ "arm_half"
+ };
+
+/* ARM Bfloat half-precision format. This format resembles a truncated
+ (16-bit) version of the 32-bit IEEE 754 single-precision floating-point
+ format. */
+const struct real_format arm_bfloat_half_format =
+ {
+ encode_arm_bfloat_half,
+ decode_arm_bfloat_half,
+ 2,
+ 8,
+ 8,
+ -125,
+ 128,
+ 15,
+ 15,
+ 0,
false,
true,
true,
+ true,
+ true,
+ true,
+ true,
false,
- false
+ "arm_bfloat_half"
};
+
\f
/* A synthetic "format" for internal arithmetic. It's the size of the
internal significand minus the two bits needed for proper rounding.
MAX_EXP,
-1,
-1,
+ 0,
false,
false,
true,
false,
true,
true,
- false
+ false,
+ "real_internal"
};
\f
-/* Calculate X raised to the integer exponent N in mode MODE and store
+/* Calculate X raised to the integer exponent N in format FMT and store
the result in R. Return true if the result may be inexact due to
loss of precision. The algorithm is the classic "left-to-right binary
method" described in section 4.6.3 of Donald Knuth's "Seminumerical
Algorithms", "The Art of Computer Programming", Volume 2. */
bool
-real_powi (REAL_VALUE_TYPE *r, enum machine_mode mode,
+real_powi (REAL_VALUE_TYPE *r, format_helper fmt,
const REAL_VALUE_TYPE *x, HOST_WIDE_INT n)
{
unsigned HOST_WIDE_INT bit;
neg = false;
t = *x;
- bit = (unsigned HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1);
+ bit = HOST_WIDE_INT_1U << (HOST_BITS_PER_WIDE_INT - 1);
for (i = 0; i < HOST_BITS_PER_WIDE_INT; i++)
{
if (init)
if (neg)
inexact |= do_divide (&t, &dconst1, &t);
- real_convert (r, mode, &t);
+ real_convert (r, fmt, &t);
return inexact;
}
/* Round X to the nearest integer not larger in absolute value, i.e.
- towards zero, placing the result in R in mode MODE. */
+ towards zero, placing the result in R in format FMT. */
void
-real_trunc (REAL_VALUE_TYPE *r, enum machine_mode mode,
+real_trunc (REAL_VALUE_TYPE *r, format_helper fmt,
const REAL_VALUE_TYPE *x)
{
do_fix_trunc (r, x);
- if (mode != VOIDmode)
- real_convert (r, mode, r);
+ if (fmt)
+ real_convert (r, fmt, r);
}
/* Round X to the largest integer not greater in value, i.e. round
- down, placing the result in R in mode MODE. */
+ down, placing the result in R in format FMT. */
void
-real_floor (REAL_VALUE_TYPE *r, enum machine_mode mode,
+real_floor (REAL_VALUE_TYPE *r, format_helper fmt,
const REAL_VALUE_TYPE *x)
{
REAL_VALUE_TYPE t;
do_fix_trunc (&t, x);
if (! real_identical (&t, x) && x->sign)
do_add (&t, &t, &dconstm1, 0);
- if (mode != VOIDmode)
- real_convert (r, mode, &t);
+ if (fmt)
+ real_convert (r, fmt, &t);
else
*r = t;
}
/* Round X to the smallest integer not less then argument, i.e. round
- up, placing the result in R in mode MODE. */
+ up, placing the result in R in format FMT. */
void
-real_ceil (REAL_VALUE_TYPE *r, enum machine_mode mode,
+real_ceil (REAL_VALUE_TYPE *r, format_helper fmt,
const REAL_VALUE_TYPE *x)
{
REAL_VALUE_TYPE t;
do_fix_trunc (&t, x);
if (! real_identical (&t, x) && ! x->sign)
do_add (&t, &t, &dconst1, 0);
- if (mode != VOIDmode)
- real_convert (r, mode, &t);
+ if (fmt)
+ real_convert (r, fmt, &t);
else
*r = t;
}
zero. */
void
-real_round (REAL_VALUE_TYPE *r, enum machine_mode mode,
+real_round (REAL_VALUE_TYPE *r, format_helper fmt,
const REAL_VALUE_TYPE *x)
{
do_add (r, x, &dconsthalf, x->sign);
do_fix_trunc (r, r);
- if (mode != VOIDmode)
- real_convert (r, mode, r);
+ if (fmt)
+ real_convert (r, fmt, r);
+}
+
+/* Return true (including 0) if integer part of R is even, else return
+ false. The function is not valid for rvc_inf and rvc_nan classes. */
+
+static bool
+is_even (REAL_VALUE_TYPE *r)
+{
+ gcc_assert (r->cl != rvc_inf);
+ gcc_assert (r->cl != rvc_nan);
+
+ if (r->cl == rvc_zero)
+ return true;
+
+ /* For (-1,1), number is even. */
+ if (REAL_EXP (r) <= 0)
+ return true;
+
+ /* Check lowest bit, if not set, return true. */
+ else if (REAL_EXP (r) <= SIGNIFICAND_BITS)
+ {
+ unsigned int n = SIGNIFICAND_BITS - REAL_EXP (r);
+ int w = n / HOST_BITS_PER_LONG;
+
+ unsigned long num = ((unsigned long)1 << (n % HOST_BITS_PER_LONG));
+
+ if ((r->sig[w] & num) == 0)
+ return true;
+ }
+ else
+ return true;
+
+ return false;
+}
+
+/* Return true if R is halfway between two integers, else return
+ false. */
+
+static bool
+is_halfway_below (const REAL_VALUE_TYPE *r)
+{
+ if (r->cl != rvc_normal)
+ return false;
+
+ /* For numbers (-0.5,0) and (0,0.5). */
+ if (REAL_EXP (r) < 0)
+ return false;
+
+ else if (REAL_EXP (r) < SIGNIFICAND_BITS)
+ {
+ unsigned int n = SIGNIFICAND_BITS - REAL_EXP (r) - 1;
+ int w = n / HOST_BITS_PER_LONG;
+
+ for (int i = 0; i < w; ++i)
+ if (r->sig[i] != 0)
+ return false;
+
+ unsigned long num = 1UL << (n % HOST_BITS_PER_LONG);
+
+ if ((r->sig[w] & num) != 0 && (r->sig[w] & (num - 1)) == 0)
+ return true;
+ }
+ return false;
+}
+
+/* Round X to nearest integer, rounding halfway cases towards even. */
+
+void
+real_roundeven (REAL_VALUE_TYPE *r, format_helper fmt,
+ const REAL_VALUE_TYPE *x)
+{
+ if (is_halfway_below (x))
+ {
+ /* Special case as -0.5 rounds to -0.0 and
+ similarly +0.5 rounds to +0.0. */
+ if (REAL_EXP (x) == 0)
+ {
+ *r = *x;
+ clear_significand_below (r, SIGNIFICAND_BITS);
+ }
+ else
+ {
+ do_add (r, x, &dconsthalf, x->sign);
+ if (!is_even (r))
+ do_add (r, r, &dconstm1, x->sign);
+ }
+ if (fmt)
+ real_convert (r, fmt, r);
+ }
+ else
+ real_round (r, fmt, x);
}
/* Set the sign of R to the sign of X. */
r->sign = x->sign;
}
-/* Check whether the real constant value given is an integer. */
+/* Check whether the real constant value given is an integer.
+ Returns false for signaling NaN. */
bool
-real_isinteger (const REAL_VALUE_TYPE *c, enum machine_mode mode)
+real_isinteger (const REAL_VALUE_TYPE *c, format_helper fmt)
{
REAL_VALUE_TYPE cint;
- real_trunc (&cint, mode, c);
+ real_trunc (&cint, fmt, c);
return real_identical (c, &cint);
}
+/* Check whether C is an integer that fits in a HOST_WIDE_INT,
+ storing it in *INT_OUT if so. */
+
+bool
+real_isinteger (const REAL_VALUE_TYPE *c, HOST_WIDE_INT *int_out)
+{
+ REAL_VALUE_TYPE cint;
+
+ HOST_WIDE_INT n = real_to_integer (c);
+ real_from_integer (&cint, VOIDmode, n, SIGNED);
+ if (real_identical (c, &cint))
+ {
+ *int_out = n;
+ return true;
+ }
+ return false;
+}
+
+/* Calculate nextafter (X, Y) or nexttoward (X, Y). Return true if
+ underflow or overflow needs to be raised. */
+
+bool
+real_nextafter (REAL_VALUE_TYPE *r, format_helper fmt,
+ const REAL_VALUE_TYPE *x, const REAL_VALUE_TYPE *y)
+{
+ int cmp = do_compare (x, y, 2);
+ /* If either operand is NaN, return qNaN. */
+ if (cmp == 2)
+ {
+ get_canonical_qnan (r, 0);
+ return false;
+ }
+ /* If x == y, return y cast to target type. */
+ if (cmp == 0)
+ {
+ real_convert (r, fmt, y);
+ return false;
+ }
+
+ if (x->cl == rvc_zero)
+ {
+ get_zero (r, y->sign);
+ r->cl = rvc_normal;
+ SET_REAL_EXP (r, fmt->emin - fmt->p + 1);
+ r->sig[SIGSZ - 1] = SIG_MSB;
+ return false;
+ }
+
+ int np2 = SIGNIFICAND_BITS - fmt->p;
+ /* For denormals adjust np2 correspondingly. */
+ if (x->cl == rvc_normal && REAL_EXP (x) < fmt->emin)
+ np2 += fmt->emin - REAL_EXP (x);
+
+ REAL_VALUE_TYPE u;
+ get_zero (r, x->sign);
+ get_zero (&u, 0);
+ set_significand_bit (&u, np2);
+ r->cl = rvc_normal;
+ SET_REAL_EXP (r, REAL_EXP (x));
+
+ if (x->cl == rvc_inf)
+ {
+ bool borrow = sub_significands (r, r, &u, 0);
+ gcc_assert (borrow);
+ SET_REAL_EXP (r, fmt->emax);
+ }
+ else if (cmp == (x->sign ? 1 : -1))
+ {
+ if (add_significands (r, x, &u))
+ {
+ /* Overflow. Means the significand had been all ones, and
+ is now all zeros. Need to increase the exponent, and
+ possibly re-normalize it. */
+ SET_REAL_EXP (r, REAL_EXP (r) + 1);
+ if (REAL_EXP (r) > fmt->emax)
+ {
+ get_inf (r, x->sign);
+ return true;
+ }
+ r->sig[SIGSZ - 1] = SIG_MSB;
+ }
+ }
+ else
+ {
+ if (REAL_EXP (x) > fmt->emin && x->sig[SIGSZ - 1] == SIG_MSB)
+ {
+ int i;
+ for (i = SIGSZ - 2; i >= 0; i--)
+ if (x->sig[i])
+ break;
+ if (i < 0)
+ {
+ /* When mantissa is 1.0, we need to subtract only
+ half of u: nextafter (1.0, 0.0) is 1.0 - __DBL_EPSILON__ / 2
+ rather than 1.0 - __DBL_EPSILON__. */
+ clear_significand_bit (&u, np2);
+ np2--;
+ set_significand_bit (&u, np2);
+ }
+ }
+ sub_significands (r, x, &u, 0);
+ }
+
+ /* Clear out trailing garbage. */
+ clear_significand_below (r, np2);
+ normalize (r);
+ if (REAL_EXP (r) <= fmt->emin - fmt->p)
+ {
+ get_zero (r, x->sign);
+ return true;
+ }
+ return r->cl == rvc_zero || REAL_EXP (r) < fmt->emin;
+}
+
/* Write into BUF the maximum representable finite floating-point
number, (1 - b**-p) * b**emax for a given FP format FMT as a hex
float string. LEN is the size of BUF, and the buffer must be large
- enough to contain the resulting string. */
+ enough to contain the resulting string. If NORM_MAX, instead write
+ the maximum representable finite normalized floating-point number,
+ defined to be such that all choices of digits for that exponent are
+ representable in the format (this only makes a difference for IBM
+ long double). */
void
-get_max_float (const struct real_format *fmt, char *buf, size_t len)
+get_max_float (const struct real_format *fmt, char *buf, size_t len,
+ bool norm_max)
{
int i, n;
char *p;
+ bool is_ibm_extended = fmt->pnan < fmt->p;
strcpy (buf, "0x0.");
n = fmt->p;
*p++ = 'f';
if (i < n)
*p++ = "08ce"[n - i];
- sprintf (p, "p%d", fmt->emax);
- if (fmt->pnan < fmt->p)
+ sprintf (p, "p%d",
+ (is_ibm_extended && norm_max) ? fmt->emax - 1 : fmt->emax);
+ if (is_ibm_extended && !norm_max)
{
/* This is an IBM extended double format made up of two IEEE
doubles. The value of the long double is the sum of the
gcc_assert (strlen (buf) < len);
}
+
+/* True if all values of integral type can be represented
+ by this floating-point type exactly. */
+
+bool format_helper::can_represent_integral_type_p (tree type) const
+{
+ gcc_assert (! decimal_p () && INTEGRAL_TYPE_P (type));
+
+ /* INT?_MIN is power-of-two so it takes
+ only one mantissa bit. */
+ bool signed_p = TYPE_SIGN (type) == SIGNED;
+ return TYPE_PRECISION (type) - signed_p <= significand_size (*this);
+}
+
+/* True if mode M has a NaN representation and
+ the treatment of NaN operands is important. */
+
+bool
+HONOR_NANS (machine_mode m)
+{
+ return MODE_HAS_NANS (m) && !flag_finite_math_only;
+}
+
+bool
+HONOR_NANS (const_tree t)
+{
+ return HONOR_NANS (element_mode (t));
+}
+
+bool
+HONOR_NANS (const_rtx x)
+{
+ return HONOR_NANS (GET_MODE (x));
+}
+
+/* Like HONOR_NANs, but true if we honor signaling NaNs (or sNaNs). */
+
+bool
+HONOR_SNANS (machine_mode m)
+{
+ return flag_signaling_nans && HONOR_NANS (m);
+}
+
+bool
+HONOR_SNANS (const_tree t)
+{
+ return HONOR_SNANS (element_mode (t));
+}
+
+bool
+HONOR_SNANS (const_rtx x)
+{
+ return HONOR_SNANS (GET_MODE (x));
+}
+
+/* As for HONOR_NANS, but true if the mode can represent infinity and
+ the treatment of infinite values is important. */
+
+bool
+HONOR_INFINITIES (machine_mode m)
+{
+ return MODE_HAS_INFINITIES (m) && !flag_finite_math_only;
+}
+
+bool
+HONOR_INFINITIES (const_tree t)
+{
+ return HONOR_INFINITIES (element_mode (t));
+}
+
+bool
+HONOR_INFINITIES (const_rtx x)
+{
+ return HONOR_INFINITIES (GET_MODE (x));
+}
+
+/* Like HONOR_NANS, but true if the given mode distinguishes between
+ positive and negative zero, and the sign of zero is important. */
+
+bool
+HONOR_SIGNED_ZEROS (machine_mode m)
+{
+ return MODE_HAS_SIGNED_ZEROS (m) && flag_signed_zeros;
+}
+
+bool
+HONOR_SIGNED_ZEROS (const_tree t)
+{
+ return HONOR_SIGNED_ZEROS (element_mode (t));
+}
+
+bool
+HONOR_SIGNED_ZEROS (const_rtx x)
+{
+ return HONOR_SIGNED_ZEROS (GET_MODE (x));
+}
+
+/* Like HONOR_NANS, but true if given mode supports sign-dependent rounding,
+ and the rounding mode is important. */
+
+bool
+HONOR_SIGN_DEPENDENT_ROUNDING (machine_mode m)
+{
+ return MODE_HAS_SIGN_DEPENDENT_ROUNDING (m) && flag_rounding_math;
+}
+
+bool
+HONOR_SIGN_DEPENDENT_ROUNDING (const_tree t)
+{
+ return HONOR_SIGN_DEPENDENT_ROUNDING (element_mode (t));
+}
+
+bool
+HONOR_SIGN_DEPENDENT_ROUNDING (const_rtx x)
+{
+ return HONOR_SIGN_DEPENDENT_ROUNDING (GET_MODE (x));
+}
+
+/* Fills r with the largest value such that 1 + r*r won't overflow.
+ This is used in both sin (atan (x)) and cos (atan(x)) optimizations. */
+
+void
+build_sinatan_real (REAL_VALUE_TYPE * r, tree type)
+{
+ REAL_VALUE_TYPE maxval;
+ mpfr_t mpfr_const1, mpfr_c, mpfr_maxval;
+ machine_mode mode = TYPE_MODE (type);
+ const struct real_format * fmt = REAL_MODE_FORMAT (mode);
+
+ real_maxval (&maxval, 0, mode);
+
+ mpfr_inits (mpfr_const1, mpfr_c, mpfr_maxval, NULL);
+
+ mpfr_from_real (mpfr_const1, &dconst1, MPFR_RNDN);
+ mpfr_from_real (mpfr_maxval, &maxval, MPFR_RNDN);
+
+ mpfr_sub (mpfr_c, mpfr_maxval, mpfr_const1, MPFR_RNDN);
+ mpfr_sqrt (mpfr_c, mpfr_c, MPFR_RNDZ);
+
+ real_from_mpfr (r, mpfr_c, fmt, MPFR_RNDZ);
+
+ mpfr_clears (mpfr_const1, mpfr_c, mpfr_maxval, NULL);
+}
projects / thirdparty / gcc.git / blobdiff